diff --git a/.idea/misc.xml b/.idea/misc.xml index 7e12e6ffcd2ae857055fe0934808f6d33067b4a2..93e6826dd6b06dbe2188055baca77f56ea1ce0a2 100644 --- a/.idea/misc.xml +++ b/.idea/misc.xml @@ -3,8 +3,12 @@ <component name="JavaScriptSettings"> <option name="languageLevel" value="ES6" /> </component> + <component name="MacroExpansionManager"> + <option name="directoryName" value="bQZDmOwZ" /> + </component> <component name="ProjectRootManager" version="2" languageLevel="JDK_1_3" default="false" project-jdk-name="Python 2.7.12+ (/usr/bin/python2.7)" project-jdk-type="Python SDK" /> <component name="RustProjectSettings"> <option name="toolchainHomeDirectory" value="$USER_HOME$/.cargo/bin" /> + <option name="version" value="2" /> </component> </project> \ No newline at end of file diff --git a/.idea/runConfigurations/All_Mocha_Tests.xml b/.idea/runConfigurations/All_Mocha_Tests.xml index 174eae9d36c94df90f78e7cebf683d949f0fb60c..d88b6413478f1dcbc67cfe63d5a947380d9f8b6d 100644 --- a/.idea/runConfigurations/All_Mocha_Tests.xml +++ b/.idea/runConfigurations/All_Mocha_Tests.xml @@ -1,15 +1,15 @@ <component name="ProjectRunConfigurationManager"> - <configuration default="false" name="All Mocha Tests" type="mocha-javascript-test-runner" factoryName="Mocha"> + <configuration default="false" name="All Mocha Tests" type="mocha-javascript-test-runner"> <node-interpreter>project</node-interpreter> <node-options /> + <mocha-package>$PROJECT_DIR$/node_modules/mocha</mocha-package> <working-directory>$PROJECT_DIR$</working-directory> <pass-parent-env>true</pass-parent-env> - <envs /> <ui>bdd</ui> <extra-mocha-options /> <test-kind>DIRECTORY</test-kind> <test-directory>$PROJECT_DIR$/test</test-directory> <recursive>false</recursive> - <method /> + <method v="2" /> </configuration> </component> \ No newline at end of file diff --git a/.istanbul.yml b/.istanbul.yml index 17feb91106483a5044a57ecc0dbe07acd3815a3e..776a21f59841dfd43bf7f07ecae41f8d18576326 100644 --- a/.istanbul.yml +++ b/.istanbul.yml @@ -3,7 +3,6 @@ instrumentation: include-all-sources: true excludes: - "handlers/asm-docs.js" - - "restreamer.js" - "compilers/fake-for-test.js" reporting: dir: ./out/coverage diff --git a/.travis.yml b/.travis.yml index 1d71844d9eaed4e48b3365b217fec460b33c91a3..44333815fc81f98febd2991fced4c762bbc881fd 100644 --- a/.travis.yml +++ b/.travis.yml @@ -5,8 +5,8 @@ language: node_js before_install: - etc/scripts/travis.sh -node_js: - - "8" +node_js: + - "10" before_script: - export PATH=$PATH:$PWD/.travis-compilers/ghc/bin @@ -28,7 +28,7 @@ script: deploy: on: - all_branches: + all_branches: true provider: s3 bucket: "compiler-explorer" diff --git a/CONTRIBUTORS.md b/CONTRIBUTORS.md index 9b8105fd5ef61be16e6adc0d0c384672741694ec..49137afca3d276b25a45972e74390e27c84b5082 100644 --- a/CONTRIBUTORS.md +++ b/CONTRIBUTORS.md @@ -25,6 +25,7 @@ From oldest to newest contributor, we would like to thank: - [Brian Cain](https://github.com/androm3da) - [Alexander Monakov](https://github.com/amonakov) - [David Nadlinger](https://github.com/klickverbot) +- [Marc Poulhiès](https://github.com/dkm) - [Carlos van Rooijen](https://github.com/CvRXX) - [Kaartic Sivaraam](https://github.com/sivaraam) - [Lilian A. Moraru](https://github.com/lilianmoraru) @@ -66,3 +67,7 @@ From oldest to newest contributor, we would like to thank: - [Erik Little](https://github.com/nuclearace) - [Jülich Supercomputing Centre](https://github.com/FZJ-JSC) - [Niall Douglas](https://github.com/ned14) +- [Daniel Black](https://github.com/grooverdan) +- [Gennadiy Civil](https://github.com/gennadiycivil) +- [Paul Scharnofske](https://github.com/asynts) +- [Sebastian Staffa](https://github.com/Staff-d) diff --git a/Makefile b/Makefile index ed6ef6fe68a01df2318a802ade4cdc67d4bf9f78..19005089175c10c3946028596b1a31483206ef43 100644 --- a/Makefile +++ b/Makefile @@ -108,6 +108,7 @@ dist: prereqs cp -r static/dist/ out/dist/ cp -r static/vs/ out/dist/ cp -r static/policies/ out/dist/ + echo ${HASH} > out/dist/git_hash travis-dist: dist tar --exclude './.travis-compilers' --exclude './.git' --exclude './static' -Jcf /tmp/ce-build.tar.xz . diff --git a/README.md b/README.md index 907b303cb59d4e57952dfd5f5eb2e2af9f8a8703..920c14c7e56c6350ffd4ed08e42983897b6dbb59 100644 --- a/README.md +++ b/README.md @@ -7,7 +7,7 @@ Compiler Explorer ------------ **Compiler Explorer** is an interactive compiler. The left-hand pane shows - editable C, C++, Rust, Go, D, Haskell, Swift and Pascal code. + editable C, C++, Rust, Go, D, Haskell, Swift, Pascal (and some more!) code. The right, the assembly output of having compiled the code with a given compiler and settings. Multiple compilers are supported, and the UI layout is configurable (thanks to [GoldenLayout](https://www.golden-layout.com/)). @@ -21,16 +21,21 @@ You can support [this project on Patreon](https://patreon.com/mattgodbolt). **Compiler Explorer** follows a [Code of Conduct](CODE_OF_CONDUCT.md) which aims to foster an open and welcoming environment. +**Compiler Explorer** was started in 2012 to serve my needs at [my previous employer](https://drw.com) to show how + C++ constructs translated to assembly code. It started out as a `tmux` session with `vi` running in one + pane and `watch gcc -S foo.cc -o -` running in the other. +Since then, it has become a public website serving around 140,000 compilations per day. + ##### Contact us -For general discussion, please join the mailing list at - https://groups.google.com/forum/#!forum/compiler-explorer-discussion or the - [cpplang](https://cpplang.now.sh/) slack channel `#compiler_explorer`. +For general discussion, please join the + [cpplang](https://cpplang.now.sh/) slack channel `#compiler_explorer` or + [the public mailing list](https://groups.google.com/forum/#!forum/compiler-explorer-discussion) If you are interested in developing, or want to see the discussions between - existing developers, feel free to join the mailing list at - https://groups.google.com/forum/#!forum/compiler-explorer-development or the - [cpplang](https://cpplang.now.sh/) slack channel `#ce_implementation`. + existing developers, feel free to join the [cpplang](https://cpplang.now.sh/) + slack channel `#ce_implementation` or + [the development mailing list](https://groups.google.com/forum/#!forum/compiler-explorer-development) Feel free to raise an issue on [github](https://github.com/mattgodbolt/compiler-explorer/issues) or @@ -45,7 +50,7 @@ Assuming you have a compatible version of `node` installed, simply running on your local machine: http://localhost:10240/. Currently **Compiler Explorer** [requires the latest LTS](CONTRIBUTING.md#node-version) `node` version - (_v8_) installed, either on the path or at `NODE_DIR` + (_v10_) installed, either on the path or at `NODE_DIR` (an environment variable or `make` parameter). @@ -55,7 +60,6 @@ Running with `make EXTRA_ARGS='--language LANG'` will allow you to load third party libraries needed to run; using `yarn` to install server-side and client side components. - The config system leaves a lot to be desired. Work has been done on porting [CCS](https://github.com/hellige/ccs-cpp) to Javascript and then something more rational can be used. @@ -68,7 +72,7 @@ A [Road map](Roadmap.md) is available which gives a little insight into If you want to point it at your own GCC or similar binaries, either edit the `etc/config/LANG.defaults.properties` or else make a new one with - the name `LANG.local.properties`, subsituting `LANG` as needed. + the name `LANG.local.properties`, substituting `LANG` as needed. `*.local.properties` files have the highest priority when loading properties. When running in a corporate setting the URL shortening service can be replaced diff --git a/Roadmap.md b/Roadmap.md index 4f58ae334b1e0afcd43995977822c62f47349c64..153c3c8152ba9dc7f182b72c780de178bccb91a8 100644 --- a/Roadmap.md +++ b/Roadmap.md @@ -1,31 +1,25 @@ # Compiler Explorer Road Map - -CE was started in 2012 to serve my needs at [my previous employer](https://drw.com) to show how -C++ constructs translated to assembly code. It started out as a `tmux` session with `vi` running in one -pane and `watch gcc -S foo.cc -o -` running in the other. Since then, it became a public website -serving the C++, Rust, Go, Haskell, Ispc, D, Swift and Pascal communities and performs around 50,000 compilations per day. - This document is an attempt to capture thoughts on the future direction of Compiler Explorer. ## Areas to improve ### Mobile client support -CE's UI doesn't work well with mobile clients. The [editor](https://github.com/Microsoft/monaco-editor) doesn't support mobile clients, and the -layout doesn't lend itself well to small screens. +CE's UI doesn't work well with mobile clients. The [editor](https://github.com/Microsoft/monaco-editor) + doesn't support mobile clients, and the layout doesn't lend itself well to small screens. Ideas for improving mobile support include automatically folding up all the panes into a single tab upon -detection of a mobile client. This would require a bunch of fixes in the -underlying [UI library](http://golden-layout.com) as this doesn't properly work with mobile and tabs. + detection of a mobile client. This would require a bunch of fixes in the + underlying [UI library](http://golden-layout.com) as this doesn't properly work with mobile and tabs. Perhaps a read-only simplified view would work better: the main reason one brings up the CE website is to -look at tweeted links rather than author novel content. + look at tweeted links rather than author novel content. Note that there have been some tentative work + on an app-based solution, but nothing has solidified yet. ### UI improvements -The UI has a number of things that need improving: - -- [ ] Handling the loss of data if one has a work-in-progress CE window open and then clicks another CE link. +The UI has a number of things that need improving, but one of the things we are looking at is how to + handle the loss of data that happens if one has a work-in-progress CE window open and then clicks another CE link. ### Execution support @@ -37,10 +31,6 @@ license allows), and stores the binaries in ephemeral, shared storage. This same be used to store code, and could be part of a whole new way of sending and sharing code (if made permanent storage). -### Saved state storage - -In April 2018, Google announced they were mothballing goo.gl, which is the URL shortening service Compiler Explorer ultimately uses to store its current data. As such a solution to stored state - whether as part of the execution support, or independent of it - is required anyway. - ### Support more compilers Most of the open tickets are to do with adding new compilers, or fixing issues with existing compilers. @@ -62,10 +52,9 @@ That also means that URLs should live forever once they are created CE will remain ad-free, open-source and non-commercial. There's no plans at all to add "freemium" content, despite the Patreon site where folks can help support the cost of running the servers. -## 2018 goals +## 2019 goals With all this in mind, the tentative goals for 2018 are: -- [ ] Replace goo.gl with our own storage solution. ([Project Link](https://github.com/mattgodbolt/compiler-explorer/projects)) - [ ] Design an API that can handle remote code execution and download needs - [ ] Implement remote execution UIs diff --git a/app.js b/app.js index 9d7dd87de228645ca29e7a8cb70cdcdb0018d3b0..7905c9a76f83bbb319136617e8c6c9cc832986b8 100755 --- a/app.js +++ b/app.js @@ -36,7 +36,7 @@ const nopt = require('nopt'), url = require('url'), _ = require('underscore'), express = require('express'), - Raven = require('raven'), + Sentry = require('@sentry/node'), logger = require('./lib/logger').logger, webpackDevMiddleware = require("webpack-dev-middleware"), utils = require('./lib/utils'), @@ -55,11 +55,16 @@ const opts = nopt({ debug: [Boolean], static: [String], archivedVersions: [String], + // Ignore fetch marks and assume every compiler is found locally noRemoteFetch: [Boolean], tmpDir: [String], wsl: [Boolean], + // If specified, only loads the specified language, resulting in faster loadup/iteration times language: [String], - noCache: [Boolean] + // Do not use caching for compilation results (Requests might still be cached by the client's browser) + noCache: [Boolean], + // Don't cleanly run if two or more compilers have clashing ids + ensureNoIdClash: [Boolean] }); if (opts.debug) logger.level = 'debug'; @@ -103,7 +108,8 @@ const defArgs = { gitReleaseName: gitReleaseName, wantedLanguage: opts.language || null, doCache: !opts.noCache, - fetchCompilersFromRemote: !opts.noRemoteFetch + fetchCompilersFromRemote: !opts.noRemoteFetch, + ensureNoCompilerClash: opts.ensureNoIdClash }; const webpackConfig = require('./webpack.config.js')[1], @@ -162,7 +168,9 @@ const compilerProps = new props.CompilerProps(languages, ceProps); const staticMaxAgeSecs = ceProps('staticMaxAgeSecs', 0); const maxUploadSize = ceProps('maxUploadSize', '1mb'); const extraBodyClass = ceProps('extraBodyClass', ''); +const storageSolution = compilerProps.ceProps('storageSolution', 'local'); const httpRoot = ceProps('httpRoot', '/'); +const httpRootDir = httpRoot.endsWith('/') ? httpRoot : (httpRoot + '/'); function staticHeaders(res) { if (staticMaxAgeSecs) { @@ -202,7 +210,7 @@ aws.initConfig(awsProps) const CompilationEnvironment = require('./lib/compilation-env'); const compilationEnvironment = new CompilationEnvironment(compilerProps, defArgs.doCache); const CompileHandler = require('./lib/handlers/compile').Handler; - const compileHandler = new CompileHandler(compilationEnvironment); + const compileHandler = new CompileHandler(compilationEnvironment, awsProps); const StorageHandler = require('./lib/storage/storage'); const storageHandler = StorageHandler.storageFactory(compilerProps, awsProps); const ApiHandler = require('./lib/handlers/api').Handler; @@ -212,13 +220,13 @@ aws.initConfig(awsProps) const CompilerFinder = require('./lib/compiler-finder'); const compilerFinder = new CompilerFinder(compileHandler, compilerProps, awsProps, defArgs, clientOptionsHandler); + const googleShortUrlResolver = new google.ShortLinkResolver(); function oldGoogleUrlHandler(req, res, next) { - const resolver = new google.ShortLinkResolver(aws.getConfig('googleApiKey')); const bits = req.url.split("/"); if (bits.length !== 2 || req.method !== "GET") return next(); - const googleUrl = `http://goo.gl/${encodeURIComponent(bits[1])}`; - resolver.resolve(googleUrl) + const googleUrl = `https://goo.gl/${encodeURIComponent(bits[1])}`; + googleShortUrlResolver.resolve(googleUrl) .then(resultObj => { const parsed = url.parse(resultObj.longUrl); const allowedRe = new RegExp(ceProps('allowedShortUrlHostRe')); @@ -227,7 +235,7 @@ aws.initConfig(awsProps) return next(); } res.writeHead(301, { - Location: resultObj.id, + Location: resultObj.longUrl, 'Cache-Control': 'public' }); res.end(); @@ -268,18 +276,29 @@ aws.initConfig(awsProps) } compilerFinder.find() - .then(compilers => { + .then(result => { + let compilers = result.compilers; let prevCompilers; + if (defArgs.ensureNoCompilerClash) { + logger.warn('Ensuring no compiler ids clash'); + if (result.foundClash) { + // If we are forced to have no clashes, throw an error with some explanation + throw new Error('Clashing compilers in the current environment found!'); + } else { + logger.info('No clashing ids found, continuing normally...'); + } + } - const ravenPrivateEndpoint = aws.getConfig('ravenPrivateEndpoint'); - if (ravenPrivateEndpoint) { - Raven.config(ravenPrivateEndpoint, { + const sentryDsn = aws.getConfig('sentryDsn'); + if (sentryDsn) { + Sentry.init({ + dsn: sentryDsn, release: gitReleaseName, environment: defArgs.env - }).install(); - logger.info("Configured with raven endpoint", ravenPrivateEndpoint); + }); + logger.info("Configured with Sentry endpoint", sentryDsn); } else { - Raven.config(false).install(); + logger.info("Not configuring sentry"); } function onCompilerChange(compilers) { @@ -302,7 +321,7 @@ aws.initConfig(awsProps) const rescanCompilerSecs = ceProps('rescanCompilerSecs', 0); if (rescanCompilerSecs) { logger.info(`Rescanning compilers every ${rescanCompilerSecs} secs`); - setInterval(() => compilerFinder.find().then(onCompilerChange), + setInterval(() => compilerFinder.find().then(result => onCompilerChange(result.compilers)), rescanCompilerSecs * 1000); } @@ -311,16 +330,43 @@ aws.initConfig(awsProps) bodyParser = require('body-parser'), morgan = require('morgan'), compression = require('compression'), - restreamer = require('./lib/restreamer'); + router = express.Router(), + healthCheck = require('./lib/handlers/health-check'); + + webServer + .set('trust proxy', true) + .set('view engine', 'pug') + .on('error', err => logger.error('Caught error:', err, "(in web handler; continuing)")) + // Handle healthchecks at the root, as they're not expected from the outside world + .use('/healthcheck', new healthCheck.HealthCheckHandler().handle) + .use(httpRootDir, router) + .use((req, res, next) => { + next({status: 404, message: `page "${req.path}" could not be found`}); + }) + .use(Sentry.Handlers.errorHandler) + // eslint-disable-next-line no-unused-vars + .use((err, req, res, next) => { + const status = + err.status || + err.statusCode || + err.status_code || + (err.output && err.output.statusCode) || + 500; + const message = err.message || 'Internal Server Error'; + res.status(status); + res.render('error', renderConfig({error: {code: status, message: message}})); + }); logger.info("======================================="); if (gitReleaseName) logger.info(` git release ${gitReleaseName}`); - const httpRootDir = httpRoot.endsWith('/') ? httpRoot : (httpRoot + '/'); + function renderConfig(extra) { const options = _.extend(extra, clientOptionsHandler.get()); options.compilerExplorerOptions = JSON.stringify(options); options.extraBodyClass = extraBodyClass; options.httpRoot = httpRoot; + options.httpRootDir = httpRootDir; + options.storageSolution = storageSolution; options.require = function (path) { if (isDevMode()) { if (fs.existsSync('static/assets/' + path)) { @@ -350,7 +396,7 @@ aws.initConfig(awsProps) } else if (userAgent === 'Twitterbot/1.0') { // TODO: Escape to something Twitter likes return line; - } else if (userAgent === 'Slackbot-LinkExpanding 1.0') { + } else if (userAgent.includes('Slackbot-LinkExpanding 1.0')) { // TODO: Escape to something Slack likes return line; } @@ -368,6 +414,61 @@ aws.initConfig(awsProps) return code; } + function renderGoldenLayout(config, metadata, res) { + staticHeaders(res); + contentPolicyHeader(res); + res.render('index', renderConfig({ + embedded: false, + config: config, + metadata: metadata + })); + } + + function renderClientState(clientstate, metadata, res) { + const config = getGoldenLayoutFromClientState(clientstate); + + renderGoldenLayout(config, metadata, res); + } + + function getMetaDataFromLink(req, link, config) { + const metadata = { + ogDescription: null, + ogAuthor: null, + ogTitle: "Compiler Explorer" + }; + + if (link) { + metadata.ogDescription = link.specialMetadata ? link.specialMetadata.description.S : null; + metadata.ogAuthor = link.specialMetadata ? link.specialMetadata.author.S : null; + metadata.ogTitle = link.specialMetadata ? link.specialMetadata.title.S : "Compiler Explorer"; + } + + if (!metadata.ogDescription) { + const sources = utils.glGetMainContents(config.content); + if (sources.editors.length === 1) { + const editor = sources.editors[0]; + const lang = languages[editor.language]; + if (lang) { + metadata.ogDescription = filterCode(req, editor.source, lang); + metadata.ogTitle += ` - ${lang.name}`; + if (sources.compilers.length === 1) { + const compilerId = sources.compilers[0].compiler; + const compiler = apiHandler.compilers.find(c => c.id === compilerId); + if (compiler) { + metadata.ogTitle += ` (${compiler.name})`; + } + } + } else { + metadata.ogDescription = editor.source; + } + } + } else if (metadata.ogAuthor && metadata.ogAuthor !== '.') { + metadata.ogDescription += `\nAuthor(s): ${metadata.ogAuthor}`; + } + + return metadata; + } + function storedStateHandlerResetLayout(req, res, next) { const id = req.params.id; storageHandler.expandId(id) @@ -382,42 +483,8 @@ aws.initConfig(awsProps) config = new clientState.State(config); } - config = getGoldenLayoutFromClientState(config); - - const metadata = { - ogDescription: result.specialMetadata ? result.specialMetadata.description.S : null, - ogAuthor: result.specialMetadata ? result.specialMetadata.author.S : null, - ogTitle: result.specialMetadata ? result.specialMetadata.title.S : "Compiler Explorer" - }; - if (!metadata.ogDescription) { - const sources = utils.glGetMainContents(config.content); - if (sources.editors.length === 1) { - const editor = sources.editors[0]; - const lang = languages[editor.language]; - if (lang) { - metadata.ogDescription = filterCode(req, editor.source, lang); - metadata.ogTitle += ` - ${lang.name}`; - if (sources.compilers.length === 1) { - const compilerId = sources.compilers[0].compiler; - const compiler = apiHandler.compilers.find(c => c.id === compilerId); - if (compiler) { - metadata.ogTitle += ` (${compiler.name})`; - } - } - } else { - metadata.ogDescription = editor.source; - } - } - } else if (metadata.ogAuthor && metadata.ogAuthor !== '.') { - metadata.ogDescription += `\nAuthor(s): ${metadata.ogAuthor}`; - } - staticHeaders(res); - contentPolicyHeader(res); - res.render('index', renderConfig({ - embedded: false, - config: config, - metadata: metadata - })); + const metadata = getMetaDataFromLink(req, result, config); + renderClientState(config, metadata, res); }) .catch(err => { logger.warn(`Exception thrown when expanding ${id}`); @@ -429,6 +496,14 @@ aws.initConfig(awsProps) }); } + function unstoredStateHandler(req, res) { + const state = JSON.parse(Buffer.from(req.params.clientstatebase64, 'base64').toString()); + const config = getGoldenLayoutFromClientState(new clientState.State(state)); + const metadata = getMetaDataFromLink(req, null, config); + + renderGoldenLayout(config, metadata, res); + } + function storedStateHandler(req, res, next) { const id = req.params.id; storageHandler.expandId(id) @@ -437,44 +512,18 @@ aws.initConfig(awsProps) if (config.sessions) { config = getGoldenLayoutFromClientState(new clientState.State(config)); } - const metadata = { - ogDescription: result.specialMetadata ? result.specialMetadata.description.S : null, - ogAuthor: result.specialMetadata ? result.specialMetadata.author.S : null, - ogTitle: result.specialMetadata ? result.specialMetadata.title.S : "Compiler Explorer" - }; - if (!metadata.ogDescription) { - const sources = utils.glGetMainContents(config.content); - if (sources.editors.length === 1) { - const editor = sources.editors[0]; - const lang = languages[editor.language]; - if (lang) { - metadata.ogDescription = filterCode(req, editor.source, lang); - metadata.ogTitle += ` - ${lang.name}`; - if (sources.compilers.length === 1) { - const compilerId = sources.compilers[0].compiler; - const compiler = apiHandler.compilers.find(c => c.id === compilerId); - if (compiler) { - metadata.ogTitle += ` (${compiler.name})`; - } - } - } else { - metadata.ogDescription = editor.source; - } - } - } else if (metadata.ogAuthor && metadata.ogAuthor !== '.') { - metadata.ogDescription += `\nAuthor(s): ${metadata.ogAuthor}`; - } - staticHeaders(res); - contentPolicyHeader(res); - res.render('index', renderConfig({ - embedded: false, - config: config, - metadata: metadata - })); + const metadata = getMetaDataFromLink(req, result, config); + renderGoldenLayout(config, metadata, res); + // And finally, increment the view count + // If any errors pop up, they are just logged, but the response should still be valid + // It's really unlikely that it happens as a result of the id not being there though, + // but can be triggered with a missing implementation for a derived storage (s3/local...) + storageHandler.incrementViewCount(id).catch(err => { + logger.error(`Error incrementing view counts for ${id} - ${err}`); + }); }) .catch(err => { - logger.warn(`Exception thrown when expanding ${id}`); - logger.debug('Exception value:', err); + logger.warn(`Could not expand ${id}: ${err}`); next({ statusCode: 404, message: `ID "${id}" could not be found` @@ -487,19 +536,18 @@ aws.initConfig(awsProps) contentPolicyHeader(res); res.render('embed', renderConfig({embedded: true})); }; - const healthCheck = require('./lib/handlers/health-check'); if (isDevMode()) { - webServer.use(webpackDevMiddleware(webpackCompiler, { + router.use(webpackDevMiddleware(webpackCompiler, { publicPath: webpackConfig.output.publicPath, logger: logger })); - webServer.use(express.static(defArgs.staticDir)); + router.use(express.static(defArgs.staticDir)); logger.info(" using webpack dev middleware"); } else { /* Assume that anything not dev is just production. * This gives sane defaults for anyone who isn't messing with this */ logger.info(" serving static files from '" + defArgs.staticDir + "'"); - webServer.use(express.static(defArgs.staticDir, {maxAge: staticMaxAgeSecs * 1000})); + router.use(express.static(defArgs.staticDir, {maxAge: staticMaxAgeSecs * 1000})); } morgan.token('gdpr_ip', req => utils.anonymizeIp(req.ip)); @@ -507,12 +555,8 @@ aws.initConfig(awsProps) // Based on combined format, but: GDPR compliant IP, no timestamp & no unused fields for our usecase const morganFormat = isDevMode() ? 'dev' : ':gdpr_ip ":method :url" :status'; - webServer - .use(Raven.requestHandler()) - .set('trust proxy', true) - .set('view engine', 'pug') - // before morgan so healthchecks aren't logged - .use('/healthcheck', new healthCheck.HealthCheckHandler().handle) + router + .use(Sentry.Handlers.requestHandler()) .use(morgan(morganFormat, { stream: logger.stream, // Skip for non errors (2xx, 3xx) @@ -554,32 +598,14 @@ aws.initConfig(awsProps) .use(sFavicon(path.join(defArgs.staticDir, webpackConfig.output.publicPath, 'favicon.ico'))) .use(bodyParser.json({limit: ceProps('bodyParserLimit', maxUploadSize)})) .use(bodyParser.text({limit: ceProps('bodyParserLimit', maxUploadSize), type: () => true})) - .use(restreamer()) .use('/source', sourceHandler.handle.bind(sourceHandler)) .use('/api', apiHandler.handle) .use('/g', oldGoogleUrlHandler) .get('/z/:id', storedStateHandler) .get('/resetlayout/:id', storedStateHandlerResetLayout) - .post('/shortener', storageHandler.handler.bind(storageHandler)) - .use((req, res, next) => { - next({status: 404, message: `page "${req.path}" could not be found`}); - }) - .use((err, req, res, next) => { - Raven.errorHandler()(err, req, res, next); - }) - // eslint-disable-next-line no-unused-vars - .use((err, req, res, next) => { - const status = - err.status || - err.statusCode || - err.status_code || - (err.output && err.output.statusCode) || - 500; - const message = err.message || 'Internal Server Error'; - res.status(status); - res.render('error', renderConfig({ error: {code: status, message: message} })); - }) - .on('error', err => logger.error('Caught error:', err, "(in web handler; continuing)")); + .get('/clientstate/:clientstatebase64', unstoredStateHandler) + .post('/shortener', storageHandler.handler.bind(storageHandler)); + if (!defArgs.doCache) { logger.info(" with disabled caching"); } diff --git a/c-preload/compiler-wrapper b/c-preload/compiler-wrapper index d8af5c1acaddc9e081bd7250be65ae777c6f1aed..9148d82b7dee03a44dd5d64212add0713d02c0b3 100755 --- a/c-preload/compiler-wrapper +++ b/c-preload/compiler-wrapper @@ -4,7 +4,7 @@ DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )" export LD_PRELOAD=${DIR}/libpreload.so export ALLOWED_FOR_CREATE=/tmp:/dev/null -export ALLOWED_FOR_READ=/usr/local/include:/usr/include:/usr/lib:/lib:/lib64:/usr/msp430:/usr/arm-linux-gnueabi:/tmp:/opt/:/dev/urandom:/etc/lsb-release:/etc/debian_version:/proc/cpuinfo:/proc/self:/proc/self/maps:/usr/arm-linux-gnueabihf:/usr/aarch64-linux-gnu:/usr/powerpc-linux-gnu/include:/usr/lib/x86_64-linux-gnu:/usr/mips-linux-gnu:/usr/mipsel-linux-gnu:/usr/mips64-linux-gnuabi64:/usr/mips64el-linux-gnuabi64:/gcc-explorer:/compiler-explorer:/usr/glibc-compat/lib +export ALLOWED_FOR_READ=/usr/local/include:/usr/include:/usr/lib:/lib:/lib64:/usr/msp430:/usr/arm-linux-gnueabi:/tmp:/opt/:/celibs/:/dev/urandom:/etc/lsb-release:/etc/debian_version:/proc/cpuinfo:/proc/self:/proc/self/maps:/usr/arm-linux-gnueabihf:/usr/aarch64-linux-gnu:/usr/powerpc-linux-gnu/include:/usr/lib/x86_64-linux-gnu:/usr/mips-linux-gnu:/usr/mipsel-linux-gnu:/usr/mips64-linux-gnuabi64:/usr/mips64el-linux-gnuabi64:/gcc-explorer:/compiler-explorer:/usr/glibc-compat/lib export DENIED=/proc/self/cwd:/proc/self/root:/proc/self/exe # Wine configuration export DISPLAY= diff --git a/docs/API.md b/docs/API.md index e2bdebbfafd7bd634bec18eab35003af3505bb99..cd56135bfa16bcb7b02c80989cb1d928c6514489 100644 --- a/docs/API.md +++ b/docs/API.md @@ -139,6 +139,42 @@ If JSON is present in the request's `Accept` header, the compilation results } ``` +# Not-so-RESTful API's + +### `POST /shortener` - saves given state *forever* to a shortlink and returns the unique id for the link + +The body of this post should be in the format of a [ClientState](https://github.com/mattgodbolt/compiler-explorer/blob/master/lib/clientstate.js) + +An example of one the easiest forms of a clientstate: +``` +{ + sessions: [ + { + id: 1, + language: 'c++', + source: 'int main() { return 42; }', + compilers: [ + { + id: 'g82', + options: '-O3' + } + ] + } + ] +} +``` + +Returns: +`{"storedId":"abcdef"}` + +The storedId can be used in the api call /api/shortlinkinfo/<id> and to open in the website with a /z/<id> shortlink. + +### `GET /clientstate/<base64>` - Opens the website in a given state + +This call is to open the website with a given state (without having to store the state first with /shortener) +Instead of sending the ClientState JSON in the post body, it will have to be encoded with base64 and attached directly onto the URL. + + # Implementations Here are some examples of projects using the Compiler Explorer API: diff --git a/docs/UpdatingAsmDocsx86.md b/docs/UpdatingAsmDocsx86.md new file mode 100644 index 0000000000000000000000000000000000000000..88d7f6d7b27454c0c0a56c7d2dcca3b906d1dd13 --- /dev/null +++ b/docs/UpdatingAsmDocsx86.md @@ -0,0 +1,9 @@ +If you need to update the x86 asm documentation, just run `etc/scripts/docenizer.py`, which requires: + - Python 2.7 with BeautifulSoup + +You can use some options in the script: + - `-o`/`--outputpath` - Final destination of the generated JavaScript file + - `-i`/`--inputfolder` - Points to the downloaded and extracted .html files + - `-d`/`--downloadfolder` - Points to the download folder to use in case a new version is needed + +Now you only need to run it, and hope for the best. Please report any problems you encounter diff --git a/docs/WindowsSubsystemForLinux.md b/docs/WindowsSubsystemForLinux.md index f3b04a112d4d61226fd3b8ceeaa96468af8ebfab..dd32bb7677f5cad9f5a42d319da8033f4f8a586d 100644 --- a/docs/WindowsSubsystemForLinux.md +++ b/docs/WindowsSubsystemForLinux.md @@ -26,7 +26,7 @@ CE is built on node.js ("node"). The easiest way to install node is using NVM, t - `curl https://raw.githubusercontent.com/creationix/nvm/v0.33.8/install.sh | bash` to install NVM - `source ~/.profile` to reload your profile, bringing NVM into your environment - `nvm ls-remote -lts` to show the latest long-term supported (LTS) version of node.js -- `nvm install 8.9.3`, substituting the latest LTS version, to install node.js +- `nvm install 10.15.3`, substituting the latest LTS version, to install node.js At this point you can change into the directory where you cloned CE and `make`. `make` will install a bunch of node packages and will finish with a message similar to this: diff --git a/etc/config/ada.amazon.properties b/etc/config/ada.amazon.properties new file mode 100644 index 0000000000000000000000000000000000000000..03015672237bb67e8ee76a674e39ba7bc792d04d --- /dev/null +++ b/etc/config/ada.amazon.properties @@ -0,0 +1,27 @@ +# Default settings for Ada +compilers=&gnat +defaultCompiler=gnat82 +demangler=/opt/compiler-explorer/gcc-8.1.0/bin/c++filt +objdumper=/opt/compiler-explorer/gcc-8.1.0/bin/objdump +versionFlag=--version +supportsBinary=false +supportsExecute=false +intelAsm=-masm=intel +compilerType=ada + +############################### +# GCC (as in GNU Compiler Collection) for x86 +group.gnat.compilers=gnat82:gnatsnapshot +group.gnat.groupName=GNAT x86-64 +group.gnat.isSemVer=true +group.gnat.baseName=x86-64 gnat +compiler.gnat82.exe=/opt/compiler-explorer/gcc-8.2.0/bin/gnat +compiler.gnat82.semver=8.2 +compiler.gnatsnapshot.exe=/opt/compiler-explorer/gcc-snapshot/bin/gnat +compiler.gnatsnapshot.name=x86-64 gnat (trunk) +compiler.gnatsnapshot.semver=(trunk) + +################################# +################################# +# Installed libs (See c++.amazon.properties for a scheme of libs group) +libs= diff --git a/etc/config/ada.defaults.properties b/etc/config/ada.defaults.properties new file mode 100644 index 0000000000000000000000000000000000000000..98659bdbcf9e7b9ba6297a58885e642743411468 --- /dev/null +++ b/etc/config/ada.defaults.properties @@ -0,0 +1,15 @@ +# Default settings for Ada +compilers=/usr/bin/gnat +defaultCompiler=gnat +demangler=c++filt +objdumper=objdump +versionFlag=--version +supportsBinary=false +supportsExecute=false +compilerType=ada +intelAsm=-masm=intel + +################################# +################################# +# Installed libs (See c++.amazon.properties for a scheme of libs group) +libs= diff --git a/etc/config/assembly.amazon.properties b/etc/config/assembly.amazon.properties index c76dbb82707d649b345733e52ba661af3b4af867..4f5fed2dd334572ab8b49b29b53d793aa853b0fa 100644 --- a/etc/config/assembly.amazon.properties +++ b/etc/config/assembly.amazon.properties @@ -1,11 +1,11 @@ compilers=&nasm:&gnuas:&llvmas compilerType=assembly -objdumper=/opt/compiler-explorer/gcc-8.1.0/bin/objdump +objdumper=/opt/compiler-explorer/gcc-8.3.0/bin/objdump supportsBinary=false demangler= -defaultCompiler=nasm21303 +defaultCompiler=nasm21402 -group.nasm.compilers=nasm21202:nasm21302:nasm21303 +group.nasm.compilers=nasm21202:nasm21302:nasm21303:nasm21402 group.nasm.versionFlag=-v group.nasm.options=-f elf -g -F stabs group.nasm.isSemVer=true @@ -16,8 +16,11 @@ compiler.nasm21302.semver=2.13.02 compiler.nasm21302.exe=/opt/compiler-explorer/nasm-2.13.02/nasm compiler.nasm21303.semver=2.13.03 compiler.nasm21303.exe=/opt/compiler-explorer/nasm-2.13.03/nasm +compiler.nasm21402.semver=2.14.02 +compiler.nasm21402.exe=/opt/compiler-explorer/nasm-2.14.02/nasm -group.gnuas.compilers=gnuas510:gnuas520:gnuas530:gnuas540:gnuas6:gnuas62:gnuas63:gnuas71:gnuas72:gnuas73:gnuas81:gnuassnapshot + +group.gnuas.compilers=gnuas510:gnuas520:gnuas530:gnuas540:gnuas6:gnuas62:gnuas63:gnuas71:gnuas72:gnuas73:gnuas81:gnuas82:gnuas83:gnuassnapshot group.gnuas.versionFlag=--version group.gnuas.options=-g group.gnuas.isSemVer=true @@ -44,10 +47,14 @@ compiler.gnuas73.exe=/opt/compiler-explorer/gcc-7.3.0/bin/as compiler.gnuas73.semver=7.3 compiler.gnuas81.exe=/opt/compiler-explorer/gcc-8.1.0/bin/as compiler.gnuas81.semver=8.1 +compiler.gnuas82.exe=/opt/compiler-explorer/gcc-8.2.0/bin/as +compiler.gnuas82.semver=8.2 +compiler.gnuas83.exe=/opt/compiler-explorer/gcc-8.3.0/bin/as +compiler.gnuas83.semver=8.3 compiler.gnuassnapshot.exe=/opt/compiler-explorer/gcc-snapshot/bin/as compiler.gnuassnapshot.semver=(trunk) -group.llvmas.compilers=llvmas30:llvmas31:llvmas32:llvmas33:llvmas341:llvmas350:llvmas351:llvmas37x:llvmas36x:llvmas371:llvmas380:llvmas381:llvmas390:llvmas391:llvmas400:llvmas401:llvmas500:llvmas600:llvmas_trunk +group.llvmas.compilers=llvmas30:llvmas31:llvmas32:llvmas33:llvmas341:llvmas350:llvmas351:llvmas37x:llvmas36x:llvmas371:llvmas380:llvmas381:llvmas390:llvmas391:llvmas400:llvmas401:llvmas500:llvmas600:llvmas700:llvmas800:llvmas_trunk group.llvmas.versionFlag=--version group.llvmas.options=-filetype=obj -o example.o group.llvmas.versionRe=LLVM version .* @@ -91,6 +98,10 @@ compiler.llvmas500.exe=/opt/compiler-explorer/clang-5.0.0/bin/llvm-mc compiler.llvmas500.semver=5.0.0 compiler.llvmas600.exe=/opt/compiler-explorer/clang-6.0.0/bin/llvm-mc compiler.llvmas600.semver=6.0.0 +compiler.llvmas700.exe=/opt/compiler-explorer/clang-7.0.0/bin/llvm-mc +compiler.llvmas700.semver=7.0.0 +compiler.llvmas800.exe=/opt/compiler-explorer/clang-8.0.0/bin/llvm-mc +compiler.llvmas800.semver=8.0.0 compiler.llvmas_trunk.exe=/opt/compiler-explorer/clang-trunk/bin/llvm-mc compiler.llvmas_trunk.semver=(trunk) diff --git a/etc/config/aws.amazon.properties b/etc/config/aws.amazon.properties index 35348d11700f610061f22cefd3795547ee3f258f..923b7a6edfe73fd3fe3d8ea2f7bf06c8340be546 100644 --- a/etc/config/aws.amazon.properties +++ b/etc/config/aws.amazon.properties @@ -2,3 +2,5 @@ region=us-east-1 storageBucket=storage.godbolt.org storagePrefix=state storageDynamoTable=links +storageBucketArgStats=storage.godbolt.org +storagePrefixArgStats=compargs diff --git a/etc/config/c++.amazon.properties b/etc/config/c++.amazon.properties index bfc7891470aafdd3b982bb7f8bc75275e8239f26..6e520e88151cada697f01d10008833804dc4706f 100644 --- a/etc/config/c++.amazon.properties +++ b/etc/config/c++.amazon.properties @@ -1,12 +1,12 @@ -compilers=&gcc86:&icc:&clang:&rvclang:&cl:&cross:&ellcc:&zapcc:www.godbolt.ms@443 -defaultCompiler=g82 +compilers=&gcc86:&icc:&clang:&rvclang:&cl:&cross:&ellcc:&zapcc:www.godbolt.ms@443:&djggp +defaultCompiler=g83 demangler=/opt/compiler-explorer/gcc-8.2.0/bin/c++filt objdumper=/opt/compiler-explorer/gcc-8.2.0/bin/objdump needsMulti=false ############################### # GCC for x86 -group.gcc86.compilers=g412:g447:g453:g464:g471:g472:g473:g474:g481:g482:g483:g484:g485:g490:g491:g492:g493:g494:g510:g520:g530:g540:g550:g6:g62:g63:g71:g72:g73:g81:g82:gsnapshot +group.gcc86.compilers=g412:g447:g453:g464:g471:g472:g473:g474:g481:g482:g483:g484:g485:g490:g491:g492:g493:g494:g510:g520:g530:g540:g550:g6:g62:g63:g71:g72:g73:g74:g81:g82:g83:gsnapshot:gcontracts-trunk:gcxx-modules-trunk group.gcc86.groupName=GCC x86-64 group.gcc86.baseName=x86-64 gcc group.gcc86.isSemVer=true @@ -74,13 +74,24 @@ compiler.g72.exe=/opt/compiler-explorer/gcc-7.2.0/bin/g++ compiler.g72.semver=7.2 compiler.g73.exe=/opt/compiler-explorer/gcc-7.3.0/bin/g++ compiler.g73.semver=7.3 +compiler.g74.exe=/opt/compiler-explorer/gcc-7.4.0/bin/g++ +compiler.g74.semver=7.4 compiler.g81.exe=/opt/compiler-explorer/gcc-8.1.0/bin/g++ compiler.g81.semver=8.1 compiler.g82.exe=/opt/compiler-explorer/gcc-8.2.0/bin/g++ compiler.g82.semver=8.2 +compiler.g83.exe=/opt/compiler-explorer/gcc-8.3.0/bin/g++ +compiler.g83.semver=8.3 compiler.gsnapshot.exe=/opt/compiler-explorer/gcc-snapshot/bin/g++ compiler.gsnapshot.semver=(trunk) compiler.gsnapshot.alias=g7snapshot +compiler.gcontracts-trunk.exe=/opt/compiler-explorer/gcc-lock3-contracts-trunk/bin/g++ +compiler.gcontracts-trunk.semver=(contracts) +compiler.gcontracts-trunk.notification=Experimental Contract Assertions; see <a href="https://gitlab.com/lock3/gcc-new/wikis/contract-assertions" target="_blank" rel="noopener noreferrer">Lock3's repository wiki<sup><small class="fas fa-external-link-alt opens-new-window" title="Opens in a new window"></small></sup></a> +compiler.gcxx-modules-trunk.exe=/opt/compiler-explorer/gcc-cxx-modules-trunk/bin/g++ +compiler.gcxx-modules-trunk.semver=(modules) +compiler.gcxx-modules-trunk.notification=Experimental Modules Support; see <a href="https://gcc.gnu.org/wiki/cxx-modules" target="_blank" rel="noopener noreferrer">the GCC Wiki<sup><small class="fas fa-external-link-alt opens-new-window" title="Opens in a new window"></small></sup></a> +compiler.gcxx-modules-trunk.options=-fmodules-ts # Some multilib workarounds for older compilers not built quite right... compiler.g63.needsMulti=true @@ -88,7 +99,7 @@ compiler.g71.needsMulti=true compiler.g72.needsMulti=true # Clang for x86 -group.clang.compilers=clang30:clang31:clang32:clang33:clang341:clang350:clang351:clang37x:clang36x:clang371:clang380:clang381:clang390:clang391:clang400:clang401:clang500:clang600:clang700:clang_trunk:clang_concepts:clang_p1144:clang_autonsdmi:clang_lifetime +group.clang.compilers=clang30:clang31:clang32:clang33:clang341:clang350:clang351:clang37x:clang36x:clang371:clang380:clang381:clang390:clang391:clang400:clang401:clang500:clang600:clang700:clang800:clang_trunk:clang_concepts:clang_p1144:clang_autonsdmi:clang_lifetime:clang_parmexpr group.clang.intelAsm=-mllvm --x86-asm-syntax=intel group.clang.options=--gcc-toolchain=/opt/compiler-explorer/gcc-7.2.0 group.clang.groupName=Clang x86-64 @@ -159,36 +170,46 @@ compiler.clang600.semver=6.0.0 compiler.clang700.exe=/opt/compiler-explorer/clang-7.0.0/bin/clang++ compiler.clang700.semver=7.0.0 compiler.clang700.options=--gcc-toolchain=/opt/compiler-explorer/gcc-8.2.0 +compiler.clang800.exe=/opt/compiler-explorer/clang-8.0.0/bin/clang++ +compiler.clang800.semver=8.0.0 +compiler.clang800.options=--gcc-toolchain=/opt/compiler-explorer/gcc-8.3.0 compiler.clang_trunk.exe=/opt/compiler-explorer/clang-trunk/bin/clang++ compiler.clang_trunk.semver=(trunk) -compiler.clang_trunk.options=--gcc-toolchain=/opt/compiler-explorer/gcc-8.2.0 +compiler.clang_trunk.options=--gcc-toolchain=/opt/compiler-explorer/gcc-8.3.0 compiler.clang_concepts.exe=/opt/compiler-explorer/clang-concepts-trunk/bin/clang++ compiler.clang_concepts.semver=(experimental concepts) compiler.clang_concepts.options=-std=c++2a -Xclang -fconcepts-ts -stdlib=libc++ -compiler.clang_concepts.notification=Highly experimental compiler. Bug reports welcomed at <a href="https://github.com/saarraz/clang-concepts/issues" target="_blank" rel="noopener noreferrer">github.com/saarraz/clang-concepts/issues <sup><small class="glyphicon glyphicon-new-window opens-new-window" title="Opens in a new window"></small></sup></a> +compiler.clang_concepts.notification=Highly experimental compiler. Bug reports welcomed at <a href="https://github.com/saarraz/clang-concepts/issues" target="_blank" rel="noopener noreferrer">github.com/saarraz/clang-concepts/issues <sup><small class="fas fa-external-link-alt opens-new-window" title="Opens in a new window"></small></sup></a> compiler.clang_p1144.exe=/opt/compiler-explorer/clang-relocatable-trunk/bin/clang++ compiler.clang_p1144.semver=(experimental P1144) compiler.clang_p1144.options=-std=c++2a -stdlib=libc++ -compiler.clang_p1144.notification=Experimental __is_trivially_relocatable; see <a href="https://quuxplusone.github.io/draft/d1144-object-relocation.html" target="_blank" rel="noopener noreferrer">P1144 <sup><small class="glyphicon glyphicon-new-window opens-new-window" title="Opens in a new window"></small></sup></a> +compiler.clang_p1144.notification=Experimental __is_trivially_relocatable; see <a href="https://quuxplusone.github.io/draft/d1144-object-relocation.html" target="_blank" rel="noopener noreferrer">P1144 <sup><small class="fas fa-external-link-alt opens-new-window" title="Opens in a new window"></small></sup></a> compiler.clang_autonsdmi.exe=/opt/compiler-explorer/clang-autonsdmi-trunk/bin/clang++ compiler.clang_autonsdmi.semver=(experimental auto NSDMI) compiler.clang_autonsdmi.options=-std=c++2a -stdlib=libc++ -compiler.clang_autonsdmi.notification=Experimental auto NSDMI; see <a href="https://cor3ntin.github.io/posts/auto_nsdmi/" target="_blank" rel="noopener noreferrer">this blog post <sup><small class="glyphicon glyphicon-new-window opens-new-window" title="Opens in a new window"></small></sup></a> for more information +compiler.clang_autonsdmi.notification=Experimental auto NSDMI; see <a href="https://cor3ntin.github.io/posts/auto_nsdmi/" target="_blank" rel="noopener noreferrer">this blog post <sup><small class="fas fa-external-link-alt opens-new-window" title="Opens in a new window"></small></sup></a> for more information compiler.clang_lifetime.exe=/opt/compiler-explorer/clang-lifetime-trunk/bin/clang++ compiler.clang_lifetime.semver=(experimental -Wlifetime) compiler.clang_lifetime.options=--gcc-toolchain=/opt/compiler-explorer/gcc-8.2.0 -Wlifetime -compiler.clang_lifetime.notification=Lifetime profile checker based on Herb Sutter's paper; see <a href="https://herbsutter.com/2018/09/20/lifetime-profile-v1-0-posted/" target="_blank" rel="noopener noreferrer">this blog post <sup><small class="glyphicon glyphicon-new-window opens-new-window" title="Opens in a new window"></small></sup></a> for more information +compiler.clang_lifetime.notification=Lifetime profile checker based on Herb Sutter's paper; see <a href="https://herbsutter.com/2018/09/20/lifetime-profile-v1-0-posted/" target="_blank" rel="noopener noreferrer">this blog post <sup><small class="fas fa-external-link-alt opens-new-window" title="Opens in a new window"></small></sup></a> for more information +compiler.clang_parmexpr.exe=/opt/compiler-explorer/clang-parmexpr-trunk/bin/clang++ +compiler.clang_parmexpr.semver=(experimental P1221) +compiler.clang_parmexpr.options=-std=c++2a -stdlib=libc++ +compiler.clang_parmexpr.notification=Experimental Parametric Expressions; see <a href="https://github.com/ricejasonf/parametric_expressions/blob/master/d1221.md" target="_blank" rel="noopener noreferrer">P1221<sup><small class="fas fa-external-link-alt opens-new-window" title="Opens in a new window"></small></sup></a> # Clang for RISC-V -group.rvclang.compilers=rv32clang +group.rvclang.compilers=rv32clang:rv64clang group.rvclang.groupName=Clang RISC-V group.rvclang.supportsBinary=false compiler.rv32clang.exe=/opt/compiler-explorer/clang-trunk/bin/clang++ -compiler.rv32clang.name=riscv32 clang (trunk) -compiler.rv32clang.options=-target riscv32 +compiler.rv32clang.name=RISC-V rv32gc clang (trunk) +compiler.rv32clang.options=-target riscv32 -march=rv32gc -mabi=ilp32 +compiler.rv64clang.exe=/opt/compiler-explorer/clang-trunk/bin/clang++ +compiler.rv64clang.name=RISC-V rv64gc clang (trunk) +compiler.rv64clang.options=-target riscv64 -march=rv64gc -mabi=lp64 # icc for x86 -group.icc.compilers=icc1301:icc16:icc17:icc18:icc19 +group.icc.compilers=icc1301:icc16:icc17:icc18:icc19:icc191 group.icc.intelAsm=-masm=intel group.icc.options=-gxx-name=/opt/compiler-explorer/gcc-4.7.1/bin/g++ group.icc.groupName=ICC x86-64 @@ -213,6 +234,9 @@ compiler.icc18.options=-gxx-name=/opt/compiler-explorer/gcc-6.3.0/bin/g++ -L/usr compiler.icc19.exe=/opt/compiler-explorer/intel-2019/bin/icc compiler.icc19.semver=19.0.0 compiler.icc19.options=-gxx-name=/opt/compiler-explorer/gcc-8.2.0/bin/g++ +compiler.icc191.exe=/opt/compiler-explorer/intel-2019.1/bin/icc +compiler.icc191.semver=19.0.1 +compiler.icc191.options=-gxx-name=/opt/compiler-explorer/gcc-8.2.0/bin/g++ # zapcc group.zapcc.compilers=zapcc190308 @@ -223,11 +247,10 @@ compiler.zapcc190308.name=x86-64 Zapcc 190308 ############################### # Cross GCC -group.cross.compilers=&ppc:&mips:&msp:&gccarm:&avr +group.cross.compilers=&ppc:&mips:&msp:&gccarm:&avr:&riscv group.cross.supportsBinary=false group.cross.groupName=Cross GCC - ############################### # GCC for PPC group.ppc.compilers=ppcg48:ppc64leg630:ppc64leg8:ppc64g8:ppc64clang:ppc64leclang @@ -254,7 +277,7 @@ compiler.ppc64leclang.options=-target powerpc64le ############################### # GCC for ARM -group.gccarm.compilers=armg454:armg464:aarchg54:armhfg54:arm541:armg630:arm710:arm64g630:armg640:armg730:armg820:arm64g640:arm64g730:arm64g820 +group.gccarm.compilers=armg454:armg464:aarchg54:armhfg54:arm541:armg630:arm710:arm64g630:armg640:armg730:armg820:arm64g640:arm64g730:arm64g820:armce820 group.gccarm.groupName=ARM GCC group.gccarm.isSemVer=true # Some of the compiler don't like -isystem (as they assume the code must be C). @@ -306,6 +329,9 @@ compiler.arm64g730.semver=7.3.0 compiler.arm64g820.exe=/opt/compiler-explorer/arm64/gcc-8.2.0/aarch64-unknown-linux-gnu/bin/aarch64-unknown-linux-gnu-g++ compiler.arm64g820.name=ARM64 gcc 8.2 compiler.arm64g820.semver=8.2.0 +compiler.armce820.exe=/opt/compiler-explorer/arm-wince/gcc-ce-8.2.0/bin/arm-mingw32ce-g++ +compiler.armce820.name=ARM gcc 8.2 (WinCE) +compiler.armce820.semver=8.2.0 ################################ @@ -352,6 +378,15 @@ compiler.mips564el.exe=/opt/compiler-explorer/mips64el/gcc-5.4.0/mips64el-unknow compiler.mips564el.name=MIPS64 gcc 5.4 (el) compiler.mips564el.semver=5.4 +############################### +# GCC for RISC-V +group.riscv.compilers=riscv820 +group.riscv.groupName=RISC-V GCC +group.riscv.isSemVer=true +compiler.riscv820.exe=/opt/compiler-explorer/riscv64/gcc-8.2.0/riscv64-unknown-linux-gnu/bin/riscv64-unknown-linux-gnu-g++ +compiler.riscv820.name=RISC-V gcc 8.2.0 +compiler.riscv820.semver=8.2.0 + ################################ # Windows Compilers group.cl.compilers=&cl19:&cl19_2015_u3:&cl_new @@ -425,23 +460,45 @@ compiler.ellcc0133.alias=elcc0133 compiler.ellcc0134.alias=elcc0134 +################################# +# DJGGP +group.djggp.compilers=djggp494:djggp550:djggp640:djggp720 +group.djggp.groupName=DJGGP x86 +group.djggp.baseName=x86 djggp +group.djggp.isSemVer=true +group.djggp.demangler= +group.djggp.supportsBinary=false +compiler.djggp720.exe=/opt/compiler-explorer/djgpp-7.2.0/bin/i586-pc-msdosdjgpp-g++ +compiler.djggp720.semver=7.2.0 +compiler.djggp640.exe=/opt/compiler-explorer/djgpp-6.4.0/bin/i586-pc-msdosdjgpp-g++ +compiler.djggp640.semver=6.4.0 +compiler.djggp550.exe=/opt/compiler-explorer/djgpp-5.5.0/bin/i586-pc-msdosdjgpp-g++ +compiler.djggp550.semver=5.5.0 +compiler.djggp494.exe=/opt/compiler-explorer/djgpp-4.9.4/bin/i586-pc-msdosdjgpp-g++ +compiler.djggp494.semver=4.9.4 + + ################################# ################################# # Installed libs -libs=boost:brigand:kvasir:cmcstl2:ctbignum:gsl:expected_lite:nlohmann_json:xtl:xsimd:xtensor:abseil:blaze:ctre:eigen:benchmark:rangesv3:dlib:libguarded:cppcoro:fmt:hfsm:glm:llvm:catch2:doctest:eastl:vcl:outcome:cnl +libs=boost:brigand:kvasir:cmcstl2:ctbignum:gsl:expected_lite:nlohmann_json:xtl:xsimd:xtensor:abseil:blaze:ctre:eigen:benchmark:rangesv3:dlib:libguarded:cppcoro:fmt:hfsm:glm:llvm:catch2:doctest:eastl:vcl:outcome:cnl:googletest:tbb:seastar libs.boost.name=Boost -libs.boost.versions=164:165:166:167:168 +libs.boost.versions=164:165:166:167:168:169:170 libs.boost.url=https://www.boost.org libs.boost.versions.164.version=1.64.0 -libs.boost.versions.164.path=/opt/compiler-explorer/libs/boost_1_64_0 +libs.boost.versions.164.path=/celibs/boost_1_64_0 libs.boost.versions.165.version=1.65.0 -libs.boost.versions.165.path=/opt/compiler-explorer/libs/boost_1_65_0 +libs.boost.versions.165.path=/celibs/boost_1_65_0 libs.boost.versions.166.version=1.66.0 -libs.boost.versions.166.path=/opt/compiler-explorer/libs/boost_1_66_0 +libs.boost.versions.166.path=/celibs/boost_1_66_0 libs.boost.versions.167.version=1.67.0 -libs.boost.versions.167.path=/opt/compiler-explorer/libs/boost_1_67_0 +libs.boost.versions.167.path=/celibs/boost_1_67_0 libs.boost.versions.168.version=1.68.0 -libs.boost.versions.168.path=/opt/compiler-explorer/libs/boost_1_68_0 +libs.boost.versions.168.path=/celibs/boost_1_68_0 +libs.boost.versions.169.version=1.69.0 +libs.boost.versions.169.path=/celibs/boost_1_69_0 +libs.boost.versions.170.version=1.70.0 +libs.boost.versions.170.path=/celibs/boost_1_70_0 libs.brigand.name=Brigand libs.brigand.versions=trunk:130 libs.brigand.url=https://github.com/edouarda/brigand @@ -469,11 +526,13 @@ libs.gsl.name=GSL libs.gsl.description=Guidelines Support Library libs.gsl.url=https://github.com/Microsoft/GSL # Sorry Martin! -libs.gsl.versions=trunk:lite:100 +libs.gsl.versions=trunk:lite:100:200 libs.gsl.versions.trunk.version=trunk libs.gsl.versions.trunk.path=/opt/compiler-explorer/libs/GSL/include libs.gsl.versions.100.version=1.0.0 libs.gsl.versions.100.path=/opt/compiler-explorer/libs/GSL/v1.0.0/include +libs.gsl.versions.200.version=2.0.0 +libs.gsl.versions.200.path=/opt/compiler-explorer/libs/GSL/v2.0.0/include libs.gsl.versions.lite.version=lite libs.gsl.versions.lite.path=/opt/compiler-explorer/libs/gsl-lite/include libs.expected_lite.versions=001:010:trunk @@ -487,10 +546,12 @@ libs.expected_lite.versions.010.path=/opt/compiler-explorer/libs/expected-lite/v libs.expected_lite.versions.trunk.version=trunk libs.expected_lite.versions.trunk.path=/opt/compiler-explorer/libs/expected-lite/trunk/include libs.nlohmann_json.name=nlohmann::json -libs.nlohmann_json.versions=trunk:312:211 +libs.nlohmann_json.versions=trunk:360:312:211 libs.nlohmann_json.url=https://github.com/nlohmann/json libs.nlohmann_json.versions.trunk.version=trunk libs.nlohmann_json.versions.trunk.path=/opt/compiler-explorer/libs/nlohmann_json/trunk/single_include +libs.nlohmann_json.versions.360.version=3.6.0 +libs.nlohmann_json.versions.360.path=/opt/compiler-explorer/libs/nlohmann_json/v3.6.0/single_include libs.nlohmann_json.versions.312.version=3.1.2 libs.nlohmann_json.versions.312.path=/opt/compiler-explorer/libs/nlohmann_json/v3.1.2/single_include libs.nlohmann_json.versions.211.version=2.1.1 @@ -501,37 +562,59 @@ libs.opencv.versions=trunk libs.opencv.url=https://opencv.org/ libs.opencv.versions.trunk.version=trunk libs.opencv.versions.trunk.path=/opt/compiler-explorer/libs/opencv/include +libs.xtensor.name=xtensor +libs.xtensor.versions=trunk:0194:0182:0174 +libs.xtensor.url=http://xtensor.readthedocs.io +libs.xtensor.versions.trunk.version=trunk +libs.xtensor.versions.trunk.path=/opt/compiler-explorer/libs/xtensor/include +libs.xtensor.versions.0194.version=0.19.4 +libs.xtensor.versions.0194.path=/opt/compiler-explorer/libs/xtensor/0.19.4/include +libs.xtensor.versions.0182.version=0.18.2 +libs.xtensor.versions.0182.path=/opt/compiler-explorer/libs/xtensor/0.18.2/include +libs.xtensor.versions.0174.version=0.17.4 +libs.xtensor.versions.0174.path=/opt/compiler-explorer/libs/xtensor/0.17.4/include libs.xtl.name=xtl -libs.xtl.versions=trunk +libs.xtl.versions=trunk:053:0416 libs.xtl.url=http://xtl.readthedocs.io libs.xtl.versions.trunk.version=trunk libs.xtl.versions.trunk.path=/opt/compiler-explorer/libs/xtl/include +libs.xtl.versions.053.version=0.5.3 +libs.xtl.versions.053.path=/opt/compiler-explorer/libs/xtl/0.5.3/include +libs.xtl.versions.0416.version=0.4.16 +libs.xtl.versions.0416.path=/opt/compiler-explorer/libs/xtl/0.4.16/include libs.xsimd.name=xsimd -libs.xsimd.versions=trunk +libs.xsimd.versions=trunk:700:614 libs.xsimd.url=http://xsimd.readthedocs.io libs.xsimd.versions.trunk.version=trunk libs.xsimd.versions.trunk.path=/opt/compiler-explorer/libs/xsimd/include -libs.xtensor.name=xtensor -libs.xtensor.versions=trunk -libs.xtensor.url=http://xtensor.readthedocs.io -libs.xtensor.versions.trunk.version=trunk -libs.xtensor.versions.trunk.path=/opt/compiler-explorer/libs/xtensor/include +libs.xsimd.versions.700.version=7.0.0 +libs.xsimd.versions.700.path=/opt/compiler-explorer/libs/xsimd/7.0.0/include +libs.xsimd.versions.614.version=6.1.4 +libs.xsimd.versions.614.path=/opt/compiler-explorer/libs/xsimd/6.1.4/include libs.abseil.name=Abseil libs.abseil.versions=trunk libs.abseil.url=https://abseil.io/ libs.abseil.versions.trunk.version=trunk libs.abseil.versions.trunk.path=/opt/compiler-explorer/libs/abseil libs.blaze.name=Blaze -libs.blaze.versions=trunk:33 +libs.blaze.versions=trunk:33:34:35 libs.blaze.url=https://bitbucket.org/blaze-lib/blaze libs.blaze.versions.trunk.version=trunk libs.blaze.versions.trunk.path=/opt/compiler-explorer/libs/blaze/trunk libs.blaze.versions.33.version=3.3 libs.blaze.versions.33.path=/opt/compiler-explorer/libs/blaze/v3.3 +libs.blaze.versions.34.version=3.4 +libs.blaze.versions.34.path=/opt/compiler-explorer/libs/blaze/v3.4 +libs.blaze.versions.35.version=3.5 +libs.blaze.versions.35.path=/opt/compiler-explorer/libs/blaze/v3.5 libs.ctre.name=CTRE libs.ctre.description=Compile Time Regular Expressions -libs.ctre.versions=trunk:v2 +libs.ctre.versions=trunk:ecma-unicode:dfa:v2 libs.ctre.url=https://github.com/hanickadot/compile-time-regular-expressions +libs.ctre.versions.ecma-unicode.version=ecma-unicode +libs.ctre.versions.ecma-unicode.path=/opt/compiler-explorer/libs/ctre/ecma-unicode/include +libs.ctre.versions.dfa.version=dfa +libs.ctre.versions.dfa.path=/opt/compiler-explorer/libs/ctre/dfa/include libs.ctre.versions.trunk.version=trunk libs.ctre.versions.trunk.path=/opt/compiler-explorer/libs/ctre/master/include libs.ctre.versions.v2.version=v2 @@ -592,10 +675,12 @@ libs.cppcoro.versions.trunk.version=trunk libs.cppcoro.versions.trunk.path=/opt/compiler-explorer/libs/cppcoro/include libs.fmt.name={fmt} libs.fmt.description=A modern formatting library -libs.fmt.versions=trunk:520:510:500:410:400 +libs.fmt.versions=trunk:530:520:510:500:410:400 libs.fmt.url=http://fmtlib.net/ libs.fmt.versions.trunk.version=trunk libs.fmt.versions.trunk.path=/opt/compiler-explorer/libs/fmt/trunk/include +libs.fmt.versions.530.version=5.3.0 +libs.fmt.versions.530.path=/opt/compiler-explorer/libs/fmt/5.3.0/include libs.fmt.versions.520.version=5.2.0 libs.fmt.versions.520.path=/opt/compiler-explorer/libs/fmt/5.2.0/include libs.fmt.versions.510.version=5.1.0 @@ -618,7 +703,7 @@ libs.hfsm.versions.010.version=0.10 libs.hfsm.versions.010.path=/opt/compiler-explorer/libs/hfsm/0.10 libs.glm.name=GLM libs.glm.description=OpenGL Mathematics -libs.glm.versions=trunk:0985:0990 +libs.glm.versions=trunk:0985:0990:0991:0992:0993:0994 libs.glm.url=https://glm.g-truc.net/ libs.glm.versions.trunk.version=trunk libs.glm.versions.trunk.path=/opt/compiler-explorer/libs/glm/trunk @@ -626,32 +711,70 @@ libs.glm.versions.0985.version=0.9.8.5 libs.glm.versions.0985.path=/opt/compiler-explorer/libs/glm/0.9.8.5 libs.glm.versions.0990.version=0.9.9.0 libs.glm.versions.0990.path=/opt/compiler-explorer/libs/glm/0.9.9.0 +libs.glm.versions.0991.version=0.9.9.1 +libs.glm.versions.0991.path=/opt/compiler-explorer/libs/glm/0.9.9.1 +libs.glm.versions.0992.version=0.9.9.2 +libs.glm.versions.0992.path=/opt/compiler-explorer/libs/glm/0.9.9.2 +libs.glm.versions.0993.version=0.9.9.3 +libs.glm.versions.0993.path=/opt/compiler-explorer/libs/glm/0.9.9.3 +libs.glm.versions.0994.version=0.9.9.4 +libs.glm.versions.0994.path=/opt/compiler-explorer/libs/glm/0.9.9.4 +libs.glm.versions.0995.version=0.9.9.5 +libs.glm.versions.0995.path=/opt/compiler-explorer/libs/glm/0.9.9.5 libs.llvm.name=LLVM libs.llvm.description=LLVM -libs.llvm.versions=trunk:600:501:401 +libs.llvm.versions=trunk:401:500:501:502:600:601:700:701:800 libs.llvm.url=https://llvm.org/ libs.llvm.versions.trunk.version=trunk libs.llvm.versions.trunk.path=/opt/compiler-explorer/libs/llvm/trunk/include -libs.llvm.versions.600.version=6.0.0 -libs.llvm.versions.600.path=/opt/compiler-explorer/libs/llvm/6.0.0/include -libs.llvm.versions.501.version=5.0.1 -libs.llvm.versions.501.path=/opt/compiler-explorer/libs/llvm/5.0.1/include libs.llvm.versions.401.version=4.0.1 libs.llvm.versions.401.path=/opt/compiler-explorer/libs/llvm/4.0.1/include +libs.llvm.versions.500.version=5.0.0 +libs.llvm.versions.500.path=/opt/compiler-explorer/libs/llvm/5.0.0/include +libs.llvm.versions.501.version=5.0.1 +libs.llvm.versions.501.path=/opt/compiler-explorer/libs/llvm/5.0.1/include +libs.llvm.versions.502.version=5.0.2 +libs.llvm.versions.502.path=/opt/compiler-explorer/libs/llvm/5.0.2/include +libs.llvm.versions.600.version=6.0.0 +libs.llvm.versions.600.path=/opt/compiler-explorer/libs/llvm/6.0.0/include +libs.llvm.versions.601.version=6.0.1 +libs.llvm.versions.601.path=/opt/compiler-explorer/libs/llvm/6.0.1/include +libs.llvm.versions.700.version=7.0.0 +libs.llvm.versions.700.path=/opt/compiler-explorer/libs/llvm/7.0.0/include +libs.llvm.versions.701.version=7.0.1 +libs.llvm.versions.701.path=/opt/compiler-explorer/libs/llvm/7.0.1/include +libs.llvm.versions.800.version=8.0.0 +libs.llvm.versions.800.path=/opt/compiler-explorer/libs/llvm/8.0.0/include libs.catch2.name=Catch2 libs.catch2.description=Catch2 libs.catch2.url=https://github.com/catchorg/Catch2 -libs.catch2.versions=trunk:222:223 +libs.catch2.versions=trunk:222:223:230:240:241:242:250:260:261:270 libs.catch2.versions.trunk.version=trunk libs.catch2.versions.trunk.path=/opt/compiler-explorer/libs/catch2/trunk/include libs.catch2.versions.222.version=2.2.2 libs.catch2.versions.222.path=/opt/compiler-explorer/libs/catch2/v2.2.2/include libs.catch2.versions.223.version=2.2.3 libs.catch2.versions.223.path=/opt/compiler-explorer/libs/catch2/v2.2.3/include +libs.catch2.versions.230.version=2.3.0 +libs.catch2.versions.230.path=/opt/compiler-explorer/libs/catch2/v2.3.0/include +libs.catch2.versions.240.version=2.4.0 +libs.catch2.versions.240.path=/opt/compiler-explorer/libs/catch2/v2.4.0/include +libs.catch2.versions.241.version=2.4.1 +libs.catch2.versions.241.path=/opt/compiler-explorer/libs/catch2/v2.4.1/include +libs.catch2.versions.242.version=2.4.2 +libs.catch2.versions.242.path=/opt/compiler-explorer/libs/catch2/v2.4.2/include +libs.catch2.versions.250.version=2.5.0 +libs.catch2.versions.250.path=/opt/compiler-explorer/libs/catch2/v2.5.0/include +libs.catch2.versions.260.version=2.6.0 +libs.catch2.versions.260.path=/opt/compiler-explorer/libs/catch2/v2.6.0/include +libs.catch2.versions.261.version=2.6.1 +libs.catch2.versions.261.path=/opt/compiler-explorer/libs/catch2/v2.6.1/include +libs.catch2.versions.270.version=2.7.0 +libs.catch2.versions.270.path=/opt/compiler-explorer/libs/catch2/v2.7.0/include libs.doctest.name=Doctest libs.doctest.description=The fastest feature-rich C++11 single-header testing framework for unit tests and TDD libs.doctest.url=https://github.com/onqtam/doctest -libs.doctest.versions=trunk:129:200:201 +libs.doctest.versions=trunk:129:200:201:210:220:221:222:223:230:231 libs.doctest.versions.trunk.version=trunk libs.doctest.versions.trunk.path=/opt/compiler-explorer/libs/doctest/trunk/doctest libs.doctest.versions.129.version=1.2.9 @@ -660,6 +783,20 @@ libs.doctest.versions.200.version=2.0.0 libs.doctest.versions.200.path=/opt/compiler-explorer/libs/doctest/2.0.0/doctest libs.doctest.versions.201.version=2.0.1 libs.doctest.versions.201.path=/opt/compiler-explorer/libs/doctest/2.0.1/doctest +libs.doctest.versions.210.version=2.1.0 +libs.doctest.versions.210.path=/opt/compiler-explorer/libs/doctest/2.1.0/doctest +libs.doctest.versions.220.version=2.2.0 +libs.doctest.versions.220.path=/opt/compiler-explorer/libs/doctest/2.2.0/doctest +libs.doctest.versions.221.version=2.2.1 +libs.doctest.versions.221.path=/opt/compiler-explorer/libs/doctest/2.2.1/doctest +libs.doctest.versions.222.version=2.2.2 +libs.doctest.versions.222.path=/opt/compiler-explorer/libs/doctest/2.2.2/doctest +libs.doctest.versions.223.version=2.2.3 +libs.doctest.versions.223.path=/opt/compiler-explorer/libs/doctest/2.2.3/doctest +libs.doctest.versions.230.version=2.3.0 +libs.doctest.versions.230.path=/opt/compiler-explorer/libs/doctest/2.3.0/doctest +libs.doctest.versions.231.version=2.3.1 +libs.doctest.versions.231.path=/opt/compiler-explorer/libs/doctest/2.3.1/doctest libs.eastl.name=EASTL libs.eastl.description=The Electronic Arts Standard Template Library. It is an extensive and robust implementation that has an emphasis on high performance. libs.eastl.url=https://github.com/electronicarts/EASTL @@ -686,6 +823,23 @@ libs.cnl.url=https://github.com/johnmcfarlane/cnl libs.cnl.versions=trunk libs.cnl.versions.trunk.version=trunk libs.cnl.versions.trunk.path=/opt/compiler-explorer/libs/cnl/include +libs.googletest.name=Google Test +libs.googletest.versions=trunk +libs.googletest.url=https://github.com/google/googletest +libs.googletest.versions.trunk.version=trunk +libs.googletest.versions.trunk.path=/opt/compiler-explorer/libs/googletest/googletest/include:/opt/compiler-explorer/libs/googletest/googlemock/include +libs.tbb.name=Intel TBB +libs.tbb.versions=trunk +libs.tbb.url=https://www.threadingbuildingblocks.org/ +libs.tbb.versions.trunk.version=trunk +libs.tbb.versions.trunk.path=/opt/compiler-explorer/libs/tbb/include +libs.seastar.name=Seastar +libs.seastar.description=SeaStar is an event-driven framework allowing you to write non-blocking, asynchronous code in a relatively straightforward manner. +libs.seastar.versions=180 +libs.seastar.url=http://seastar.io +libs.seastar.versions.180.version=18.08.0 +libs.seastar.versions.180.path=/opt/compiler-explorer/libs/seastar/seastar-18.08.0 + ################################# ################################# @@ -704,9 +858,10 @@ tools.llvm-mcatrunk.name=llvm-mca tools.llvm-mcatrunk.exe=/opt/compiler-explorer/clang-trunk/bin/llvm-mca tools.llvm-mcatrunk.type=postcompilation tools.llvm-mcatrunk.class=llvm-mca-tool -tools.llvm-mcatrunk.exclude=avr:rv32:arm:aarch:mips:msp:ppc:cl19:cl_new +tools.llvm-mcatrunk.exclude=avr:rv32:arm:aarch:mips:msp:ppc:cl19:cl_new:djggp tools.pahole.name=pahole tools.pahole.exe=/opt/compiler-explorer/pahole/bin/pahole tools.pahole.type=postcompilation tools.pahole.class=pahole-tool +tools.pahole.exclude=djggp diff --git a/etc/config/c++.defaults.properties b/etc/config/c++.defaults.properties index 368bbcfe3df84fd5543cbac34bc952e10de39d3f..2f322de6d578f3194d697d0efe3957d853499ead 100644 --- a/etc/config/c++.defaults.properties +++ b/etc/config/c++.defaults.properties @@ -1,6 +1,35 @@ # Default settings for C++ -compilers=/usr/bin/g++-4.4:/usr/bin/g++-4.5:/usr/bin/g++-4.6:/usr/bin/g++-4.7:/usr/bin/g++-4.8:/usr/bin/clang++:/usr/bin/g++-5:/usr/bin/g++-7:/usr/bin/g++-6:/usr/bin/g++ -defaultCompiler=/usr/bin/g++ +compilers=&gcc:&clang + +group.gcc.compilers=g44:g45:g46:g47:g48:g5:g6:g7:g8:gdefault +compiler.g44.exe=/usr/bin/g++-4.4 +compiler.g44.name=g++ 4.4 +compiler.g45.exe=/usr/bin/g++-4.5 +compiler.g45.name=g++ 4.5 +compiler.g46.exe=/usr/bin/g++-4.6 +compiler.g46.name=g++ 4.6 +compiler.g47.exe=/usr/bin/g++-4.7 +compiler.g47.name=g++ 4.7 +compiler.g48.exe=/usr/bin/g++-4.8 +compiler.g48.name=g++ 4.8 +compiler.g5.exe=/usr/bin/g++-5 +compiler.g5.name=g++ 5.x +compiler.g6.exe=/usr/bin/g++-6 +compiler.g6.name=g++ 6.x +compiler.g7.exe=/usr/bin/g++-7 +compiler.g7.name=g++ 7.x +compiler.g8.exe=/usr/bin/g++-8 +compiler.g8.name=g++ 8.x +compiler.gdefault.exe=/usr/bin/g++ +compiler.gdefault.name=g++ default + +group.clang.compilers=clang7:clangdefault +group.clang.intelAsm=-mllvm --x86-asm-syntax=intel +compiler.clang7.exe=/usr/bin/clang++-7 +compiler.clang7.name=clang 7 +compiler.clangdefault.exe=/usr/bin/clang++ +compiler.clangdefault.name=clang default +defaultCompiler=gdefault postProcess= demangler=c++filt demanglerClassFile=./demangler-cpp @@ -8,10 +37,11 @@ objdumper=objdump #androidNdk=/opt/google/android-ndk-r9c options= supportsBinary=true -binaryHideFuncRe=^(__.*|_(init|start|fini)|(de)?register_tm_clones|call_gmon_start|frame_dummy|\.plt.*)$ +binaryHideFuncRe=^(__.*|_(init|start|fini)|(de)?register_tm_clones|call_gmon_start|frame_dummy|\.plt.*|_dl_relocate_static_pie)$ needsMulti=false stubRe=\bmain\b stubText=int main(void){return 0;/*stub provided by Compiler Explorer*/} +supportsLibraryCodeFilter=true ################################# ################################# diff --git a/etc/config/c.amazon.properties b/etc/config/c.amazon.properties index 9389d2993a2aa959512fea0ecdd3cec000364f58..c0e08c667a3fba3a3e849422896fa08e54e52c1e 100644 --- a/etc/config/c.amazon.properties +++ b/etc/config/c.amazon.properties @@ -1,12 +1,12 @@ -compilers=&cgcc86:&cclang:&ppci:&cicc:&ccl:&ccross -defaultCompiler=cg82 +compilers=&cgcc86:&cclang:&ppci:&cicc:&ccl:&ccross:&cgcc-classic:&cc65 +defaultCompiler=cg83 demangler=/opt/compiler-explorer/gcc-8.2.0/bin/c++filt objdumper=/opt/compiler-explorer/gcc-8.2.0/bin/objdump needsMulti=false ############################### # GCC for x86 -group.cgcc86.compilers=cg412:cg447:cg453:cg464:cg471:cg472:cg473:cg474:cg481:cg482:cg483:cg484:cg485:cg490:cg491:cg492:cg493:cg494:cg510:cg520:cg530:cg540:cg6:cg62:cg63:cg71:cg72:cg73:cg81:cg82:cgsnapshot +group.cgcc86.compilers=cg412:cg447:cg453:cg464:cg471:cg472:cg473:cg474:cg481:cg482:cg483:cg484:cg485:cg490:cg491:cg492:cg493:cg494:cg510:cg520:cg530:cg540:cg6:cg62:cg63:cg71:cg72:cg73:cg81:cg82:cg83:cgsnapshot group.cgcc86.groupName=GCC x86-64 group.cgcc86.isSemVer=true group.cgcc86.baseName=x86-64 gcc @@ -67,10 +67,14 @@ compiler.cg72.exe=/opt/compiler-explorer/gcc-7.2.0/bin/gcc compiler.cg72.semver=7.2 compiler.cg73.exe=/opt/compiler-explorer/gcc-7.3.0/bin/gcc compiler.cg73.semver=7.3 +compiler.cg74.exe=/opt/compiler-explorer/gcc-7.4.0/bin/gcc +compiler.cg74.semver=7.4 compiler.cg81.exe=/opt/compiler-explorer/gcc-8.1.0/bin/gcc compiler.cg81.semver=8.1 compiler.cg82.exe=/opt/compiler-explorer/gcc-8.2.0/bin/gcc compiler.cg82.semver=8.2 +compiler.cg83.exe=/opt/compiler-explorer/gcc-8.3.0/bin/gcc +compiler.cg83.semver=8.3 compiler.cgsnapshot.exe=/opt/compiler-explorer/gcc-snapshot/bin/gcc compiler.cgsnapshot.semver=(trunk) @@ -79,8 +83,16 @@ compiler.cg63.needsMulti=true compiler.cg71.needsMulti=true compiler.cg72.needsMulti=true +# Classic x86 compilers (32-bit only) +group.cgcc-classic.compilers=cg127 +group.cgcc-classic.groupName=GCC x86 +group.cgcc-classic.isSemVer=true +group.cgcc-classic.baseName=x86 gcc +compiler.cg127.exe=/opt/compiler-explorer/gcc-1.27/bin/gcc +compiler.cg127.semver=1.27 + # Clang for x86 -group.cclang.compilers=cclang30:cclang31:cclang32:cclang33:cclang341:cclang350:cclang351:cclang37x:cclang36x:cclang371:cclang380:cclang381:cclang390:cclang391:cclang400:cclang401:cclang500:cclang600:cclang700:cclang_trunk +group.cclang.compilers=cclang30:cclang31:cclang32:cclang33:cclang341:cclang350:cclang351:cclang37x:cclang36x:cclang371:cclang380:cclang381:cclang390:cclang391:cclang400:cclang401:cclang500:cclang600:cclang700:cclang800:cclang_trunk group.cclang.intelAsm=-mllvm --x86-asm-syntax=intel group.cclang.options=--gcc-toolchain=/opt/compiler-explorer/gcc-7.2.0 group.cclang.groupName=Clang x86-64 @@ -133,8 +145,12 @@ compiler.cclang600.semver=6.0.0 compiler.cclang700.exe=/opt/compiler-explorer/clang-7.0.0/bin/clang compiler.cclang700.semver=7.0.0 compiler.cclang700.options=--gcc-toolchain=/opt/compiler-explorer/gcc-8.2.0 +compiler.cclang800.exe=/opt/compiler-explorer/clang-8.0.0/bin/clang +compiler.cclang800.semver=8.0.0 +compiler.cclang800.options=--gcc-toolchain=/opt/compiler-explorer/gcc-8.3.0 compiler.cclang_trunk.exe=/opt/compiler-explorer/clang-trunk/bin/clang compiler.cclang_trunk.semver=(trunk) +compiler.cclang_trunk.options=--gcc-toolchain=/opt/compiler-explorer/gcc-8.3.0 # ppci for various architectures group.ppci.compilers=ppci055 @@ -147,7 +163,7 @@ compiler.ppci055.semver=0.5.5 compiler.ppci055.exe=/opt/compiler-explorer/ppci-0.5.5/ppci/cli/cc.py # icc for x86 -group.cicc.compilers=cicc1301:cicc16:cicc17:cicc18:cicc19 +group.cicc.compilers=cicc1301:cicc16:cicc17:cicc18:cicc19:cicc191 group.cicc.intelAsm=-masm=intel group.cicc.options=-x c -gcc-name=/opt/compiler-explorer/gcc-4.7.1/bin/gcc group.cicc.groupName=ICC x86-64 @@ -169,6 +185,9 @@ compiler.cicc18.options=-x c -gcc-name=/opt/compiler-explorer/gcc-6.3.0/bin/gcc compiler.cicc19.exe=/opt/compiler-explorer/intel-2019/bin/icc compiler.cicc19.semver=19.0.0 compiler.cicc19.options=-x c -gcc-name=/opt/compiler-explorer/gcc-8.2.0/bin/gcc +compiler.cicc191.exe=/opt/compiler-explorer/intel-2019.1/bin/icc +compiler.cicc191.semver=19.0.1 +compiler.cicc191.options=-x c -gcc-name=/opt/compiler-explorer/gcc-8.2.0/bin/gcc ############################### # Cross GCC @@ -179,19 +198,31 @@ group.ccross.groupName=Cross GCC ############################### # GCC for PPC -group.cppc.compilers=cppcg48:cppc64leg630 -group.cppc.groupName=PowerPC GCC +group.cppc.compilers=cppcg48:cppc64leg630:cppc64leg8:cppc64g8:cppc64clang:cppc64leclang +group.cppc.groupName=POWER Compilers group.cppc.isSemVer=true -compiler.ppcg48.exe=/opt/compiler-explorer/powerpc/gcc-4.8.5/bin/powerpc-unknown-linux-gnu-gcc -compiler.ppcg48.name=PowerPC gcc 4.8.5 -compiler.ppcg48.semver=4.8.5 -compiler.ppc64leg630.exe=/opt/compiler-explorer/powerpc64le/gcc-6.3.0/powerpc64le-unknown-linux-gnu/bin/powerpc64le-unknown-linux-gnu-gcc -compiler.ppc64leg630.name=PowerPC64 gcc 6.3.0 -compiler.ppc64leg630.semver=6.3.0 +compiler.cppc64leg8.exe=/opt/compiler-explorer/powerpc64le/gcc-at12/powerpc64le-unknown-linux-gnu/bin/powerpc64le-unknown-linux-gnu-gcc +compiler.cppc64leg8.name=power64le AT12.0 (gcc8) +compiler.cppc64leg8.semver=(snapshot) +compiler.cppc64g8.exe=/opt/compiler-explorer/powerpc64/gcc-at12/powerpc64-unknown-linux-gnu/bin/powerpc64-unknown-linux-gnu-gcc +compiler.cppc64g8.name=power64 AT12.0 (gcc8) +compiler.cppc64g8.semver=(snapshot) +compiler.cppc64clang.exe=/opt/compiler-explorer/clang-trunk/bin/clang +compiler.cppc64clang.name=powerpc64 clang (trunk) +compiler.cppc64clang.options=-target powerpc64 +compiler.cppc64leclang.exe=/opt/compiler-explorer/clang-trunk/bin/clang +compiler.cppc64leclang.name=power64le clang (trunk) +compiler.cppc64leclang.options=-target powerpc64le +compiler.cppcg48.exe=/opt/compiler-explorer/powerpc/gcc-4.8.5/bin/powerpc-unknown-linux-gnu-gcc +compiler.cppcg48.name=PowerPC gcc 4.8.5 +compiler.cppcg48.semver=4.8.5 +compiler.cppc64leg630.exe=/opt/compiler-explorer/powerpc64le/gcc-6.3.0/powerpc64le-unknown-linux-gnu/bin/powerpc64le-unknown-linux-gnu-gcc +compiler.cppc64leg630.name=PowerPC64 gcc 6.3.0 +compiler.cppc64leg630.semver=6.3.0 ############################### # GCC for ARM -group.cgccarm.compilers=carmg454:carmg464:caarchg54:carmhfg54:carm541:carmg630:carm710:carm64g630:carmg640:carmg730:carmg820:carm64g640:carm64g730:carm64g820 +group.cgccarm.compilers=carmg454:carmg464:caarchg54:carmhfg54:carm541:carmg630:carm710:carm64g630:carmg640:carmg730:carmg820:carm64g640:carm64g730:carm64g820:carmce820 group.cgccarm.groupName=ARM GCC group.cgccarm.isSemVer=true # Some of the compiler don't like -isystem (as they assume the code must be C). @@ -239,6 +270,9 @@ compiler.carm64g730.semver=7.3.0 compiler.carm64g820.exe=/opt/compiler-explorer/arm64/gcc-8.2.0/aarch64-unknown-linux-gnu/bin/aarch64-unknown-linux-gnu-gcc compiler.carm64g820.name=ARM64 gcc 8.2 compiler.carm64g820.semver=8.2.0 +compiler.carmce820.exe=/opt/compiler-explorer/arm-wince/gcc-ce-8.2.0/bin/arm-mingw32ce-gcc +compiler.carmce820.name=ARM gcc 8.2 (WinCE) +compiler.carmce820.semver=8.2.0 ################################ @@ -335,6 +369,20 @@ compiler.ccl_new_arm64.exe=/opt/compiler-explorer/windows/19.14.26423/bin/Hostx6 compiler.ccl_new_arm64.name=ARM64 msvc v19.14 (WINE) compiler.ccl_new_arm64.semver=19.14.26423 +################################# +# cc65 compilers +group.cc65.compilers=cc65_217:cc65_trunk +group.cc65.supportsBinary=false +group.cc65.groupName=cc65 +group.cc65.compilerType=cc65 +group.cc65.isSemVer=true +compiler.cc65_trunk.name=6502 cc65 trunk +compiler.cc65_trunk.exe=/opt/compiler-explorer/6502/cc65-trunk/bin/cc65 +compiler.cc65_trunk.semver=trunk +compiler.cc65_217.name=6502 cc65 2.17 +compiler.cc65_217.exe=/opt/compiler-explorer/6502/cc65-2.17/bin/cc65 +compiler.cc65_217.semver=2.17 + ################################# ################################# # Installed tools diff --git a/etc/config/compiler-explorer.amazon.properties b/etc/config/compiler-explorer.amazon.properties index 902003821078a8fc7eb481df14c65911a25e63a4..6d38e7791b1f0b4a95bb98d5f7d19058a093d501 100644 --- a/etc/config/compiler-explorer.amazon.properties +++ b/etc/config/compiler-explorer.amazon.properties @@ -3,17 +3,18 @@ googleApiKey=AIzaSyAaz35KJv8DA0ABoime0fEIh32NmbyYbcQ cookieDomainRe=godbolt\.org|compiler-explorer\.com cookiePolicyEnabled=true privacyPolicyEnabled=true -compileTimeoutMs=7500 +compileTimeoutMs=20000 compiler-wrapper=./c-preload/compiler-wrapper max-asm-size=67108864 staticMaxAgeSecs=30 cacheConfig=InMemory(25);S3(storage.godbolt.org,cache,us-east-1) +executableCacheConfig=S3(storage.godbolt.org,cache,us-east-1) clientGoogleAnalyticsEnabled=true proxyRetries=300 proxyRetryMs=500 rescanCompilerSecs=3600 supportsExecute=false -ravenUrl=https://8e4614f649ad4e3faf3e7e8827b935f9@sentry.io/102028 +sentryDsn=https://8e4614f649ad4e3faf3e7e8827b935f9@sentry.io/102028 urlShortenService=google formatters=clangformat formatter.clangformat.name=clang-format diff --git a/etc/config/compiler-explorer.defaults.properties b/etc/config/compiler-explorer.defaults.properties index 523612709451a87c9de36048226a4ce6886b2c33..f0e5e5a1d36be3ed75c64db0b2d0675015593bc3 100644 --- a/etc/config/compiler-explorer.defaults.properties +++ b/etc/config/compiler-explorer.defaults.properties @@ -1,14 +1,16 @@ # Default settings for GCC Explorer. port=10240 compileTimeoutMs=10000 +binaryExecTimeoutMs=2000 defaultSource=builtin cacheConfig=InMemory(50) +executableCacheConfig=InMemory(50) maxConcurrentCompiles=4 staticMaxAgeSecs=1 maxUploadSize=16mb optionsWhitelistRe=.* supportsExecute=true -optionsBlacklistRe=^(-W[alp],)?((--?(wrapper|fplugin.*|specs|load|plugin|include)|(@.*)|-I|-i)(=.*)?|--)$ +optionsBlacklistRe=^(-W[alp],)?((--?(wrapper|fplugin.*|specs|load|plugin|include|fmodule-mapper)|(@.*)|-I|-i)(=.*)?|--)$ allowedShortUrlHostRe=^([-a-z.]+\.)?(xania|godbolt)\.org$ googleShortLinkRewrite=^https?://goo.gl/(.*)$|https://godbolt.org/g/$1 urlShortenService=none @@ -28,3 +30,5 @@ textBanner=Compilation provided by Compiler Explorer at https://godbolt.org/ # privacy policy, and then to enable both these below. cookiePolicyEnabled=false privacyPolicyEnabled=false + +supportsLibraryCodeFilter=false diff --git a/etc/config/cppx.amazon.properties b/etc/config/cppx.amazon.properties index ec83008ec0b52ea2fd1d9f0819c2523b6a46363b..e956c2511ee8843861b91f4574eb04a8a4940d82 100644 --- a/etc/config/cppx.amazon.properties +++ b/etc/config/cppx.amazon.properties @@ -16,7 +16,7 @@ compiler.cppx_20180922.options=--gcc-toolchain=/opt/compiler-explorer/gcc-snapsh compiler.cppx_trunk.exe=/opt/compiler-explorer/clang-cppx-trunk/bin/clang++ compiler.cppx_trunk.name=Latest trunk -compiler.cppx_trunk.options=--gcc-toolchain=/opt/compiler-explorer/gcc-snapshot -std=c++1z -Xclang -freflection -I/opt/compiler-explorer/clang-cppx-trunk/include -stdlib=libc++ -include cppx/meta -include cppx/compiler +compiler.cppx_trunk.options=--gcc-toolchain=/opt/compiler-explorer/gcc-snapshot -std=c++1z -Xclang -freflection -I/opt/compiler-explorer/clang-cppx-trunk/include -stdlib=libc++ -include experimental/meta -include experimental/compiler ################################# ################################# diff --git a/etc/config/cuda.amazon.properties b/etc/config/cuda.amazon.properties index 3bd4f233d5ecd9743954e1018ac8226b07eb48d3..d0bff22b17dbee49e9dd7aa36e8e73f8b8cdc07c 100644 --- a/etc/config/cuda.amazon.properties +++ b/etc/config/cuda.amazon.properties @@ -4,15 +4,17 @@ supportsBinary=false demangler=/opt/compiler-explorer/gcc-7.2.0/bin/c++filt group.nvcc.compilers=nvcc92:nvcc91 -group.nvcc.options=--compiler-bindir /opt/compiler-explorer/gcc-6.4.0/bin group.nvcc.versionRe=^Cuda.* group.nvcc.compilerType=nvcc group.nvcc.isSemVer=true group.nvcc.baseName=NVCC +group.nvcc.includeFlag=-I compiler.nvcc91.semver=9.1 compiler.nvcc91.exe=/opt/compiler-explorer/cuda/9.1.85/bin/nvcc +compiler.nvcc91.options=--compiler-bindir /opt/compiler-explorer/gcc-6.4.0/bin -I/opt/compiler-explorer/cuda/9.1.85/include -I/opt/compiler-explorer/cuda/9.1.85/include/crt compiler.nvcc92.semver=9.2 compiler.nvcc92.exe=/opt/compiler-explorer/cuda/9.2.88/bin/nvcc +compiler.nvcc92.options=--compiler-bindir /opt/compiler-explorer/gcc-6.4.0/bin -I/opt/compiler-explorer/cuda/9.2.88/include -I/opt/compiler-explorer/cuda/9.2.88/include/crt group.cuclang.compilers=cltrunk group.cuclang.options=--gcc-toolchain=/opt/compiler-explorer/gcc-7.2.0 --cuda-path=/opt/compiler-explorer/cuda/9.1.85 --cuda-gpu-arch=sm_35 --cuda-device-only @@ -20,3 +22,19 @@ group.cuclang.isSemVer=true group.cuclang.baseName=clang compiler.cltrunk.semver=trunk compiler.cltrunk.exe=/opt/compiler-explorer/clang-trunk/bin/clang++ + +libs=cueigen:cucub + +libs.cueigen.name=Eigen +libs.cueigen.versions=trunk:334 +libs.cueigen.url=http://eigen.tuxfamily.org/index.php?title=Main_Page +libs.cueigen.versions.trunk.version=trunk +libs.cueigen.versions.trunk.path=/opt/compiler-explorer/libs/eigen/vtrunk +libs.cueigen.versions.334.version=3.3.4 +libs.cueigen.versions.334.path=/opt/compiler-explorer/libs/eigen/v3.3.4 + +libs.cucub.name=CUB +libs.cucub.versions=180 +libs.cucub.url=http://nvlabs.github.io/cub/index.html +libs.cucub.versions.180.version=1.8.0 +libs.cucub.versions.180.path=/opt/compiler-explorer/libs/cub/1.8.0 diff --git a/etc/config/d.amazon.properties b/etc/config/d.amazon.properties index 5f7a5306d53b5a9021944b4d859848218c9f36d2..c3a6d27adedb1240d86d0e1afe718f97a90b1ec6 100644 --- a/etc/config/d.amazon.properties +++ b/etc/config/d.amazon.properties @@ -1,5 +1,5 @@ compilers=&gdc:&ldc:&dmd -defaultCompiler=ldc1_12 +defaultCompiler=ldc1_15 objdumper=/opt/compiler-explorer/gcc-8.1.0/bin/objdump group.gdc.compilers=gdc48:gdc49:gdc52 @@ -14,7 +14,7 @@ compiler.gdc48.semver=4.8.2 compiler.gdc52.exe=/opt/compiler-explorer/gdc5.2.0/x86_64-pc-linux-gnu/bin/gdc compiler.gdc52.semver=5.2.0 -group.ldc.compilers=ldc017:ldc100:ldc110:ldc120:ldc130:ldc140:ldc150:ldc160:ldc170:ldc180:ldc190:ldc1_10:ldc1_11:ldc1_12:ldcbeta +group.ldc.compilers=ldc017:ldc100:ldc110:ldc120:ldc130:ldc140:ldc150:ldc160:ldc170:ldc180:ldc190:ldc1_10:ldc1_11:ldc1_12:ldc1_13:ldc1_14:ldc1_15:ldcbeta:ldclatestci group.ldc.compilerType=ldc group.ldc.isSemVer=true group.ldc.baseName=ldc @@ -46,8 +46,16 @@ compiler.ldc1_11.exe=/opt/compiler-explorer/ldc1.11.0/ldc2-1.11.0-linux-x86_64/b compiler.ldc1_11.semver=1.11.0 compiler.ldc1_12.exe=/opt/compiler-explorer/ldc1.12.0/ldc2-1.12.0-linux-x86_64/bin/ldc2 compiler.ldc1_12.semver=1.12.0 +compiler.ldc1_13.exe=/opt/compiler-explorer/ldc1.13.0/ldc2-1.13.0-linux-x86_64/bin/ldc2 +compiler.ldc1_13.semver=1.13.0 +compiler.ldc1_14.exe=/opt/compiler-explorer/ldc1.14.0/ldc2-1.14.0-linux-x86_64/bin/ldc2 +compiler.ldc1_14.semver=1.14.0 +compiler.ldc1_15.exe=/opt/compiler-explorer/ldc1.15.0/ldc2-1.15.0-linux-x86_64/bin/ldc2 +compiler.ldc1_15.semver=1.15.0 compiler.ldcbeta.exe=/opt/compiler-explorer/ldcbeta/bin/ldc2 compiler.ldcbeta.semver=beta +compiler.ldclatestci.exe=/opt/compiler-explorer/ldc-latest-ci/ldc/bin/ldc2 +compiler.ldclatestci.semver=latest CI group.dmd.compilers=dmd20783:dmd20790:dmd20791:dmd20801:dmd20812:dmd20820:dmd2nightly group.dmd.options=-c @@ -114,10 +122,15 @@ libs.mir_glas.versions.trunk.path=/opt/compiler-explorer/libs/d/mir-glas-trunk/s ################################# # Installed tools -tools=llvm-mcatrunk +tools=llvm-mcatrunk:pahole tools.llvm-mcatrunk.name=llvm-mca tools.llvm-mcatrunk.exe=/opt/compiler-explorer/clang-trunk/bin/llvm-mca tools.llvm-mcatrunk.type=postcompilation tools.llvm-mcatrunk.class=llvm-mca-tool tools.llvm-mcatrunk.exclude=dmd + +tools.pahole.name=pahole +tools.pahole.exe=/opt/compiler-explorer/pahole/bin/pahole +tools.pahole.type=postcompilation +tools.pahole.class=pahole-tool diff --git a/etc/config/fortran.amazon.properties b/etc/config/fortran.amazon.properties index f9e8303b91ae86db0d09b4cbc3ed5b595433da9d..2c034a12ad22070a9490e25a898463a114783f64 100644 --- a/etc/config/fortran.amazon.properties +++ b/etc/config/fortran.amazon.properties @@ -97,37 +97,37 @@ group.cross.groupName=Cross GCC ############################### # GCC for ARM -group.gccarm.compilers=armg640:armg730:armg820 +group.gccarm.compilers=farmg640:farmg730:farmg820 group.gccarm.groupName=ARM (32bit) GCC -compiler.armg640.exe=/opt/compiler-explorer/arm/gcc-6.4.0/arm-unknown-linux-gnueabi/bin/arm-unknown-linux-gnueabi-gfortran -compiler.armg640.name=ARM gfortran 6.4 -compiler.armg730.exe=/opt/compiler-explorer/arm/gcc-7.3.0/arm-unknown-linux-gnueabi/bin/arm-unknown-linux-gnueabi-gfortran -compiler.armg730.name=ARM gfortran 7.3 -compiler.armg820.exe=/opt/compiler-explorer/arm/gcc-8.2.0/arm-unknown-linux-gnueabi/bin/arm-unknown-linux-gnueabi-gfortran -compiler.armg820.name=ARM gfortran 8.2 +compiler.farmg640.exe=/opt/compiler-explorer/arm/gcc-6.4.0/arm-unknown-linux-gnueabi/bin/arm-unknown-linux-gnueabi-gfortran +compiler.farmg640.name=ARM gfortran 6.4 +compiler.farmg730.exe=/opt/compiler-explorer/arm/gcc-7.3.0/arm-unknown-linux-gnueabi/bin/arm-unknown-linux-gnueabi-gfortran +compiler.farmg730.name=ARM gfortran 7.3 +compiler.farmg820.exe=/opt/compiler-explorer/arm/gcc-8.2.0/arm-unknown-linux-gnueabi/bin/arm-unknown-linux-gnueabi-gfortran +compiler.farmg820.name=ARM gfortran 8.2 ############################### # GCC for ARM 64bit -group.gccaarch64.compilers=arm64g640:arm64g730:arm64g820 +group.gccaarch64.compilers=farm64g640:farm64g730:farm64g820 group.gccaarch64.groupName=ARM (AARCH64) GCC -compiler.arm64g640.exe=/opt/compiler-explorer/arm64/gcc-6.4.0/aarch64-unknown-linux-gnu/bin/aarch64-unknown-linux-gnu-gfortran -compiler.arm64g640.name=AARCH64 gfortran 6.4 -compiler.arm64g730.exe=/opt/compiler-explorer/arm64/gcc-7.3.0/aarch64-unknown-linux-gnu/bin/aarch64-unknown-linux-gnu-gfortran -compiler.arm64g730.name=AARCH64 gfortran 7.3 -compiler.arm64g820.exe=/opt/compiler-explorer/arm64/gcc-8.2.0/aarch64-unknown-linux-gnu/bin/aarch64-unknown-linux-gnu-gfortran -compiler.arm64g820.name=AARCH64 gfortran 8.2 +compiler.farm64g640.exe=/opt/compiler-explorer/arm64/gcc-6.4.0/aarch64-unknown-linux-gnu/bin/aarch64-unknown-linux-gnu-gfortran +compiler.farm64g640.name=AARCH64 gfortran 6.4 +compiler.farm64g730.exe=/opt/compiler-explorer/arm64/gcc-7.3.0/aarch64-unknown-linux-gnu/bin/aarch64-unknown-linux-gnu-gfortran +compiler.farm64g730.name=AARCH64 gfortran 7.3 +compiler.farm64g820.exe=/opt/compiler-explorer/arm64/gcc-8.2.0/aarch64-unknown-linux-gnu/bin/aarch64-unknown-linux-gnu-gfortran +compiler.farm64g820.name=AARCH64 gfortran 8.2 ############################### # GCC for PPC -group.ppc.compilers=ppc64leg8:ppc64g8 +group.ppc.compilers=fppc64leg8:fppc64g8 group.ppc.groupName=POWER Compilers group.ppc.isSemVer=true -compiler.ppc64leg8.exe=/opt/compiler-explorer/powerpc64le/gcc-at12/powerpc64le-unknown-linux-gnu/bin/powerpc64le-unknown-linux-gnu-gfortran -compiler.ppc64leg8.name=power64le AT12.0 -compiler.ppc64leg8.semver=(snapshot) -compiler.ppc64g8.exe=/opt/compiler-explorer/powerpc64/gcc-at12/powerpc64-unknown-linux-gnu/bin/powerpc64-unknown-linux-gnu-gfortran -compiler.ppc64g8.name=power64 AT12.0 -compiler.ppc64g8.semver=(snapshot) +compiler.fppc64leg8.exe=/opt/compiler-explorer/powerpc64le/gcc-at12/powerpc64le-unknown-linux-gnu/bin/powerpc64le-unknown-linux-gnu-gfortran +compiler.fppc64leg8.name=power64le AT12.0 +compiler.fppc64leg8.semver=(snapshot) +compiler.fppc64g8.exe=/opt/compiler-explorer/powerpc64/gcc-at12/powerpc64-unknown-linux-gnu/bin/powerpc64-unknown-linux-gnu-gfortran +compiler.fppc64g8.name=power64 AT12.0 +compiler.fppc64g8.semver=(snapshot) ################################# ################################# diff --git a/etc/config/go.amazon.properties b/etc/config/go.amazon.properties index 5cd612f691aead7e5a47409ed8bcddc2cdc4a77c..7d60fd2747a26a552f8691925cf687b9b1746f57 100644 --- a/etc/config/go.amazon.properties +++ b/etc/config/go.amazon.properties @@ -1,4 +1,4 @@ -defaultCompiler=gl1110 +defaultCompiler=gl1120 objdumper=/opt/compiler-explorer/gcc-8.1.0/bin/objdump compilers=&gccgo:&gl:&cross @@ -16,7 +16,7 @@ compiler.gccgo720.semver=7.2.0 compiler.gccgo810.exe=/opt/compiler-explorer/gcc-8.1.0/bin/gccgo compiler.gccgo810.semver=8.1.0 -group.gl.compilers=6g141:gl172:gl185:gl187:gl192:gl194:gl1100:gl1101:gl1110:gltip +group.gl.compilers=6g141:gl172:gl185:gl187:gl192:gl194:gl1100:gl1101:gl1110:gl1120:gltip group.gl.versionFlag=version group.gl.compilerType=golang group.gl.supportsBinary=false @@ -51,6 +51,9 @@ compiler.gl1101.goroot=/opt/compiler-explorer/golang-1.10.1/go compiler.gl1110.exe=/opt/compiler-explorer/golang-1.11/go/bin/go compiler.gl1110.semver=1.11 compiler.gl1110.goroot=/opt/compiler-explorer/golang-1.11/go +compiler.gl1120.exe=/opt/compiler-explorer/golang-1.12/go/bin/go +compiler.gl1120.semver=1.12 +compiler.gl1120.goroot=/opt/compiler-explorer/golang-1.12/go compiler.gltip.exe=/opt/compiler-explorer/go-tip/bin/go compiler.gltip.semver=(tip) compiler.gltip.goroot=/opt/compiler-explorer/go-tip @@ -63,15 +66,15 @@ group.cross.groupName=Cross Go ############################### # GCC for PPC -group.ppc.compilers=ppc64leg8:ppc64g8 +group.ppc.compilers=gppc64leg8:gppc64g8 group.ppc.groupName=POWER Compilers group.ppc.isSemVer=true -compiler.ppc64leg8.exe=/opt/compiler-explorer/powerpc64le/gcc-at12/powerpc64le-unknown-linux-gnu/bin/powerpc64le-unknown-linux-gnu-gccgo -compiler.ppc64leg8.name=power64le AT12.0 -compiler.ppc64leg8.semver=(snapshot) -compiler.ppc64g8.exe=/opt/compiler-explorer/powerpc64/gcc-at12/powerpc64-unknown-linux-gnu/bin/powerpc64-unknown-linux-gnu-gccgo -compiler.ppc64g8.name=power64 AT12.0 -compiler.ppc64g8.semver=(snapshot) +compiler.gppc64leg8.exe=/opt/compiler-explorer/powerpc64le/gcc-at12/powerpc64le-unknown-linux-gnu/bin/powerpc64le-unknown-linux-gnu-gccgo +compiler.gppc64leg8.name=power64le AT12.0 +compiler.gppc64leg8.semver=(snapshot) +compiler.gppc64g8.exe=/opt/compiler-explorer/powerpc64/gcc-at12/powerpc64-unknown-linux-gnu/bin/powerpc64-unknown-linux-gnu-gccgo +compiler.gppc64g8.name=power64 AT12.0 +compiler.gppc64g8.semver=(snapshot) ################################# diff --git a/etc/config/haskell.amazon.properties b/etc/config/haskell.amazon.properties index c89549b8f7eb48cfbc31a41f8be580b923b3e278..3176dd93fb8f5cb21509dd87d8e1a00ffe5a84ca 100644 --- a/etc/config/haskell.amazon.properties +++ b/etc/config/haskell.amazon.properties @@ -20,6 +20,8 @@ compiler.ghc861.exe=/opt/compiler-explorer/ghc-8.6.1/bin/ghc compiler.ghc861.semver=8.6.1 compiler.ghc862.exe=/opt/compiler-explorer/ghc-8.6.2/bin/ghc compiler.ghc862.semver=8.6.2 +compiler.ghc863.exe=/opt/compiler-explorer/ghc-8.6.3/bin/ghc +compiler.ghc863.semver=8.6.3 ################################# diff --git a/etc/config/ispc.amazon.properties b/etc/config/ispc.amazon.properties index 2bcd46412670113adf71c152d1d4ba80b170a662..d70f7fa98cc383d396434814c7ebc23730f97128 100644 --- a/etc/config/ispc.amazon.properties +++ b/etc/config/ispc.amazon.properties @@ -1,9 +1,13 @@ compilers=&ispc -defaultCompiler=ispc192 +defaultCompiler=ispc1110 -group.ispc.compilers=ispc192:ispc191 +group.ispc.compilers=ispc1110:ispc1100:ispc192:ispc191 group.ispc.isSemVer=true group.ispc.baseName=ispc +compiler.ispc1110.exe=/opt/compiler-explorer/ispc-1.11.0/bin/ispc +compiler.ispc1110.semver=1.11.0 +compiler.ispc1100.exe=/opt/compiler-explorer/ispc-1.10.0/bin/ispc +compiler.ispc1100.semver=1.10.0 compiler.ispc192.exe=/opt/compiler-explorer/ispc-1.9.2/ispc compiler.ispc192.semver=1.9.2 compiler.ispc191.exe=/opt/compiler-explorer/ispc-1.9.1/ispc diff --git a/etc/config/ocaml.amazon.properties b/etc/config/ocaml.amazon.properties new file mode 100644 index 0000000000000000000000000000000000000000..93899af33533834083bc09cf02b4082958963a04 --- /dev/null +++ b/etc/config/ocaml.amazon.properties @@ -0,0 +1,20 @@ +compilers=&ocaml +defaultCompiler=ocaml4071flambda + +group.ocaml.compilers=ocaml4042:ocaml4061:ocaml4071:ocaml4071flambda +group.ocaml.isSemVer=true +group.ocaml.baseName=x86-64 ocamlopt + +compiler.ocaml4042.exe=/opt/compiler-explorer/ocaml-4.04.2/bin/ocamlopt +compiler.ocaml4042.semver=4.04.2 +compiler.ocaml4061.exe=/opt/compiler-explorer/ocaml-4.06.1/bin/ocamlopt +compiler.ocaml4061.semver=4.06.1 +compiler.ocaml4071.exe=/opt/compiler-explorer/ocaml-4.07.1/bin/ocamlopt +compiler.ocaml4071.semver=4.07.1 +compiler.ocaml4071flambda.exe=/opt/compiler-explorer/ocaml-4.07.1-flambda/bin/ocamlopt +compiler.ocaml4071flambda.semver=4.07.1-flambda + +################################# +################################# +# Installed libs (See c++.amazon.properties for a scheme of libs group) +libs= diff --git a/etc/config/ocaml.defaults.properties b/etc/config/ocaml.defaults.properties new file mode 100644 index 0000000000000000000000000000000000000000..961dca6db2497ded82c7a0a123e3a93a31888d6b --- /dev/null +++ b/etc/config/ocaml.defaults.properties @@ -0,0 +1,9 @@ +compilers=/usr/bin/ocamlopt +supportsBinary=false +compilerType=ocaml + + +################################# +################################# +# Installed libs (See c++.amazon.properties for a scheme of libs group) +libs= diff --git a/etc/config/rust.amazon.properties b/etc/config/rust.amazon.properties index dbeaf5e235e647aecbe79bb503769f39fb7d3fc3..6b6f514c170ef058a0e8c06e1e3a58d4e8782f96 100644 --- a/etc/config/rust.amazon.properties +++ b/etc/config/rust.amazon.properties @@ -1,15 +1,23 @@ compilers=&rust objdumper=/opt/compiler-explorer/gcc-8.1.0/bin/objdump -defaultCompiler=r1300 -group.rust.compilers=r1300:r1290:r1280:r1271:r1270:r1260:r1250:r1240:r1230:r1220:r1210:r1200:r1190:r1180:r1170:r1160:r1151:r1140:r1130:r1120:r1110:r1100:r190:r180:r170:r160:r150:r140:r130:r120:r110:r100:nightly:beta +defaultCompiler=r1340 +group.rust.compilers=r1340:r1330:r1320:r1310:r1300:r1290:r1280:r1271:r1270:r1260:r1250:r1240:r1230:r1220:r1210:r1200:r1190:r1180:r1170:r1160:r1151:r1140:r1130:r1120:r1110:r1100:r190:r180:r170:r160:r150:r140:r130:r120:r110:r100:nightly:beta group.rust.compilerType=rust group.rust.isSemVer=true group.rust.baseName=rustc +compiler.r1340.exe=/opt/compiler-explorer/rust-1.34.0/bin/rustc +compiler.r1340.semver=1.34.0 +compiler.r1330.exe=/opt/compiler-explorer/rust-1.33.0/bin/rustc +compiler.r1330.semver=1.33.0 +compiler.r1320.exe=/opt/compiler-explorer/rust-1.32.0/bin/rustc +compiler.r1320.semver=1.32.0 +compiler.r1310.exe=/opt/compiler-explorer/rust-1.31.0/bin/rustc +compiler.r1310.semver=1.31.0 compiler.r1300.exe=/opt/compiler-explorer/rust-1.30.0/bin/rustc compiler.r1300.semver=1.30.0 compiler.r1290.exe=/opt/compiler-explorer/rust-1.29.0/bin/rustc compiler.r1290.semver=1.29.0 -compiler.r1280.exe=/opt/compiler-explorer/rust-1.29.0/bin/rustc +compiler.r1280.exe=/opt/compiler-explorer/rust-1.28.0/bin/rustc compiler.r1280.semver=1.28.0 compiler.r1271.exe=/opt/compiler-explorer/rust-1.27.1/bin/rustc compiler.r1271.semver=1.27.1 @@ -84,4 +92,9 @@ libs= ################################# # Installed tools -tools= +tools=llvm-mcatrunk + +tools.llvm-mcatrunk.name=llvm-mca +tools.llvm-mcatrunk.exe=/opt/compiler-explorer/clang-trunk/bin/llvm-mca +tools.llvm-mcatrunk.type=postcompilation +tools.llvm-mcatrunk.class=llvm-mca-tool diff --git a/etc/config/swift.amazon.properties b/etc/config/swift.amazon.properties index da9ec3576f9f7096f7c243712f6fb39a84dead02..9a8e4abe47c02acc5095cbb057368d890f23f726 100644 --- a/etc/config/swift.amazon.properties +++ b/etc/config/swift.amazon.properties @@ -1,8 +1,8 @@ compilers=&swift -demangler=/opt/compiler-explorer/swift-4.2/usr/bin/swift-demangle -defaultCompiler=swift42 +demangler=/opt/compiler-explorer/swift-5.0/usr/bin/swift-demangle +defaultCompiler=swift50 -group.swift.compilers=swift311:swift402:swift403:swift41:swift411:swift412:swift42 +group.swift.compilers=swift311:swift402:swift403:swift41:swift411:swift412:swift42:swift50 group.swift.isSemVer=true group.swift.baseName=x86-64 swiftc compiler.swift311.exe=/opt/compiler-explorer/swift-3.1.1/usr/bin/swiftc @@ -19,6 +19,8 @@ compiler.swift412.exe=/opt/compiler-explorer/swift-4.1.2/usr/bin/swiftc compiler.swift412.semver=4.1.2 compiler.swift42.exe=/opt/compiler-explorer/swift-4.2/usr/bin/swiftc compiler.swift42.semver=4.2 +compiler.swift50.exe=/opt/compiler-explorer/swift-5.0/usr/bin/swiftc +compiler.swift50.semver=5.0 ################################# diff --git a/etc/config/zig.amazon.properties b/etc/config/zig.amazon.properties index 1814020c2f75139f98f20e878b3d46d9a299093e..f2a7f7608152e14e0ec5c9dd874942570644b140 100644 --- a/etc/config/zig.amazon.properties +++ b/etc/config/zig.amazon.properties @@ -1,18 +1,22 @@ compilers=&zig -defaultCompiler=z030 +defaultCompiler=z040 -group.zig.compilers=trunk:z020:z030 +group.zig.compilers=ztrunk:z020:z030 group.zig.objdumper=/opt/compiler-explorer/gcc-8.1.0/bin/objdump group.zig.isSemVer=true group.zig.baseName=zig +group.zig.compilerType=zig -compiler.trunk.exe=/opt/compiler-explorer/zig-master/zig -compiler.trunk.semver=trunk +compiler.ztrunk.exe=/opt/compiler-explorer/zig-master/zig +compiler.ztrunk.semver=trunk +compiler.ztrunk.versionFlag=version compiler.z020.exe=/opt/compiler-explorer/zig-0.2.0/zig compiler.z020.semver=0.2.0 compiler.z020.options=--zig-install-prefix /opt/compiler-explorer/zig-0.2.0 compiler.z030.exe=/opt/compiler-explorer/zig-0.3.0/zig compiler.z030.semver=0.3.0 +compiler.z040.exe=/opt/compiler-explorer/zig-0.4.0/zig +compiler.z040.semver=0.4.0 ################################# ################################# diff --git a/etc/scripts/docenizer.py b/etc/scripts/docenizer.py index 0a13f16473ee23c6913d09d183bdec4b6d3e2905..a9a2e430775221907b7fdbf937649009a1288fa4 100644 --- a/etc/scripts/docenizer.py +++ b/etc/scripts/docenizer.py @@ -162,7 +162,7 @@ def instr_name(i): def get_description_paragraphs(document_soup): - description_header_node = document_soup.find(id="Description") + description_header_node = document_soup.find(id="description") i = 0 description_paragraph_node = description_header_node.next_sibling.next_sibling description_paragraphs = [] diff --git a/etc/scripts/find-node b/etc/scripts/find-node index 51e6c8089eb936b0fca7d26a163f979716bddd1b..0020d6100175f23ae1ceb1d8aa66d22ef0c2bf08 100755 --- a/etc/scripts/find-node +++ b/etc/scripts/find-node @@ -1,4 +1,4 @@ -#!/bin/bash +#!/bin/sh set -e OUT="$1" @@ -9,13 +9,13 @@ find_node() { local SYS_NODE="$(which node 2>/dev/null)" local SYS_NODEJS="$(which nodejs 2>/dev/null)" - if [[ -x "${NODE}" ]]; then + if test -x "${NODE}"; then echo "${NODE}" - elif [[ -x "${CE_NODE}" ]]; then + elif test -x "${CE_NODE}"; then echo "${CE_NODE}" - elif [[ -x "${SYS_NODE}" ]]; then + elif test -x "${SYS_NODE}"; then echo "${SYS_NODE}" - elif [[ -x "${SYS_NODEJS}" ]]; then + elif test -x "${SYS_NODEJS}"; then echo "${SYS_NODEJS}" else >&2 echo "Unable to find a node" @@ -24,18 +24,18 @@ find_node() { NODE=$(find_node) -NODE_VERSION_USED=8 +NODE_VERSION_USED=10 NODE_VERSION=$(${NODE} --version) NODE_MAJOR_VERSION=$(echo ${NODE_VERSION} | cut -f1 -d. | sed 's/^v//g') -if [[ ${NODE_MAJOR_VERSION} -lt ${NODE_VERSION_USED} ]]; then +if test ${NODE_MAJOR_VERSION} -lt ${NODE_VERSION_USED}; then >&2 echo Compiler Explorer needs node v${NODE_VERSION_USED}.x, but ${NODE_VERSION} was found. >&2 echo Visit https://nodejs.org/ for installation instructions >&2 echo To configure where we look for node, set NODE_DIR to its installation base exit 1 fi -if [[ ${NODE_MAJOR_VERSION} -gt ${NODE_VERSION_USED} ]]; then +if test ${NODE_MAJOR_VERSION} -gt ${NODE_VERSION_USED}; then >&2 echo Compiler Explorer needs node v${NODE_VERSION_USED}.x, but ${NODE_VERSION} was found. >&2 echo The higher node version might work but it has not been tested. fi diff --git a/etc/scripts/find-yarn b/etc/scripts/find-yarn index fc98b1d8c7ec4c19e29c44308d4feced25e472e5..49293056db73ce96b606fc6d2cdab0fc9595f8c7 100755 --- a/etc/scripts/find-yarn +++ b/etc/scripts/find-yarn @@ -1,11 +1,11 @@ -#!/bin/bash +#!/bin/sh set -e OUT="$1" YARN=$(pwd)/node_modules/.bin/yarn -if [[ ! -x "${YARN}" ]]; then +if test ! -x "${YARN}"; then # Ensure any npm output goes to stderr and doesn't affect our # echo output below >&2 npm install yarn diff --git a/etc/scripts/travis.sh b/etc/scripts/travis.sh index 39fed264836da3ca31f8243fd3a8d021006d71f2..30da1d1bce7c6b22382a6516f53bcc7c38d61307 100755 --- a/etc/scripts/travis.sh +++ b/etc/scripts/travis.sh @@ -30,7 +30,7 @@ get_gdc() { build=$2 mkdir ${OPT}/gdc pushd ${OPT}/gdc - fetch ftp://ftp.gdcproject.org/binaries/${vers}/x86_64-linux-gnu/gdc-${vers}+${build}.tar.xz | tar Jxf - + fetch https://gdcproject.org/downloads/binaries/${vers}/x86_64-linux-gnu/gdc-${vers}+${build}.tar.xz | tar Jxf - popd } diff --git a/examples/ada/Max_Array.adb b/examples/ada/Max_Array.adb new file mode 100644 index 0000000000000000000000000000000000000000..6e1cad98bbeb7073f1e3fabdd0bd8a68ff4c3a49 --- /dev/null +++ b/examples/ada/Max_Array.adb @@ -0,0 +1,15 @@ +-- This pragma will remove the warning produced by the default +-- CE filename and the procedure name differing, +-- see : https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gnat_rm/Pragma-Source_005fFile_005fName.html#Pragma-Source_005fFile_005fName +-- pragma Source_File_Name (Max_Array, Body_File_Name => "example.adb"); +procedure Max_Array is + type Integer_Array is array(Natural range <>) of Integer; + procedure Max_Array(x,y : in out Integer_Array) is + begin + for i in x'range loop + x(i) := (if (y(i) > x(i)) then y(i) else x(i)); + end loop; + end Max_Array; +begin + null; +end Max_Array; diff --git a/examples/ada/Sum.adb b/examples/ada/Sum.adb new file mode 100644 index 0000000000000000000000000000000000000000..12cff16d8a170a5315f1eb528817b61757f454c9 --- /dev/null +++ b/examples/ada/Sum.adb @@ -0,0 +1,17 @@ +-- This pragma will remove the warning produced by the default +-- CE filename and the procedure name differing, +-- see : https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gnat_rm/Pragma-Source_005fFile_005fName.html#Pragma-Source_005fFile_005fName +-- pragma Source_File_Name (Sum, Body_File_Name => "example.adb"); +procedure Sum is + type Integer_Array is array(Natural range <>) of Integer; + function Sum(input : in Integer_Array) return Natural is + sum : Natural := 0; + begin + for i in input'range loop + sum := sum + input(i); + end loop; + return sum; + end Sum; +begin + null; +end Sum; diff --git a/examples/ada/default.adb b/examples/ada/default.adb new file mode 100644 index 0000000000000000000000000000000000000000..0e4fa72e7722417187ed4683fdd130d7b1bc11cd --- /dev/null +++ b/examples/ada/default.adb @@ -0,0 +1,17 @@ +-- This pragma will remove the warning produced by the default +-- CE filename and the procedure name differing, +-- see : https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gnat_rm/Pragma-Source_005fFile_005fName.html#Pragma-Source_005fFile_005fName +pragma Source_File_Name (Square, Body_File_Name => "example.adb"); + +-- Type your code here, or load an example. +function Square(num : Integer) return Integer is +begin + return num**2; +end Square; + +-- Ada 2012 also provides Expression Functions +-- (http://www.ada-auth.org/standards/12rm/html/RM-6-8.html) +-- as a short hand for functions whose body consists of a +-- single return statement. However they cannot be used as a +-- complication unit. +-- function Square(num : Integer) return Integer is (num**2); diff --git a/examples/ocaml/default.ml b/examples/ocaml/default.ml new file mode 100644 index 0000000000000000000000000000000000000000..07f89c72d6a2febedf5106ae2ccd0504952efe71 --- /dev/null +++ b/examples/ocaml/default.ml @@ -0,0 +1 @@ +let square x = x * x diff --git a/examples/ocaml/max_array.ml b/examples/ocaml/max_array.ml new file mode 100644 index 0000000000000000000000000000000000000000..c37d2bac8b54759e25eb35ec2adb8b80d0a855d7 --- /dev/null +++ b/examples/ocaml/max_array.ml @@ -0,0 +1,8 @@ +let max_array array = + let max = ref 0 in + for i = 0 to Array.length array do + let el = array.(i) in + if el > !max + then max := el; + done; + !max diff --git a/examples/ocaml/sum.ml b/examples/ocaml/sum.ml new file mode 100644 index 0000000000000000000000000000000000000000..a7d962c5cc05aab9991d759115bd4ccf4e99eaba --- /dev/null +++ b/examples/ocaml/sum.ml @@ -0,0 +1,5 @@ +let sum l = + let rec sum' acc = function + | [] -> acc + | x::tl -> sum' (acc + x) tl + in sum' 0 l diff --git a/lib/asm-parser-vc.js b/lib/asm-parser-vc.js index 615714db86c4da7fcbbd9712a08f1b92c909a6fe..aacf4d2994a0dd386dfb360de98170e74b1580f2 100644 --- a/lib/asm-parser-vc.js +++ b/lib/asm-parser-vc.js @@ -343,9 +343,11 @@ class AsmParser extends AsmParserBase { } for (const func of obj.functions) { - pushLine({text: "", source: null}); - for (const line of func.lines) { - pushLine(line); + if (!filters.libraryCode || func.file === null) { + pushLine({text: "", source: null}); + for (const line of func.lines) { + pushLine(line); + } } } diff --git a/lib/asm-parser.js b/lib/asm-parser.js index d2740aea159ef79a94810e0519e29be98c1facce..1db156532733ec4ef706dcb792792ce1759bcec4 100644 --- a/lib/asm-parser.js +++ b/lib/asm-parser.js @@ -37,7 +37,8 @@ class AsmParser extends AsmRegex { this.dataDefn = /^\s*\.(string|asciz|ascii|[1248]?byte|short|x?word|long|quad|value|zero)/; this.fileFind = /^\s*\.file\s+(\d+)\s+"([^"]+)"(\s+"([^"]+)")?.*/; this.hasOpcodeRe = /^\s*[a-zA-Z]/; - this.definesFunction = /^\s*\.type.*,\s*[@%]function$/; + this.hasNvccOpcodeRe = /^\s*[a-zA-Z|@]/; + this.definesFunction = /^\s*\.(type.*,\s*[@%]function|proc\s+[.a-zA-Z_][a-zA-Z0-9$_.]*:.*)$/; this.definesGlobal = /^\s*\.globa?l\s*([.a-zA-Z_][a-zA-Z0-9$_.]*)/; this.indentedLabelDef = /^\s*([.a-zA-Z_$][a-zA-Z0-9$_.]*):/; this.assignmentDef = /^\s*([.a-zA-Z_$][a-zA-Z0-9$_.]+)\s*=/; @@ -51,7 +52,6 @@ class AsmParser extends AsmRegex { this.binaryHideFuncRe = null; this.maxAsmLines = 500; - this.inNvccDef = false; if (compilerProps) { const binaryHideFuncReValue = compilerProps('binaryHideFuncRe'); if (binaryHideFuncReValue) { @@ -65,18 +65,22 @@ class AsmParser extends AsmRegex { this.lineRe = /^(\/[^:]+):([0-9]+).*/; this.labelRe = /^([0-9a-f]+)\s+<([^>]+)>:$/; this.destRe = /\s([0-9a-f]+)\s+<([^>]+)>$/; + this.commentRe = /[#;]/; } - hasOpcode(line) { + hasOpcode(line, inNvccCode) { // Remove any leading label definition... const match = line.match(this.labelDef); if (match) { line = line.substr(match[0].length); } // Strip any comments - line = line.split(/[#;]/, 1)[0]; + line = line.split(this.commentRe, 1)[0]; // Detect assignment, that's not an opcode... if (line.match(this.assignmentDef)) return false; + if (inNvccCode) { + return !!line.match(this.hasNvccOpcodeRe); + } return !!line.match(this.hasOpcodeRe); } @@ -133,19 +137,20 @@ class AsmParser extends AsmRegex { labelsUsed[match[1]] = true; } - if (!line || line[0] === '.') return; + const definesFunction = line.match(this.definesFunction); + if (!definesFunction && (!line || line[0] === '.')) return; match = line.match(labelFind); if (!match) return; - if (!filterDirectives || this.hasOpcode(line) || line.match(this.definesFunction)) { + if (!filterDirectives || this.hasOpcode(line, false) || definesFunction) { // Only count a label as used if it's used by an opcode, or else we're not filtering directives. match.forEach(label => labelsUsed[label] = true); } else { // If we have a current label, then any subsequent opcode or data definition's labels are referred to // weakly by that label. const isDataDefinition = !!line.match(this.dataDefn); - const isOpcode = this.hasOpcode(line); + const isOpcode = this.hasOpcode(line, false); if (isDataDefinition || isOpcode) { currentLabelSet.forEach(currentLabel => { if (!weakUsages[currentLabel]) weakUsages[currentLabel] = []; @@ -214,26 +219,25 @@ class AsmParser extends AsmRegex { let prevLabel = ""; const commentOnly = /^\s*(((#|@|;|\/\/).*)|(\/\*.*\*\/))$/; + const commentOnlyNvcc = /^\s*(((#|;|\/\/).*)|(\/\*.*\*\/))$/; const sourceTag = /^\s*\.loc\s+(\d+)\s+(\d+).*/; + const source6502Dbg = /^\s*\.dbg\s+line,\s*"([^"]+)",\s*(\d+)/; + const source6502DbgEnd = /^\s*\.dbg\s+line[^,]/; const sourceStab = /^\s*\.stabn\s+(\d+),0,(\d+),.*/; const stdInLooking = /<stdin>|^-$|example\.[^/]+$|<source>/; const endBlock = /\.(cfi_endproc|data|text|section)/; let source = null; + let mayRemovePreviousLabel = true; + let keepInlineCode = false; - let inCustomAssembly = 0; - asmLines.forEach(line => { - let match; - if (line.trim() === "") { + function maybeAddBlank() { + const lastBlank = result.length === 0 || result[result.length - 1].text === ""; + if (!lastBlank) result.push({text: "", source: null}); - return; - } + } - if (line.match(this.startAppBlock) || line.match(this.startAsmNesting)) { - inCustomAssembly++; - } else if (line.match(this.endAppBlock) || line.match(this.endAsmNesting)) { - inCustomAssembly--; - } - match = line.match(sourceTag); + function handleSource(line) { + const match = line.match(sourceTag); if (match) { const file = files[parseInt(match[1])]; const sourceLine = parseInt(match[2]); @@ -246,36 +250,96 @@ class AsmParser extends AsmRegex { source = null; } } - match = line.match(sourceStab); + + } + + function handleStabs(line) { + const match = line.match(sourceStab); + if (!match) return; + // cf http://www.math.utah.edu/docs/info/stabs_11.html#SEC48 + switch (parseInt(match[1])) { + case 68: + source = {file: null, line: parseInt(match[2])}; + break; + case 132: + case 100: + source = null; + prevLabel = null; + break; + } + } + + function handle6502(line) { + const match = line.match(source6502Dbg); if (match) { - // cf http://www.math.utah.edu/docs/info/stabs_11.html#SEC48 - switch (parseInt(match[1])) { - case 68: - source = {file: null, line: parseInt(match[2])}; - break; - case 132: - case 100: - source = null; - prevLabel = null; - break; - } + const file = match[1]; + const sourceLine = parseInt(match[2]); + source = { + file: !file.match(stdInLooking) ? file : null, + line: sourceLine + }; + } else if (line.match(source6502DbgEnd)) { + source = null; + } + } + + let inNvccDef = false; + let inNvccCode = false; + + let inCustomAssembly = 0; + asmLines.forEach(line => { + if (line.trim() === "") return maybeAddBlank(); + + if (line.match(this.startAppBlock) || line.match(this.startAsmNesting)) { + inCustomAssembly++; + } else if (line.match(this.endAppBlock) || line.match(this.endAsmNesting)) { + inCustomAssembly--; } - if (line.match(endBlock)) { + + handleSource(line); + handleStabs(line); + handle6502(line); + + if (line.match(endBlock) || (inNvccCode && line.match(/}/))) { source = null; prevLabel = null; } - if (filters.commentOnly && line.match(commentOnly)) return; + if (filters.libraryCode && source && source.file !== null) { + if (mayRemovePreviousLabel && result.length > 0) { + const lastLine = result[result.length - 1]; + if (lastLine.text && lastLine.text.match(this.labelDef)) { + result.pop(); + keepInlineCode = false; + } else { + keepInlineCode = true; + } + mayRemovePreviousLabel = false; + } + + if (!keepInlineCode) return; + } else { + mayRemovePreviousLabel = true; + } + + if (filters.commentOnly && + ((line.match(commentOnly) && !inNvccCode) || + (line.match(commentOnlyNvcc) && inNvccCode)) + ) { + return; + } if (inCustomAssembly > 0) line = this.fixLabelIndentation(line); - match = line.match(this.labelDef); + let match = line.match(this.labelDef); if (!match) match = line.match(this.assignmentDef); if (!match) { match = line.match(this.cudaBeginDef); - if (match) - this.inNvccDef = true; + if (match) { + inNvccDef = true; + inNvccCode = true; + } } if (match) { // It's a label definition. @@ -287,9 +351,9 @@ class AsmParser extends AsmRegex { prevLabel = match; } } - if (this.inNvccDef) { + if (inNvccDef) { if (line.match(this.cudaEndDef)) - this.inNvccDef = false; + inNvccDef = false; } else if (!match && filters.directives) { // Check for directives only if it wasn't a label; the regexp would // otherwise misinterpret labels as directives. @@ -301,7 +365,10 @@ class AsmParser extends AsmRegex { } line = utils.expandTabs(line); - result.push({text: AsmRegex.filterAsmLine(line, filters), source: this.hasOpcode(line) ? source : null}); + result.push({ + text: AsmRegex.filterAsmLine(line, filters), + source: this.hasOpcode(line, inNvccCode) ? source : null + }); }); return result; } @@ -326,6 +393,7 @@ class AsmParser extends AsmRegex { let asmLines = asm.split("\n"); let source = null; let func = null; + let mayRemovePreviousLabel = true; // Handle "error" documents. if (asmLines.length === 1 && asmLines[0][0] === '<') { @@ -360,6 +428,19 @@ class AsmParser extends AsmRegex { if (!func || !this.isUserFunction(func)) return; + if (filters.libraryCode && source && source.file !== null) { + if (mayRemovePreviousLabel && result.length > 0) { + const lastLine = result[result.length - 1]; + if (lastLine.text && lastLine.text.match(this.labelDef)) { + result.pop(); + } + mayRemovePreviousLabel = false; + } + return; + } else { + mayRemovePreviousLabel = true; + } + match = line.match(this.asmOpcodeRe); if (match) { const address = parseInt(match[1], 16); diff --git a/lib/asmregex.js b/lib/asmregex.js index 47aaccac465f20226df8d024b11912ed251d22b2..e1237c16a56222e7d82cee148635754827ef71fd 100644 --- a/lib/asmregex.js +++ b/lib/asmregex.js @@ -23,11 +23,12 @@ // POSSIBILITY OF SUCH DAMAGE. "use strict"; +const utils = require('./utils'); const findQuotes = /(.*?)("(?:[^"\\]|\\.)*")(.*)/; class AsmRegex { constructor() { - this.labelDef = /^([.a-z_$@][a-z0-9$_@.]*):/i; + this.labelDef = /^(?:.proc\s+)?([.a-z_$@][a-z0-9$_@.]*):/i; } static squashHorizontalWhitespace(line, atStart) { @@ -36,13 +37,7 @@ class AsmRegex { return this.squashHorizontalWhitespace(quotes[1], atStart) + quotes[2] + this.squashHorizontalWhitespace(quotes[3], false); } - const splat = line.split(/\s+/); - if (splat[0] === "" && atStart) { - // An indented line: preserve a two-space indent - return " " + splat.slice(1).join(" "); - } else { - return splat.join(" "); - } + return utils.squashHorizontalWhitespace(line, atStart); } static filterAsmLine(line, filters) { diff --git a/lib/base-compiler.js b/lib/base-compiler.js index 74d6ef5467529cf6b27796b97e6117d38c0503ba..7b19b414910a2d09757a72153611a3f35669f4b4 100644 --- a/lib/base-compiler.js +++ b/lib/base-compiler.js @@ -26,13 +26,16 @@ const temp = require('temp'), path = require('path'), fs = require('fs-extra'), denodeify = require('denodeify'), + LlvmIrParser = require('./llvm-ir'), AsmParser = require('./asm-parser'), utils = require('./utils'), _ = require('underscore'), + packager = require('./packager').Packager, exec = require('./exec'), logger = require('./logger').logger, compilerOptInfo = require("compiler-opt-info"), argumentParsers = require("./compilers/argument-parsers"), + CompilerArguments = require("./compiler-arguments"), cfg = require('./cfg'), languages = require('./languages').list; @@ -63,9 +66,15 @@ class BaseCompiler { this.readFile = denodeify(fs.readFile); this.stat = denodeify(fs.stat); this.asm = new AsmParser(this.compilerProps); + this.llvmIr = new LlvmIrParser(this.compilerProps); + this.possibleArguments = new CompilerArguments(this.compiler.id); this.possibleTools = _.values(compilerInfo.tools); this.possibleLibs = compilerInfo.libs; + + this.outputFilebase = "output"; + + this.packager = new packager(); } newTempDir() { @@ -108,6 +117,10 @@ class BaseCompiler { execOptions = this.getDefaultExecOptions(); } + if (!execOptions.customCwd) { + execOptions.customCwd = path.dirname(inputFilename); + } + return this.exec(compiler, options, execOptions).then(result => { result.inputFilename = inputFilename; result.stdout = utils.parseOutput(result.stdout, inputFilename); @@ -135,9 +148,11 @@ class BaseCompiler { } execBinary(executable, maxSize, executeParameters) { + // We might want to save this in the compilation environment once execution is made available + const timeoutMs = this.env.ceProps('binaryExecTimeoutMs', 2000); return exec.sandbox(executable, executeParameters, { maxOutput: maxSize, - timeoutMs: 2000 + timeoutMs: timeoutMs }) // TODO make config .then(execResult => { execResult.stdout = utils.parseOutput(execResult.stdout); @@ -201,6 +216,29 @@ class BaseCompiler { .then(this.processAstOutput); } + generateIR(inputFilename, options, filters) { + // These options make Clang produce an IR + let newOptions = _.filter(options, option => option !== '-fcolor-diagnostics') + .concat(this.compiler.irArg); + + let execOptions = this.getDefaultExecOptions(); + // A higher max output is needed for when the user includes headers + execOptions.maxOutput = 1024 * 1024 * 1024; + + return this.runCompiler(this.compiler.exe, newOptions, this.filename(inputFilename), execOptions) + .then((output) => this.processIrOutput(output, filters)); + } + + processIrOutput(output, filters) { + const irPath = output.inputFilename.replace(path.extname(output.inputFilename), '.ll'); + if (fs.existsSync(irPath)) { + const output = fs.readFileSync(irPath, 'utf-8'); + // uses same filters as main compiler + return this.llvmIr.process(output, filters); + } + return this.llvmIr.process(output.stdout, filters); + } + getOutputFilename(dirPath, outputFilebase) { // NB keep lower case as ldc compiler `tolower`s the output name return path.join(dirPath, `${outputFilebase}.s`); @@ -265,34 +303,68 @@ class BaseCompiler { return this.runCompiler(compiler, options, inputFilename, execOptions); } - getOrBuildExecutable(key) { - // todo: ask cache for executable if it already exists + buildExecutableInFolder(key, dirPath) { + const inputFilename = path.join(dirPath, this.compileFilename); + return this.writeFile(inputFilename, key.source).then(() => { + return { + inputFilename: inputFilename, + dirPath: dirPath + }; + }).then((dirResult) => { + const outputFilename = this.getExecutableFilename(dirResult.dirPath, this.outputFilebase); - return this.newTempDir() - .then(dirPath => { - const inputFilename = path.join(dirPath, this.compileFilename); - return this.writeFile(inputFilename, key.source).then(() => ({ - inputFilename: inputFilename, - dirPath: dirPath - })); - }).then((dirResult) => { - const outputFilebase = "output"; - const outputFilename = this.getExecutableFilename(dirResult.dirPath, outputFilebase); - - let buildFilters = Object.assign({}, key.filters); - buildFilters.binary = true; - buildFilters.execute = true; - - const compilerArguments = _.compact( - this.prepareArguments(key.options, buildFilters, key.backendOptions, - dirResult.inputFilename, outputFilename) - ); - - return this.buildExecutable(key.compiler.exe, compilerArguments, - dirResult.inputFilename, this.getDefaultExecOptions()).then(result => { + let buildFilters = Object.assign({}, key.filters); + buildFilters.binary = true; + buildFilters.execute = true; + + const compilerArguments = _.compact( + this.prepareArguments(key.options, buildFilters, key.backendOptions, + dirResult.inputFilename, outputFilename) + ); + + return this.buildExecutable(key.compiler.exe, compilerArguments, + dirResult.inputFilename, this.getDefaultExecOptions()) + .then(result => { result.executableFilename = outputFilename; return result; }); + }); + } + + getOrBuildExecutable(key) { + return this.newTempDir() + .then(dirPath => { + return this.env.executableGet(key, dirPath).then(outputFilename => { + logger.debug("Using cached package " + outputFilename); + return this.packager.unpack(outputFilename, dirPath).then(() => { + return { + code: 0, + inputFilename: path.join(dirPath, this.compileFilename), + dirPath: dirPath, + executableFilename: this.getExecutableFilename(dirPath, this.outputFilebase) + }; + }); + }).catch((err) => { + logger.debug("Tried to get executable from cache, but... " + err); + + return this.buildExecutableInFolder(key, dirPath).then(result => { + if (result.code !== 0) { + return result; + } else { + return this.newTempDir().then(packDir => { + const packagedfile = path.join(packDir, "package.tgz"); + return this.packager.package(result.executableFilename, packagedfile).then(() => { + return this.env.executablePut(key, packagedfile).then(() => { + fs.remove(packDir); + return result; + }); + }).catch((e) => { + logger.error(e); + }); + }); + } + }); + }); }); } @@ -308,7 +380,7 @@ class BaseCompiler { if (buildResult.code !== 0) { return buildResult; } else { - return this.runExecutable(buildResult.executableFilename, + return this.runExecutable(buildResult.executableFilename, executeParameters); } }); @@ -371,8 +443,7 @@ class BaseCompiler { const inputFilename = info.inputFilename; const inputFilenameSafe = this.filename(inputFilename); const dirPath = info.dirPath; - const outputFilebase = "output"; - const outputFilename = this.getOutputFilename(dirPath, outputFilebase); + const outputFilename = this.getOutputFilename(dirPath, this.outputFilebase); options = _.compact( this.prepareArguments(options, filters, backendOptions, inputFilename, outputFilename) @@ -393,6 +464,13 @@ class BaseCompiler { astPromise = Promise.resolve(""); } + let irPromise; + if (backendOptions && backendOptions.produceIr && this.compiler.supportsIrView) { + irPromise = this.generateIR(inputFilename, options, filters); + } else { + irPromise = Promise.resolve(""); + } + let gccDumpPromise; if (backendOptions && backendOptions.produceGccDump && backendOptions.produceGccDump.opened && this.compiler.supportsGccDump) { @@ -404,8 +482,14 @@ class BaseCompiler { gccDumpPromise = Promise.resolve(""); } - return Promise.all([asmPromise, astPromise, gccDumpPromise, Promise.all(toolsPromise)]) - .then(([asmResult, astResult, gccDumpResult, toolsPromise]) => { + return Promise.all([ + asmPromise, + astPromise, + gccDumpPromise, + irPromise, + Promise.all(toolsPromise) + ]) + .then(([asmResult, astResult, gccDumpResult, irResult, toolsPromise]) => { asmResult.dirPath = dirPath; asmResult.compilationOptions = options; // Here before the check to ensure dump reports even on failure cases @@ -419,9 +503,9 @@ class BaseCompiler { asmResult.asm = "<Compilation failed>"; return asmResult; } - asmResult.hasOptOutput = false; + if (this.compiler.supportsOptOutput && this.optOutputRequested(options)) { - const optPath = path.join(dirPath, `${outputFilebase}.opt.yaml`); + const optPath = path.join(dirPath, `${this.outputFilebase}.opt.yaml`); if (fs.existsSync(optPath)) { asmResult.hasOptOutput = true; asmResult.optPath = optPath; @@ -431,6 +515,10 @@ class BaseCompiler { asmResult.hasAstOutput = true; asmResult.astOutput = astResult; } + if (irResult) { + asmResult.hasIrOutput = true; + asmResult.irOutput = irResult; + } return this.checkOutputFileAndDoPostProcess(asmResult, outputFilename, filters); }); @@ -463,8 +551,7 @@ class BaseCompiler { return result; }) .then(result => { - const outputFilebase = "output"; - const outputFilename = this.getOutputFilename(result.dirPath, outputFilebase); + const outputFilename = this.getOutputFilename(result.dirPath, this.outputFilebase); const postToolsPromise = this.runToolsOfType( result.inputFilename, tools, "postcompilation", @@ -482,7 +569,7 @@ class BaseCompiler { result.dirPath = undefined; } if (result.okToCache) { - result.asm = this.asm.process(result.asm, filters); + result.asm = this.processAsm(result, filters); } else { result.asm = [{text: result.asm}]; } @@ -491,10 +578,16 @@ class BaseCompiler { .then(result => filters.demangle ? this.postProcessAsm(result, filters) : result) .then(result => { if (this.compiler.supportsCfg && backendOptions && backendOptions.produceCfg) { - result.cfg = cfg.generateStructure(this.compiler.version, result.asm); + result.cfg = cfg.generateStructure(this.compiler.compilerType, + this.compiler.version, result.asm); } return result; }) + .then(result => { + result.popularArguments = this.possibleArguments.getPopularArguments(options); + + return result; + }) .then(result => { if (result.okToCache) { this.env.cachePut(key, result); @@ -512,6 +605,13 @@ class BaseCompiler { }); } + processAsm(result, filters) { + if (this.llvmIr.isLlvmIr(result.asm)) { + return this.llvmIr.process(result.asm, filters); + } + return this.asm.process(result.asm, filters); + } + postProcessAsm(result) { if (!result.okToCache) return result; const demanglerExe = this.compiler.demangler; @@ -563,8 +663,8 @@ class BaseCompiler { isCfgCompiler(compilerVersion) { return compilerVersion.includes("clang") || - compilerVersion.indexOf("g++") === 0 || - compilerVersion.indexOf("gdc") === 0; + compilerVersion.match(/^([\w-]*-)?g((\+\+)|(cc)|(dc))/g) !== null; + } processAstOutput(output) { diff --git a/lib/cache/s3.js b/lib/cache/s3.js index bd954919d2ec1d627c795b59bddb3a6dc1656704..f2f932500dfec18d082a0a9b5566172940bc8c16 100644 --- a/lib/cache/s3.js +++ b/lib/cache/s3.js @@ -24,7 +24,7 @@ const BaseCache = require('./base.js'); const S3Bucket = require('../s3-handler'); -const Raven = require('raven-js'); +const Sentry = require('@sentry/node'); const logger = require('../logger').logger; function messageFor(e) { @@ -43,7 +43,7 @@ class S3Cache extends BaseCache { getInternal(key) { return this.s3.get(key, this.path) .catch(e => { - Raven.captureException(e); + Sentry.captureException(e); logger.error("Error while trying to read S3 cache:", messageFor(e)); return {hit: false}; }); @@ -59,7 +59,7 @@ class S3Cache extends BaseCache { } return this.s3.put(key, value, this.path, options) .catch(e => { - Raven.captureException(e); + Sentry.captureException(e); logger.error("Error while trying to write to S3 cache:", messageFor(e)); }); } diff --git a/lib/cfg.js b/lib/cfg.js index 96b29bffbd30da6c7dc9d908cdfbd07225f2f0c8..5f803ff906dba0598133595f5ff5b06dabb9a36c 100644 --- a/lib/cfg.js +++ b/lib/cfg.js @@ -22,7 +22,8 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. const _ = require('underscore'), - logger = require('./logger').logger; + logger = require('./logger').logger, + utils = require('./utils'); const InstructionType_jmp = 0; const InstructionType_conditionalJmpInst = 1; @@ -30,13 +31,46 @@ const InstructionType_notRetInst = 2; const InstructionType_retInst = 3; // deal with typeinfo name for, typeinfo for, vtable for -const isFunctionName = x => x.text.trim().indexOf('.') !== 0 && !x.text.includes(' for '); +const isFunctionName = x => x.text.trim().indexOf('.') !== 0; + +function getAsmDirective(txt) { + const pattern = /^\s*(\.[^L ]\S*)/; + const match = txt.match(pattern); + if (match !== null) { + return match[1]; + } + return null; +} + +function filterTextSection(data) { + var useCurrentSection = true; + var result = []; + for (var i in data) { + var x = data[i]; + var directive = getAsmDirective(x.text); + if (directive != null) { + if (directive === ".text" || directive === ".data") { + useCurrentSection = directive === ".text"; + } else if (directive === ".section") { + // Only patttern match for now. + // Extracting section name would require adjusting demangling code + // as demangled name could contain various symbols including ','. + useCurrentSection = /\.section\s*"?\.text/.test(x.text); + } else if (useCurrentSection) { + result.push(x); + } + } else if (useCurrentSection) { + result.push(x); + } + } + return result; +} const gccX86 = { filterData: asmArr => { const jmpLabelRegex = /\.L\d+:/; const isCode = x => x && x.text && (x.source !== null || jmpLabelRegex.test(x.text) || isFunctionName(x)); - return _.chain(asmArr) + return _.chain(filterTextSection(asmArr)) .map(_.clone) .filter(isCode) .value(); @@ -65,11 +99,11 @@ const clangX86 = { const removeComments = x => { const pos = x.text.indexOf('#'); if (pos !== -1) - x.text = x.text.substring(0, pos - 1); + x.text = utils.trimRight(x.text.substring(0, pos)); return x; }; - return _.chain(asmArr) + return _.chain(filterTextSection(asmArr)) .map(_.clone) .filter(isCode) .map(removeComments) @@ -273,9 +307,17 @@ function makeEdges(asmArr, arrOfCanonicalBasicBlock, rules) { return edges; } +function isLLVMBased(compilerType, version) { + return version.includes('clang') || + version.includes('LLVM') || + version.includes('rustc') || + compilerType === 'swift' || + compilerType === 'zig' || + compilerType === 'ispc'; +} -function generateCfgStructure(version, asmArr) { - const rules = (version.includes('clang') || version.includes('LLVM')) ? clangX86 : gccX86; +function generateCfgStructure(compilerType, version, asmArr) { + const rules = isLLVMBased(compilerType, version) ? clangX86 : gccX86; const code = rules.filterData(asmArr); const funcs = splitToFunctions(code, rules.isFunctionEnd); if (!funcs.length) { diff --git a/lib/compilation-env.js b/lib/compilation-env.js index d19d6b2027077455273823ae0489343626d745f5..77aff884c7cd5e15b03ecda4ba3a67bff2718d17 100644 --- a/lib/compilation-env.js +++ b/lib/compilation-env.js @@ -29,7 +29,8 @@ const BaseCache = require('./cache/base'), logger = require('./logger').logger, _ = require('underscore'), - Raven = require('raven'); + fs = require('fs-extra'), + Sentry = require('@sentry/node'); Queue.configure(Promise); @@ -40,6 +41,8 @@ class CompilationEnvironment { this.okOptions = new RegExp(this.ceProps('optionsWhitelistRe', '.*')); this.badOptions = new RegExp(this.ceProps('optionsBlacklistRe', '(?!)')); this.cache = FromConfig.create(doCache === undefined || doCache ? this.ceProps('cacheConfig', '') : ""); + this.executableCache = FromConfig.create(doCache === undefined || + doCache ? this.ceProps('executableCacheConfig', '') : ""); this.compileQueue = new Queue(this.ceProps("maxConcurrentCompiles", 1), Infinity); this.reportCacheEvery = this.ceProps("cacheReportEvery", 100); this.multiarch = null; @@ -86,6 +89,27 @@ class CompilationEnvironment { return this.cache.put(key, JSON.stringify(result), creator); } + executableGet(object, destinationFolder) { + const key = BaseCache.hash(object) + '_exec'; + return this.executableCache.get(key).then((result) => { + return new Promise((resolve, reject) => { + if (!result.hit) reject("Executable not found in cache"); + + const filepath = destinationFolder + '/' + key; + fs.writeFile(filepath, result.data).then(() => { + resolve(filepath); + }).catch((err) => { + reject(err); + }); + }); + }); + } + + executablePut(object, filepath) { + const key = BaseCache.hash(object) + '_exec'; + return this.executableCache.put(key, fs.readFileSync(filepath)); + } + enqueue(job) { const wrappedJob = function () { try { @@ -93,7 +117,7 @@ class CompilationEnvironment { } catch (e) { if (e.stack) logger.info(e.stack); logger.error(`Caught promise exception ${e}`); - Raven.captureException(e); + Sentry.captureException(e); return Promise.resolve(null); } }; diff --git a/lib/compiler-arguments.js b/lib/compiler-arguments.js new file mode 100644 index 0000000000000000000000000000000000000000..d4e8251319ea778ee7d80b4b1e1a9c2d0bfca8ac --- /dev/null +++ b/lib/compiler-arguments.js @@ -0,0 +1,166 @@ +// Copyright (c) 2018, Compiler Explorer Team +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +"use strict"; + +const + _ = require('underscore'), + AWS = require('aws-sdk'), + logger = require('./logger').logger, + S3Bucket = require('./s3-handler'); + +class CompilerArguments { + constructor(compilerId) { + this.compilerId = compilerId; + this.possibleArguments = []; + this.maxPopularArguments = 5; + this.storeSpecificArguments = false; + } + + loadFromStorage(awsProps) { + const region = awsProps('region'); + const bucket = awsProps('storageBucketArgStats'); + const prefix = awsProps('storagePrefixArgStats'); + if (region && bucket && this.compilerId) { + AWS.config.update({region: region}); + + const s3 = new S3Bucket(bucket, region); + s3.get(this.compilerId + ".json", prefix) + .then(result => { + if (result.hit) { + const stats = JSON.parse(result.data.toString()); + _.each(stats, (times, arg) => { + this.addOptionToStatistics(arg, times); + }); + } else { + logger.debug(`${this.compilerId}.json not present in storage`); + } + }); + } + } + + getPopularArguments(excludeUsedArguments) { + let possibleArguments = {}; + if (excludeUsedArguments && excludeUsedArguments.length > 0) { + _.forEach(this.possibleArguments, (obj, argKey) => { + for (var argIdx in excludeUsedArguments) { + if (this.match(argKey, excludeUsedArguments[argIdx])) return; + } + possibleArguments[argKey] = obj; + }); + } else { + possibleArguments = this.possibleArguments; + } + + let arr = _.pairs(possibleArguments); + arr.sort((a, b) => { + if ((a[1].timesused === 0) && (b[1].timesused === 0)) { + // prefer optimization flags or standard if statistics are not available + if (a[1].description.includes("optimization")) { + return -1; + } else if (b[1].description.includes("optimization")) { + return 1; + } else if (a[1].description.includes("std")) { + return -1; + } else if (b[1].description.includes("std")) { + return 1; + } + } else { + return (b[1].timesused - a[1].timesused); + } + }); + arr = _.first(arr, this.maxPopularArguments); + return _.object(arr); + } + + populateOptions(options) { + this.possibleArguments = options; + } + + match(documentedOption, givenOption) { + if (documentedOption.includes("<number>") || documentedOption.includes("<n>")) { + const numre = /[0-9]*$/i; + if (documentedOption.indexOf(givenOption.replace(numre, "")) === 0) { + return documentedOption; + } + } + + if (documentedOption.includes("=")) { + const idx = documentedOption.indexOf("="); + if (givenOption.indexOf("=") === idx) { + if (documentedOption.substr(0, idx) === givenOption.substr(0, idx)) { + return documentedOption; + } + } + } + + if (documentedOption.includes(":")) { + const idx = documentedOption.indexOf(":"); + if (givenOption.indexOf(":") === idx) { + if (documentedOption.substr(0, idx) === givenOption.substr(0, idx)) { + return documentedOption; + } + } + } + + if (documentedOption.includes("[")) { + const idx = documentedOption.indexOf("[") - 1; + if (documentedOption.indexOf(givenOption.substr(0, idx)) === 0) { + return documentedOption; + } + } + + if (documentedOption.indexOf(givenOption) === 0) { + return documentedOption; + } + + return false; + } + + addOptionToStatistics(option, timesUsed) { + if (!timesUsed) timesUsed = 1; + + const possibleKeys = _.compact( + _.keys(this.possibleArguments).map((val) => this.match(val, option)) + ); + + possibleKeys.forEach(key => { + if (this.possibleArguments[key]) { + this.possibleArguments[key].timesused += timesUsed; + + if (this.storeSpecificArguments && (key !== option)) { + if (!this.possibleArguments[key].specifically) { + this.possibleArguments[key].specifically = []; + } + + this.possibleArguments[key].specifically.push({ + arg: option, + timesused: timesUsed + }); + } + } + }); + } +} + +module.exports = CompilerArguments; diff --git a/lib/compiler-finder.js b/lib/compiler-finder.js index 71ab949a9e45e49d26a92b966f6280aca9cf422c..3b30182d27aad51a6ada5b4b1a45d1db38beb0de 100644 --- a/lib/compiler-finder.js +++ b/lib/compiler-finder.js @@ -55,10 +55,14 @@ class CompilerFinder { return this.awsPoller.getInstances(); } - fetchRemote(host, port, props) { + fetchRemote(host, port, props, langId) { const requestLib = port === 443 ? https : http; const uriSchema = port === 443 ? "https" : "http"; const uri = `${uriSchema}://${host}:${port}`; + let apiPath = '/api/compilers'; + if (langId !== null) { + apiPath += `/${langId}`; + } logger.info(`Fetching compilers from remote source ${uri}`); return this.retryPromise( () => { @@ -66,7 +70,7 @@ class CompilerFinder { const request = requestLib.get({ hostname: host, port: port, - path: "/api/compilers", + path: apiPath, headers: { Accept: 'application/json' } @@ -130,7 +134,7 @@ class CompilerFinder { if (this.awsProps("externalTestMode", false)) { address = instance.PublicDnsName; } - return this.fetchRemote(address, this.args.port, this.awsProps); + return this.fetchRemote(address, this.args.port, this.awsProps, null); })); }); } @@ -148,6 +152,7 @@ class CompilerFinder { const supportsBinary = !!props("supportsBinary", true); const supportsExecute = supportsBinary && !!props("supportsExecute", true); + const supportsLibraryCodeFilter = !!props("supportsLibraryCodeFilter", true); const group = props("group", ""); const demangler = props("demangler", ""); const isSemVer = props("isSemVer", false); @@ -184,6 +189,7 @@ class CompilerFinder { supportsDemangle: !!demangler, supportsBinary: supportsBinary, supportsExecute: supportsExecute, + supportsLibraryCodeFilter: supportsLibraryCodeFilter, postProcess: props("postProcess", "").split("|"), lang: langId, group: group, @@ -208,7 +214,7 @@ class CompilerFinder { const bits = compilerName.split("@"); const host = bits[0]; const port = parseInt(bits[1]); - return this.fetchRemote(host, port, this.ceProps); + return this.fetchRemote(host, port, this.ceProps, langId); } if (compilerName.indexOf("&") === 0) { const groupName = compilerName.substr(1); @@ -238,17 +244,19 @@ class CompilerFinder { ensureDistinct(compilers) { let ids = {}; + let foundClash = false; _.each(compilers, compiler => { if (!ids[compiler.id]) ids[compiler.id] = []; ids[compiler.id].push(compiler); }); _.each(ids, (list, id) => { if (list.length !== 1) { + foundClash = true; logger.error(`Compiler ID clash for '${id}' - used by ${ _.map(list, o => `lang:${o.lang} name:${o.name}`).join(', ') }`); } }); - return compilers; + return {compilers, foundClash}; } retryPromise(promiseFunc, name, maxFails, retryMs) { @@ -307,7 +315,9 @@ class CompilerFinder { .then(compilers => this.compileHandler.setCompilers(compilers)) .then(compilers => _.compact(compilers)) .then(this.ensureDistinct) - .then(compilers => _.sortBy(compilers, "name")); + .then(result => { + return {foundClash: result.foundClash, compilers: _.sortBy(result.compilers, "name")}; + }); } } diff --git a/lib/compilers/ada.js b/lib/compilers/ada.js new file mode 100644 index 0000000000000000000000000000000000000000..26f4d710239af3215ca6df298a9cd65b7e4ca30c --- /dev/null +++ b/lib/compilers/ada.js @@ -0,0 +1,91 @@ +// Copyright (c) 2018, Mitch Kennedy +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. + +const BaseCompiler = require('../base-compiler'), + utils = require('../utils'), + path = require("path"); + +class AdaCompiler extends BaseCompiler { + constructor(info, env) { + super(info, env); + this.supportsOptOutput = false; + this.compiler.supportsIntel = true; + } + + optionsForFilter(filters, outputFilename) { + let options = ['compile', + '-g', // enable debugging + '-c', // Compile only + '-S', // Generate ASM + '-fdiagnostics-color=always', + '-fverbose-asm', // Geneate verbose ASM showing variables + '-cargs', // Compiler Switches for gcc. + '-o', // Set the output executable name + outputFilename + ]; + if (this.compiler.intelAsm && filters.intel && !filters.binary) { + options = options.concat(this.compiler.intelAsm.split(" ")); + } + return options; + } + + // I have left the overloaded preProcess method in case there is a + // need to any actual pre-processing of the input. + // As Ada expects the outermost function name to match the source file name. + // The initial solution was to wrap any input in a dummy example procedure, + // this however restricts users from including standard library packages, as + // Ada mandates that 'with' clauses are placed in the context clause, + // which in the case of a single subprogram is outside of its declaration and body. + preProcess(source) { + return source; + } + + runCompiler(compiler, options, inputFilename, execOptions) { + if (!execOptions) { + execOptions = this.getDefaultExecOptions(); + } + // Set the working directory to be the temp directory that has been created + execOptions.customCwd = path.dirname(inputFilename); + // As the file name is always appended to the end of the options array we need to + // find where the '-cargs' flag is in options. This is to allow us to set the + // output as 'output.s' and not end up with 'example.s'. If the output is left + // as 'example.s' CE can't find it and thus you get no output. + let inputFileName = options.pop(); + for (let i = 0; i < options.length; i++) { + if (options[i] === '-cargs') { + options.splice(i, 0, inputFileName); + break; + } + } + return this.exec(compiler, options, execOptions) + .then(result => { + result.inputFilename = inputFilename; + result.stdout = utils.parseOutput(result.stdout, inputFilename); + result.stderr = utils.parseOutput(result.stderr, inputFilename); + return result; + }); + } +} + +module.exports = AdaCompiler; diff --git a/lib/compilers/argument-parsers.js b/lib/compilers/argument-parsers.js index b3fbcfe32dd8a8e282728ae17bc5a5df894bfda8..ffdd8469c8e64644e2e92bd832cf6ec3f1480d41 100644 --- a/lib/compilers/argument-parsers.js +++ b/lib/compilers/argument-parsers.js @@ -27,18 +27,53 @@ const _ = require('underscore'), utils = require('../utils'); class BaseParser { + static hasSupport(options, forOption) { + return _.keys(options).find(option => option.includes(forOption)); + } + + static parseLines(stdout, optionRegex) { + let previousOption = false; + let options = {}; + + utils.eachLine(stdout, line => { + const match = line.match(optionRegex); + if (!match) { + if (previousOption && (line.trim().length !== 0)) { + if (options[previousOption].description.endsWith("-")) + options[previousOption].description += line.trim(); + else { + if (options[previousOption].description.length !== 0) + options[previousOption].description += " " + line.trim(); + else + options[previousOption].description = line.trim(); + } + } else { + previousOption = false; + } + return; + } + + if (match) previousOption = match[1]; + if (previousOption) { + options[previousOption] = { + description: match[2].trim(), + timesused: 0 + }; + } + }); + + return options; + } + static getOptions(compiler, helpArg) { return compiler.exec(compiler.compiler.exe, [helpArg]).then(result => { - const options = {}; + let options = {}; if (result.code === 0) { - const optionFinder = /^\s*(--?[-a-zA-Z]+)/; + const optionFinder = /^\s*(--?[a-z0-9=+,[\]<>|-]*)\s*(.*)/i; - utils.eachLine(result.stdout + result.stderr, line => { - const match = line.match(optionFinder); - if (!match) return; - options[match[1]] = true; - }); + options = BaseParser.parseLines(result.stdout + result.stderr, optionFinder); } + compiler.possibleArguments.populateOptions(options); return options; }); } @@ -52,16 +87,17 @@ class GCCParser extends BaseParser { static parse(compiler) { return Promise.all([ GCCParser.getOptions(compiler, "--target-help"), - GCCParser.getOptions(compiler, "--help=common") + GCCParser.getOptions(compiler, "--help=common"), + GCCParser.getOptions(compiler, "--help=optimizers") ]).then(results => { const options = _.extend.apply(_.extend, results); const keys = _.keys(options); logger.debug("gcc-like compiler options: ", keys.join(" ")); - if (options['-masm']) { + if (BaseParser.hasSupport(options, "-masm=")) { compiler.compiler.intelAsm = "-masm=intel"; compiler.compiler.supportsIntel = true; } - if (options['-fdiagnostics-color']) { + if (BaseParser.hasSupport(options, "-fdiagnostics-color")) { if (compiler.compiler.options) compiler.compiler.options += " "; compiler.compiler.options += "-fdiagnostics-color=always"; } @@ -78,21 +114,141 @@ class ClangParser extends BaseParser { static parse(compiler) { return ClangParser.getOptions(compiler, "--help").then(options => { logger.debug("clang-like compiler options: ", _.keys(options).join(" ")); - if (options['-fsave-optimization-record']) { + if (BaseParser.hasSupport(options, '-fsave-optimization-record')) { compiler.compiler.optArg = "-fsave-optimization-record"; compiler.compiler.supportsOptOutput = true; } - if (options['-fcolor-diagnostics']) { + if (BaseParser.hasSupport(options, "-fcolor-diagnostics")) { if (compiler.compiler.options) compiler.compiler.options += " "; compiler.compiler.options += "-fcolor-diagnostics"; } + if (BaseParser.hasSupport(options, "-emit-llvm")) { + compiler.compiler.supportsIrView = true; + compiler.compiler.irArg = ['-Xclang', '-emit-llvm', '-fsyntax-only']; + } + if (BaseParser.hasSupport(options, "-fno-crash-diagnostics")) { + if (compiler.compiler.options) compiler.compiler.options += " "; + compiler.compiler.options += "-fno-crash-diagnostics"; + } + return compiler; + }); + } +} + +class PascalParser extends BaseParser { + static parse(compiler) { + return PascalParser.getOptions(compiler, "-help").then(() => compiler); + } +} + +class ISPCParser extends BaseParser { + static parse(compiler) { + return ISPCParser.getOptions(compiler, "--help").then(options => { + if (BaseParser.hasSupport(options, "--x86-asm-syntax")) { + compiler.compiler.intelAsm = "--x86-asm-syntax=intel"; + compiler.compiler.supportsIntel = true; + } + return compiler; + }); + } + + static getOptions(compiler, helpArg) { + return compiler.exec(compiler.compiler.exe, [helpArg]).then(result => { + let options = {}; + if (result.code === 0) { + const optionFinder = /^\s*\[(--?[a-z0-9=+,{}\s[\]<>|-]*)\]\s*(.*)/i; + + options = BaseParser.parseLines(result.stdout + result.stderr, optionFinder); + } + compiler.possibleArguments.populateOptions(options); + return options; + }); + } +} + +class VCParser extends BaseParser { + static parse(compiler) { + return Promise.all([ + VCParser.getOptions(compiler, "/help") + ]).then(() => { return compiler; }); } + + static parseLines(stdout, optionRegex) { + let previousOption = false; + let options = {}; + + const matchLine = (line) => { + if (line.startsWith("/?")) return; + + const match = line.match(optionRegex); + if (!match) { + if (previousOption && (line.trim().length !== 0)) { + if (options[previousOption].description.endsWith(":")) + options[previousOption].description += " " + line.trim(); + else { + if (options[previousOption].description.length !== 0) + options[previousOption].description += ", " + line.trim(); + else + options[previousOption].description = line.trim(); + } + } else { + previousOption = false; + } + return; + } + + if (match) previousOption = match[1]; + if (previousOption) { + options[previousOption] = { + description: match[2].trim(), + timesused: 0 + }; + } + }; + + utils.eachLine(stdout, line => { + if (line.length === 0) return; + if (line.includes("C/C++ COMPILER OPTIONS")) return; + if (line.match(/^\s\s*-.*-$/)) return; + + let col1; + let col2; + if ((line.length > 39) && (line[40] === '/')) { + col1 = line.substr(0, 39); + col2 = line.substr(40); + } else { + col1 = line; + col2 = ""; + } + + if (col1) matchLine(col1); + if (col2) matchLine(col2); + }); + + return options; + } + + static getOptions(compiler, helpArg) { + return compiler.exec(compiler.compiler.exe, [helpArg]).then(result => { + let options = {}; + if (result.code === 0) { + const optionFinder = /^\s*(\/[a-z0-9=:+#.,[\]{}<>|_-]*)\s*(.*)/i; + + options = this.parseLines(result.stdout, optionFinder); + } + compiler.possibleArguments.populateOptions(options); + return options; + }); + } } module.exports = { Base: BaseParser, Clang: ClangParser, - GCC: GCCParser + GCC: GCCParser, + VC: VCParser, + Pascal: PascalParser, + ISPC: ISPCParser }; diff --git a/lib/compilers/cc65.js b/lib/compilers/cc65.js new file mode 100644 index 0000000000000000000000000000000000000000..043851c7fe98572408e73676c5e6489117e7b4de --- /dev/null +++ b/lib/compilers/cc65.js @@ -0,0 +1,34 @@ +// Copyright (c) 2019, Compiler Explorer Team +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. + +const + BaseCompiler = require('../base-compiler'); + +class Cc65Compiler extends BaseCompiler { + optionsForFilter(filters, outputFilename) { + return ['-g', '-o', this.filename(outputFilename)]; + } +} + +module.exports = Cc65Compiler; diff --git a/lib/compilers/golang.js b/lib/compilers/golang.js index bbf66657623dd08c2e7ac25eb9baf5d571c01b9f..8c298ad38ef622da0a12dc3623eb33ae3c21f3ba 100644 --- a/lib/compilers/golang.js +++ b/lib/compilers/golang.js @@ -23,41 +23,144 @@ // POSSIBILITY OF SUCH DAMAGE. const BaseCompiler = require('../base-compiler'), + argumentParsers = require("./argument-parsers"), _ = require('underscore'), utils = require('../utils'); +// Each arch has a list of jump instructions in +// Go source src/cmd/asm/internal/arch. +const jumpPrefixes = [ + 'j', + 'b', + + // arm + 'cb', + 'tb', + + // s390x + 'cmpb', + 'cmpub' +]; + class GolangCompiler extends BaseCompiler { convertNewGoL(code) { - const re = /^\s+(0[xX]?[0-9A-Za-z]+)?\s?[0-9]+\s*\(([^:]+):([0-9]+)\)\s*([A-Z]+)(.*)/; - const reUnknown = /^\s+(0[xX]?[0-9A-Za-z]+)?\s?[0-9]+\s*\(<unknown line number>\)\s*([A-Z]+)(.*)/; + const re = /^\s+(0[xX]?[0-9A-Za-z]+)?\s?([0-9]+)\s*\(([^:]+):([0-9]+)\)\s*([A-Z]+)(.*)/; + const reUnknown = /^\s+(0[xX]?[0-9A-Za-z]+)?\s?([0-9]+)\s*\(<unknown line number>\)\s*([A-Z]+)(.*)/; + const reFunc = /TEXT\s+[".]*(\S+)\(SB\)/; let prevLine = null; let file = null; let fileCount = 0; - return _.compact(code.map(obj => { + let func = null; + let funcCollisions = {}; + let labels = {}; + let usedLabels = {}; + let lines = code.map(obj => { + let pcMatch = null; + let fileMatch = null; + let lineMatch = null; + let ins = null; + let args = null; + const line = obj.text; let match = line.match(re); if (match) { - let res = ""; - if (file !== match[2]) { - fileCount++; - res += "\t.file " + fileCount + ' "' + match[2] + '"\n'; - file = match[2]; - } - if (prevLine !== match[3]) { - res += "\t.loc " + fileCount + " " + match[3] + " 0\n"; - prevLine = match[3]; - } - return res + "\t" + match[4].toLowerCase() + match[5]; + pcMatch = match[2]; + fileMatch = match[3]; + lineMatch = match[4]; + ins = match[5]; + args = match[6]; } else { match = line.match(reUnknown); if (match) { - return "\t" + match[2].toLowerCase() + match[3]; + pcMatch = match[2]; + ins = match[3]; + args = match[4]; } else { return null; } } - })).join("\n"); + match = line.match(reFunc); + if (match) { + // Normalize function name. + func = match[1].replace(/[.()*]+/g, "_"); + + // It's possible for normalized function names to collide. + // Keep a count of collisions per function name. Labels get + // suffixed with _[collisions] when collisions > 0. + let collisions = funcCollisions[func]; + if (collisions == null) { + collisions = 0; + } else { + collisions++; + } + + funcCollisions[func] = collisions; + } + + let res = []; + if (pcMatch && !labels[pcMatch]) { + // Create pseudo-label. + let label = pcMatch.replace(/^0{0,4}/, ''); + let suffix = ''; + if (funcCollisions[func] > 0) { + suffix = `_${funcCollisions[func]}`; + } + + label = `${func}_pc${label}${suffix}:`; + if (!labels[label]) { + res.push(label); + labels[label] = true; + } + } + + if (fileMatch && file !== fileMatch) { + fileCount++; + res.push(`\t.file ${fileCount} "${fileMatch}"`); + file = fileMatch; + } + + if (lineMatch && prevLine !== lineMatch) { + res.push(`\t.loc ${fileCount} ${lineMatch} 0`); + prevLine = lineMatch; + } + + ins = ins.toLowerCase(); + args = this.replaceJump(func, funcCollisions[func], ins, args, usedLabels); + res.push(`\t${ins}${args}`); + return res; + }); + + // Find unused pseudo-labels so they can be filtered out. + let unusedLabels = _.mapObject(labels, (val, key) => { return !usedLabels[key]; }); + + return _.chain(lines) + .flatten() + .compact() + .filter((line) => { return !unusedLabels[line]; }) + .value() + .join("\n"); + } + + replaceJump(func, collisions, ins, args, usedLabels) { + // Check if last argument is a decimal number. + const re = /(\s+)([0-9]+)(\s?)$/; + let match = args.match(re); + if (!match) { + return args; + } + + // Check instruction has a jump prefix + if (_.any(jumpPrefixes, (prefix) => { return ins.startsWith(prefix); })) { + let label = `${func}_pc${match[2]}`; + if (collisions > 0) { + label += `_${collisions}`; + } + usedLabels[label + ":"] = true; // record label use for later filtering + return `${match[1]}${label}${match[3]}`; + } + + return args; } extractLogging(stdout) { @@ -90,6 +193,10 @@ class GolangCompiler extends BaseCompiler { } return execOptions; } + + getArgumentParser() { + return argumentParsers.Clang; + } } module.exports = GolangCompiler; diff --git a/lib/compilers/haskell.js b/lib/compilers/haskell.js index 04cc55266ff107e7a94528f6355a55469409f77c..63394b3e76b5c518ba8ac3aa27865a1c338e16ce 100644 --- a/lib/compilers/haskell.js +++ b/lib/compilers/haskell.js @@ -22,12 +22,17 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. -const BaseCompiler = require('../base-compiler'); +const BaseCompiler = require('../base-compiler'), + argumentParsers = require("./argument-parsers"); class HaskellCompiler extends BaseCompiler { optionsForFilter(filters, outputFilename) { return ['-S', '-g', '-o', this.filename(outputFilename)]; } + + getArgumentParser() { + return argumentParsers.Clang; + } } module.exports = HaskellCompiler; diff --git a/lib/compilers/ispc.js b/lib/compilers/ispc.js index fc0373513a018eb732929bf84e9af17a5eb8d634..1d39361acf6984e8ba5eb0c846a1e8966dbbf90e 100644 --- a/lib/compilers/ispc.js +++ b/lib/compilers/ispc.js @@ -22,11 +22,24 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. -const BaseCompiler = require('../base-compiler'); +const BaseCompiler = require('../base-compiler'), + argumentParsers = require("./argument-parsers"); class ISPCCompiler extends BaseCompiler { optionsForFilter(filters, outputFilename) { - return ['--target=sse2-i32x4', '--emit-asm', '-g', '-o', this.filename(outputFilename)]; + let options = ['--target=sse2-i32x4', '--emit-asm', '-g', '-o', this.filename(outputFilename)]; + if (this.compiler.intelAsm && filters.intel && !filters.binary) { + options = options.concat(this.compiler.intelAsm.split(" ")); + } + return options; + } + + getArgumentParser() { + return argumentParsers.ISPC; + } + + isCfgCompiler(/*compilerVersion*/) { + return true; } } diff --git a/lib/compilers/ldc.js b/lib/compilers/ldc.js index d8b30417dbddf65a39b8442193baba91040ecdc5..748aeca1324a240fb23c13276965fa4f9d30aeac 100644 --- a/lib/compilers/ldc.js +++ b/lib/compilers/ldc.js @@ -26,12 +26,15 @@ const BaseCompiler = require('../base-compiler'), argumentParsers = require("./argument-parsers"), fs = require('fs-extra'), logger = require('./../logger').logger, + path = require('path'), semverParser = require('semver'); class LDCCompiler extends BaseCompiler { constructor(info, env) { super(info, env); this.compiler.supportsIntel = true; + this.compiler.supportsIrView = true; + this.compiler.irArg = ['-output-ll']; } optionsForFilter(filters, outputFilename) { @@ -80,6 +83,18 @@ class LDCCompiler extends BaseCompiler { } return fs.readFileSync(astFilename, 'utf-8'); } + + // Override the IR processing method for LDC because the output file is different from clang. + processIrOutput(output, filters) { + const irPath = this.getOutputFilename(path.dirname(output.inputFilename), this.outputFilebase) + .replace('.s', '.ll'); + if (fs.existsSync(irPath)) { + const output = fs.readFileSync(irPath, 'utf-8'); + // uses same filters as main compiler + return this.llvmIr.process(output, filters); + } + return output.stderr; + } } module.exports = LDCCompiler; diff --git a/lib/compilers/llc.js b/lib/compilers/llc.js index 11eb7c855cf9d018b1b9d31f43d89375ec215f09..65b9f58dc565123a0de387c4122fbb1bd5d669d2 100644 --- a/lib/compilers/llc.js +++ b/lib/compilers/llc.js @@ -22,7 +22,8 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. -const BaseCompiler = require('../base-compiler'); +const BaseCompiler = require('../base-compiler'), + argumentParsers = require("./argument-parsers"); class LLCCompiler extends BaseCompiler { constructor(info, env) { @@ -36,6 +37,10 @@ class LLCCompiler extends BaseCompiler { if (filters.binary) options = options.concat('-filetype=obj'); return options; } + + getArgumentParser() { + return argumentParsers.Clang; + } } module.exports = LLCCompiler; diff --git a/lib/compilers/llvm-mca.js b/lib/compilers/llvm-mca.js index 47e0f91ef39dbf0806652b87565ce954d292fcf5..fc8e84b4c3fcf307e30dd9118f0665fafd2b3c68 100644 --- a/lib/compilers/llvm-mca.js +++ b/lib/compilers/llvm-mca.js @@ -22,7 +22,8 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. -const AnalysisTool = require('./analysis-tool'); +const AnalysisTool = require('./analysis-tool'), + argumentParsers = require("./argument-parsers"); // Plain compiler, which just runs the tool and returns whatever the output was class LLVMmcaTool extends AnalysisTool { @@ -39,6 +40,10 @@ class LLVMmcaTool extends AnalysisTool { if (filters.intel) options = options.concat(this.compiler.intelAsm.split(' ')); return options; } + + getArgumentParser() { + return argumentParsers.Clang; + } } diff --git a/lib/compilers/nvcc.js b/lib/compilers/nvcc.js index 73f556bafab9768b553354e3c1dc0626113d9c85..c090cb419cf2498e645a6b7569d4463757b6c9f2 100644 --- a/lib/compilers/nvcc.js +++ b/lib/compilers/nvcc.js @@ -22,7 +22,8 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. -const BaseCompiler = require('../base-compiler'); +const BaseCompiler = require('../base-compiler'), + argumentParsers = require("./argument-parsers"); class NvccCompiler extends BaseCompiler { constructor(info, env) { @@ -38,6 +39,10 @@ class NvccCompiler extends BaseCompiler { optionsForFilter(filters, outputFilename) { return ['-o', this.filename(outputFilename), '--ptx', '--generate-line-info']; } + + getArgumentParser() { + return argumentParsers.Clang; + } } module.exports = NvccCompiler; diff --git a/lib/compilers/ocaml.js b/lib/compilers/ocaml.js new file mode 100644 index 0000000000000000000000000000000000000000..9c1f125559b9c3db4faa370fa65ed4dd2148d655 --- /dev/null +++ b/lib/compilers/ocaml.js @@ -0,0 +1,40 @@ +// Copyright (c) 2018, Eugen Bulavin +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. + +"use strict"; + +const BaseCompiler = require('../base-compiler'), + path = require("path"); + +class OCamlCompiler extends BaseCompiler { + optionsForFilter() { + return ['-S', '-g', '-c']; + } + + getOutputFilename(dirPath) { + return path.join(dirPath, `${path.basename(this.compileFilename, this.lang.extensions[0])}.s`); + } +} + +module.exports = OCamlCompiler; diff --git a/lib/compilers/opt.js b/lib/compilers/opt.js index c34a28a4cebf5cb7f50ba85c6e7ba73fe8ea06cc..7a833bad6749b39592ee39e5058878b1c947659d 100644 --- a/lib/compilers/opt.js +++ b/lib/compilers/opt.js @@ -22,7 +22,8 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. -const BaseCompiler = require('../base-compiler'); +const BaseCompiler = require('../base-compiler'), + argumentParsers = require("./argument-parsers"); class OptCompiler extends BaseCompiler { constructor(info, env) { @@ -32,6 +33,10 @@ class OptCompiler extends BaseCompiler { optionsForFilter(filters, outputFilename) { return ['-o', this.filename(outputFilename), '-S']; } + + getArgumentParser() { + return argumentParsers.Clang; + } } module.exports = OptCompiler; diff --git a/lib/compilers/pascal.js b/lib/compilers/pascal.js index 02e1a4ea50e0a898648140e46c05611142fcde5b..d9f027749500a1759314a5c6f21e4eb634214f98 100644 --- a/lib/compilers/pascal.js +++ b/lib/compilers/pascal.js @@ -156,7 +156,7 @@ class FPCCompiler extends BaseCompiler { } getArgumentParser() { - return argumentParsers.Base; + return argumentParsers.Pascal; } getExtraAsmHint(asm) { diff --git a/lib/compilers/rust.js b/lib/compilers/rust.js index 63eec2af771026e58ca962a606357cf55d25c31b..b0e51635c7adb9970b7736d9dc212b404dccceba 100644 --- a/lib/compilers/rust.js +++ b/lib/compilers/rust.js @@ -23,7 +23,8 @@ // POSSIBILITY OF SUCH DAMAGE. const BaseCompiler = require('../base-compiler'), - _ = require('underscore'); + _ = require('underscore'), + argumentParsers = require("./argument-parsers"); class RustCompiler extends BaseCompiler { constructor(info, env) { @@ -45,6 +46,14 @@ class RustCompiler extends BaseCompiler { options = options.concat(['--crate-type', 'rlib']); return options; } + + getArgumentParser() { + return argumentParsers.Clang; + } + + isCfgCompiler(/*compilerVersion*/) { + return true; + } } module.exports = RustCompiler; diff --git a/lib/compilers/swift.js b/lib/compilers/swift.js index ff43f76f2d4b9fac03567d775aa1b70670e24cb6..71934d7e8d4042d49cdc429effffe4ef5f056cf3 100644 --- a/lib/compilers/swift.js +++ b/lib/compilers/swift.js @@ -22,9 +22,17 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. -const BaseCompiler = require('../base-compiler'); +const BaseCompiler = require('../base-compiler'), + argumentParsers = require("./argument-parsers"); class SwiftCompiler extends BaseCompiler { + getArgumentParser() { + return argumentParsers.Clang; + } + + isCfgCompiler(/*compilerVersion*/) { + return true; + } } module.exports = SwiftCompiler; diff --git a/lib/compilers/win32-vc.js b/lib/compilers/win32-vc.js index d26ef577866b32a5499cc43c1d770e22d63bf217..1a109445fe022bc4e2d9e7f5c9586346cdc96cda 100644 --- a/lib/compilers/win32-vc.js +++ b/lib/compilers/win32-vc.js @@ -33,7 +33,7 @@ class Win32VcCompiler extends Win32Compiler { } getArgumentParser() { - return argumentParsers.Base; + return argumentParsers.VC; } } diff --git a/lib/compilers/wine-vc.js b/lib/compilers/wine-vc.js index 6cd2a282a7a52053de2baad6fb6b43392c6eab39..640f274279f015005601ebd20505973e44f2e0b3 100644 --- a/lib/compilers/wine-vc.js +++ b/lib/compilers/wine-vc.js @@ -52,8 +52,18 @@ class WineVcCompiler extends BaseCompiler { return 'Z:' + fn; } + runCompiler(compiler, options, inputFilename, execOptions) { + if (!execOptions) { + execOptions = this.getDefaultExecOptions(); + } + + execOptions.customCwd = path.dirname(inputFilename).substr(2); + + return super.runCompiler(compiler, options, inputFilename, execOptions); + } + getArgumentParser() { - return argumentParsers.Base; + return argumentParsers.VC; } getExecutableFilename(dirPath, outputFilebase) { diff --git a/lib/compilers/zig.js b/lib/compilers/zig.js index 52e67c8b0b6d05a9c5f5b9bdafcfa36bcefdef59..ff2b6f6e006790ac394c0c736dfd4033e16ccfed 100644 --- a/lib/compilers/zig.js +++ b/lib/compilers/zig.js @@ -24,7 +24,8 @@ const BaseCompiler = require('../base-compiler'), _ = require('underscore'), - path = require('path'); + path = require('path'), + Semver = require('semver'); class ZigCompiler extends BaseCompiler { constructor(info, env) { @@ -53,21 +54,17 @@ class ZigCompiler extends BaseCompiler { } optionsForFilter(filters, outputFilename, userOptions) { - let options; - if (filters.execute) { - options = [ - 'build-exe', - '--cache-dir', path.dirname(outputFilename), - '--output', this.filename(outputFilename), - '--output-h', '/dev/null' - ]; + let options = [filters.execute ? 'build-exe' : 'build-obj']; + if (this.compiler.semver === 'trunk' || Semver.gt(this.compiler.semver, '0.3.0')) { + const outputDir = path.dirname(outputFilename); + options.push('--cache-dir', outputDir, + '--output-dir', outputDir, + '--name', path.basename(outputFilename, '.s')); } else { - options = [ - 'build-obj', - '--cache-dir', path.dirname(outputFilename), + // Older versions use a different command line interface (#1304) + options.push('--cache-dir', path.dirname(outputFilename), '--output', this.filename(outputFilename), - '--output-h', '/dev/null' - ]; + '--output-h', '/dev/null'); } if (!filters.binary) { @@ -84,6 +81,10 @@ class ZigCompiler extends BaseCompiler { const blacklist = /^(((--(cache-dir|name|output|verbose))|(-mllvm)).*)$/; return _.filter(userOptions, option => !blacklist.test(option)); } + + isCfgCompiler(/*compilerVersion*/) { + return true; + } } module.exports = ZigCompiler; diff --git a/lib/exec.js b/lib/exec.js index 41576a52fffe1fd04fecadf912bb71edc5aa9c5c..e3468ed658cba60ca3c2a168a1fa5fc8bca3f666 100644 --- a/lib/exec.js +++ b/lib/exec.js @@ -46,13 +46,14 @@ function execute(command, args, options) { } let okToCache = true; - logger.debug({type: "executing", command: command, args: args, env: env}); + const cwd = options.customCwd ? options.customCwd : ( + (command.startsWith("/mnt") && process.env.wsl) ? process.env.winTmp : process.env.tmpDir + ); + logger.debug({type: "executing", command: command, args: args, env: env, cwd: cwd}); // AP: Run Windows-volume executables in winTmp. Otherwise, run in tmpDir (which may be undefined). // https://nodejs.org/api/child_process.html#child_process_child_process_spawn_command_args_options const child = child_process.spawn(command, args, { - cwd: options.customCwd ? options.customCwd : ( - (command.startsWith("/mnt") && process.env.wsl) ? process.env.winTmp : process.env.tmpDir - ), + cwd: cwd, env: env, detached: process.platform === 'linux' }); diff --git a/lib/google.js b/lib/google.js index a1bbc8fa1151fa7fe99b9ddc5bcbe0c35b08fd6f..dbbe21e443bee7308c6fcd6c0cc51d104c934a27 100644 --- a/lib/google.js +++ b/lib/google.js @@ -21,36 +21,29 @@ // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. -const https = require('https'), - API_BASE = 'https://www.googleapis.com/urlshortener/v1/url'; +const request = require('request'); class ShortLinkResolver { - constructor(apiKey) { - this.apiKey = apiKey; - } - resolve(url) { - const googleApiUrl = `${API_BASE}?shortUrl=${url}&key=${this.apiKey}`; return new Promise((resolve, reject) => { - https.get(googleApiUrl, (response) => { - let responseText = ''; - response.on('data', d => responseText += d); - response.on('end', () => { - if (response.statusCode !== 200) { - reject(`Got response ${response.statusCode} : ${responseText}`); - return; - } - const resultObj = JSON.parse(responseText); - if (!resultObj.longUrl) { - reject(`Missing longUrl in ${responseText}`); - return; - } - resolve(resultObj); - }); - }) - .on('error', e => { - reject(e.message); + request({method: 'HEAD', uri: url, followRedirect: false}, (err, res) => { + if (err !== null) { + reject(err.message); + return; + } + if (res.statusCode !== 302) { + reject(`Got response ${res.statusCode}`); + return; + } + const targetLocation = res.headers['location']; + if (!targetLocation) { + reject(`Missing location url in ${targetLocation}`); + return; + } + resolve({ + longUrl: targetLocation }); + }); }); } } diff --git a/lib/handlers/api.js b/lib/handlers/api.js index d06e0c444804458a4fa2e006864b8f39d38b67a4..1304b7bf448b7b4c27d8eaf362813a75fd19663d 100644 --- a/lib/handlers/api.js +++ b/lib/handlers/api.js @@ -46,11 +46,14 @@ class ApiHandler { this.handle.get('/compilers', this.handleCompilers.bind(this)); this.handle.get('/compilers/:language', this.handleCompilers.bind(this)); this.handle.get('/languages', this.handleLanguages.bind(this)); - this.handle.get('/libraries/:language', this.handleLibraries.bind(this)); + this.handle.get('/libraries/:language', this.handleLangLibraries.bind(this)); + this.handle.get('/libraries', this.handleAllLibraries.bind(this)); const asmDocsHandler = new AsmDocsApi.Handler(); this.handle.get('/asm/:opcode', asmDocsHandler.handle.bind(asmDocsHandler)); + this.handle.post('/compiler/:compiler/compile', compileHandler.handle.bind(compileHandler)); + this.handle.post('/popularArguments/:compiler', compileHandler.handlePopularArguments.bind(compileHandler)); const formatter = new FormatterHandler(ceProps); this.handle.post('/format/:tool', formatter.formatHandler.bind(formatter)); @@ -130,7 +133,7 @@ class ApiHandler { }); } - handleLibraries(req, res, next) { + handleLangLibraries(req, res, next) { if (this.options) { if (req.params.language) { res.set('Content-Type', 'application/json'); @@ -150,6 +153,18 @@ class ApiHandler { } } + handleAllLibraries(req, res, next) { + if (this.options) { + res.set('Content-Type', 'application/json'); + res.end(JSON.stringify(this.options.options.libs)); + } else { + next({ + statusCode: 500, + message: "Internal error" + }); + } + } + handleCompilers(req, res) { let filteredCompilers = this.compilers; if (req.params.language) { diff --git a/lib/handlers/asm-docs.js b/lib/handlers/asm-docs.js index f4b59f9fdadaaa805e1e46618caae0f1af864233..6ba13b727e9c464a41a1f7f0476e8985d458a213 100644 --- a/lib/handlers/asm-docs.js +++ b/lib/handlers/asm-docs.js @@ -87,7 +87,7 @@ function getAsmOpcode(opcode) { case "VADDSUBPD": return { "url": "http://www.felixcloutier.com/x86/ADDSUBPD.html", - "html": "<p>Adds odd-numbered double-precision floating-point values of the first source operand (second operand) with the corresponding double-precision floating-point values from the second source operand (third operand); stores the result in the odd-numbered values of the destination operand (first operand). Subtracts the even-numbered double-precision floating-point values from the second source operand from the corresponding double-precision floating values in the first source operand; stores the result into the even-numbered values of the destination operand.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified. See Figure 3-3.</p><p>VEX.128 encoded version: the first source operand is an XMM register or 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding YMM register destination are zeroed.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand can be a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p>", + "html": "<p>Adds odd-numbered double-precision floating-point values of the first source operand (second operand) with the corresponding double-precision floating-point values from the second source operand (third operand); stores the result in the odd-numbered values of the destination operand (first operand). Subtracts the even-numbered double-precision floating-point values from the second source operand from the corresponding double-precision floating values in the first source operand; stores the result into the even-numbered values of the destination operand.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified. See <a href=\"./ADDSUBPD.html#fig-3-3\">Figure 3-3</a>.</p><p>VEX.128 encoded version: the first source operand is an XMM register or 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding YMM register destination are zeroed.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand can be a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p>", "tooltip": "Adds odd-numbered double-precision floating-point values of the first source operand (second operand) with the corresponding double-precision floating-point values from the second source operand (third operand); stores the result in the odd-numbered values of the destination operand (first operand). Subtracts the even-numbered double-precision floating-point values from the second source operand from the corresponding double-precision floating values in the first source operand; stores the result into the even-numbered values of the destination operand." }; @@ -95,7 +95,7 @@ function getAsmOpcode(opcode) { case "ADDSUBPS": return { "url": "http://www.felixcloutier.com/x86/ADDSUBPS.html", - "html": "<p>Adds odd-numbered single-precision floating-point values of the first source operand (second operand) with the corresponding single-precision floating-point values from the second source operand (third operand); stores the result in the odd-numbered values of the destination operand (first operand). Subtracts the even-numbered single-precision floating-point values from the second source operand from the corresponding single-precision floating values in the first source operand; stores the result into the even-numbered values of the destination operand.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified. See Figure 3-4.</p><p>VEX.128 encoded version: the first source operand is an XMM register or 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding YMM register destination are zeroed.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand can be a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p>", + "html": "<p>Adds odd-numbered single-precision floating-point values of the first source operand (second operand) with the corresponding single-precision floating-point values from the second source operand (third operand); stores the result in the odd-numbered values of the destination operand (first operand). Subtracts the even-numbered single-precision floating-point values from the second source operand from the corresponding single-precision floating values in the first source operand; stores the result into the even-numbered values of the destination operand.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified. See <a href=\"./ADDSUBPS.html#fig-3-4\">Figure 3-4</a>.</p><p>VEX.128 encoded version: the first source operand is an XMM register or 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding YMM register destination are zeroed.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand can be a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p>", "tooltip": "Adds odd-numbered single-precision floating-point values of the first source operand (second operand) with the corresponding single-precision floating-point values from the second source operand (third operand); stores the result in the odd-numbered values of the destination operand (first operand). Subtracts the even-numbered single-precision floating-point values from the second source operand from the corresponding single-precision floating values in the first source operand; stores the result into the even-numbered values of the destination operand." }; @@ -203,7 +203,7 @@ function getAsmOpcode(opcode) { case "ARPL": return { "url": "http://www.felixcloutier.com/x86/ARPL.html", - "html": "<p>Compares the RPL fields of two segment selectors. The first operand (the destination operand) contains one segment selector and the second operand (source operand) contains the other. (The RPL field is located in bits 0 and 1 of each operand.) If the RPL field of the destination operand is less than the RPL field of the source operand, the ZF flag is set and the RPL field of the destination operand is increased to match that of the source operand. Otherwise, the ZF flag is cleared and no change is made to the destination operand. (The destination operand can be a word register or a memory location; the source operand must be a word register.)</p><p>The ARPL instruction is provided for use by operating-system procedures (however, it can also be used by applications). It is generally used to adjust the RPL of a segment selector that has been passed to the operating system by an application program to match the privilege level of the application program. Here the segment selector passed to the operating system is placed in the destination operand and segment selector for the application program\u2019s code segment is placed in the source operand. (The RPL field in the source operand represents the privilege level of the application program.) Execution of the ARPL instruction then ensures that the RPL of the segment selector received by the operating system is no lower (does not have a higher privilege) than the privilege level of the application program (the segment selector for the application program\u2019s code segment can be read from the stack following a procedure call).</p><p>This instruction executes as described in compatibility mode and legacy mode. It is not encodable in 64-bit mode.</p><p>See \u201cChecking Caller Access Privileges\u201d in Chapter 3, \u201cProtected-Mode Memory Management,\u201d of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for more information about the use of this instruction.</p>", + "html": "<p>Compares the RPL fields of two segment selectors. The first operand (the destination operand) contains one segment selector and the second operand (source operand) contains the other. (The RPL field is located in bits 0 and 1 of each operand.) If the RPL field of the destination operand is less than the RPL field of the source operand, the ZF flag is set and the RPL field of the destination operand is increased to match that of the source operand. Otherwise, the ZF flag is cleared and no change is made to the destination operand. (The destination operand can be a word register or a memory location; the source operand must be a word register.)</p><p>The ARPL instruction is provided for use by operating-system procedures (however, it can also be used by applications). It is generally used to adjust the RPL of a segment selector that has been passed to the operating system by an application program to match the privilege level of the application program. Here the segment selector passed to the operating system is placed in the destination operand and segment selector for the application program\u2019s code segment is placed in the source operand. (The RPL field in the source operand represents the privilege level of the application program.) Execution of the ARPL instruction then ensures that the RPL of the segment selector received by the operating system is no lower (does not have a higher privilege) than the privilege level of the application program (the segment selector for the application program\u2019s code segment can be read from the stack following a procedure call).</p><p>This instruction executes as described in compatibility mode and legacy mode. It is not encodable in 64-bit mode.</p><p>See \u201cChecking Caller Access Privileges\u201d in Chapter 3, \u201cProtected-Mode Memory Management,\u201d of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for more information about the use of this instruction.</p>", "tooltip": "Compares the RPL fields of two segment selectors. The first operand (the destination operand) contains one segment selector and the second operand (source operand) contains the other. (The RPL field is located in bits 0 and 1 of each operand.) If the RPL field of the destination operand is less than the RPL field of the source operand, the ZF flag is set and the RPL field of the destination operand is increased to match that of the source operand. Otherwise, the ZF flag is cleared and no change is made to the destination operand. (The destination operand can be a word register or a memory location; the source operand must be a word register.)" }; @@ -299,7 +299,7 @@ function getAsmOpcode(opcode) { case "BNDMOV": return { "url": "http://www.felixcloutier.com/x86/BNDMOV.html", - "html": "<p>BNDMOV moves a pair of lower and upper bound values from the source operand (the second operand) to the destination (the first operand). Each operation is 128-bit move. The exceptions are same as the MOV instruction. The memory format for loading/store bounds in 64-bit mode is shown in Figure 3-5.</p><p>This instruction does not change flags.</p>", + "html": "<p>BNDMOV moves a pair of lower and upper bound values from the source operand (the second operand) to the destination (the first operand). Each operation is 128-bit move. The exceptions are same as the MOV instruction. The memory format for loading/store bounds in 64-bit mode is shown in <a href=\"./BNDMOV.html#fig-3-5\">Figure 3-5</a>.</p><p>This instruction does not change flags.</p>", "tooltip": "BNDMOV moves a pair of lower and upper bound values from the source operand (the second operand) to the destination (the first operand). Each operation is 128-bit move. The exceptions are same as the MOV instruction. The memory format for loading/store bounds in 64-bit mode is shown in Figure 3-5." }; @@ -341,28 +341,28 @@ function getAsmOpcode(opcode) { case "BT": return { "url": "http://www.felixcloutier.com/x86/BT.html", - "html": "<p>Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset (specified by the second operand) and stores the value of the bit in the CF flag. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value:</p><p>See also: <strong>Bit(BitBase, BitOffset)</strong> on page 3-12.</p><p>Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. In this case, the low-order 3 or 5 bits (3 for 16-bit operands, 5 for 32-bit operands) of the immediate bit offset are stored in the immediate bit offset field, and the high-order bits are shifted and combined with the byte displacement in the addressing mode by the assembler. The processor will ignore the high order bits if they are not zero.</p><p>When accessing a bit in memory, the processor may access 4 bytes starting from the memory address for a 32-bit operand size, using by the following relationship:</p><p>Effective Address + (4 \u2217 (BitOffset DIV 32))</p>", + "html": "<p>Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset (specified by the second operand) and stores the value of the bit in the CF flag. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value:</p><p>See also: <strong>Bit(BitBase, BitOffset)</strong> on page 3-11.</p><p>Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. In this case, the low-order 3 or 5 bits (3 for 16-bit operands, 5 for 32-bit operands) of the immediate bit offset are stored in the immediate bit offset field, and the high-order bits are shifted and combined with the byte displacement in the addressing mode by the assembler. The processor will ignore the high order bits if they are not zero.</p><p>When accessing a bit in memory, the processor may access 4 bytes starting from the memory address for a 32-bit operand size, using by the following relationship:</p><p>Effective Address + (4 \u2217 (BitOffset DIV 32))</p>", "tooltip": "Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset (specified by the second operand) and stores the value of the bit in the CF flag. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value" }; case "BTC": return { "url": "http://www.felixcloutier.com/x86/BTC.html", - "html": "<p>Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and complements the selected bit in the bit string. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value:</p><p>See also: <strong>Bit(BitBase, BitOffset)</strong> on page 3-12.</p><p>Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. See \u201cBT\u2014Bit Test\u201d in this chapter for more information on this addressing mechanism.</p><p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", + "html": "<p>Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and complements the selected bit in the bit string. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value:</p><p>See also: <strong>Bit(BitBase, BitOffset)</strong> on page 3-11.</p><p>Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. See \u201cBT\u2014Bit Test\u201d in this chapter for more information on this addressing mechanism.</p><p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", "tooltip": "Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and complements the selected bit in the bit string. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value" }; case "BTR": return { "url": "http://www.felixcloutier.com/x86/BTR.html", - "html": "<p>Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and clears the selected bit in the bit string to 0. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value:</p><p>See also: <strong>Bit(BitBase, BitOffset)</strong> on page 3-12.</p><p>Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. See \u201cBT\u2014Bit Test\u201d in this chapter for more information on this addressing mechanism.</p><p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", + "html": "<p>Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and clears the selected bit in the bit string to 0. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value:</p><p>See also: <strong>Bit(BitBase, BitOffset)</strong> on page 3-11.</p><p>Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. See \u201cBT\u2014Bit Test\u201d in this chapter for more information on this addressing mechanism.</p><p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", "tooltip": "Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and clears the selected bit in the bit string to 0. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value" }; case "BTS": return { "url": "http://www.felixcloutier.com/x86/BTS.html", - "html": "<p>Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and sets the selected bit in the bit string to 1. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value:</p><p>See also: <strong>Bit(BitBase, BitOffset)</strong> on page 3-12.</p><p>Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. See \u201cBT\u2014Bit Test\u201d in this chapter for more information on this addressing mechanism.</p><p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", + "html": "<p>Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and sets the selected bit in the bit string to 1. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value:</p><p>See also: <strong>Bit(BitBase, BitOffset)</strong> on page 3-11.</p><p>Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. See \u201cBT\u2014Bit Test\u201d in this chapter for more information on this addressing mechanism.</p><p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", "tooltip": "Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and sets the selected bit in the bit string to 1. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value" }; @@ -376,7 +376,7 @@ function getAsmOpcode(opcode) { case "CALL": return { "url": "http://www.felixcloutier.com/x86/CALL.html", - "html": "<p>Saves procedure linking information on the stack and branches to the called procedure specified using the target operand. The target operand specifies the address of the first instruction in the called procedure. The operand can be an immediate value, a general-purpose register, or a memory location.</p><p>This instruction can be used to execute four types of calls:</p><p>The latter two call types (inter-privilege-level call and task switch) can only be executed in protected mode. See \u201cCalling Procedures Using Call and RET\u201d in Chapter 6 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for additional information on near, far, and inter-privilege-level calls. See Chapter 7, \u201cTask Management,\u201d in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for information on performing task switches with the CALL instruction.</p><p><strong>Near Call.</strong> When executing a near call, the processor pushes the value of the EIP register (which contains the offset of the instruction following the CALL instruction) on the stack (for use later as a return-instruction pointer). The processor then branches to the address in the current code segment specified by the target operand. The target operand specifies either an absolute offset in the code segment (an offset from the base of the code segment) or a relative offset (a signed displacement relative to the current value of the instruction pointer in the EIP register; this value points to the instruction following the CALL instruction). The CS register is not changed on near calls.</p><p>For a near call absolute, an absolute offset is specified indirectly in a general-purpose register or a memory location (<em>r/m16</em>, <em>r/m32, or r/m64</em>). The operand-size attribute determines the size of the target operand (16, 32 or 64 bits). When in 64-bit mode, the operand size for near call (and all near branches) is forced to 64-bits. Absolute offsets are loaded directly into the EIP(RIP) register. If the operand size attribute is 16, the upper two bytes of the EIP register are cleared, resulting in a maximum instruction pointer size of 16 bits. When accessing an absolute offset indirectly using the stack pointer [ESP] as the base register, the base value used is the value of the ESP before the instruction executes.</p>", + "html": "<p>Saves procedure linking information on the stack and branches to the called procedure specified using the target operand. The target operand specifies the address of the first instruction in the called procedure. The operand can be an immediate value, a general-purpose register, or a memory location.</p><p>This instruction can be used to execute four types of calls:</p><p>The latter two call types (inter-privilege-level call and task switch) can only be executed in protected mode. See \u201cCalling Procedures Using Call and RET\u201d in Chapter 6 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for additional information on near, far, and inter-privilege-level calls. See Chapter 7, \u201cTask Management,\u201d in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for information on performing task switches with the CALL instruction.</p><p><strong>Near Call.</strong> When executing a near call, the processor pushes the value of the EIP register (which contains the offset of the instruction following the CALL instruction) on the stack (for use later as a return-instruction pointer). The processor then branches to the address in the current code segment specified by the target operand. The target operand specifies either an absolute offset in the code segment (an offset from the base of the code segment) or a relative offset (a signed displacement relative to the current value of the instruction pointer in the EIP register; this value points to the instruction following the CALL instruction). The CS register is not changed on near calls.</p><p>For a near call absolute, an absolute offset is specified indirectly in a general-purpose register or a memory location (<em>r/m16</em>, <em>r/m32, or r/m64</em>). The operand-size attribute determines the size of the target operand (16, 32 or 64 bits). When in 64-bit mode, the operand size for near call (and all near branches) is forced to 64-bits. Absolute offsets are loaded directly into the EIP(RIP) register. If the operand size attribute is 16, the upper two bytes of the EIP register are cleared, resulting in a maximum instruction pointer size of 16 bits. When accessing an absolute offset indirectly using the stack pointer [ESP] as the base register, the base value used is the value of the ESP before the instruction executes.</p>", "tooltip": "Saves procedure linking information on the stack and branches to the called procedure specified using the target operand. The target operand specifies the address of the first instruction in the called procedure. The operand can be an immediate value, a general-purpose register, or a memory location." }; @@ -410,31 +410,31 @@ function getAsmOpcode(opcode) { "tooltip": "Clears the DF flag in the EFLAGS register. When the DF flag is set to 0, string operations increment the index registers (ESI and/or EDI). Operation is the same in all modes." }; - case "CLFLUSH": + case "CLDEMOTE": return { - "url": "http://www.felixcloutier.com/x86/CLFLUSH.html", - "html": "<p>Invalidates from every level of the cache hierarchy in the cache coherence domain the cache line that contains the linear address specified with the memory operand. If that cache line contains modified data at any level of the cache hierarchy, that data is written back to memory. The source operand is a byte memory location.</p><p>The availability of CLFLUSH is indicated by the presence of the CPUID feature flag CLFSH (CPUID.01H:EDX[bit 19]). The aligned cache line size affected is also indicated with the CPUID instruction (bits 8 through 15 of the EBX register when the initial value in the EAX register is 1).</p><p>The memory attribute of the page containing the affected line has no effect on the behavior of this instruction. It should be noted that processors are free to speculatively fetch and cache data from system memory regions assigned a memory-type allowing for speculative reads (such as, the WB, WC, and WT memory types). PREFETCH<em>h</em> instructions can be used to provide the processor with hints for this speculative behavior. Because this speculative fetching can occur at any time and is not tied to instruction execution, the CLFLUSH instruction is not ordered with respect to PREFETCH<em>h</em> instructions or any of the speculative fetching mechanisms (that is, data can be speculatively loaded into a cache line just before, during, or after the execution of a CLFLUSH instruction that references the cache line).</p><p>Executions of the CLFLUSH instruction are ordered with respect to each other and with respect to writes, locked read-modify-write instructions, fence instructions, and executions of CLFLUSHOPT to the same cache line.<sup>1</sup> They are not ordered with respect to executions of CLFLUSHOPT to different cache lines.</p><p>The CLFLUSH instruction can be used at all privilege levels and is subject to all permission checking and faults associated with a byte load (and in addition, a CLFLUSH instruction is allowed to flush a linear address in an execute-only segment). Like a load, the CLFLUSH instruction sets the A bit but not the D bit in the page tables.</p>", - "tooltip": "Invalidates from every level of the cache hierarchy in the cache coherence domain the cache line that contains the linear address specified with the memory operand. If that cache line contains modified data at any level of the cache hierarchy, that data is written back to memory. The source operand is a byte memory location." + "url": "http://www.felixcloutier.com/x86/CLDEMOTE.html", + "html": "<p>Hints to hardware that the cache line that contains the linear address specified with the memory operand should be moved (\u201cdemoted\u201d) from the cache(s) closest to the processor core to a level more distant from the processor core. This may accelerate subsequent accesses to the line by other cores in the same coherence domain, especially if the line was written by the core that demotes the line. Moving the line in such a manner is a performance optimization, i.e., it is a hint which does not modify architectural state. Hardware may choose which level in the cache hierarchy to retain the line (e.g., L3 in typical server designs). The source operand is a byte memory location.</p><p>The availability of the CLDEMOTE instruction is indicated by the presence of the CPUID feature flag CLDEMOTE (bit 25 of the ECX register in sub-leaf 07H, see \u201cCPUID\u2014CPU Identification\u201d). On processors which do not support the CLDEMOTE instruction (including legacy hardware) the instruction will be treated as a NOP.</p><p>A CLDEMOTE instruction is ordered with respect to stores to the same cache line, but unordered with respect to other instructions including memory fences, CLDEMOTE, CLWB or CLFLUSHOPT instructions to a different cache line. Since CLDEMOTE will retire in order with respect to stores to the same cache line, software should ensure that after issuing CLDEMOTE the line is not accessed again immediately by the same core to avoid cache data movement penalties.</p><p>The effective memory type of the page containing the affected line determines the effect; cacheable types are likely to generate a data movement operation, while uncacheable types may cause the instruction to be ignored.</p><p>Speculative fetching can occur at any time and is not tied to instruction execution. The CLDEMOTE instruction is not ordered with respect to PREFETCHh instructions or any of the speculative fetching mechanisms. That is, data can be speculatively loaded into a cache line just before, during, or after the execution of a CLDEMOTE instruction that references the cache line.</p>", + "tooltip": "Hints to hardware that the cache line that contains the linear address specified with the memory operand should be moved (\u201cdemoted\u201d) from the cache(s) closest to the processor core to a level more distant from the processor core. This may accelerate subsequent accesses to the line by other cores in the same coherence domain, especially if the line was written by the core that demotes the line. Moving the line in such a manner is a performance optimization, i.e., it is a hint which does not modify architectural state. Hardware may choose which level in the cache hierarchy to retain the line (e.g., L3 in typical server designs). The source operand is a byte memory location." }; - case "CLFLUSHOPT": + case "CLFLUSH": return { - "url": "http://www.felixcloutier.com/x86/CLFLUSHOPT.html", - "html": "<p>Invalidates from every level of the cache hierarchy in the cache coherence domain the cache line that contains the linear address specified with the memory operand. If that cache line contains modified data at any level of the cache hierarchy, that data is written back to memory. The source operand is a byte memory location.</p><p>The availability of CLFLUSHOPT is indicated by the presence of the CPUID feature flag CLFLUSHOPT (CPUID.(EAX=7,ECX=0):EBX[bit 23]). The aligned cache line size affected is also indicated with the CPUID instruction (bits 8 through 15 of the EBX register when the initial value in the EAX register is 1).</p><p>The memory attribute of the page containing the affected line has no effect on the behavior of this instruction. It should be noted that processors are free to speculatively fetch and cache data from system memory regions assigned a memory-type allowing for speculative reads (such as, the WB, WC, and WT memory types). PREFETCH<em>h</em> instructions can be used to provide the processor with hints for this speculative behavior. Because this speculative fetching can occur at any time and is not tied to instruction execution, the CLFLUSH instruction is not ordered with respect to PREFETCH<em>h</em> instructions or any of the speculative fetching mechanisms (that is, data can be speculatively loaded into a cache line just before, during, or after the execution of a CLFLUSH instruction that references the cache line).</p><p>Executions of the CLFLUSHOPT instruction are ordered with respect to fence instructions and to locked read-modify-write instructions; they are also ordered with respect to the following accesses to the cache line being invalidated: writes, executions of CLFLUSH, and executions of CLFLUSHOPT. They are not ordered with respect to writes, executions of CLFLUSH, or executions of CLFLUSHOPT that access other cache lines; to enforce ordering with such an operation, software can insert an SFENCE instruction between CFLUSHOPT and that operation.</p><p>The CLFLUSHOPT instruction can be used at all privilege levels and is subject to all permission checking and faults associated with a byte load (and in addition, a CLFLUSHOPT instruction is allowed to flush a linear address in an execute-only segment). Like a load, the CLFLUSHOPT instruction sets the A bit but not the D bit in the page tables.</p>", + "url": "http://www.felixcloutier.com/x86/CLFLUSH.html", + "html": "<p>Invalidates from every level of the cache hierarchy in the cache coherence domain the cache line that contains the linear address specified with the memory operand. If that cache line contains modified data at any level of the cache hierarchy, that data is written back to memory. The source operand is a byte memory location.</p><p>The availability of CLFLUSH is indicated by the presence of the CPUID feature flag CLFSH (CPUID.01H:EDX[bit 19]). The aligned cache line size affected is also indicated with the CPUID instruction (bits 8 through 15 of the EBX register when the initial value in the EAX register is 1).</p><p>The memory attribute of the page containing the affected line has no effect on the behavior of this instruction. It should be noted that processors are free to speculatively fetch and cache data from system memory regions assigned a memory-type allowing for speculative reads (such as, the WB, WC, and WT memory types). PREFETCH<em>h</em> instructions can be used to provide the processor with hints for this speculative behavior. Because this speculative fetching can occur at any time and is not tied to instruction execution, the CLFLUSH instruction is not ordered with respect to PREFETCH<em>h</em> instructions or any of the speculative fetching mechanisms (that is, data can be speculatively loaded into a cache line just before, during, or after the execution of a CLFLUSH instruction that references the cache line).</p><p>Executions of the CLFLUSH instruction are ordered with respect to each other and with respect to writes, locked read-modify-write instructions, fence instructions, and executions of CLFLUSHOPT to the same cache line.<sup>1</sup> They are not ordered with respect to executions of CLFLUSHOPT to different cache lines.</p><p>The CLFLUSH instruction can be used at all privilege levels and is subject to all permission checking and faults associated with a byte load (and in addition, a CLFLUSH instruction is allowed to flush a linear address in an execute-only segment). Like a load, the CLFLUSH instruction sets the A bit but not the D bit in the page tables.</p>", "tooltip": "Invalidates from every level of the cache hierarchy in the cache coherence domain the cache line that contains the linear address specified with the memory operand. If that cache line contains modified data at any level of the cache hierarchy, that data is written back to memory. The source operand is a byte memory location." }; case "CLI": return { "url": "http://www.felixcloutier.com/x86/CLI.html", - "html": "<p>In most cases, CLI clears the IF flag in the EFLAGS register and no other flags are affected. Clearing the IF flag causes the processor to ignore maskable external interrupts. The IF flag and the CLI and STI instruction have no effect on the generation of exceptions and NMI interrupts.</p><p>Operation is different in two modes defined as follows:</p><p>If IOPL < 3 and either VME mode or PVI mode is active, CLI clears the VIF flag in the EFLAGS register, leaving IF unaffected.</p><p>Table 3-7 indicates the action of the CLI instruction depending on the processor operating mode, IOPL, and CPL.</p>", + "html": "<p>In most cases, CLI clears the IF flag in the EFLAGS register and no other flags are affected. Clearing the IF flag causes the processor to ignore maskable external interrupts. The IF flag and the CLI and STI instruction have no effect on the generation of exceptions and NMI interrupts.</p><p>Operation is different in two modes defined as follows:</p><p>If IOPL < 3 and either VME mode or PVI mode is active, CLI clears the VIF flag in the EFLAGS register, leaving IF unaffected.</p><p><a href=\"./CLI.html#tbl-3-7\">Table 3-7</a> indicates the action of the CLI instruction depending on the processor operating mode, IOPL, and CPL.</p>", "tooltip": "In most cases, CLI clears the IF flag in the EFLAGS register and no other flags are affected. Clearing the IF flag causes the processor to ignore maskable external interrupts. The IF flag and the CLI and STI instruction have no effect on the generation of exceptions and NMI interrupts." }; case "CLTS": return { "url": "http://www.felixcloutier.com/x86/CLTS.html", - "html": "<p>Clears the task-switched (TS) flag in the CR0 register. This instruction is intended for use in operating-system procedures. It is a privileged instruction that can only be executed at a CPL of 0. It is allowed to be executed in real-address mode to allow initialization for protected mode.</p><p>The processor sets the TS flag every time a task switch occurs. The flag is used to synchronize the saving of FPU context in multitasking applications. See the description of the TS flag in the section titled \u201cControl Registers\u201d in Chapter 2 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for more information about this flag.</p><p>CLTS operation is the same in non-64-bit modes and 64-bit mode.</p><p>See Chapter 25, \u201cVMX Non-Root Operation,\u201d of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3C</em>, for more information about the behavior of this instruction in VMX non-root operation.</p>", + "html": "<p>Clears the task-switched (TS) flag in the CR0 register. This instruction is intended for use in operating-system procedures. It is a privileged instruction that can only be executed at a CPL of 0. It is allowed to be executed in real-address mode to allow initialization for protected mode.</p><p>The processor sets the TS flag every time a task switch occurs. The flag is used to synchronize the saving of FPU context in multitasking applications. See the description of the TS flag in the section titled \u201cControl Registers\u201d in Chapter 2 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for more information about this flag.</p><p>CLTS operation is the same in non-64-bit modes and 64-bit mode.</p><p>See Chapter 25, \u201cVMX Non-Root Operation,\u201d of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3C</em>, for more information about the behavior of this instruction in VMX non-root operation.</p>", "tooltip": "Clears the task-switched (TS) flag in the CR0 register. This instruction is intended for use in operating-system procedures. It is a privileged instruction that can only be executed at a CPL of 0. It is allowed to be executed in real-address mode to allow initialization for protected mode." }; @@ -491,7 +491,7 @@ function getAsmOpcode(opcode) { case "CMP": return { "url": "http://www.felixcloutier.com/x86/CMP.html", - "html": "<p>Compares the first source operand with the second source operand and sets the status flags in the EFLAGS register according to the results. The comparison is performed by subtracting the second operand from the first operand and then setting the status flags in the same manner as the SUB instruction. When an immediate value is used as an operand, it is sign-extended to the length of the first operand.</p><p>The condition codes used by the J<em>cc</em>, CMOV<em>cc</em>, and SET<em>cc</em> instructions are based on the results of a CMP instruction. Appendix B, \u201cEFLAGS Condition Codes,\u201d in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, shows the relationship of the status flags and the condition codes.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", + "html": "<p>Compares the first source operand with the second source operand and sets the status flags in the EFLAGS register according to the results. The comparison is performed by subtracting the second operand from the first operand and then setting the status flags in the same manner as the SUB instruction. When an immediate value is used as an operand, it is sign-extended to the length of the first operand.</p><p>The condition codes used by the J<em>cc</em>, CMOV<em>cc</em>, and SET<em>cc</em> instructions are based on the results of a CMP instruction. Appendix B, \u201cEFLAGS Condition Codes,\u201d in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, shows the relationship of the status flags and the condition codes.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", "tooltip": "Compares the first source operand with the second source operand and sets the status flags in the EFLAGS register according to the results. The comparison is performed by subtracting the second operand from the first operand and then setting the status flags in the same manner as the SUB instruction. When an immediate value is used as an operand, it is sign-extended to the length of the first operand." }; @@ -540,7 +540,7 @@ function getAsmOpcode(opcode) { case "CMPXCHG8B": return { "url": "http://www.felixcloutier.com/x86/CMPXCHG8B%3ACMPXCHG16B.html", - "html": "<p>Compares the 64-bit value in EDX:EAX (or 128-bit value in RDX:RAX if operand size is 128 bits) with the operand (destination operand). If the values are equal, the 64-bit value in ECX:EBX (or 128-bit value in RCX:RBX) is stored in the destination operand. Otherwise, the value in the destination operand is loaded into EDX:EAX (or RDX:RAX). The destination operand is an 8-byte memory location (or 16-byte memory location if operand size is 128 bits). For the EDX:EAX and ECX:EBX register pairs, EDX and ECX contain the high-order 32 bits and EAX and EBX contain the low-order 32 bits of a 64-bit value. For the RDX:RAX and RCX:RBX register pairs, RDX and RCX contain the high-order 64 bits and RAX and RBX contain the low-order 64bits of a 128-bit value.</p><p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically. To simplify the interface to the processor\u2019s bus, the destination operand receives a write cycle without regard to the result of the comparison. The destination operand is written back if the comparison fails; otherwise, the source operand is written into the destination. (The processor never produces a locked read without also producing a locked write.)</p><p>In 64-bit mode, default operation size is 64 bits. Use of the REX.W prefix promotes operation to 128 bits. Note that CMPXCHG16B requires that the destination (memory) operand be 16-byte aligned. See the summary chart at the beginning of this section for encoding data and limits. For information on the CPUID flag that indicates CMPXCHG16B, see page 3-209.</p><p>This instruction encoding is not supported on Intel processors earlier than the Pentium processors.</p>", + "html": "<p>Compares the 64-bit value in EDX:EAX (or 128-bit value in RDX:RAX if operand size is 128 bits) with the operand (destination operand). If the values are equal, the 64-bit value in ECX:EBX (or 128-bit value in RCX:RBX) is stored in the destination operand. Otherwise, the value in the destination operand is loaded into EDX:EAX (or RDX:RAX). The destination operand is an 8-byte memory location (or 16-byte memory location if operand size is 128 bits). For the EDX:EAX and ECX:EBX register pairs, EDX and ECX contain the high-order 32 bits and EAX and EBX contain the low-order 32 bits of a 64-bit value. For the RDX:RAX and RCX:RBX register pairs, RDX and RCX contain the high-order 64 bits and RAX and RBX contain the low-order 64bits of a 128-bit value.</p><p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically. To simplify the interface to the processor\u2019s bus, the destination operand receives a write cycle without regard to the result of the comparison. The destination operand is written back if the comparison fails; otherwise, the source operand is written into the destination. (The processor never produces a locked read without also producing a locked write.)</p><p>In 64-bit mode, default operation size is 64 bits. Use of the REX.W prefix promotes operation to 128 bits. Note that CMPXCHG16B requires that the destination (memory) operand be 16-byte aligned. See the summary chart at the beginning of this section for encoding data and limits. For information on the CPUID flag that indicates CMPXCHG16B, see page 3-212.</p><p>This instruction encoding is not supported on Intel processors earlier than the Pentium processors.</p>", "tooltip": "Compares the 64-bit value in EDX:EAX (or 128-bit value in RDX:RAX if operand size is 128 bits) with the operand (destination operand). If the values are equal, the 64-bit value in ECX:EBX (or 128-bit value in RCX:RBX) is stored in the destination operand. Otherwise, the value in the destination operand is loaded into EDX:EAX (or RDX:RAX). The destination operand is an 8-byte memory location (or 16-byte memory location if operand size is 128 bits). For the EDX:EAX and ECX:EBX register pairs, EDX and ECX contain the high-order 32 bits and EAX and EBX contain the low-order 32 bits of a 64-bit value. For the RDX:RAX and RCX:RBX register pairs, RDX and RCX contain the high-order 64 bits and RAX and RBX contain the low-order 64bits of a 128-bit value." }; @@ -694,8 +694,8 @@ function getAsmOpcode(opcode) { case "CVTSS2SI": return { "url": "http://www.felixcloutier.com/x86/CVTSS2SI.html", - "html": "<p>Converts a single-precision floating-point value in the source operand (the second operand) to a signed doubleword integer (or signed quadword integer if operand size is 64 bits) in the destination operand (the first operand). The source operand can be an XMM register or a memory location. The destination operand is a general-purpose register. When the source operand is an XMM register, the single-precision floating-point value is contained in the low doubleword of the register.</p><p>When a conversion is inexact, the value returned is rounded according to the rounding control bits in the MXCSR register or the embedded rounding control bits. If a converted result cannot be represented in the destination format, the floating-point invalid exception is raised, and if this exception is masked, the indefinite integer value (2<sup>w-1</sup>, where w represents the number of bits in the destination format) is returned.</p><p>Legacy SSE instructions: In 64-bit mode, Use of the REX.W prefix promotes the instruction to produce 64-bit data. See the summary chart at the beginning of this section for encoding data and limits.</p><p>VEX.W1 and EVEX.W1 versions: promotes the instruction to produce 64-bit data in 64-bit mode.</p><p>Note: VEX.vvvv and EVEX.vvvv are reserved and must be 1111b, otherwise instructions will #UD.</p>", - "tooltip": "Converts a single-precision floating-point value in the source operand (the second operand) to a signed doubleword integer (or signed quadword integer if operand size is 64 bits) in the destination operand (the first operand). The source operand can be an XMM register or a memory location. The destination operand is a general-purpose register. When the source operand is an XMM register, the single-precision floating-point value is contained in the low doubleword of the register." + "html": "<p>Converts a single-precision floating-point value in the source operand (the second operand) to a signed double-word integer (or signed quadword integer if operand size is 64 bits) in the destination operand (the first operand). The source operand can be an XMM register or a memory location. The destination operand is a general-purpose register. When the source operand is an XMM register, the single-precision floating-point value is contained in the low doubleword of the register.</p><p>When a conversion is inexact, the value returned is rounded according to the rounding control bits in the MXCSR register or the embedded rounding control bits. If a converted result cannot be represented in the destination format, the floating-point invalid exception is raised, and if this exception is masked, the indefinite integer value (2<sup>w-1</sup>, where w represents the number of bits in the destination format) is returned.</p><p>Legacy SSE instructions: In 64-bit mode, Use of the REX.W prefix promotes the instruction to produce 64-bit data. See the summary chart at the beginning of this section for encoding data and limits.</p><p>VEX.W1 and EVEX.W1 versions: promotes the instruction to produce 64-bit data in 64-bit mode.</p><p>Note: VEX.vvvv and EVEX.vvvv are reserved and must be 1111b, otherwise instructions will #UD.</p>", + "tooltip": "Converts a single-precision floating-point value in the source operand (the second operand) to a signed double-word integer (or signed quadword integer if operand size is 64 bits) in the destination operand (the first operand). The source operand can be an XMM register or a memory location. The destination operand is a general-purpose register. When the source operand is an XMM register, the single-precision floating-point value is contained in the low doubleword of the register." }; case "VCVTTPD2DQ": @@ -740,8 +740,8 @@ function getAsmOpcode(opcode) { case "VCVTTSS2SI": return { "url": "http://www.felixcloutier.com/x86/CVTTSS2SI.html", - "html": "<p>Converts a single-precision floating-point value in the source operand (the second operand) to a signed double-word integer (or signed quadword integer if operand size is 64 bits) in the destination operand (the first operand). The source operand can be an XMM register or a 32-bit memory location. The destination operand is a general purpose register. When the source operand is an XMM register, the single-precision floating-point value is contained in the low doubleword of the register.</p><p>When a conversion is inexact, a truncated (round toward zero) result is returned. If a converted result is larger than the maximum signed doubleword integer, the floating-point invalid exception is raised. If this exception is masked, the indefinite integer value (80000000H or 80000000_00000000H if operand size is 64 bits) is returned.</p><p>Legacy SSE instructions: In 64-bit mode, Use of the REX.W prefix promotes the instruction to 64-bit operation. See the summary chart at the beginning of this section for encoding data and limits.</p><p>VEX.W1 and EVEX.W1 versions: promotes the instruction to produce 64-bit data in 64-bit mode.</p><p>Note: VEX.vvvv and EVEX.vvvv are reserved and must be 1111b, otherwise instructions will #UD.</p>", - "tooltip": "Converts a single-precision floating-point value in the source operand (the second operand) to a signed double-word integer (or signed quadword integer if operand size is 64 bits) in the destination operand (the first operand). The source operand can be an XMM register or a 32-bit memory location. The destination operand is a general purpose register. When the source operand is an XMM register, the single-precision floating-point value is contained in the low doubleword of the register." + "html": "<p>Converts a single-precision floating-point value in the source operand (the second operand) to a signed doubleword integer (or signed quadword integer if operand size is 64 bits) in the destination operand (the first operand). The source operand can be an XMM register or a 32-bit memory location. The destination operand is a general purpose register. When the source operand is an XMM register, the single-precision floating-point value is contained in the low doubleword of the register.</p><p>When a conversion is inexact, a truncated (round toward zero) result is returned. If a converted result is larger than the maximum signed doubleword integer, the floating-point invalid exception is raised. If this exception is masked, the indefinite integer value (80000000H or 80000000_00000000H if operand size is 64 bits) is returned.</p><p>Legacy SSE instructions: In 64-bit mode, Use of the REX.W prefix promotes the instruction to 64-bit operation. See the summary chart at the beginning of this section for encoding data and limits.</p><p>VEX.W1 and EVEX.W1 versions: promotes the instruction to produce 64-bit data in 64-bit mode.</p><p>Note: VEX.vvvv and EVEX.vvvv are reserved and must be 1111b, otherwise instructions will #UD.</p>", + "tooltip": "Converts a single-precision floating-point value in the source operand (the second operand) to a signed doubleword integer (or signed quadword integer if operand size is 64 bits) in the destination operand (the first operand). The source operand can be an XMM register or a 32-bit memory location. The destination operand is a general purpose register. When the source operand is an XMM register, the single-precision floating-point value is contained in the low doubleword of the register." }; case "CQO": @@ -777,7 +777,7 @@ function getAsmOpcode(opcode) { case "DIV": return { "url": "http://www.felixcloutier.com/x86/DIV.html", - "html": "<p>Divides unsigned the value in the AX, DX:AX, EDX:EAX, or RDX:RAX registers (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, EDX:EAX, or RDX:RAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor). Division using 64-bit operand is available only in 64-bit mode.</p><p>Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magnitude. Overflow is indicated with the #DE (divide error) exception rather than with the CF flag.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. In 64-bit mode when REX.W is applied, the instruction divides the unsigned value in RDX:RAX by the source operand and stores the quotient in RAX, the remainder in RDX.</p><p>See the summary chart at the beginning of this section for encoding data and limits. See Table 3-15.</p>", + "html": "<p>Divides unsigned the value in the AX, DX:AX, EDX:EAX, or RDX:RAX registers (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, EDX:EAX, or RDX:RAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor). Division using 64-bit operand is available only in 64-bit mode.</p><p>Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magnitude. Overflow is indicated with the #DE (divide error) exception rather than with the CF flag.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. In 64-bit mode when REX.W is applied, the instruction divides the unsigned value in RDX:RAX by the source operand and stores the quotient in RAX, the remainder in RDX.</p><p>See the summary chart at the beginning of this section for encoding data and limits. See <a href=\"./DIV.html#tbl-3-15\">Table 3-15</a>.</p>", "tooltip": "Divides unsigned the value in the AX, DX:AX, EDX:EAX, or RDX:RAX registers (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, EDX:EAX, or RDX:RAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor). Division using 64-bit operand is available only in 64-bit mode." }; @@ -817,7 +817,7 @@ function getAsmOpcode(opcode) { case "DPPD": return { "url": "http://www.felixcloutier.com/x86/DPPD.html", - "html": "<p>Conditionally multiplies the packed double-precision floating-point values in the destination operand (first operand) with the packed double-precision floating-point values in the source (second operand) depending on a mask extracted from bits [5:4] of the immediate operand (third operand). If a condition mask bit is zero, the corresponding multiplication is replaced by a value of 0.0 in the manner described by Section 12.8.4 of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>The two resulting double-precision values are summed into an intermediate result. The intermediate result is conditionally broadcasted to the destination using a broadcast mask specified by bits [1:0] of the immediate byte.</p><p>If a broadcast mask bit is \u201c1\u201d, the intermediate result is copied to the corresponding qword element in the destination operand. If a broadcast mask bit is zero, the corresponding element in the destination is set to zero.</p><p>DPPD follows the NaN forwarding rules stated in the Software Developer\u2019s Manual, vol. 1, table 4.7. These rules do not cover horizontal prioritization of NaNs. Horizontal propagation of NaNs to the destination and the positioning of those NaNs in the destination is implementation dependent. NaNs on the input sources or computationally generated NaNs will have at least one NaN propagated to the destination.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p>", + "html": "<p>Conditionally multiplies the packed double-precision floating-point values in the destination operand (first operand) with the packed double-precision floating-point values in the source (second operand) depending on a mask extracted from bits [5:4] of the immediate operand (third operand). If a condition mask bit is zero, the corresponding multiplication is replaced by a value of 0.0 in the manner described by Section 12.8.4 of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>The two resulting double-precision values are summed into an intermediate result. The intermediate result is conditionally broadcasted to the destination using a broadcast mask specified by bits [1:0] of the immediate byte.</p><p>If a broadcast mask bit is \u201c1\u201d, the intermediate result is copied to the corresponding qword element in the destination operand. If a broadcast mask bit is zero, the corresponding element in the destination is set to zero.</p><p>DPPD follows the NaN forwarding rules stated in the Software Developer\u2019s Manual, vol. 1, <span class=\"not-imported\">table 4-7</span>. These rules do not cover horizontal prioritization of NaNs. Horizontal propagation of NaNs to the destination and the positioning of those NaNs in the destination is implementation dependent. NaNs on the input sources or computationally generated NaNs will have at least one NaN propagated to the destination.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p>", "tooltip": "Conditionally multiplies the packed double-precision floating-point values in the destination operand (first operand) with the packed double-precision floating-point values in the source (second operand) depending on a mask extracted from bits [5:4] of the immediate operand (third operand). If a condition mask bit is zero, the corresponding multiplication is replaced by a value of 0.0 in the manner described by Section 12.8.4 of Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1." }; @@ -825,28 +825,28 @@ function getAsmOpcode(opcode) { case "VDPPS": return { "url": "http://www.felixcloutier.com/x86/DPPS.html", - "html": "<p>Conditionally multiplies the packed single precision floating-point values in the destination operand (first operand) with the packed single-precision floats in the source (second operand) depending on a mask extracted from the high 4 bits of the immediate byte (third operand). If a condition mask bit in Imm8[7:4] is zero, the corresponding multiplication is replaced by a value of 0.0 in the manner described by Section 12.8.4 of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>The four resulting single-precision values are summed into an intermediate result. The intermediate result is conditionally broadcasted to the destination using a broadcast mask specified by bits [3:0] of the immediate byte.</p><p>If a broadcast mask bit is \u201c1\u201d, the intermediate result is copied to the corresponding dword element in the destination operand. If a broadcast mask bit is zero, the corresponding element in the destination is set to zero.</p><p>DPPS follows the NaN forwarding rules stated in the Software Developer\u2019s Manual, vol. 1, table 4.7. These rules do not cover horizontal prioritization of NaNs. Horizontal propagation of NaNs to the destination and the positioning of those NaNs in the destination is implementation dependent. NaNs on the input sources or computationally generated NaNs will have at least one NaN propagated to the destination.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p>", + "html": "<p>Conditionally multiplies the packed single precision floating-point values in the destination operand (first operand) with the packed single-precision floats in the source (second operand) depending on a mask extracted from the high 4 bits of the immediate byte (third operand). If a condition mask bit in Imm8[7:4] is zero, the corresponding multiplication is replaced by a value of 0.0 in the manner described by Section 12.8.4 of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>The four resulting single-precision values are summed into an intermediate result. The intermediate result is conditionally broadcasted to the destination using a broadcast mask specified by bits [3:0] of the immediate byte.</p><p>If a broadcast mask bit is \u201c1\u201d, the intermediate result is copied to the corresponding dword element in the destination operand. If a broadcast mask bit is zero, the corresponding element in the destination is set to zero.</p><p>DPPS follows the NaN forwarding rules stated in the Software Developer\u2019s Manual, vol. 1, <span class=\"not-imported\">table 4-7</span>. These rules do not cover horizontal prioritization of NaNs. Horizontal propagation of NaNs to the destination and the positioning of those NaNs in the destination is implementation dependent. NaNs on the input sources or computationally generated NaNs will have at least one NaN propagated to the destination.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p>", "tooltip": "Conditionally multiplies the packed single precision floating-point values in the destination operand (first operand) with the packed single-precision floats in the source (second operand) depending on a mask extracted from the high 4 bits of the immediate byte (third operand). If a condition mask bit in Imm8[7:4] is zero, the corresponding multiplication is replaced by a value of 0.0 in the manner described by Section 12.8.4 of Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1." }; case "EMMS": return { "url": "http://www.felixcloutier.com/x86/EMMS.html", - "html": "<p>Sets the values of all the tags in the x87 FPU tag word to empty (all 1s). This operation marks the x87 FPU data registers (which are aliased to the MMX technology registers) as available for use by x87 FPU floating-point instructions. (See Figure 8-7 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for the format of the x87 FPU tag word.) All other MMX instructions (other than the EMMS instruction) set all the tags in x87 FPU tag word to valid (all 0s).</p><p>The EMMS instruction must be used to clear the MMX technology state at the end of all MMX technology procedures or subroutines and before calling other procedures or subroutines that may execute x87 floating-point instructions. If a floating-point instruction loads one of the registers in the x87 FPU data register stack before the x87 FPU tag word has been reset by the EMMS instruction, an x87 floating-point register stack overflow can occur that will result in an x87 floating-point exception or incorrect result.</p><p>EMMS operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Sets the values of all the tags in the x87 FPU tag word to empty (all 1s). This operation marks the x87 FPU data registers (which are aliased to the MMX technology registers) as available for use by x87 FPU floating-point instructions. (See <span class=\"not-imported\">Figure 8-7</span> in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for the format of the x87 FPU tag word.) All other MMX instructions (other than the EMMS instruction) set all the tags in x87 FPU tag word to valid (all 0s).</p><p>The EMMS instruction must be used to clear the MMX technology state at the end of all MMX technology procedures or subroutines and before calling other procedures or subroutines that may execute x87 floating-point instructions. If a floating-point instruction loads one of the registers in the x87 FPU data register stack before the x87 FPU tag word has been reset by the EMMS instruction, an x87 floating-point register stack overflow can occur that will result in an x87 floating-point exception or incorrect result.</p><p>EMMS operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Sets the values of all the tags in the x87 FPU tag word to empty (all 1s). This operation marks the x87 FPU data registers (which are aliased to the MMX technology registers) as available for use by x87 FPU floating-point instructions. (See Figure 8-7 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for the format of the x87 FPU tag word.) All other MMX instructions (other than the EMMS instruction) set all the tags in x87 FPU tag word to valid (all 0s)." }; case "ENCLV": return { "url": "http://www.felixcloutier.com/x86/ENCLV.html", - "html": "<p>The ENCLV instruction invokes the virtualization SGX leaf functions for managing enclaves in a virtualized environment. Software specifies the leaf function by setting the appropriate value in the register EAX as input. The registers RBX, RCX, and RDX have leaf-specific purpose, and may act as input, as output, or may be unused. In non 64-bit mode, the instruction ignores upper 32 bits of the RAX register.</p><p>The ENCLV instruction produces an invalid-opcode exception (#UD) if CR0.PE = 0 or RFLAGS.VM = 1, if it is executed in system-management mode (SMM), or not in VMX operation. Additionally, any attempt to execute the instruction when CPL > 0 results in #UD. The instruction produces a general-protection exception (#GP) if CR0.PG = 0 or if an attempt is made to invoke an undefined leaf function.</p><p>Software in VMX root mode of operation can enable execution of the ENCLV instruction in VMX non-root mode by setting enable ENCLV execution control in the VMCS. If enable ENCLV execution control in the VMCS is clear, execution of the ENCLV instruction in VMX non-root mode results in #UD.</p><p>When execution of ENCLV instruction in VMX non-root mode is enabled, software in VMX root operation can intercept the invocation of various ENCLS leaf functions in VMX non-root operation by setting the corresponding bits in the ENCLV-exiting bitmap.</p><p>Addresses and operands are 32 bits in 32-bit mode (IA32_EFER.LMA == 0 || CS.L == 0) and are 64 bits in 64-bit mode (IA32_EFER.LMA == 1 && CS.L == 1). CS.D value has no impact on address calculation.</p>", + "html": "<p>The ENCLV instruction invokes the virtualization SGX leaf functions for managing enclaves in a virtualized environment. Software specifies the leaf function by setting the appropriate value in the register EAX as input. The registers RBX, RCX, and RDX have leaf-specific purpose, and may act as input, as output, or may be unused. In non 64-bit mode, the instruction ignores upper 32 bits of the RAX register.</p><p>The ENCLV instruction produces an invalid-opcode exception (#UD) if CR0.PE = 0 or RFLAGS.VM = 1, if it is executed in system-management mode (SMM), or not in VMX operation. Additionally, any attempt to execute the instruction when CPL > 0 results in #UD. The instruction produces a general-protection exception (#GP) if CR0.PG = 0 or if an attempt is made to invoke an undefined leaf function.</p><p>Software in VMX root mode of operation can enable execution of the ENCLV instruction in VMX non-root mode by setting enable ENCLV execution control in the VMCS. If enable ENCLV execution control in the VMCS is clear, execution of the ENCLV instruction in VMX non-root mode results in #UD.</p><p>When execution of ENCLV instruction in VMX non-root mode is enabled, software in VMX root operation can intercept the invocation of various ENCLV leaf functions in VMX non-root operation by setting the corresponding bits in the ENCLV-exiting bitmap.</p><p>Addresses and operands are 32 bits in 32-bit mode (IA32_EFER.LMA == 0 || CS.L == 0) and are 64 bits in 64-bit mode (IA32_EFER.LMA == 1 && CS.L == 1). CS.D value has no impact on address calculation.</p>", "tooltip": "The ENCLV instruction invokes the virtualization SGX leaf functions for managing enclaves in a virtualized environment. Software specifies the leaf function by setting the appropriate value in the register EAX as input. The registers RBX, RCX, and RDX have leaf-specific purpose, and may act as input, as output, or may be unused. In non 64-bit mode, the instruction ignores upper 32 bits of the RAX register." }; case "ENTER": return { "url": "http://www.felixcloutier.com/x86/ENTER.html", - "html": "<p>Creates a stack frame (comprising of space for dynamic storage and 1-32 frame pointer storage) for a procedure. The first operand (imm16) specifies the size of the dynamic storage in the stack frame (that is, the number of bytes of dynamically allocated on the stack for the procedure). The second operand (imm8) gives the lexical nesting level (0 to 31) of the procedure. The nesting level (imm8 mod 32) and the OperandSize attribute determine the size in bytes of the storage space for frame pointers.</p><p>The nesting level determines the number of frame pointers that are copied into the \u201cdisplay area\u201d of the new stack frame from the preceding frame. The default size of the frame pointer is the StackAddrSize attribute, but can be overridden using the 66H prefix. Thus, the OperandSize attribute determines the size of each frame pointer that will be copied into the stack frame and the data being transferred from SP/ESP/RSP register into the BP/EBP/RBP register.</p><p>The ENTER and companion LEAVE instructions are provided to support block structured languages. The ENTER instruction (when used) is typically the first instruction in a procedure and is used to set up a new stack frame for a procedure. The LEAVE instruction is then used at the end of the procedure (just before the RET instruction) to release the stack frame.</p><p>If the nesting level is 0, the processor pushes the frame pointer from the BP/EBP/RBP register onto the stack, copies the current stack pointer from the SP/ESP/RSP register into the BP/EBP/RBP register, and loads the SP/ESP/RSP register with the current stack-pointer value minus the value in the size operand. For nesting levels of 1 or greater, the processor pushes additional frame pointers on the stack before adjusting the stack pointer. These additional frame pointers provide the called procedure with access points to other nested frames on the stack. See \u201cProcedure Calls for Block-Structured Languages\u201d in Chapter 6 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for more information about the actions of the ENTER instruction.</p><p>The ENTER instruction causes a page fault whenever a write using the final value of the stack pointer (within the current stack segment) would do so.</p>", + "html": "<p>Creates a stack frame (comprising of space for dynamic storage and 1-32 frame pointer storage) for a procedure. The first operand (imm16) specifies the size of the dynamic storage in the stack frame (that is, the number of bytes of dynamically allocated on the stack for the procedure). The second operand (imm8) gives the lexical nesting level (0 to 31) of the procedure. The nesting level (imm8 mod 32) and the OperandSize attribute determine the size in bytes of the storage space for frame pointers.</p><p>The nesting level determines the number of frame pointers that are copied into the \u201cdisplay area\u201d of the new stack frame from the preceding frame. The default size of the frame pointer is the StackAddrSize attribute, but can be overridden using the 66H prefix. Thus, the OperandSize attribute determines the size of each frame pointer that will be copied into the stack frame and the data being transferred from SP/ESP/RSP register into the BP/EBP/RBP register.</p><p>The ENTER and companion LEAVE instructions are provided to support block structured languages. The ENTER instruction (when used) is typically the first instruction in a procedure and is used to set up a new stack frame for a procedure. The LEAVE instruction is then used at the end of the procedure (just before the RET instruction) to release the stack frame.</p><p>If the nesting level is 0, the processor pushes the frame pointer from the BP/EBP/RBP register onto the stack, copies the current stack pointer from the SP/ESP/RSP register into the BP/EBP/RBP register, and loads the SP/ESP/RSP register with the current stack-pointer value minus the value in the size operand. For nesting levels of 1 or greater, the processor pushes additional frame pointers on the stack before adjusting the stack pointer. These additional frame pointers provide the called procedure with access points to other nested frames on the stack. See \u201cProcedure Calls for Block-Structured Languages\u201d in Chapter 6 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for more information about the actions of the ENTER instruction.</p><p>The ENTER instruction causes a page fault whenever a write using the final value of the stack pointer (within the current stack segment) would do so.</p>", "tooltip": "Creates a stack frame (comprising of space for dynamic storage and 1-32 frame pointer storage) for a procedure. The first operand (imm16) specifies the size of the dynamic storage in the stack frame (that is, the number of bytes of dynamically allocated on the stack for the procedure). The second operand (imm8) gives the lexical nesting level (0 to 31) of the procedure. The nesting level (imm8 mod 32) and the OperandSize attribute determine the size in bytes of the storage space for frame pointers." }; @@ -906,7 +906,7 @@ function getAsmOpcode(opcode) { case "FCLEX": return { "url": "http://www.felixcloutier.com/x86/FCLEX%3AFNCLEX.html", - "html": "<p>Clears the floating-point exception flags (PE, UE, OE, ZE, DE, and IE), the exception summary status flag (ES), the stack fault flag (SF), and the busy flag (B) in the FPU status word. The FCLEX instruction checks for and handles any pending unmasked floating-point exceptions before clearing the exception flags; the FNCLEX instruction does not.</p><p>The assembler issues two instructions for the FCLEX instruction (an FWAIT instruction followed by an FNCLEX instruction), and the processor executes each of these instructions separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>When operating a Pentium or Intel486 processor in MS-DOS* compatibility mode, it is possible (under unusual circumstances) for an FNCLEX instruction to be interrupted prior to being executed to handle a pending FPU exception. See the section titled \u201cNo-Wait FPU Instructions Can Get FPU Interrupt in Window\u201d in Appendix D of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of these circumstances. An FNCLEX instruction cannot be interrupted in this way on later Intel processors, except for the Intel Quark<sup>TM</sup> X1000 processor.</p><p>This instruction affects only the x87 FPU floating-point exception flags. It does not affect the SIMD floating-point exception flags in the MXCRS register.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Clears the floating-point exception flags (PE, UE, OE, ZE, DE, and IE), the exception summary status flag (ES), the stack fault flag (SF), and the busy flag (B) in the FPU status word. The FCLEX instruction checks for and handles any pending unmasked floating-point exceptions before clearing the exception flags; the FNCLEX instruction does not.</p><p>The assembler issues two instructions for the FCLEX instruction (an FWAIT instruction followed by an FNCLEX instruction), and the processor executes each of these instructions separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>When operating a Pentium or Intel486 processor in MS-DOS* compatibility mode, it is possible (under unusual circumstances) for an FNCLEX instruction to be interrupted prior to being executed to handle a pending FPU exception. See the section titled \u201cNo-Wait FPU Instructions Can Get FPU Interrupt in Window\u201d in Appendix D of the <em>Intel<sup>\u00ae</sup></em> <em>64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of these circumstances. An FNCLEX instruction cannot be interrupted in this way on later Intel processors, except for the Intel Quark<sup>TM</sup> X1000 processor.</p><p>This instruction affects only the x87 FPU floating-point exception flags. It does not affect the SIMD floating-point exception flags in the MXCRS register.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Clears the floating-point exception flags (PE, UE, OE, ZE, DE, and IE), the exception summary status flag (ES), the stack fault flag (SF), and the busy flag (B) in the FPU status word. The FCLEX instruction checks for and handles any pending unmasked floating-point exceptions before clearing the exception flags; the FNCLEX instruction does not." }; @@ -920,7 +920,7 @@ function getAsmOpcode(opcode) { case "FCMOVB": return { "url": "http://www.felixcloutier.com/x86/FCMOVcc.html", - "html": "<p>Tests the status flags in the EFLAGS register and moves the source operand (second operand) to the destination operand (first operand) if the given test condition is true. The condition for each mnemonic os given in the Description column above and in Chapter 8 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>. The source operand is always in the ST(i) register and the destination operand is always ST(0).</p><p>The FCMOV<em>cc</em> instructions are useful for optimizing small IF constructions. They also help eliminate branching overhead for IF operations and the possibility of branch mispredictions by the processor.</p><p>A processor may not support the FCMOV<em>cc</em> instructions. Software can check if the FCMOV<em>cc</em> instructions are supported by checking the processor\u2019s feature information with the CPUID instruction (see \u201cCOMISS\u2014Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS\u201d in this chapter). If both the CMOV and FPU feature bits are set, the FCMOV<em>cc</em> instructions are supported.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>The FCMOVcc instructions were introduced to the IA-32 Architecture in the P6 family processors and are not available in earlier IA-32 processors.</p>", + "html": "<p>Tests the status flags in the EFLAGS register and moves the source operand (second operand) to the destination operand (first operand) if the given test condition is true. The condition for each mnemonic os given in the Description column above and in Chapter 8 in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>. The source operand is always in the ST(i) register and the destination operand is always ST(0).</p><p>The FCMOV<em>cc</em> instructions are useful for optimizing small IF constructions. They also help eliminate branching overhead for IF operations and the possibility of branch mispredictions by the processor.</p><p>A processor may not support the FCMOV<em>cc</em> instructions. Software can check if the FCMOV<em>cc</em> instructions are supported by checking the processor\u2019s feature information with the CPUID instruction (see \u201cCOMISS\u2014Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS\u201d in this chapter). If both the CMOV and FPU feature bits are set, the FCMOV<em>cc</em> instructions are supported.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>The FCMOVcc instructions were introduced to the IA-32 Architecture in the P6 family processors and are not available in earlier IA-32 processors.</p>", "tooltip": "Tests the status flags in the EFLAGS register and moves the source operand (second operand) to the destination operand (first operand) if the given test condition is true. The condition for each mnemonic os given in the Description column above and in Chapter 8 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1. The source operand is always in the ST(i) register and the destination operand is always ST(0)." }; @@ -946,7 +946,7 @@ function getAsmOpcode(opcode) { case "FCOS": return { "url": "http://www.felixcloutier.com/x86/FCOS.html", - "html": "<p>Computes the approximate cosine of the source operand in register ST(0) and stores the result in ST(0). The source operand must be given in radians and must be within the range \u22122<sup>63</sup> to +2<sup>63</sup>. The following table shows the results obtained when taking the cosine of various classes of numbers.</p><p>If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-of-range conditions. Source values outside the range \u2212 2<sup>63</sup> to +2<sup>63</sup> can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2\u03c0. However, even within the range -2<sup>63</sup> to +2<sup>63</sup>, inaccurate results can occur because the finite approximation of \u03c0 used internally for argument reduction is not sufficient in all cases. Therefore, for accurate results it is safe to apply FCOS only to arguments reduced accurately in software, to a value smaller in absolute value than 3\u03c0/8. See the sections titled \u201cApproximation of Pi\u201d and \u201cTranscendental Instruction Accuracy\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a discussion of the proper value to use for \u03c0 in performing such reductions.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Computes the approximate cosine of the source operand in register ST(0) and stores the result in ST(0). The source operand must be given in radians and must be within the range \u22122<sup>63</sup> to +2<sup>63</sup>. The following table shows the results obtained when taking the cosine of various classes of numbers.</p><p>If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-of-range conditions. Source values outside the range \u2212 2<sup>63</sup> to +2<sup>63</sup> can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2\u03c0. However, even within the range -2<sup>63</sup> to +2<sup>63</sup>, inaccurate results can occur because the finite approximation of \u03c0 used internally for argument reduction is not sufficient in all cases. Therefore, for accurate results it is safe to apply FCOS only to arguments reduced accurately in software, to a value smaller in absolute value than 3\u03c0/8. See the sections titled \u201cApproximation of Pi\u201d and \u201cTranscendental Instruction Accuracy\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a discussion of the proper value to use for \u03c0 in performing such reductions.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Computes the approximate cosine of the source operand in register ST(0) and stores the result in ST(0). The source operand must be given in radians and must be within the range \u2212263 to +263. The following table shows the results obtained when taking the cosine of various classes of numbers." }; @@ -1008,7 +1008,7 @@ function getAsmOpcode(opcode) { case "FINIT": return { "url": "http://www.felixcloutier.com/x86/FINIT%3AFNINIT.html", - "html": "<p>Sets the FPU control, status, tag, instruction pointer, and data pointer registers to their default states. The FPU control word is set to 037FH (round to nearest, all exceptions masked, 64-bit precision). The status word is cleared (no exception flags set, TOP is set to 0). The data registers in the register stack are left unchanged, but they are all tagged as empty (11B). Both the instruction and data pointers are cleared.</p><p>The FINIT instruction checks for and handles any pending unmasked floating-point exceptions before performing the initialization; the FNINIT instruction does not.</p><p>The assembler issues two instructions for the FINIT instruction (an FWAIT instruction followed by an FNINIT instruction), and the processor executes each of these instructions in separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>When operating a Pentium or Intel486 processor in MS-DOS compatibility mode, it is possible (under unusual circumstances) for an FNINIT instruction to be interrupted prior to being executed to handle a pending FPU exception. See the section titled \u201cNo-Wait FPU Instructions Can Get FPU Interrupt in Window\u201d in Appendix D of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of these circumstances. An FNINIT instruction cannot be interrupted in this way on later Intel processors, except for the Intel Quark<sup>TM</sup> X1000 processor.</p>", + "html": "<p>Sets the FPU control, status, tag, instruction pointer, and data pointer registers to their default states. The FPU control word is set to 037FH (round to nearest, all exceptions masked, 64-bit precision). The status word is cleared (no exception flags set, TOP is set to 0). The data registers in the register stack are left unchanged, but they are all tagged as empty (11B). Both the instruction and data pointers are cleared.</p><p>The FINIT instruction checks for and handles any pending unmasked floating-point exceptions before performing the initialization; the FNINIT instruction does not.</p><p>The assembler issues two instructions for the FINIT instruction (an FWAIT instruction followed by an FNINIT instruction), and the processor executes each of these instructions in separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>When operating a Pentium or Intel486 processor in MS-DOS compatibility mode, it is possible (under unusual circumstances) for an FNINIT instruction to be interrupted prior to being executed to handle a pending FPU exception. See the section titled \u201cNo-Wait FPU Instructions Can Get FPU Interrupt in Window\u201d in Appendix D of the <em>Intel<sup>\u00ae</sup></em> <em>64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of these circumstances. An FNINIT instruction cannot be interrupted in this way on later Intel processors, except for the Intel Quark<sup>TM</sup> X1000 processor.</p>", "tooltip": "Sets the FPU control, status, tag, instruction pointer, and data pointer registers to their default states. The FPU control word is set to 037FH (round to nearest, all exceptions masked, 64-bit precision). The status word is cleared (no exception flags set, TOP is set to 0). The data registers in the register stack are left unchanged, but they are all tagged as empty (11B). Both the instruction and data pointers are cleared." }; @@ -1043,21 +1043,21 @@ function getAsmOpcode(opcode) { case "FLDLG2": return { "url": "http://www.felixcloutier.com/x86/FLD1%3AFLDL2T%3AFLDL2E%3AFLDPI%3AFLDLG2%3AFLDLN2%3AFLDZ.html", - "html": "<p>Push one of seven commonly used constants (in double extended-precision floating-point format) onto the FPU register stack. The constants that can be loaded with these instructions include +1.0, +0.0, log<sub>2</sub>10, log<sub>2</sub>e, \u03c0, log<sub>10</sub>2, and log<sub>e</sub>2. For each constant, an internal 66-bit constant is rounded (as specified by the RC field in the FPU control word) to double extended-precision floating-point format. The inexact-result exception (#P) is not generated as a result of the rounding, nor is the C1 flag set in the x87 FPU status word if the value is rounded up.</p><p>See the section titled \u201cApproximation of Pi\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of the \u03c0 constant.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>When the RC field is set to round-to-nearest, the FPU produces the same constants that is produced by the Intel 8087 and Intel 287 math coprocessors.</p>", + "html": "<p>Push one of seven commonly used constants (in double extended-precision floating-point format) onto the FPU register stack. The constants that can be loaded with these instructions include +1.0, +0.0, log<sub>2</sub>10, log<sub>2</sub>e, \u03c0, log<sub>10</sub>2, and log<sub>e</sub>2. For each constant, an internal 66-bit constant is rounded (as specified by the RC field in the FPU control word) to double extended-precision floating-point format. The inexact-result exception (#P) is not generated as a result of the rounding, nor is the C1 flag set in the x87 FPU status word if the value is rounded up.</p><p>See the section titled \u201cApproximation of Pi\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of the \u03c0 constant.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>When the RC field is set to round-to-nearest, the FPU produces the same constants that is produced by the Intel 8087 and Intel 287 math coprocessors.</p>", "tooltip": "Push one of seven commonly used constants (in double extended-precision floating-point format) onto the FPU register stack. The constants that can be loaded with these instructions include +1.0, +0.0, log210, log2e, \u03c0, log102, and loge2. For each constant, an internal 66-bit constant is rounded (as specified by the RC field in the FPU control word) to double extended-precision floating-point format. The inexact-result exception (#P) is not generated as a result of the rounding, nor is the C1 flag set in the x87 FPU status word if the value is rounded up." }; case "FLDCW": return { "url": "http://www.felixcloutier.com/x86/FLDCW.html", - "html": "<p>Loads the 16-bit source operand into the FPU control word. The source operand is a memory location. This instruction is typically used to establish or change the FPU\u2019s mode of operation.</p><p>If one or more exception flags are set in the FPU status word prior to loading a new FPU control word and the new control word unmasks one or more of those exceptions, a floating-point exception will be generated upon execution of the next floating-point instruction (except for the no-wait floating-point instructions, see the section titled \u201cSoftware Exception Handling\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>). To avoid raising exceptions when changing FPU operating modes, clear any pending exceptions (using the FCLEX or FNCLEX instruction) before loading the new control word.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Loads the 16-bit source operand into the FPU control word. The source operand is a memory location. This instruction is typically used to establish or change the FPU\u2019s mode of operation.</p><p>If one or more exception flags are set in the FPU status word prior to loading a new FPU control word and the new control word unmasks one or more of those exceptions, a floating-point exception will be generated upon execution of the next floating-point instruction (except for the no-wait floating-point instructions, see the section titled \u201cSoftware Exception Handling\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>). To avoid raising exceptions when changing FPU operating modes, clear any pending exceptions (using the FCLEX or FNCLEX instruction) before loading the new control word.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Loads the 16-bit source operand into the FPU control word. The source operand is a memory location. This instruction is typically used to establish or change the FPU\u2019s mode of operation." }; case "FLDENV": return { "url": "http://www.felixcloutier.com/x86/FLDENV.html", - "html": "<p>Loads the complete x87 FPU operating environment from memory into the FPU registers. The source operand specifies the first byte of the operating-environment data in memory. This data is typically written to the specified memory location by a FSTENV or FNSTENV instruction.</p><p>The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, show the layout in memory of the loaded environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used.</p><p>The FLDENV instruction should be executed in the same operating mode as the corresponding FSTENV/FNSTENV instruction.</p><p>If one or more unmasked exception flags are set in the new FPU status word, a floating-point exception will be generated upon execution of the next floating-point instruction (except for the no-wait floating-point instructions, see the section titled \u201cSoftware Exception Handling\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>). To avoid generating exceptions when loading a new environment, clear all the exception flags in the FPU status word that is being loaded.</p><p>If a page or limit fault occurs during the execution of this instruction, the state of the x87 FPU registers as seen by the fault handler may be different than the state being loaded from memory. In such situations, the fault handler should ignore the status of the x87 FPU registers, handle the fault, and return. The FLDENV instruction will then complete the loading of the x87 FPU registers with no resulting context inconsistency.</p>", + "html": "<p>Loads the complete x87 FPU operating environment from memory into the FPU registers. The source operand specifies the first byte of the operating-environment data in memory. This data is typically written to the specified memory location by a FSTENV or FNSTENV instruction.</p><p>The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, show the layout in memory of the loaded environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used.</p><p>The FLDENV instruction should be executed in the same operating mode as the corresponding FSTENV/FNSTENV instruction.</p><p>If one or more unmasked exception flags are set in the new FPU status word, a floating-point exception will be generated upon execution of the next floating-point instruction (except for the no-wait floating-point instructions, see the section titled \u201cSoftware Exception Handling\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>). To avoid generating exceptions when loading a new environment, clear all the exception flags in the FPU status word that is being loaded.</p><p>If a page or limit fault occurs during the execution of this instruction, the state of the x87 FPU registers as seen by the fault handler may be different than the state being loaded from memory. In such situations, the fault handler should ignore the status of the x87 FPU registers, handle the fault, and return. The FLDENV instruction will then complete the loading of the x87 FPU registers with no resulting context inconsistency.</p>", "tooltip": "Loads the complete x87 FPU operating environment from memory into the FPU registers. The source operand specifies the first byte of the operating-environment data in memory. This data is typically written to the specified memory location by a FSTENV or FNSTENV instruction." }; @@ -1101,7 +1101,7 @@ function getAsmOpcode(opcode) { case "FPTAN": return { "url": "http://www.felixcloutier.com/x86/FPTAN.html", - "html": "<p>Computes the approximate tangent of the source operand in register ST(0), stores the result in ST(0), and pushes a 1.0 onto the FPU register stack. The source operand must be given in radians and must be less than \u00b12<sup>63</sup>. The following table shows the unmasked results obtained when computing the partial tangent of various classes of numbers, assuming that underflow does not occur.</p><p>If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-of-range conditions. Source values outside the range \u2212 2<sup>63</sup> to +2<sup>63</sup> can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2\u03c0. However, even within the range -2<sup>63</sup> to +2<sup>63</sup>, inaccurate results can occur because the finite approximation of \u03c0 used internally for argument reduction is not sufficient in all cases. Therefore, for accurate results it is safe to apply FPTAN only to arguments reduced accurately in software, to a value smaller in absolute value than 3\u03c0/8. See the sections titled \u201cApproximation of Pi\u201d and \u201cTranscendental Instruction Accuracy\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a discussion of the proper value to use for \u03c0 in performing such reductions.</p><p>The value 1.0 is pushed onto the register stack after the tangent has been computed to maintain compatibility with the Intel 8087 and Intel287 math coprocessors. This operation also simplifies the calculation of other trigonometric functions. For instance, the cotangent (which is the reciprocal of the tangent) can be computed by executing a FDIVR instruction after the FPTAN instruction.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Computes the approximate tangent of the source operand in register ST(0), stores the result in ST(0), and pushes a 1.0 onto the FPU register stack. The source operand must be given in radians and must be less than \u00b12<sup>63</sup>. The following table shows the unmasked results obtained when computing the partial tangent of various classes of numbers, assuming that underflow does not occur.</p><p>If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-of-range conditions. Source values outside the range \u2212 2<sup>63</sup> to +2<sup>63</sup> can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2\u03c0. However, even within the range -2<sup>63</sup> to +2<sup>63</sup>, inaccurate results can occur because the finite approximation of \u03c0 used internally for argument reduction is not sufficient in all cases. Therefore, for accurate results it is safe to apply FPTAN only to arguments reduced accurately in software, to a value smaller in absolute value than 3\u03c0/8. See the sections titled \u201cApproximation of Pi\u201d and \u201cTranscendental Instruction Accuracy\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a discussion of the proper value to use for \u03c0 in performing such reductions.</p><p>The value 1.0 is pushed onto the register stack after the tangent has been computed to maintain compatibility with the Intel 8087 and Intel287 math coprocessors. This operation also simplifies the calculation of other trigonometric functions. For instance, the cotangent (which is the reciprocal of the tangent) can be computed by executing a FDIVR instruction after the FPTAN instruction.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Computes the approximate tangent of the source operand in register ST(0), stores the result in ST(0), and pushes a 1.0 onto the FPU register stack. The source operand must be given in radians and must be less than \u00b1263. The following table shows the unmasked results obtained when computing the partial tangent of various classes of numbers, assuming that underflow does not occur." }; @@ -1115,7 +1115,7 @@ function getAsmOpcode(opcode) { case "FRSTOR": return { "url": "http://www.felixcloutier.com/x86/FRSTOR.html", - "html": "<p>Loads the FPU state (operating environment and register stack) from the memory area specified with the source operand. This state data is typically written to the specified memory location by a previous FSAVE/FNSAVE instruction.</p><p>The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, show the layout in memory of the stored environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used. The contents of the FPU register stack are stored in the 80 bytes immediately following the operating environment image.</p><p>The FRSTOR instruction should be executed in the same operating mode as the corresponding FSAVE/FNSAVE instruction.</p><p>If one or more unmasked exception bits are set in the new FPU status word, a floating-point exception will be generated. To avoid raising exceptions when loading a new operating environment, clear all the exception flags in the FPU status word that is being loaded.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Loads the FPU state (operating environment and register stack) from the memory area specified with the source operand. This state data is typically written to the specified memory location by a previous FSAVE/FNSAVE instruction.</p><p>The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, show the layout in memory of the stored environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used. The contents of the FPU register stack are stored in the 80 bytes immediately following the operating environment image.</p><p>The FRSTOR instruction should be executed in the same operating mode as the corresponding FSAVE/FNSAVE instruction.</p><p>If one or more unmasked exception bits are set in the new FPU status word, a floating-point exception will be generated. To avoid raising exceptions when loading a new operating environment, clear all the exception flags in the FPU status word that is being loaded.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Loads the FPU state (operating environment and register stack) from the memory area specified with the source operand. This state data is typically written to the specified memory location by a previous FSAVE/FNSAVE instruction." }; @@ -1123,7 +1123,7 @@ function getAsmOpcode(opcode) { case "FNSAVE": return { "url": "http://www.felixcloutier.com/x86/FSAVE%3AFNSAVE.html", - "html": "<p>Stores the current FPU state (operating environment and register stack) at the specified destination in memory, and then re-initializes the FPU. The FSAVE instruction checks for and handles pending unmasked floating-point exceptions before storing the FPU state; the FNSAVE instruction does not.</p><p>The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, show the layout in memory of the stored environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used. The contents of the FPU register stack are stored in the 80 bytes immediately follow the operating environment image.</p><p>The saved image reflects the state of the FPU after all floating-point instructions preceding the FSAVE/FNSAVE instruction in the instruction stream have been executed.</p><p>After the FPU state has been saved, the FPU is reset to the same default values it is set to with the FINIT/FNINIT instructions (see \u201cFINIT/FNINIT\u2014Initialize Floating-Point Unit\u201d in this chapter).</p><p>The FSAVE/FNSAVE instructions are typically used when the operating system needs to perform a context switch, an exception handler needs to use the FPU, or an application program needs to pass a \u201cclean\u201d FPU to a procedure.</p>", + "html": "<p>Stores the current FPU state (operating environment and register stack) at the specified destination in memory, and then re-initializes the FPU. The FSAVE instruction checks for and handles pending unmasked floating-point exceptions before storing the FPU state; the FNSAVE instruction does not.</p><p>The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, show the layout in memory of the stored environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used. The contents of the FPU register stack are stored in the 80 bytes immediately follow the operating environment image.</p><p>The saved image reflects the state of the FPU after all floating-point instructions preceding the FSAVE/FNSAVE instruction in the instruction stream have been executed.</p><p>After the FPU state has been saved, the FPU is reset to the same default values it is set to with the FINIT/FNINIT instructions (see \u201cFINIT/FNINIT\u2014Initialize Floating-Point Unit\u201d in this chapter).</p><p>The FSAVE/FNSAVE instructions are typically used when the operating system needs to perform a context switch, an exception handler needs to use the FPU, or an application program needs to pass a \u201cclean\u201d FPU to a procedure.</p>", "tooltip": "Stores the current FPU state (operating environment and register stack) at the specified destination in memory, and then re-initializes the FPU. The FSAVE instruction checks for and handles pending unmasked floating-point exceptions before storing the FPU state; the FNSAVE instruction does not." }; @@ -1137,14 +1137,14 @@ function getAsmOpcode(opcode) { case "FSIN": return { "url": "http://www.felixcloutier.com/x86/FSIN.html", - "html": "<p>Computes an approximation of the sine of the source operand in register ST(0) and stores the result in ST(0). The source operand must be given in radians and must be within the range \u22122<sup>63</sup> to +2<sup>63</sup>. The following table shows the results obtained when taking the sine of various classes of numbers, assuming that underflow does not occur.</p><p>If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-of-range conditions. Source values outside the range \u2212 2<sup>63</sup> to +2<sup>63</sup> can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2\u03c0. However, even within the range -2<sup>63</sup> to +2<sup>63</sup>, inaccurate results can occur because the finite approximation of \u03c0 used internally for argument reduction is not sufficient in all cases. Therefore, for accurate results it is safe to apply FSIN only to arguments reduced accurately in software, to a value smaller in absolute value than 3\u03c0/4. See the sections titled \u201cApproximation of Pi\u201d and \u201cTranscendental Instruction Accuracy\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a discussion of the proper value to use for \u03c0 in performing such reductions.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Computes an approximation of the sine of the source operand in register ST(0) and stores the result in ST(0). The source operand must be given in radians and must be within the range \u22122<sup>63</sup> to +2<sup>63</sup>. The following table shows the results obtained when taking the sine of various classes of numbers, assuming that underflow does not occur.</p><p>If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-of-range conditions. Source values outside the range \u2212 2<sup>63</sup> to +2<sup>63</sup> can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2\u03c0. However, even within the range -2<sup>63</sup> to +2<sup>63</sup>, inaccurate results can occur because the finite approximation of \u03c0 used internally for argument reduction is not sufficient in all cases. Therefore, for accurate results it is safe to apply FSIN only to arguments reduced accurately in software, to a value smaller in absolute value than 3\u03c0/4. See the sections titled \u201cApproximation of Pi\u201d and \u201cTranscendental Instruction Accuracy\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a discussion of the proper value to use for \u03c0 in performing such reductions.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Computes an approximation of the sine of the source operand in register ST(0) and stores the result in ST(0). The source operand must be given in radians and must be within the range \u2212263 to +263. The following table shows the results obtained when taking the sine of various classes of numbers, assuming that underflow does not occur." }; case "FSINCOS": return { "url": "http://www.felixcloutier.com/x86/FSINCOS.html", - "html": "<p>Computes both the approximate sine and the cosine of the source operand in register ST(0), stores the sine in ST(0), and pushes the cosine onto the top of the FPU register stack. (This instruction is faster than executing the FSIN and FCOS instructions in succession.)</p><p>The source operand must be given in radians and must be within the range \u22122<sup>63</sup> to +2<sup>63</sup>. The following table shows the results obtained when taking the sine and cosine of various classes of numbers, assuming that underflow does not occur.</p><p>If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-of-range conditions. Source values outside the range \u2212 2<sup>63</sup> to +2<sup>63</sup> can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2\u03c0. However, even within the range -2<sup>63</sup> to +2<sup>63</sup>, inaccurate results can occur because the finite approximation of \u03c0 used internally for argument reduction is not sufficient in all cases. Therefore, for accurate results it is safe to apply FSINCOS only to arguments reduced accurately in software, to a value smaller in absolute value than 3\u03c0/8. See the sections titled \u201cApproximation of Pi\u201d and \u201cTranscendental Instruction Accuracy\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a discussion of the proper value to use for \u03c0 in performing such reductions.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Computes both the approximate sine and the cosine of the source operand in register ST(0), stores the sine in ST(0), and pushes the cosine onto the top of the FPU register stack. (This instruction is faster than executing the FSIN and FCOS instructions in succession.)</p><p>The source operand must be given in radians and must be within the range \u22122<sup>63</sup> to +2<sup>63</sup>. The following table shows the results obtained when taking the sine and cosine of various classes of numbers, assuming that underflow does not occur.</p><p>If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-of-range conditions. Source values outside the range \u2212 2<sup>63</sup> to +2<sup>63</sup> can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2\u03c0. However, even within the range -2<sup>63</sup> to +2<sup>63</sup>, inaccurate results can occur because the finite approximation of \u03c0 used internally for argument reduction is not sufficient in all cases. Therefore, for accurate results it is safe to apply FSINCOS only to arguments reduced accurately in software, to a value smaller in absolute value than 3\u03c0/8. See the sections titled \u201cApproximation of Pi\u201d and \u201cTranscendental Instruction Accuracy\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a discussion of the proper value to use for \u03c0 in performing such reductions.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Computes both the approximate sine and the cosine of the source operand in register ST(0), stores the sine in ST(0), and pushes the cosine onto the top of the FPU register stack. (This instruction is faster than executing the FSIN and FCOS instructions in succession.)" }; @@ -1167,7 +1167,7 @@ function getAsmOpcode(opcode) { case "FNSTCW": return { "url": "http://www.felixcloutier.com/x86/FSTCW%3AFNSTCW.html", - "html": "<p>Stores the current value of the FPU control word at the specified destination in memory. The FSTCW instruction checks for and handles pending unmasked floating-point exceptions before storing the control word; the FNSTCW instruction does not.</p><p>The assembler issues two instructions for the FSTCW instruction (an FWAIT instruction followed by an FNSTCW instruction), and the processor executes each of these instructions in separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>When operating a Pentium or Intel486 processor in MS-DOS compatibility mode, it is possible (under unusual circumstances) for an FNSTCW instruction to be interrupted prior to being executed to handle a pending FPU exception. See the section titled \u201cNo-Wait FPU Instructions Can Get FPU Interrupt in Window\u201d in Appendix D of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of these circumstances. An FNSTCW instruction cannot be interrupted in this way on later Intel processors, except for the Intel Quark<sup>TM</sup> X1000 processor.</p>", + "html": "<p>Stores the current value of the FPU control word at the specified destination in memory. The FSTCW instruction checks for and handles pending unmasked floating-point exceptions before storing the control word; the FNSTCW instruction does not.</p><p>The assembler issues two instructions for the FSTCW instruction (an FWAIT instruction followed by an FNSTCW instruction), and the processor executes each of these instructions in separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>When operating a Pentium or Intel486 processor in MS-DOS compatibility mode, it is possible (under unusual circumstances) for an FNSTCW instruction to be interrupted prior to being executed to handle a pending FPU exception. See the section titled \u201cNo-Wait FPU Instructions Can Get FPU Interrupt in Window\u201d in Appendix D of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of these circumstances. An FNSTCW instruction cannot be interrupted in this way on later Intel processors, except for the Intel Quark<sup>TM</sup> X1000 processor.</p>", "tooltip": "Stores the current value of the FPU control word at the specified destination in memory. The FSTCW instruction checks for and handles pending unmasked floating-point exceptions before storing the control word; the FNSTCW instruction does not." }; @@ -1175,7 +1175,7 @@ function getAsmOpcode(opcode) { case "FNSTENV": return { "url": "http://www.felixcloutier.com/x86/FSTENV%3AFNSTENV.html", - "html": "<p>Saves the current FPU operating environment at the memory location specified with the destination operand, and then masks all floating-point exceptions. The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, show the layout in memory of the stored environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used.</p><p>The FSTENV instruction checks for and handles any pending unmasked floating-point exceptions before storing the FPU environment; the FNSTENV instruction does not. The saved image reflects the state of the FPU after all floating-point instructions preceding the FSTENV/FNSTENV instruction in the instruction stream have been executed.</p><p>These instructions are often used by exception handlers because they provide access to the FPU instruction and data pointers. The environment is typically saved in the stack. Masking all exceptions after saving the environment prevents floating-point exceptions from interrupting the exception handler.</p><p>The assembler issues two instructions for the FSTENV instruction (an FWAIT instruction followed by an FNSTENV instruction), and the processor executes each of these instructions separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Saves the current FPU operating environment at the memory location specified with the destination operand, and then masks all floating-point exceptions. The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, show the layout in memory of the stored environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used.</p><p>The FSTENV instruction checks for and handles any pending unmasked floating-point exceptions before storing the FPU environment; the FNSTENV instruction does not. The saved image reflects the state of the FPU after all floating-point instructions preceding the FSTENV/FNSTENV instruction in the instruction stream have been executed.</p><p>These instructions are often used by exception handlers because they provide access to the FPU instruction and data pointers. The environment is typically saved in the stack. Masking all exceptions after saving the environment prevents floating-point exceptions from interrupting the exception handler.</p><p>The assembler issues two instructions for the FSTENV instruction (an FWAIT instruction followed by an FNSTENV instruction), and the processor executes each of these instructions separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Saves the current FPU operating environment at the memory location specified with the destination operand, and then masks all floating-point exceptions. The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, show the layout in memory of the stored environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used." }; @@ -1183,7 +1183,7 @@ function getAsmOpcode(opcode) { case "FNSTSW": return { "url": "http://www.felixcloutier.com/x86/FSTSW%3AFNSTSW.html", - "html": "<p>Stores the current value of the x87 FPU status word in the destination location. The destination operand can be either a two-byte memory location or the AX register. The FSTSW instruction checks for and handles pending unmasked floating-point exceptions before storing the status word; the FNSTSW instruction does not.</p><p>The FNSTSW AX form of the instruction is used primarily in conditional branching (for instance, after an FPU comparison instruction or an FPREM, FPREM1, or FXAM instruction), where the direction of the branch depends on the state of the FPU condition code flags. (See the section titled \u201cBranching and Conditional Moves on FPU Condition Codes\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.) This instruction can also be used to invoke exception handlers (by examining the exception flags) in environments that do not use interrupts. When the FNSTSW AX instruction is executed, the AX register is updated before the processor executes any further instructions. The status stored in the AX register is thus guaranteed to be from the completion of the prior FPU instruction.</p><p>The assembler issues two instructions for the FSTSW instruction (an FWAIT instruction followed by an FNSTSW instruction), and the processor executes each of these instructions separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>When operating a Pentium or Intel486 processor in MS-DOS compatibility mode, it is possible (under unusual circumstances) for an FNSTSW instruction to be interrupted prior to being executed to handle a pending FPU exception. See the section titled \u201cNo-Wait FPU Instructions Can Get FPU Interrupt in Window\u201d in Appendix D of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of these circumstances. An FNSTSW instruction cannot be interrupted in this way on later Intel processors, except for the Intel Quark<sup>TM</sup> X1000 processor.</p>", + "html": "<p>Stores the current value of the x87 FPU status word in the destination location. The destination operand can be either a two-byte memory location or the AX register. The FSTSW instruction checks for and handles pending unmasked floating-point exceptions before storing the status word; the FNSTSW instruction does not.</p><p>The FNSTSW AX form of the instruction is used primarily in conditional branching (for instance, after an FPU comparison instruction or an FPREM, FPREM1, or FXAM instruction), where the direction of the branch depends on the state of the FPU condition code flags. (See the section titled \u201cBranching and Conditional Moves on FPU Condition Codes\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.) This instruction can also be used to invoke exception handlers (by examining the exception flags) in environments that do not use interrupts. When the FNSTSW AX instruction is executed, the AX register is updated before the processor executes any further instructions. The status stored in the AX register is thus guaranteed to be from the completion of the prior FPU instruction.</p><p>The assembler issues two instructions for the FSTSW instruction (an FWAIT instruction followed by an FNSTSW instruction), and the processor executes each of these instructions separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>When operating a Pentium or Intel486 processor in MS-DOS compatibility mode, it is possible (under unusual circumstances) for an FNSTSW instruction to be interrupted prior to being executed to handle a pending FPU exception. See the section titled \u201cNo-Wait FPU Instructions Can Get FPU Interrupt in Window\u201d in Appendix D of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of these circumstances. An FNSTSW instruction cannot be interrupted in this way on later Intel processors, except for the Intel Quark<sup>TM</sup> X1000 processor.</p>", "tooltip": "Stores the current value of the x87 FPU status word in the destination location. The destination operand can be either a two-byte memory location or the AX register. The FSTSW instruction checks for and handles pending unmasked floating-point exceptions before storing the status word; the FNSTSW instruction does not." }; @@ -1192,7 +1192,7 @@ function getAsmOpcode(opcode) { case "FISUB": return { "url": "http://www.felixcloutier.com/x86/FSUB%3AFSUBP%3AFISUB.html", - "html": "<p>Subtracts the source operand from the destination operand and stores the difference in the destination location. The destination operand is always an FPU data register; the source operand can be a register or a memory location. Source operands in memory can be in single-precision or double-precision floating-point format or in word or doubleword integer format.</p><p>The no-operand version of the instruction subtracts the contents of the ST(0) register from the ST(1) register and stores the result in ST(1). The one-operand version subtracts the contents of a memory location (either a floating-point or an integer value) from the contents of the ST(0) register and stores the result in ST(0). The two-operand version, subtracts the contents of the ST(0) register from the ST(i) register or vice versa.</p><p>The FSUBP instructions perform the additional operation of popping the FPU register stack following the subtraction. To pop the register stack, the processor marks the ST(0) register as empty and increments the stack pointer (TOP) by 1. The no-operand version of the floating-point subtract instructions always results in the register stack being popped. In some assemblers, the mnemonic for this instruction is FSUB rather than FSUBP.</p><p>The FISUB instructions convert an integer source operand to double extended-precision floating-point format before performing the subtraction.</p><p>Table 3-38 shows the results obtained when subtracting various classes of numbers from one another, assuming that neither overflow nor underflow occurs. Here, the SRC value is subtracted from the DEST value (DEST \u2212 SRC = result).</p>", + "html": "<p>Subtracts the source operand from the destination operand and stores the difference in the destination location. The destination operand is always an FPU data register; the source operand can be a register or a memory location. Source operands in memory can be in single-precision or double-precision floating-point format or in word or doubleword integer format.</p><p>The no-operand version of the instruction subtracts the contents of the ST(0) register from the ST(1) register and stores the result in ST(1). The one-operand version subtracts the contents of a memory location (either a floating-point or an integer value) from the contents of the ST(0) register and stores the result in ST(0). The two-operand version, subtracts the contents of the ST(0) register from the ST(i) register or vice versa.</p><p>The FSUBP instructions perform the additional operation of popping the FPU register stack following the subtraction. To pop the register stack, the processor marks the ST(0) register as empty and increments the stack pointer (TOP) by 1. The no-operand version of the floating-point subtract instructions always results in the register stack being popped. In some assemblers, the mnemonic for this instruction is FSUB rather than FSUBP.</p><p>The FISUB instructions convert an integer source operand to double extended-precision floating-point format before performing the subtraction.</p><p><a href=\"./FSUB:FSUBP:FISUB.html#tbl-3-38\">Table 3-38</a> shows the results obtained when subtracting various classes of numbers from one another, assuming that neither overflow nor underflow occurs. Here, the SRC value is subtracted from the DEST value (DEST \u2212 SRC = result).</p>", "tooltip": "Subtracts the source operand from the destination operand and stores the difference in the destination location. The destination operand is always an FPU data register; the source operand can be a register or a memory location. Source operands in memory can be in single-precision or double-precision floating-point format or in word or doubleword integer format." }; @@ -1238,29 +1238,29 @@ function getAsmOpcode(opcode) { case "FXRSTOR": return { "url": "http://www.felixcloutier.com/x86/FXRSTOR.html", - "html": "<p>Reloads the x87 FPU, MMX technology, XMM, and MXCSR registers from the 512-byte memory image specified in the source operand. This data should have been written to memory previously using the FXSAVE instruction, and in the same format as required by the operating modes. The first byte of the data should be located on a 16-byte boundary. There are three distinct layouts of the FXSAVE state map: one for legacy and compatibility mode, a second format for 64-bit mode FXSAVE/FXRSTOR with REX.W=0, and the third format is for 64-bit mode with FXSAVE64/FXRSTOR64. Table 3-43 shows the layout of the legacy/compatibility mode state information in memory and describes the fields in the memory image for the FXRSTOR and FXSAVE instructions. Table 3-46 shows the layout of the 64-bit mode state information when REX.W is set (FXSAVE64/FXRSTOR64). Table 3-47 shows the layout of the 64-bit mode state information when REX.W is clear (FXSAVE/FXRSTOR).</p><p>The state image referenced with an FXRSTOR instruction must have been saved using an FXSAVE instruction or be in the same format as required by Table 3-43, Table 3-46, or Table 3-47. Referencing a state image saved with an FSAVE, FNSAVE instruction or incompatible field layout will result in an incorrect state restoration.</p><p>The FXRSTOR instruction does not flush pending x87 FPU exceptions. To check and raise exceptions when loading x87 FPU state information with the FXRSTOR instruction, use an FWAIT instruction after the FXRSTOR instruction.</p><p>If the OSFXSR bit in control register CR4 is not set, the FXRSTOR instruction may not restore the states of the XMM and MXCSR registers. This behavior is implementation dependent.</p><p>If the MXCSR state contains an unmasked exception with a corresponding status flag also set, loading the register with the FXRSTOR instruction will not result in a SIMD floating-point error condition being generated. Only the next occurrence of this unmasked exception will result in the exception being generated.</p>", + "html": "<p>Reloads the x87 FPU, MMX technology, XMM, and MXCSR registers from the 512-byte memory image specified in the source operand. This data should have been written to memory previously using the FXSAVE instruction, and in the same format as required by the operating modes. The first byte of the data should be located on a 16-byte boundary. There are three distinct layouts of the FXSAVE state map: one for legacy and compatibility mode, a second format for 64-bit mode FXSAVE/FXRSTOR with REX.W=0, and the third format is for 64-bit mode with FXSAVE64/FXRSTOR64. <a href=\"./FXSAVE.html#tbl-3-43\">Table 3-43</a> shows the layout of the legacy/compatibility mode state information in memory and describes the fields in the memory image for the FXRSTOR and FXSAVE instructions. <a href=\"./FXSAVE.html#tbl-3-46\">Table 3-46</a> shows the layout of the 64-bit mode state information when REX.W is set (FXSAVE64/FXRSTOR64). <a href=\"./FXSAVE.html#tbl-3-47\">Table 3-47</a> shows the layout of the 64-bit mode state information when REX.W is clear (FXSAVE/FXRSTOR).</p><p>The state image referenced with an FXRSTOR instruction must have been saved using an FXSAVE instruction or be in the same format as required by <a href=\"./FXSAVE.html#tbl-3-43\">Table 3-43</a>, <a href=\"./FXSAVE.html#tbl-3-46\">Table 3-46</a>, or <a href=\"./FXSAVE.html#tbl-3-47\">Table 3-47</a>. Referencing a state image saved with an FSAVE, FNSAVE instruction or incompatible field layout will result in an incorrect state restoration.</p><p>The FXRSTOR instruction does not flush pending x87 FPU exceptions. To check and raise exceptions when loading x87 FPU state information with the FXRSTOR instruction, use an FWAIT instruction after the FXRSTOR instruction.</p><p>If the OSFXSR bit in control register CR4 is not set, the FXRSTOR instruction may not restore the states of the XMM and MXCSR registers. This behavior is implementation dependent.</p><p>If the MXCSR state contains an unmasked exception with a corresponding status flag also set, loading the register with the FXRSTOR instruction will not result in a SIMD floating-point error condition being generated. Only the next occurrence of this unmasked exception will result in the exception being generated.</p>", "tooltip": "Reloads the x87 FPU, MMX technology, XMM, and MXCSR registers from the 512-byte memory image specified in the source operand. This data should have been written to memory previously using the FXSAVE instruction, and in the same format as required by the operating modes. The first byte of the data should be located on a 16-byte boundary. There are three distinct layouts of the FXSAVE state map: one for legacy and compatibility mode, a second format for 64-bit mode FXSAVE/FXRSTOR with REX.W=0, and the third format is for 64-bit mode with FXSAVE64/FXRSTOR64. Table 3-43 shows the layout of the legacy/compatibility mode state information in memory and describes the fields in the memory image for the FXRSTOR and FXSAVE instructions. Table 3-46 shows the layout of the 64-bit mode state information when REX.W is set (FXSAVE64/FXRSTOR64). Table 3-47 shows the layout of the 64-bit mode state information when REX.W is clear (FXSAVE/FXRSTOR)." }; case "FXSAVE": return { "url": "http://www.felixcloutier.com/x86/FXSAVE.html", - "html": "<p>Saves the current state of the x87 FPU, MMX technology, XMM, and MXCSR registers to a 512-byte memory location specified in the destination operand. The content layout of the 512 byte region depends on whether the processor is operating in non-64-bit operating modes or 64-bit sub-mode of IA-32e mode.</p><p>Bytes 464:511 are available to software use. The processor does not write to bytes 464:511 of an FXSAVE area.</p><p>The operation of FXSAVE in non-64-bit modes is described first.</p><p>Table 3-43 shows the layout of the state information in memory when the processor is operating in legacy modes.</p><p>The destination operand contains the first byte of the memory image, and it must be aligned on a 16-byte boundary. A misaligned destination operand will result in a general-protection (#GP) exception being generated (or in some cases, an alignment check exception [#AC]).</p>", + "html": "<p>Saves the current state of the x87 FPU, MMX technology, XMM, and MXCSR registers to a 512-byte memory location specified in the destination operand. The content layout of the 512 byte region depends on whether the processor is operating in non-64-bit operating modes or 64-bit sub-mode of IA-32e mode.</p><p>Bytes 464:511 are available to software use. The processor does not write to bytes 464:511 of an FXSAVE area.</p><p>The operation of FXSAVE in non-64-bit modes is described first.</p><p><a href=\"./FXSAVE.html#tbl-3-43\">Table 3-43</a> shows the layout of the state information in memory when the processor is operating in legacy modes.</p><p>The destination operand contains the first byte of the memory image, and it must be aligned on a 16-byte boundary. A misaligned destination operand will result in a general-protection (#GP) exception being generated (or in some cases, an alignment check exception [#AC]).</p>", "tooltip": "Saves the current state of the x87 FPU, MMX technology, XMM, and MXCSR registers to a 512-byte memory location specified in the destination operand. The content layout of the 512 byte region depends on whether the processor is operating in non-64-bit operating modes or 64-bit sub-mode of IA-32e mode." }; case "FXTRACT": return { "url": "http://www.felixcloutier.com/x86/FXTRACT.html", - "html": "<p>Separates the source value in the ST(0) register into its exponent and significand, stores the exponent in ST(0), and pushes the significand onto the register stack. Following this operation, the new top-of-stack register ST(0) contains the value of the original significand expressed as a floating-point value. The sign and significand of this value are the same as those found in the source operand, and the exponent is 3FFFH (biased value for a true exponent of zero). The ST(1) register contains the value of the original operand\u2019s true (unbiased) exponent expressed as a floating-point value. (The operation performed by this instruction is a superset of the IEEE-recommended logb(<em>x</em>) function.)</p><p>This instruction and the F2XM1 instruction are useful for performing power and range scaling operations. The FXTRACT instruction is also useful for converting numbers in double extended-precision floating-point format to decimal representations (e.g., for printing or displaying).</p><p>If the floating-point zero-divide exception (#Z) is masked and the source operand is zero, an exponent value of \u2013\u221e is stored in register ST(1) and 0 with the sign of the source operand is stored in register ST(0).</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Separates the source value in the ST(0) register into its exponent and significand, stores the exponent in ST(0), and pushes the significand onto the register stack. Following this operation, the new top-of-stack register ST(0) contains the value of the original significand expressed as a floating-point value. The sign and significand of this value are the same as those found in the source operand, and the exponent is 3FFFH (biased value for a true exponent of zero). The ST(1) register contains the value of the original operand\u2019s true (unbiased) exponent expressed as a floating-point value. (The operation performed by this instruction is a superset of the IEEE-recommended logb(<em>x</em>) function.)</p><p>This instruction and the F2XM1 instruction are useful for performing power and range scaling operations. The FXTRACT instruction is also useful for converting numbers in double extended-precision floating-point format to decimal representations (e.g., for printing or displaying).</p><p>If the floating-point zero-divide exception (#Z) is masked and the source operand is zero, an exponent value of \u2013 \u221e is stored in register ST(1) and 0 with the sign of the source operand is stored in register ST(0).</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Separates the source value in the ST(0) register into its exponent and significand, stores the exponent in ST(0), and pushes the significand onto the register stack. Following this operation, the new top-of-stack register ST(0) contains the value of the original significand expressed as a floating-point value. The sign and significand of this value are the same as those found in the source operand, and the exponent is 3FFFH (biased value for a true exponent of zero). The ST(1) register contains the value of the original operand\u2019s true (unbiased) exponent expressed as a floating-point value. (The operation performed by this instruction is a superset of the IEEE-recommended logb(x) function.)" }; case "FYL2X": return { "url": "http://www.felixcloutier.com/x86/FYL2X.html", - "html": "<p>Computes (ST(1) \u2217 log<sub>2</sub> (ST(0))), stores the result in resister ST(1), and pops the FPU register stack. The source operand in ST(0) must be a non-zero positive number.</p><p>The following table shows the results obtained when taking the log of various classes of numbers, assuming that neither overflow nor underflow occurs.</p><p>If the divide-by-zero exception is masked and register ST(0) contains \u00b10, the instruction returns \u221e with a sign that is the opposite of the sign of the source operand in register ST(1).</p><p>The FYL2X instruction is designed with a built-in multiplication to optimize the calculation of logarithms with an arbitrary positive base (b):</p><p>log<sub>b</sub>x \u2190 (log<sub>2</sub>b)<sup>\u20131</sup> \u2217 log<sub>2</sub>x</p>", - "tooltip": "Computes (ST(1) \u2217 log2 (ST(0))), stores the result in resister ST(1), and pops the FPU register stack. The source operand in ST(0) must be a non-zero positive number." + "html": "<p>Computes (ST(1) \u2217 log<sub>2</sub> (ST(0))), stores the result in register ST(1), and pops the FPU register stack. The source operand in ST(0) must be a non-zero positive number.</p><p>The following table shows the results obtained when taking the log of various classes of numbers, assuming that neither overflow nor underflow occurs.</p><p>If the divide-by-zero exception is masked and register ST(0) contains \u00b10, the instruction returns \u221e with a sign that is the opposite of the sign of the source operand in register ST(1).</p><p>The FYL2X instruction is designed with a built-in multiplication to optimize the calculation of logarithms with an arbitrary positive base (b):</p><p>log<sub>b</sub>x \u2190 (log<sub>2</sub>b)<sup>\u20131</sup> \u2217 log<sub>2</sub>x</p>", + "tooltip": "Computes (ST(1) \u2217 log2 (ST(0))), stores the result in register ST(1), and pops the FPU register stack. The source operand in ST(0) must be a non-zero positive number." }; case "FYL2XP1": @@ -1274,7 +1274,7 @@ function getAsmOpcode(opcode) { case "VHADDPD": return { "url": "http://www.felixcloutier.com/x86/HADDPD.html", - "html": "<p>Adds the double-precision floating-point values in the high and low quadwords of the destination operand and stores the result in the low quadword of the destination operand.</p><p>Adds the double-precision floating-point values in the high and low quadwords of the source operand and stores the result in the high quadword of the destination operand.</p><p>In 64-bit mode, use of the REX.R prefix permits this instruction to access additional registers (XMM8-XMM15).</p><p>See Figure 3-16 for HADDPD; see Figure 3-17 for VHADDPD.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p>", + "html": "<p>Adds the double-precision floating-point values in the high and low quadwords of the destination operand and stores the result in the low quadword of the destination operand.</p><p>Adds the double-precision floating-point values in the high and low quadwords of the source operand and stores the result in the high quadword of the destination operand.</p><p>In 64-bit mode, use of the REX.R prefix permits this instruction to access additional registers (XMM8-XMM15).</p><p>See <a href=\"./HADDPD.html#fig-3-16\">Figure 3-16</a> for HADDPD; see <a href=\"./HADDPD.html#fig-3-17\">Figure 3-17</a> for VHADDPD.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p>", "tooltip": "Adds the double-precision floating-point values in the high and low quadwords of the destination operand and stores the result in the low quadword of the destination operand." }; @@ -1297,7 +1297,7 @@ function getAsmOpcode(opcode) { case "VHSUBPD": return { "url": "http://www.felixcloutier.com/x86/HSUBPD.html", - "html": "<p>The HSUBPD instruction subtracts horizontally the packed DP FP numbers of both operands.</p><p>Subtracts the double-precision floating-point value in the high quadword of the destination operand from the low quadword of the destination operand and stores the result in the low quadword of the destination operand.</p><p>Subtracts the double-precision floating-point value in the high quadword of the source operand from the low quadword of the source operand and stores the result in the high quadword of the destination operand.</p><p>In 64-bit mode, use of the REX.R prefix permits this instruction to access additional registers (XMM8-XMM15).</p><p>See Figure 3-20 for HSUBPD; see Figure 3-21 for VHSUBPD.</p>", + "html": "<p>The HSUBPD instruction subtracts horizontally the packed DP FP numbers of both operands.</p><p>Subtracts the double-precision floating-point value in the high quadword of the destination operand from the low quadword of the destination operand and stores the result in the low quadword of the destination operand.</p><p>Subtracts the double-precision floating-point value in the high quadword of the source operand from the low quadword of the source operand and stores the result in the high quadword of the destination operand.</p><p>In 64-bit mode, use of the REX.R prefix permits this instruction to access additional registers (XMM8-XMM15).</p><p>See <a href=\"./HSUBPD.html#fig-3-20\">Figure 3-20</a> for HSUBPD; see <a href=\"./HSUBPD.html#fig-3-21\">Figure 3-21</a> for VHSUBPD.</p>", "tooltip": "The HSUBPD instruction subtracts horizontally the packed DP FP numbers of both operands." }; @@ -1312,7 +1312,7 @@ function getAsmOpcode(opcode) { case "IDIV": return { "url": "http://www.felixcloutier.com/x86/IDIV.html", - "html": "<p>Divides the (signed) value in the AX, DX:AX, or EDX:EAX (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, or EDX:EAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor).</p><p>Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magnitude. Overflow is indicated with the #DE (divide error) exception rather than with the CF flag.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. In 64-bit mode when REX.W is applied, the instruction divides the signed value in RDX:RAX by the source operand. RAX contains a 64-bit quotient; RDX contains a 64-bit remainder.</p><p>See the summary chart at the beginning of this section for encoding data and limits. See Table 3-50.</p>", + "html": "<p>Divides the (signed) value in the AX, DX:AX, or EDX:EAX (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, or EDX:EAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor).</p><p>Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magnitude. Overflow is indicated with the #DE (divide error) exception rather than with the CF flag.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. In 64-bit mode when REX.W is applied, the instruction divides the signed value in RDX:RAX by the source operand. RAX contains a 64-bit quotient; RDX contains a 64-bit remainder.</p><p>See the summary chart at the beginning of this section for encoding data and limits. See <a href=\"./IDIV.html#tbl-3-51\">Table 3-51</a>.</p>", "tooltip": "Divides the (signed) value in the AX, DX:AX, or EDX:EAX (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, or EDX:EAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor)." }; @@ -1326,7 +1326,7 @@ function getAsmOpcode(opcode) { case "IN": return { "url": "http://www.felixcloutier.com/x86/IN.html", - "html": "<p>Copies the value from the I/O port specified with the second operand (source operand) to the destination operand (first operand). The source operand can be a byte-immediate or the DX register; the destination operand can be register AL, AX, or EAX, depending on the size of the port being accessed (8, 16, or 32 bits, respectively). Using the DX register as a source operand allows I/O port addresses from 0 to 65,535 to be accessed; using a byte immediate allows I/O port addresses 0 to 255 to be accessed.</p><p>When accessing an 8-bit I/O port, the opcode determines the port size; when accessing a 16- and 32-bit I/O port, the operand-size attribute determines the port size. At the machine code level, I/O instructions are shorter when accessing 8-bit I/O ports. Here, the upper eight bits of the port address will be 0.</p><p>This instruction is only useful for accessing I/O ports located in the processor\u2019s I/O address space. See Chapter 18, \u201cInput/Output,\u201d in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for more information on accessing I/O ports in the I/O address space.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Copies the value from the I/O port specified with the second operand (source operand) to the destination operand (first operand). The source operand can be a byte-immediate or the DX register; the destination operand can be register AL, AX, or EAX, depending on the size of the port being accessed (8, 16, or 32 bits, respectively). Using the DX register as a source operand allows I/O port addresses from 0 to 65,535 to be accessed; using a byte immediate allows I/O port addresses 0 to 255 to be accessed.</p><p>When accessing an 8-bit I/O port, the opcode determines the port size; when accessing a 16- and 32-bit I/O port, the operand-size attribute determines the port size. At the machine code level, I/O instructions are shorter when accessing 8-bit I/O ports. Here, the upper eight bits of the port address will be 0.</p><p>This instruction is only useful for accessing I/O ports located in the processor\u2019s I/O address space. See Chapter 18, \u201cInput/Output,\u201d in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for more information on accessing I/O ports in the I/O address space.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Copies the value from the I/O port specified with the second operand (source operand) to the destination operand (first operand). The source operand can be a byte-immediate or the DX register; the destination operand can be register AL, AX, or EAX, depending on the size of the port being accessed (8, 16, or 32 bits, respectively). Using the DX register as a source operand allows I/O port addresses from 0 to 65,535 to be accessed; using a byte immediate allows I/O port addresses 0 to 255 to be accessed." }; @@ -1343,7 +1343,7 @@ function getAsmOpcode(opcode) { case "INS": return { "url": "http://www.felixcloutier.com/x86/INS%3AINSB%3AINSW%3AINSD.html", - "html": "<p>Copies the data from the I/O port specified with the source operand (second operand) to the destination operand (first operand). The source operand is an I/O port address (from 0 to 65,535) that is read from the DX register. The destination operand is a memory location, the address of which is read from either the ES:DI, ES:EDI or the RDI registers (depending on the address-size attribute of the instruction, 16, 32 or 64, respectively). (The ES segment cannot be overridden with a segment override prefix.) The size of the I/O port being accessed (that is, the size of the source and destination operands) is determined by the opcode for an 8-bit I/O port or by the operand-size attribute of the instruction for a 16- or 32-bit I/O port.</p><p>At the assembly-code level, two forms of this instruction are allowed: the \u201cexplicit-operands\u201d form and the \u201cno-operands\u201d form. The explicit-operands form (specified with the INS mnemonic) allows the source and destination operands to be specified explicitly. Here, the source operand must be \u201cDX,\u201d and the destination operand should be a symbol that indicates the size of the I/O port and the destination address. This explicit-operands form is provided to allow documentation; however, note that the documentation provided by this form can be misleading. That is, the destination operand symbol must specify the correct <strong>type</strong> (size) of the operand (byte, word, or doubleword), but it does not have to specify the correct <strong>location</strong>. The location is always specified by the ES:(E)DI registers, which must be loaded correctly before the INS instruction is executed.</p><p>The no-operands form provides \u201cshort forms\u201d of the byte, word, and doubleword versions of the INS instructions. Here also DX is assumed by the processor to be the source operand and ES:(E)DI is assumed to be the destination operand. The size of the I/O port is specified with the choice of mnemonic: INSB (byte), INSW (word), or INSD (doubleword).</p><p>After the byte, word, or doubleword is transfer from the I/O port to the memory location, the DI/EDI/RDI register is incremented or decremented automatically according to the setting of the DF flag in the EFLAGS register. (If the DF flag is 0, the (E)DI register is incremented; if the DF flag is 1, the (E)DI register is decremented.) The (E)DI register is incremented or decremented by 1 for byte operations, by 2 for word operations, or by 4 for doubleword operations.</p><p>The INS, INSB, INSW, and INSD instructions can be preceded by the REP prefix for block input of ECX bytes, words, or doublewords. See \u201cREP/REPE/REPZ /REPNE/REPNZ\u2014Repeat String Operation Prefix\u201d in Chapter 4 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2B</em>, for a description of the REP prefix.</p>", + "html": "<p>Copies the data from the I/O port specified with the source operand (second operand) to the destination operand (first operand). The source operand is an I/O port address (from 0 to 65,535) that is read from the DX register. The destination operand is a memory location, the address of which is read from either the ES:DI, ES:EDI or the RDI registers (depending on the address-size attribute of the instruction, 16, 32 or 64, respectively). (The ES segment cannot be overridden with a segment override prefix.) The size of the I/O port being accessed (that is, the size of the source and destination operands) is determined by the opcode for an 8-bit I/O port or by the operand-size attribute of the instruction for a 16- or 32-bit I/O port.</p><p>At the assembly-code level, two forms of this instruction are allowed: the \u201cexplicit-operands\u201d form and the \u201cno-operands\u201d form. The explicit-operands form (specified with the INS mnemonic) allows the source and destination operands to be specified explicitly. Here, the source operand must be \u201cDX,\u201d and the destination operand should be a symbol that indicates the size of the I/O port and the destination address. This explicit-operands form is provided to allow documentation; however, note that the documentation provided by this form can be misleading. That is, the destination operand symbol must specify the correct <strong>type</strong> (size) of the operand (byte, word, or doubleword), but it does not have to specify the correct <strong>location</strong>. The location is always specified by the ES:(E)DI registers, which must be loaded correctly before the INS instruction is executed.</p><p>The no-operands form provides \u201cshort forms\u201d of the byte, word, and doubleword versions of the INS instructions. Here also DX is assumed by the processor to be the source operand and ES:(E)DI is assumed to be the destination operand. The size of the I/O port is specified with the choice of mnemonic: INSB (byte), INSW (word), or INSD (doubleword).</p><p>After the byte, word, or doubleword is transfer from the I/O port to the memory location, the DI/EDI/RDI register is incremented or decremented automatically according to the setting of the DF flag in the EFLAGS register. (If the DF flag is 0, the (E)DI register is incremented; if the DF flag is 1, the (E)DI register is decremented.) The (E)DI register is incremented or decremented by 1 for byte operations, by 2 for word operations, or by 4 for doubleword operations.</p><p>The INS, INSB, INSW, and INSD instructions can be preceded by the REP prefix for block input of ECX bytes, words, or doublewords. See \u201cREP/REPE/REPZ /REPNE/REPNZ\u2014Repeat String Operation Prefix\u201d in Chapter 4 of the <em>Intel<sup>\u00ae</sup></em> <em>64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2B</em>, for a description of the REP prefix.</p>", "tooltip": "Copies the data from the I/O port specified with the source operand (second operand) to the destination operand (first operand). The source operand is an I/O port address (from 0 to 65,535) that is read from the DX register. The destination operand is a memory location, the address of which is read from either the ES:DI, ES:EDI or the RDI registers (depending on the address-size attribute of the instruction, 16, 32 or 64, respectively). (The ES segment cannot be overridden with a segment override prefix.) The size of the I/O port being accessed (that is, the size of the source and destination operands) is determined by the opcode for an 8-bit I/O port or by the operand-size attribute of the instruction for a 16- or 32-bit I/O port." }; @@ -1357,9 +1357,11 @@ function getAsmOpcode(opcode) { case "INT": case "INTO": + case "INT1": + case "INT3": return { - "url": "http://www.felixcloutier.com/x86/INTn%3AINTO%3AINT3.html", - "html": "<p>The INT <em>n</em> instruction generates a call to the interrupt or exception handler specified with the destination operand (see the section titled \u201cInterrupts and Exceptions\u201d in Chapter 6 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>). The destination operand specifies a vector from 0 to 255, encoded as an 8-bit unsigned intermediate value. Each vector provides an index to a gate descriptor in the IDT. The first 32 vectors are reserved by Intel for system use. Some of these vectors are used for internally generated exceptions.</p><p>The INT <em>n</em> instruction is the general mnemonic for executing a software-generated call to an interrupt handler. The INTO instruction is a special mnemonic for calling overflow exception (#OF), exception 4. The overflow interrupt checks the OF flag in the EFLAGS register and calls the overflow interrupt handler if the OF flag is set to 1. (The INTO instruction cannot be used in 64-bit mode.)</p><p>The INT 3 instruction generates a special one byte opcode (CC) that is intended for calling the debug exception handler. (This one byte form is valuable because it can be used to replace the first byte of any instruction with a breakpoint, including other one byte instructions, without over-writing other code).</p><p>An interrupt generated by INTO or INT3 (CC) differs from one generated by INT <em>n</em> in the following ways:</p><p>(These features do not pertain to CD03, the \u201cnormal\u201d 2-byte opcode for INT 3. Intel and Microsoft assemblers will not generate the CD03 opcode from any mnemonic, but this opcode can be created by direct numeric code definition or by self-modifying code.)</p>", + "url": "http://www.felixcloutier.com/x86/INTn%3AINTO%3AINT3%3AINT1.html", + "html": "<p>The INT <em>n</em> instruction generates a call to the interrupt or exception handler specified with the destination operand (see the section titled \u201cInterrupts and Exceptions\u201d in Chapter 6 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>). The destination operand specifies a vector from 0 to 255, encoded as an 8-bit unsigned intermediate value. Each vector provides an index to a gate descriptor in the IDT. The first 32 vectors are reserved by Intel for system use. Some of these vectors are used for internally generated exceptions.</p><p>The INT <em>n</em> instruction is the general mnemonic for executing a software-generated call to an interrupt handler. The INTO instruction is a special mnemonic for calling overflow exception (#OF), exception 4. The overflow interrupt checks the OF flag in the EFLAGS register and calls the overflow interrupt handler if the OF flag is set to 1. (The INTO instruction cannot be used in 64-bit mode.)</p><p>The INT3 instruction uses a one-byte opcode (CC) and is intended for calling the debug exception handler with a breakpoint exception (#BP). (This one-byte form is useful because it can replace the first byte of any instruction at which a breakpoint is desired, including other one-byte instructions, without overwriting other instructions.)</p><p>The INT1 instruction also uses a one-byte opcode (F1) and generates a debug exception (#DB) without setting any bits in DR6.<sup>1</sup> Hardware vendors may use the INT1 instruction for hardware debug. For that reason, Intel recommends software vendors instead use the INT3 instruction for software breakpoints.</p><p>An interrupt generated by the INTO, INT3, or INT1 instruction differs from one generated by INT <em>n</em> in the following ways:</p>", "tooltip": "The INT n instruction generates a call to the interrupt or exception handler specified with the destination operand (see the section titled \u201cInterrupts and Exceptions\u201d in Chapter 6 of the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1). The destination operand specifies a vector from 0 to 255, encoded as an 8-bit unsigned intermediate value. Each vector provides an index to a gate descriptor in the IDT. The first 32 vectors are reserved by Intel for system use. Some of these vectors are used for internally generated exceptions." }; @@ -1373,7 +1375,7 @@ function getAsmOpcode(opcode) { case "INVPCID": return { "url": "http://www.felixcloutier.com/x86/INVPCID.html", - "html": "<p>Invalidates mappings in the translation lookaside buffers (TLBs) and paging-structure caches based on process-context identifier (PCID). (See Section 4.10, \u201cCaching Translation Information,\u201d in <em>Intel 64 and IA-32 Architecture Software Developer\u2019s Manual, Volume 3A</em>.) Invalidation is based on the INVPCID type specified in the register operand and the INVPCID descriptor specified in the memory operand.</p><p>Outside 64-bit mode, the register operand is always 32 bits, regardless of the value of CS.D. In 64-bit mode the register operand has 64 bits.</p><p>There are four INVPCID types currently defined:</p><p>The INVPCID descriptor comprises 128 bits and consists of a PCID and a linear address as shown in Figure 3-24. For INVPCID type 0, the processor uses the full 64 bits of the linear address even outside 64-bit mode; the linear address is not used for other INVPCID types.</p><p>If CR4.PCIDE = 0, a logical processor does not cache information for any PCID other than 000H. In this case, executions with INVPCID types 0 and 1 are allowed only if the PCID specified in the INVPCID descriptor is 000H; executions with INVPCID types 2 and 3 invalidate mappings only for PCID 000H. Note that CR4.PCIDE must be 0 outside 64-bit mode (see Chapter 4.10.1, \u201cProcess-Context Identifiers (PCIDs)\u201a\u201d of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>).</p>", + "html": "<p>Invalidates mappings in the translation lookaside buffers (TLBs) and paging-structure caches based on process-context identifier (PCID). (See Section 4.10, \u201cCaching Translation Information,\u201d in <em>Intel 64 and IA-32 Architecture Software Developer\u2019s Manual, Volume 3A</em>.) Invalidation is based on the INVPCID type specified in the register operand and the INVPCID descriptor specified in the memory operand.</p><p>Outside 64-bit mode, the register operand is always 32 bits, regardless of the value of CS.D. In 64-bit mode the register operand has 64 bits.</p><p>There are four INVPCID types currently defined:</p><p>The INVPCID descriptor comprises 128 bits and consists of a PCID and a linear address as shown in <a href=\"./INVPCID.html#fig-3-24\">Figure 3-24</a>. For INVPCID type 0, the processor uses the full 64 bits of the linear address even outside 64-bit mode; the linear address is not used for other INVPCID types.</p><p>If CR4.PCIDE = 0, a logical processor does not cache information for any PCID other than 000H. In this case, executions with INVPCID types 0 and 1 are allowed only if the PCID specified in the INVPCID descriptor is 000H; executions with INVPCID types 2 and 3 invalidate mappings only for PCID 000H. Note that CR4.PCIDE must be 0 outside 64-bit mode (see Chapter 4.10.1, \u201cProcess-Context Identifiers (PCIDs)\u201a\u201d of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>).</p>", "tooltip": "Invalidates mappings in the translation lookaside buffers (TLBs) and paging-structure caches based on process-context identifier (PCID). (See Section 4.10, \u201cCaching Translation Information,\u201d in Intel 64 and IA-32 Architecture Software Developer\u2019s Manual, Volume 3A.) Invalidation is based on the INVPCID type specified in the register operand and the INVPCID descriptor specified in the memory operand." }; @@ -1382,14 +1384,14 @@ function getAsmOpcode(opcode) { case "IRETQ": return { "url": "http://www.felixcloutier.com/x86/IRET%3AIRETD.html", - "html": "<p>Returns program control from an exception or interrupt handler to a program or procedure that was interrupted by an exception, an external interrupt, or a software-generated interrupt. These instructions are also used to perform a return from a nested task. (A nested task is created when a CALL instruction is used to initiate a task switch or when an interrupt or exception causes a task switch to an interrupt or exception handler.) See the section titled \u201cTask Linking\u201d in Chapter 7 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>.</p><p>IRET and IRETD are mnemonics for the same opcode. The IRETD mnemonic (interrupt return double) is intended for use when returning from an interrupt when using the 32-bit operand size; however, most assemblers use the IRET mnemonic interchangeably for both operand sizes.</p><p>In Real-Address Mode, the IRET instruction preforms a far return to the interrupted program or procedure. During this operation, the processor pops the return instruction pointer, return code segment selector, and EFLAGS image from the stack to the EIP, CS, and EFLAGS registers, respectively, and then resumes execution of the interrupted program or procedure.</p><p>In Protected Mode, the action of the IRET instruction depends on the settings of the NT (nested task) and VM flags in the EFLAGS register and the VM flag in the EFLAGS image stored on the current stack. Depending on the setting of these flags, the processor performs the following types of interrupt returns:</p><p>If the NT flag (EFLAGS register) is cleared, the IRET instruction performs a far return from the interrupt procedure, without a task switch. The code segment being returned to must be equally or less privileged than the interrupt handler routine (as indicated by the RPL field of the code segment selector popped from the stack).</p>", + "html": "<p>Returns program control from an exception or interrupt handler to a program or procedure that was interrupted by an exception, an external interrupt, or a software-generated interrupt. These instructions are also used to perform a return from a nested task. (A nested task is created when a CALL instruction is used to initiate a task switch or when an interrupt or exception causes a task switch to an interrupt or exception handler.) See the section titled \u201cTask Linking\u201d in Chapter 7 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>.</p><p>IRET and IRETD are mnemonics for the same opcode. The IRETD mnemonic (interrupt return double) is intended for use when returning from an interrupt when using the 32-bit operand size; however, most assemblers use the IRET mnemonic interchangeably for both operand sizes.</p><p>In Real-Address Mode, the IRET instruction preforms a far return to the interrupted program or procedure. During this operation, the processor pops the return instruction pointer, return code segment selector, and EFLAGS image from the stack to the EIP, CS, and EFLAGS registers, respectively, and then resumes execution of the interrupted program or procedure.</p><p>In Protected Mode, the action of the IRET instruction depends on the settings of the NT (nested task) and VM flags in the EFLAGS register and the VM flag in the EFLAGS image stored on the current stack. Depending on the setting of these flags, the processor performs the following types of interrupt returns:</p><p>If the NT flag (EFLAGS register) is cleared, the IRET instruction performs a far return from the interrupt procedure, without a task switch. The code segment being returned to must be equally or less privileged than the interrupt handler routine (as indicated by the RPL field of the code segment selector popped from the stack).</p>", "tooltip": "Returns program control from an exception or interrupt handler to a program or procedure that was interrupted by an exception, an external interrupt, or a software-generated interrupt. These instructions are also used to perform a return from a nested task. (A nested task is created when a CALL instruction is used to initiate a task switch or when an interrupt or exception causes a task switch to an interrupt or exception handler.) See the section titled \u201cTask Linking\u201d in Chapter 7 of the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A." }; case "JMP": return { "url": "http://www.felixcloutier.com/x86/JMP.html", - "html": "<p>Transfers program control to a different point in the instruction stream without recording return information. The destination (target) operand specifies the address of the instruction being jumped to. This operand can be an immediate value, a general-purpose register, or a memory location.</p><p>This instruction can be used to execute four different types of jumps:</p><p>A task switch can only be executed in protected mode (see Chapter 7, in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for information on performing task switches with the JMP instruction).</p><p><strong>Near and Short Jumps.</strong> When executing a near jump, the processor jumps to the address (within the current code segment) that is specified with the target operand. The target operand specifies either an absolute offset (that is an offset from the base of the code segment) or a relative offset (a signed displacement relative to the current</p><p>value of the instruction pointer in the EIP register). A near jump to a relative offset of 8-bits (<em>rel8</em>) is referred to as a short jump. The CS register is not changed on near and short jumps.</p>", + "html": "<p>Transfers program control to a different point in the instruction stream without recording return information. The destination (target) operand specifies the address of the instruction being jumped to. This operand can be an immediate value, a general-purpose register, or a memory location.</p><p>This instruction can be used to execute four different types of jumps:</p><p>A task switch can only be executed in protected mode (see Chapter 7, in the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for information on performing task switches with the JMP instruction).</p><p><strong>Near and Short Jumps.</strong> When executing a near jump, the processor jumps to the address (within the current code segment) that is specified with the target operand. The target operand specifies either an absolute offset (that is an offset from the base of the code segment) or a relative offset (a signed displacement relative to the current</p><p>value of the instruction pointer in the EIP register). A near jump to a relative offset of 8-bits (<em>rel8</em>) is referred to as a short jump. The CS register is not changed on near and short jumps.</p>", "tooltip": "Transfers program control to a different point in the instruction stream without recording return information. The destination (target) operand specifies the address of the instruction being jumped to. This operand can be an immediate value, a general-purpose register, or a memory location." }; @@ -1580,7 +1582,7 @@ function getAsmOpcode(opcode) { case "VLDMXCSR": return { "url": "http://www.felixcloutier.com/x86/LDMXCSR.html", - "html": "<p>Loads the source operand into the MXCSR control/status register. The source operand is a 32-bit memory location. See \u201cMXCSR Control and Status Register\u201d in Chapter 10, of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of the MXCSR register and its contents.</p><p>The LDMXCSR instruction is typically used in conjunction with the (V)STMXCSR instruction, which stores the contents of the MXCSR register in memory.</p><p>The default MXCSR value at reset is 1F80H.</p><p>If a (V)LDMXCSR instruction clears a SIMD floating-point exception mask bit and sets the corresponding exception flag bit, a SIMD floating-point exception will not be immediately generated. The exception will be generated only upon the execution of the next instruction that meets both conditions below:</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Loads the source operand into the MXCSR control/status register. The source operand is a 32-bit memory location. See \u201cMXCSR Control and Status Register\u201d in Chapter 10, of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for a description of the MXCSR register and its contents.</p><p>The LDMXCSR instruction is typically used in conjunction with the (V)STMXCSR instruction, which stores the contents of the MXCSR register in memory.</p><p>The default MXCSR value at reset is 1F80H.</p><p>If a (V)LDMXCSR instruction clears a SIMD floating-point exception mask bit and sets the corresponding exception flag bit, a SIMD floating-point exception will not be immediately generated. The exception will be generated only upon the execution of the next instruction that meets both conditions below:</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Loads the source operand into the MXCSR control/status register. The source operand is a 32-bit memory location. See \u201cMXCSR Control and Status Register\u201d in Chapter 10, of the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for a description of the MXCSR register and its contents." }; @@ -1598,29 +1600,29 @@ function getAsmOpcode(opcode) { case "LEA": return { "url": "http://www.felixcloutier.com/x86/LEA.html", - "html": "<p>Computes the effective address of the second operand (the source operand) and stores it in the first operand (destination operand). The source operand is a memory address (offset part) specified with one of the processors addressing modes; the destination operand is a general-purpose register. The address-size and operand-size attributes affect the action performed by this instruction, as shown in the following table. The operand-size attribute of the instruction is determined by the chosen register; the address-size attribute is determined by the attribute of the code segment.</p><p>Different assemblers may use different algorithms based on the size attribute and symbolic reference of the source operand.</p><p>In 64-bit mode, the instruction\u2019s destination operand is governed by operand size attribute, the default operand size is 32 bits. Address calculation is governed by address size attribute, the default address size is 64-bits. In 64-bit mode, address size of 16 bits is not encodable. See Table 3-54.</p>", + "html": "<p>Computes the effective address of the second operand (the source operand) and stores it in the first operand (destination operand). The source operand is a memory address (offset part) specified with one of the processors addressing modes; the destination operand is a general-purpose register. The address-size and operand-size attributes affect the action performed by this instruction, as shown in the following table. The operand-size attribute of the instruction is determined by the chosen register; the address-size attribute is determined by the attribute of the code segment.</p><p>Different assemblers may use different algorithms based on the size attribute and symbolic reference of the source operand.</p><p>In 64-bit mode, the instruction\u2019s destination operand is governed by operand size attribute, the default operand size is 32 bits. Address calculation is governed by address size attribute, the default address size is 64-bits. In 64-bit mode, address size of 16 bits is not encodable. See <a href=\"./LEA.html#tbl-3-55\">Table 3-55</a>.</p>", "tooltip": "Computes the effective address of the second operand (the source operand) and stores it in the first operand (destination operand). The source operand is a memory address (offset part) specified with one of the processors addressing modes; the destination operand is a general-purpose register. The address-size and operand-size attributes affect the action performed by this instruction, as shown in the following table. The operand-size attribute of the instruction is determined by the chosen register; the address-size attribute is determined by the attribute of the code segment." }; case "LEAVE": return { "url": "http://www.felixcloutier.com/x86/LEAVE.html", - "html": "<p>Releases the stack frame set up by an earlier ENTER instruction. The LEAVE instruction copies the frame pointer (in the EBP register) into the stack pointer register (ESP), which releases the stack space allocated to the stack frame. The old frame pointer (the frame pointer for the calling procedure that was saved by the ENTER instruction) is then popped from the stack into the EBP register, restoring the calling procedure\u2019s stack frame.</p><p>A RET instruction is commonly executed following a LEAVE instruction to return program control to the calling procedure.</p><p>See \u201cProcedure Calls for Block-Structured Languages\u201d in Chapter 7 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for detailed information on the use of the ENTER and LEAVE instructions.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 64 bits; 32-bit operation cannot be encoded. See the summary chart at the beginning of this section for encoding data and limits.</p>", + "html": "<p>Releases the stack frame set up by an earlier ENTER instruction. The LEAVE instruction copies the frame pointer (in the EBP register) into the stack pointer register (ESP), which releases the stack space allocated to the stack frame. The old frame pointer (the frame pointer for the calling procedure that was saved by the ENTER instruction) is then popped from the stack into the EBP register, restoring the calling procedure\u2019s stack frame.</p><p>A RET instruction is commonly executed following a LEAVE instruction to return program control to the calling procedure.</p><p>See \u201cProcedure Calls for Block-Structured Languages\u201d in Chapter 7 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for detailed information on the use of the ENTER and LEAVE instructions.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 64 bits; 32-bit operation cannot be encoded. See the summary chart at the beginning of this section for encoding data and limits.</p>", "tooltip": "Releases the stack frame set up by an earlier ENTER instruction. The LEAVE instruction copies the frame pointer (in the EBP register) into the stack pointer register (ESP), which releases the stack space allocated to the stack frame. The old frame pointer (the frame pointer for the calling procedure that was saved by the ENTER instruction) is then popped from the stack into the EBP register, restoring the calling procedure\u2019s stack frame." }; case "LFENCE": return { "url": "http://www.felixcloutier.com/x86/LFENCE.html", - "html": "<p>Performs a serializing operation on all load-from-memory instructions that were issued prior the LFENCE instruction. Specifically, LFENCE does not execute until all prior instructions have completed locally, and no later instruction begins execution until LFENCE completes. In particular, an instruction that loads from memory and that precedes an LFENCE receives data from memory prior to completion of the LFENCE. (An LFENCE that follows an instruction that stores to memory might complete <strong>before</strong> the data being stored have become globally visible.) Instructions following an LFENCE may be fetched from memory before the LFENCE, but they will not execute until the LFENCE completes.</p><p>Weakly ordered memory types can be used to achieve higher processor performance through such techniques as out-of-order issue and speculative reads. The degree to which a consumer of data recognizes or knows that the data is weakly ordered varies among applications and may be unknown to the producer of this data. The LFENCE instruction provides a performance-efficient way of ensuring load ordering between routines that produce weakly-ordered results and routines that consume that data.</p><p>Processors are free to fetch and cache data speculatively from regions of system memory that use the WB, WC, and WT memory types. This speculative fetching can occur at any time and is not tied to instruction execution. Thus, it is not ordered with respect to executions of the LFENCE instruction; data can be brought into the caches speculatively just before, during, or after the execution of an LFENCE instruction.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>Specification of the instruction's opcode above indicates a ModR/M byte of E8. For this instruction, the processor ignores the r/m field of the ModR/M byte. Thus, LFENCE is encoded by any opcode of the form 0F AE Ex, where x is in the range 8-F.</p>", - "tooltip": "Performs a serializing operation on all load-from-memory instructions that were issued prior the LFENCE instruction. Specifically, LFENCE does not execute until all prior instructions have completed locally, and no later instruction begins execution until LFENCE completes. In particular, an instruction that loads from memory and that precedes an LFENCE receives data from memory prior to completion of the LFENCE. (An LFENCE that follows an instruction that stores to memory might complete before the data being stored have become globally visible.) Instructions following an LFENCE may be fetched from memory before the LFENCE, but they will not execute until the LFENCE completes." + "html": "<p>Performs a serializing operation on all load-from-memory instructions that were issued prior the LFENCE instruction. Specifically, LFENCE does not execute until all prior instructions have completed locally, and no later instruction begins execution until LFENCE completes. In particular, an instruction that loads from memory and that precedes an LFENCE receives data from memory prior to completion of the LFENCE. (An LFENCE that follows an instruction that stores to memory might complete <strong>before</strong> the data being stored have become globally visible.) Instructions following an LFENCE may be fetched from memory before the LFENCE, but they will not execute (even speculatively) until the LFENCE completes.</p><p>Weakly ordered memory types can be used to achieve higher processor performance through such techniques as out-of-order issue and speculative reads. The degree to which a consumer of data recognizes or knows that the data is weakly ordered varies among applications and may be unknown to the producer of this data. The LFENCE instruction provides a performance-efficient way of ensuring load ordering between routines that produce weakly-ordered results and routines that consume that data.</p><p>Processors are free to fetch and cache data speculatively from regions of system memory that use the WB, WC, and WT memory types. This speculative fetching can occur at any time and is not tied to instruction execution. Thus, it is not ordered with respect to executions of the LFENCE instruction; data can be brought into the caches speculatively just before, during, or after the execution of an LFENCE instruction.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p><p>Specification of the instruction's opcode above indicates a ModR/M byte of E8. For this instruction, the processor ignores the r/m field of the ModR/M byte. Thus, LFENCE is encoded by any opcode of the form 0F AE Ex, where x is in the range 8-F.</p>", + "tooltip": "Performs a serializing operation on all load-from-memory instructions that were issued prior the LFENCE instruction. Specifically, LFENCE does not execute until all prior instructions have completed locally, and no later instruction begins execution until LFENCE completes. In particular, an instruction that loads from memory and that precedes an LFENCE receives data from memory prior to completion of the LFENCE. (An LFENCE that follows an instruction that stores to memory might complete before the data being stored have become globally visible.) Instructions following an LFENCE may be fetched from memory before the LFENCE, but they will not execute (even speculatively) until the LFENCE completes." }; case "LIDT": case "LGDT": return { "url": "http://www.felixcloutier.com/x86/LGDT%3ALIDT.html", - "html": "<p>Loads the values in the source operand into the global descriptor table register (GDTR) or the interrupt descriptor table register (IDTR). The source operand specifies a 6-byte memory location that contains the base address (a linear address) and the limit (size of table in bytes) of the global descriptor table (GDT) or the interrupt descriptor table (IDT). If operand-size attribute is 32 bits, a 16-bit limit (lower 2 bytes of the 6-byte data operand) and a 32-bit base address (upper 4 bytes of the data operand) are loaded into the register. If the operand-size attribute is 16 bits, a 16-bit limit (lower 2 bytes) and a 24-bit base address (third, fourth, and fifth byte) are loaded. Here, the high-order byte of the operand is not used and the high-order byte of the base address in the GDTR or IDTR is filled with zeros.</p><p>The LGDT and LIDT instructions are used only in operating-system software; they are not used in application programs. They are the only instructions that directly load a linear address (that is, not a segment-relative address) and a limit in protected mode. They are commonly executed in real-address mode to allow processor initialization prior to switching to protected mode.</p><p>In 64-bit mode, the instruction\u2019s operand size is fixed at 8+2 bytes (an 8-byte base and a 2-byte limit). See the summary chart at the beginning of this section for encoding data and limits.</p><p>See \u201cSGDT\u2014Store Global Descriptor Table Register\u201d in Chapter 4, <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2B</em>, for information on storing the contents of the GDTR and IDTR.</p>", + "html": "<p>Loads the values in the source operand into the global descriptor table register (GDTR) or the interrupt descriptor table register (IDTR). The source operand specifies a 6-byte memory location that contains the base address (a linear address) and the limit (size of table in bytes) of the global descriptor table (GDT) or the interrupt descriptor table (IDT). If operand-size attribute is 32 bits, a 16-bit limit (lower 2 bytes of the 6-byte data operand) and a 32-bit base address (upper 4 bytes of the data operand) are loaded into the register. If the operand-size attribute is 16 bits, a 16-bit limit (lower 2 bytes) and a 24-bit base address (third, fourth, and fifth byte) are loaded. Here, the high-order byte of the operand is not used and the high-order byte of the base address in the GDTR or IDTR is filled with zeros.</p><p>The LGDT and LIDT instructions are used only in operating-system software; they are not used in application programs. They are the only instructions that directly load a linear address (that is, not a segment-relative address) and a limit in protected mode. They are commonly executed in real-address mode to allow processor initialization prior to switching to protected mode.</p><p>In 64-bit mode, the instruction\u2019s operand size is fixed at 8+2 bytes (an 8-byte base and a 2-byte limit). See the summary chart at the beginning of this section for encoding data and limits.</p><p>See \u201cSGDT\u2014Store Global Descriptor Table Register\u201d in Chapter 4, <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2B</em>, for information on storing the contents of the GDTR and IDTR.</p>", "tooltip": "Loads the values in the source operand into the global descriptor table register (GDTR) or the interrupt descriptor table register (IDTR). The source operand specifies a 6-byte memory location that contains the base address (a linear address) and the limit (size of table in bytes) of the global descriptor table (GDT) or the interrupt descriptor table (IDT). If operand-size attribute is 32 bits, a 16-bit limit (lower 2 bytes of the 6-byte data operand) and a 32-bit base address (upper 4 bytes of the data operand) are loaded into the register. If the operand-size attribute is 16 bits, a 16-bit limit (lower 2 bytes) and a 24-bit base address (third, fourth, and fifth byte) are loaded. Here, the high-order byte of the operand is not used and the high-order byte of the base address in the GDTR or IDTR is filled with zeros." }; @@ -1768,7 +1770,7 @@ function getAsmOpcode(opcode) { case "MOV": return { "url": "http://www.felixcloutier.com/x86/MOV.html", - "html": "<p>Copies the second operand (source operand) to the first operand (destination operand). The source operand can be an immediate value, general-purpose register, segment register, or memory location; the destination register can be a general-purpose register, segment register, or memory location. Both operands must be the same size, which can be a byte, a word, a doubleword, or a quadword.</p><p>The MOV instruction cannot be used to load the CS register. Attempting to do so results in an invalid opcode exception (#UD). To load the CS register, use the far JMP, CALL, or RET instruction.</p><p>If the destination operand is a segment register (DS, ES, FS, GS, or SS), the source operand must be a valid segment selector. In protected mode, moving a segment selector into a segment register automatically causes the segment descriptor information associated with that segment selector to be loaded into the hidden (shadow) part of the segment register. While loading this information, the segment selector and segment descriptor information is validated (see the \u201cOperation\u201d algorithm below). The segment descriptor data is obtained from the GDT or LDT entry for the specified segment selector.</p><p>A NULL segment selector (values 0000-0003) can be loaded into the DS, ES, FS, and GS registers without causing a protection exception. However, any subsequent attempt to reference a segment whose corresponding segment register is loaded with a NULL value causes a general protection exception (#GP) and no memory reference occurs.</p><p>Loading the SS register with a MOV instruction inhibits all interrupts until after the execution of the next instruction. This operation allows a stack pointer to be loaded into the ESP register with the next instruction (MOV ESP, <strong>stack-pointer value</strong>) before an interrupt occurs<sup>1</sup>. Be aware that the LSS instruction offers a more efficient method of loading the SS and ESP registers.</p>", + "html": "<p>Copies the second operand (source operand) to the first operand (destination operand). The source operand can be an immediate value, general-purpose register, segment register, or memory location; the destination register can be a general-purpose register, segment register, or memory location. Both operands must be the same size, which can be a byte, a word, a doubleword, or a quadword.</p><p>The MOV instruction cannot be used to load the CS register. Attempting to do so results in an invalid opcode exception (#UD). To load the CS register, use the far JMP, CALL, or RET instruction.</p><p>If the destination operand is a segment register (DS, ES, FS, GS, or SS), the source operand must be a valid segment selector. In protected mode, moving a segment selector into a segment register automatically causes the segment descriptor information associated with that segment selector to be loaded into the hidden (shadow) part of the segment register. While loading this information, the segment selector and segment descriptor information is validated (see the \u201cOperation\u201d algorithm below). The segment descriptor data is obtained from the GDT or LDT entry for the specified segment selector.</p><p>A NULL segment selector (values 0000-0003) can be loaded into the DS, ES, FS, and GS registers without causing a protection exception. However, any subsequent attempt to reference a segment whose corresponding segment register is loaded with a NULL value causes a general protection exception (#GP) and no memory reference occurs.</p><p>Loading the SS register with a MOV instruction suppresses or inhibits some debug exceptions and inhibits interrupts on the following instruction boundary. (The inhibition ends after delivery of an exception or the execution of the next instruction.) This behavior allows a stack pointer to be loaded into the ESP register with the next instruction (MOV ESP, <strong>stack-pointer value</strong>) before an event can be delivered. See Section 6.8.3, \u201cMasking Exceptions and Interrupts When Switching Stacks,\u201d in <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A.</em> Intel recommends that software use the LSS instruction to load the SS register and ESP together.</p>", "tooltip": "Copies the second operand (source operand) to the first operand (destination operand). The source operand can be an immediate value, general-purpose register, segment register, or memory location; the destination register can be a general-purpose register, segment register, or memory location. Both operands must be the same size, which can be a byte, a word, a doubleword, or a quadword." }; @@ -1806,6 +1808,20 @@ function getAsmOpcode(opcode) { "tooltip": "For 256-bit or higher versions: Duplicates even-indexed double-precision floating-point values from the source operand (the second operand) and into adjacent pair and store to the destination operand (the first operand)." }; + case "MOVDIR64B": + return { + "url": "http://www.felixcloutier.com/x86/MOVDIR64B.html", + "html": "<p>Moves 64-bytes as direct-store with 64-byte write atomicity from source memory address to destination memory address. The source operand is a normal memory operand. The destination operand is a memory location specified in a general-purpose register. The register content is interpreted as an offset into ES segment without any segment override. In 64-bit mode, the register operand width is 64-bits (32-bits with 67H prefix). Outside of 64-bit mode, the register width is 32-bits when CS.D=1 (16-bits with 67H prefix), and 16-bits when CS.D=0 (32-bits with 67H prefix). MOVDIR64B requires the destination address to be 64-byte aligned. No alignment restriction is enforced for source operand.</p><p>MOVDIR64B reads 64-bytes from the source memory address and performs a 64-byte direct-store operation to the destination address. The load operation follows normal read ordering based on source address memory-type. The direct-store is implemented by using the write combining (WC) memory type protocol for writing data. Using this protocol, the processor does not write the data into the cache hierarchy, nor does it fetch the corresponding cache line from memory into the cache hierarchy. If the destination address is cached, the line is written-back (if modified) and invalidated from the cache, before the direct-store.</p><p>Unlike stores with non-temporal hint which allow UC/WP memory-type for destination to override the non-temporal hint, direct-stores always follow WC memory type protocol irrespective of destination address memory type (including UC/WP types). Unlike WC stores and stores with non-temporal hint, direct-stores are eligible for immediate eviction from the write-combining buffer, and thus not combined with younger stores (including direct-stores) to the same address. Older WC and non-temporal stores held in the write-combing buffer may be combined with younger direct stores to the same address. Because WC protocol used by direct-stores follow weakly-ordered memory consistency model, fencing operation using SFENCE or MFENCE should follow the MOVDIR64B instruction to enforce ordering when needed.</p><p>There is no atomicity guarantee provided for the 64-byte load operation from source address, and processor implementations may use multiple load operations to read the 64-bytes. The 64-byte direct-store issued by MOVDIR64B guarantees 64-byte write-completion atomicity. This means that the data arrives at the destination in a single undivided 64-byte write transaction.</p><p>Availability of the MOVDIR64B instruction is indicated by the presence of the CPUID feature flag MOVDIR64B (bit 28 of the ECX register in leaf 07H, see \u201cCPUID\u2014CPU Identification\u201d in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2A</em>).</p>", + "tooltip": "Moves 64-bytes as direct-store with 64-byte write atomicity from source memory address to destination memory address. The source operand is a normal memory operand. The destination operand is a memory location specified in a general-purpose register. The register content is interpreted as an offset into ES segment without any segment override. In 64-bit mode, the register operand width is 64-bits (32-bits with 67H prefix). Outside of 64-bit mode, the register width is 32-bits when CS.D=1 (16-bits with 67H prefix), and 16-bits when CS.D=0 (32-bits with 67H prefix). MOVDIR64B requires the destination address to be 64-byte aligned. No alignment restriction is enforced for source operand." + }; + + case "MOVDIRI": + return { + "url": "http://www.felixcloutier.com/x86/MOVDIRI.html", + "html": "<p>Moves the doubleword integer in the source operand (second operand) to the destination operand (first operand) using a direct-store operation. The source operand is a general purpose register. The destination operand is a 32-bit memory location. In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. See summary chart at the beginning of this section for encoding data and limits.</p><p>The direct-store is implemented by using write combining (WC) memory type protocol for writing data. Using this protocol, the processor does not write the data into the cache hierarchy, nor does it fetch the corresponding cache line from memory into the cache hierarchy. If the destination address is cached, the line is written-back (if modified) and invalidated from the cache, before the direct-store. Unlike stores with non-temporal hint that allow uncached (UC) and write-protected (WP) memory-type for the destination to override the non-temporal hint, direct-stores always follow WC memory type protocol irrespective of the destination address memory type (including UC and WP types).</p><p>Unlike WC stores and stores with non-temporal hint, direct-stores are eligible for immediate eviction from the write-combining buffer, and thus not combined with younger stores (including direct-stores) to the same address. Older WC and non-temporal stores held in the write-combing buffer may be combined with younger direct stores to the same address. Because WC protocol used by direct-stores follows a weakly-ordered memory consistency model, a fencing operation using SFENCE or MFENCE should follow the MOVDIRI instruction to enforce ordering when needed.</p><p>Direct-stores issued by MOVDIRI to a destination aligned to a 4-byte boundary (8-byte boundary if used with REX.W prefix) guarantee 4-byte (8-byte with REX.W prefix) write-completion atomicity. This means that the data arrives at the destination in a single undivided 4-byte (or 8-byte) write transaction. If the destination is not aligned for the write size, the direct-stores issued by MOVDIRI are split and arrive at the destination in two parts. Each part of such split direct-store will not merge with younger stores but can arrive at the destination in either order. Availability of the MOVDIRI instruction is indicated by the presence of the CPUID feature flag MOVDIRI (bit 27 of the ECX register in leaf 07H, see \u201cCPUID\u2014CPU Identification\u201d in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2A</em>).</p>", + "tooltip": "Moves the doubleword integer in the source operand (second operand) to the destination operand (first operand) using a direct-store operation. The source operand is a general purpose register. The destination operand is a 32-bit memory location. In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. See summary chart at the beginning of this section for encoding data and limits." + }; + case "VMOVDQA32": case "VMOVDQA": case "MOVDQA": @@ -1960,7 +1976,7 @@ function getAsmOpcode(opcode) { case "MOVSHDUP": return { "url": "http://www.felixcloutier.com/x86/MOVSHDUP.html", - "html": "<p>Duplicates odd-indexed single-precision floating-point values from the source operand (the second operand) to adjacent element pair in the destination operand (the first operand). See Figure 4-3. The source operand is an XMM, YMM or ZMM register or 128, 256 or 512-bit memory location and the destination operand is an XMM, YMM or ZMM register.</p><p>128-bit Legacy SSE version: Bits (MAXVL-1:128) of the corresponding destination register remain unchanged.</p><p>VEX.128 encoded version: Bits (MAXVL-1:128) of the destination register are zeroed.</p><p>VEX.256 encoded version: Bits (MAXVL-1:256) of the destination register are zeroed.</p><p>EVEX encoded version: The destination operand is updated at 32-bit granularity according to the writemask.</p>", + "html": "<p>Duplicates odd-indexed single-precision floating-point values from the source operand (the second operand) to adjacent element pair in the destination operand (the first operand). See <a href=\"./MOVSHDUP.html#fig-4-3\">Figure 4-3</a>. The source operand is an XMM, YMM or ZMM register or 128, 256 or 512-bit memory location and the destination operand is an XMM, YMM or ZMM register.</p><p>128-bit Legacy SSE version: Bits (MAXVL-1:128) of the corresponding destination register remain unchanged.</p><p>VEX.128 encoded version: Bits (MAXVL-1:128) of the destination register are zeroed.</p><p>VEX.256 encoded version: Bits (MAXVL-1:256) of the destination register are zeroed.</p><p>EVEX encoded version: The destination operand is updated at 32-bit granularity according to the writemask.</p>", "tooltip": "Duplicates odd-indexed single-precision floating-point values from the source operand (the second operand) to adjacent element pair in the destination operand (the first operand). See Figure 4-3. The source operand is an XMM, YMM or ZMM register or 128, 256 or 512-bit memory location and the destination operand is an XMM, YMM or ZMM register." }; @@ -1968,7 +1984,7 @@ function getAsmOpcode(opcode) { case "VMOVSLDUP": return { "url": "http://www.felixcloutier.com/x86/MOVSLDUP.html", - "html": "<p>Duplicates even-indexed single-precision floating-point values from the source operand (the second operand). See Figure 4-4. The source operand is an XMM, YMM or ZMM register or 128, 256 or 512-bit memory location and the destination operand is an XMM, YMM or ZMM register.</p><p>128-bit Legacy SSE version: Bits (MAXVL-1:128) of the corresponding destination register remain unchanged.</p><p>VEX.128 encoded version: Bits (MAXVL-1:128) of the destination register are zeroed.</p><p>VEX.256 encoded version: Bits (MAXVL-1:256) of the destination register are zeroed.</p><p>EVEX encoded version: The destination operand is updated at 32-bit granularity according to the writemask.</p>", + "html": "<p>Duplicates even-indexed single-precision floating-point values from the source operand (the second operand). See <a href=\"./MOVSLDUP.html#fig-4-4\">Figure 4-4</a>. The source operand is an XMM, YMM or ZMM register or 128, 256 or 512-bit memory location and the destination operand is an XMM, YMM or ZMM register.</p><p>128-bit Legacy SSE version: Bits (MAXVL-1:128) of the corresponding destination register remain unchanged.</p><p>VEX.128 encoded version: Bits (MAXVL-1:128) of the destination register are zeroed.</p><p>VEX.256 encoded version: Bits (MAXVL-1:256) of the destination register are zeroed.</p><p>EVEX encoded version: The destination operand is updated at 32-bit granularity according to the writemask.</p>", "tooltip": "Duplicates even-indexed single-precision floating-point values from the source operand (the second operand). See Figure 4-4. The source operand is an XMM, YMM or ZMM register or 128, 256 or 512-bit memory location and the destination operand is an XMM, YMM or ZMM register." }; @@ -1984,7 +2000,7 @@ function getAsmOpcode(opcode) { case "MOVSX": return { "url": "http://www.felixcloutier.com/x86/MOVSX%3AMOVSXD.html", - "html": "<p>Copies the contents of the source operand (register or memory location) to the destination operand (register) and sign extends the value to 16 or 32 bits (see Figure 7-6 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>). The size of the converted value depends on the operand-size attribute.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", + "html": "<p>Copies the contents of the source operand (register or memory location) to the destination operand (register) and sign extends the value to 16 or 32 bits (see <span class=\"not-imported\">Figure 7-6</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>). The size of the converted value depends on the operand-size attribute.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", "tooltip": "Copies the contents of the source operand (register or memory location) to the destination operand (register) and sign extends the value to 16 or 32 bits (see Figure 7-6 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1). The size of the converted value depends on the operand-size attribute." }; @@ -2022,7 +2038,7 @@ function getAsmOpcode(opcode) { case "MUL": return { "url": "http://www.felixcloutier.com/x86/MUL.html", - "html": "<p>Performs an unsigned multiplication of the first operand (destination operand) and the second operand (source operand) and stores the result in the destination operand. The destination operand is an implied operand located in register AL, AX or EAX (depending on the size of the operand); the source operand is located in a general-purpose register or a memory location. The action of this instruction and the location of the result depends on the opcode and the operand size as shown in Table 4-9.</p><p>The result is stored in register AX, register pair DX:AX, or register pair EDX:EAX (depending on the operand size), with the high-order bits of the product contained in register AH, DX, or EDX, respectively. If the high-order bits of the product are 0, the CF and OF flags are cleared; otherwise, the flags are set.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits.</p><p>See the summary chart at the beginning of this section for encoding data and limits.</p>", + "html": "<p>Performs an unsigned multiplication of the first operand (destination operand) and the second operand (source operand) and stores the result in the destination operand. The destination operand is an implied operand located in register AL, AX or EAX (depending on the size of the operand); the source operand is located in a general-purpose register or a memory location. The action of this instruction and the location of the result depends on the opcode and the operand size as shown in <a href=\"./MUL.html#tbl-4-9\">Table 4-9</a>.</p><p>The result is stored in register AX, register pair DX:AX, or register pair EDX:EAX (depending on the operand size), with the high-order bits of the product contained in register AH, DX, or EDX, respectively. If the high-order bits of the product are 0, the CF and OF flags are cleared; otherwise, the flags are set.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits.</p><p>See the summary chart at the beginning of this section for encoding data and limits.</p>", "tooltip": "Performs an unsigned multiplication of the first operand (destination operand) and the second operand (source operand) and stores the result in the destination operand. The destination operand is an implied operand located in register AL, AX or EAX (depending on the size of the operand); the source operand is located in a general-purpose register or a memory location. The action of this instruction and the location of the result depends on the opcode and the operand size as shown in Table 4-9." }; @@ -2151,7 +2167,7 @@ function getAsmOpcode(opcode) { case "VPACKSSDW": return { "url": "http://www.felixcloutier.com/x86/PACKSSWB%3APACKSSDW.html", - "html": "<p>Converts packed signed word integers into packed signed byte integers (PACKSSWB) or converts packed signed doubleword integers into packed signed word integers (PACKSSDW), using saturation to handle overflow conditions. See Figure 4-6 for an example of the packing operation.</p><p>PACKSSWB converts packed signed word integers in the first and second source operands into packed signed byte integers using signed saturation to handle overflow conditions beyond the range of signed byte integers. If the signed doubleword value is beyond the range of an unsigned word (i.e. greater than 7FH or less than 80H), the saturated signed byte integer value of 7FH or 80H, respectively, is stored in the destination. PACKSSDW converts packed signed doubleword integers in the first and second source operands into packed signed word integers using signed saturation to handle overflow conditions beyond 7FFFH and 8000H.</p><p>EVEX encoded PACKSSWB: The first source operand is a ZMM/YMM/XMM register. The second source operand is a ZMM/YMM/XMM register or a 512/256/128-bit memory location. The destination operand is a ZMM/YMM/XMM register, updated conditional under the writemask k1.</p><p>EVEX encoded PACKSSDW: The first source operand is a ZMM/YMM/XMM register. The second source operand is a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 32-bit memory location. The destination operand is a ZMM/YMM/XMM register, updated conditional under the writemask k1.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand is a YMM register or a 256-bit memory location. The destination operand is a YMM register. The upper bits (MAXVL-1:256) of the corresponding ZMM register destination are zeroed.</p>", + "html": "<p>Converts packed signed word integers into packed signed byte integers (PACKSSWB) or converts packed signed doubleword integers into packed signed word integers (PACKSSDW), using saturation to handle overflow conditions. See <a href=\"./PACKSSWB:PACKSSDW.html#fig-4-6\">Figure 4-6</a> for an example of the packing operation.</p><p>PACKSSWB converts packed signed word integers in the first and second source operands into packed signed byte integers using signed saturation to handle overflow conditions beyond the range of signed byte integers. If the signed word value is beyond the range of a signed byte value (i.e., greater than 7FH or less than 80H), the saturated signed byte integer value of 7FH or 80H, respectively, is stored in the destination. PACKSSDW converts packed signed doubleword integers in the first and second source operands into packed signed word integers using signed saturation to handle overflow conditions beyond 7FFFH and 8000H.</p><p>EVEX encoded PACKSSWB: The first source operand is a ZMM/YMM/XMM register. The second source operand is a ZMM/YMM/XMM register or a 512/256/128-bit memory location. The destination operand is a ZMM/YMM/XMM register, updated conditional under the writemask k1.</p><p>EVEX encoded PACKSSDW: The first source operand is a ZMM/YMM/XMM register. The second source operand is a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 32-bit memory location. The destination operand is a ZMM/YMM/XMM register, updated conditional under the writemask k1.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand is a YMM register or a 256-bit memory location. The destination operand is a YMM register. The upper bits (MAXVL-1:256) of the corresponding ZMM register destination are zeroed.</p>", "tooltip": "Converts packed signed word integers into packed signed byte integers (PACKSSWB) or converts packed signed doubleword integers into packed signed word integers (PACKSSDW), using saturation to handle overflow conditions. See Figure 4-6 for an example of the packing operation." }; @@ -2167,7 +2183,7 @@ function getAsmOpcode(opcode) { case "VPACKUSWB": return { "url": "http://www.felixcloutier.com/x86/PACKUSWB.html", - "html": "<p>Converts 4, 8, 16 or 32 signed word integers from the destination operand (first operand) and 4, 8, 16 or 32 signed word integers from the source operand (second operand) into 8, 16, 32 or 64 unsigned byte integers and stores the result in the destination operand. (See Figure 4-6 for an example of the packing operation.) If a signed word integer value is beyond the range of an unsigned byte integer (that is, greater than FFH or less than 00H), the saturated unsigned byte integer value of FFH or 00H, respectively, is stored in the destination.</p><p>EVEX.512 encoded version: The first source operand is a ZMM register. The second source operand is a ZMM register or a 512-bit memory location. The destination operand is a ZMM register.</p><p>VEX.256 and EVEX.256 encoded versions: The first source operand is a YMM register. The second source operand is a YMM register or a 256-bit memory location. The destination operand is a YMM register. The upper bits (MAXVL-1:256) of the corresponding ZMM register destination are zeroed.</p><p>VEX.128 and EVEX.128 encoded versions: The first source operand is an XMM register. The second source operand is an XMM register or 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding register destination are zeroed.</p><p>128-bit Legacy SSE version: The first source operand is an XMM register. The second operand can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding register destination are unmodified.</p>", + "html": "<p>Converts 4, 8, 16 or 32 signed word integers from the destination operand (first operand) and 4, 8, 16 or 32 signed word integers from the source operand (second operand) into 8, 16, 32 or 64 unsigned byte integers and stores the result in the destination operand. (See <a href=\"./PACKSSWB:PACKSSDW.html#fig-4-6\">Figure 4-6</a> for an example of the packing operation.) If a signed word integer value is beyond the range of an unsigned byte integer (that is, greater than FFH or less than 00H), the saturated unsigned byte integer value of FFH or 00H, respectively, is stored in the destination.</p><p>EVEX.512 encoded version: The first source operand is a ZMM register. The second source operand is a ZMM register or a 512-bit memory location. The destination operand is a ZMM register.</p><p>VEX.256 and EVEX.256 encoded versions: The first source operand is a YMM register. The second source operand is a YMM register or a 256-bit memory location. The destination operand is a YMM register. The upper bits (MAXVL-1:256) of the corresponding ZMM register destination are zeroed.</p><p>VEX.128 and EVEX.128 encoded versions: The first source operand is an XMM register. The second source operand is an XMM register or 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding register destination are zeroed.</p><p>128-bit Legacy SSE version: The first source operand is an XMM register. The second operand can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding register destination are unmodified.</p>", "tooltip": "Converts 4, 8, 16 or 32 signed word integers from the destination operand (first operand) and 4, 8, 16 or 32 signed word integers from the source operand (second operand) into 8, 16, 32 or 64 unsigned byte integers and stores the result in the destination operand. (See Figure 4-6 for an example of the packing operation.) If a signed word integer value is beyond the range of an unsigned byte integer (that is, greater than FFH or less than 00H), the saturated unsigned byte integer value of FFH or 00H, respectively, is stored in the destination." }; @@ -2181,7 +2197,7 @@ function getAsmOpcode(opcode) { case "PADDB": return { "url": "http://www.felixcloutier.com/x86/PADDB%3APADDW%3APADDD%3APADDQ.html", - "html": "<p>Performs a SIMD add of the packed integers from the source operand (second operand) and the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with wraparound, as described in the following paragraphs.</p><p>The PADDB and VPADDB instructions add packed byte integers from the first source operand and second source operand and store the packed integer results in the destination operand. When an individual result is too large to be represented in 8 bits (overflow), the result is wrapped around and the low 8 bits are written to the destination operand (that is, the carry is ignored).</p><p>The PADDW and VPADDW instructions add packed word integers from the first source operand and second source operand and store the packed integer results in the destination operand. When an individual result is too large to be represented in 16 bits (overflow), the result is wrapped around and the low 16 bits are written to the destination operand (that is, the carry is ignored).</p><p>The PADDD and VPADDD instructions add packed doubleword integers from the first source operand and second source operand and store the packed integer results in the destination operand. When an individual result is too large to be represented in 32 bits (overflow), the result is wrapped around and the low 32 bits are written to the destination operand (that is, the carry is ignored).</p><p>The PADDQ and VPADDQ instructions add packed quadword integers from the first source operand and second source operand and store the packed integer results in the destination operand. When a quadword result is too</p>", + "html": "<p>Performs a SIMD add of the packed integers from the source operand (second operand) and the destination operand (first operand), and stores the packed integer results in the destination operand. See <span class=\"not-imported\">Figure 9-4</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with wraparound, as described in the following paragraphs.</p><p>The PADDB and VPADDB instructions add packed byte integers from the first source operand and second source operand and store the packed integer results in the destination operand. When an individual result is too large to be represented in 8 bits (overflow), the result is wrapped around and the low 8 bits are written to the destination operand (that is, the carry is ignored).</p><p>The PADDW and VPADDW instructions add packed word integers from the first source operand and second source operand and store the packed integer results in the destination operand. When an individual result is too large to be represented in 16 bits (overflow), the result is wrapped around and the low 16 bits are written to the destination operand (that is, the carry is ignored).</p><p>The PADDD and VPADDD instructions add packed doubleword integers from the first source operand and second source operand and store the packed integer results in the destination operand. When an individual result is too large to be represented in 32 bits (overflow), the result is wrapped around and the low 32 bits are written to the destination operand (that is, the carry is ignored).</p><p>The PADDQ and VPADDQ instructions add packed quadword integers from the first source operand and second source operand and store the packed integer results in the destination operand. When a quadword result is too</p>", "tooltip": "Performs a SIMD add of the packed integers from the source operand (second operand) and the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a SIMD operation. Overflow is handled with wraparound, as described in the following paragraphs." }; @@ -2191,7 +2207,7 @@ function getAsmOpcode(opcode) { case "VPADDSB": return { "url": "http://www.felixcloutier.com/x86/PADDSB%3APADDSW.html", - "html": "<p>Performs a SIMD add of the packed signed integers from the source operand (second operand) and the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with signed saturation, as described in the following paragraphs.</p><p>(V)PADDSB performs a SIMD add of the packed signed integers with saturation from the first source operand and second source operand and stores the packed integer results in the destination operand. When an individual byte result is beyond the range of a signed byte integer (that is, greater than 7FH or less than 80H), the saturated value of 7FH or 80H, respectively, is written to the destination operand.</p><p>(V)PADDSW performs a SIMD add of the packed signed word integers with saturation from the first source operand and second source operand and stores the packed integer results in the destination operand. When an individual word result is beyond the range of a signed word integer (that is, greater than 7FFFH or less than 8000H), the saturated value of 7FFFH or 8000H, respectively, is written to the destination operand.</p><p>EVEX encoded versions: The first source operand is an ZMM/YMM/XMM register. The second source operand is an ZMM/YMM/XMM register or a memory location. The destination operand is an ZMM/YMM/XMM register.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand is a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p>", + "html": "<p>Performs a SIMD add of the packed signed integers from the source operand (second operand) and the destination operand (first operand), and stores the packed integer results in the destination operand. See <span class=\"not-imported\">Figure 9-4</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with signed saturation, as described in the following paragraphs.</p><p>(V)PADDSB performs a SIMD add of the packed signed integers with saturation from the first source operand and second source operand and stores the packed integer results in the destination operand. When an individual byte result is beyond the range of a signed byte integer (that is, greater than 7FH or less than 80H), the saturated value of 7FH or 80H, respectively, is written to the destination operand.</p><p>(V)PADDSW performs a SIMD add of the packed signed word integers with saturation from the first source operand and second source operand and stores the packed integer results in the destination operand. When an individual word result is beyond the range of a signed word integer (that is, greater than 7FFFH or less than 8000H), the saturated value of 7FFFH or 8000H, respectively, is written to the destination operand.</p><p>EVEX encoded versions: The first source operand is an ZMM/YMM/XMM register. The second source operand is an ZMM/YMM/XMM register or a memory location. The destination operand is an ZMM/YMM/XMM register.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand is a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p>", "tooltip": "Performs a SIMD add of the packed signed integers from the source operand (second operand) and the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a SIMD operation. Overflow is handled with signed saturation, as described in the following paragraphs." }; @@ -2201,7 +2217,7 @@ function getAsmOpcode(opcode) { case "PADDUSB": return { "url": "http://www.felixcloutier.com/x86/PADDUSB%3APADDUSW.html", - "html": "<p>Performs a SIMD add of the packed unsigned integers from the source operand (second operand) and the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with unsigned saturation, as described in the following paragraphs.</p><p>(V)PADDUSB performs a SIMD add of the packed unsigned integers with saturation from the first source operand and second source operand and stores the packed integer results in the destination operand. When an individual byte result is beyond the range of an unsigned byte integer (that is, greater than FFH), the saturated value of FFH is written to the destination operand.</p><p>(V)PADDUSW performs a SIMD add of the packed unsigned word integers with saturation from the first source operand and second source operand and stores the packed integer results in the destination operand. When an individual word result is beyond the range of an unsigned word integer (that is, greater than FFFFH), the saturated value of FFFFH is written to the destination operand.</p><p>EVEX encoded versions: The first source operand is an ZMM/YMM/XMM register. The second source operand is an ZMM/YMM/XMM register or a 512/256/128-bit memory location. The destination is an ZMM/YMM/XMM register.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand is a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p>", + "html": "<p>Performs a SIMD add of the packed unsigned integers from the source operand (second operand) and the destination operand (first operand), and stores the packed integer results in the destination operand. See <span class=\"not-imported\">Figure 9-4</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with unsigned saturation, as described in the following paragraphs.</p><p>(V)PADDUSB performs a SIMD add of the packed unsigned integers with saturation from the first source operand and second source operand and stores the packed integer results in the destination operand. When an individual byte result is beyond the range of an unsigned byte integer (that is, greater than FFH), the saturated value of FFH is written to the destination operand.</p><p>(V)PADDUSW performs a SIMD add of the packed unsigned word integers with saturation from the first source operand and second source operand and stores the packed integer results in the destination operand. When an individual word result is beyond the range of an unsigned word integer (that is, greater than FFFFH), the saturated value of FFFFH is written to the destination operand.</p><p>EVEX encoded versions: The first source operand is an ZMM/YMM/XMM register. The second source operand is an ZMM/YMM/XMM register or a 512/256/128-bit memory location. The destination is an ZMM/YMM/XMM register.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand is a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p>", "tooltip": "Performs a SIMD add of the packed unsigned integers from the source operand (second operand) and the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a SIMD operation. Overflow is handled with unsigned saturation, as described in the following paragraphs." }; @@ -2270,7 +2286,7 @@ function getAsmOpcode(opcode) { case "VPCLMULQDQ": return { "url": "http://www.felixcloutier.com/x86/PCLMULQDQ.html", - "html": "<p>Performs a carry-less multiplication of two quadwords, selected from the first source and second source operand according to the value of the immediate byte. Bits 4 and 0 are used to select which 64-bit half of each operand to use according to Table 4-13, other bits of the immediate byte are ignored.</p><p>The first source operand and the destination operand are the same and must be an XMM register. The second source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>Compilers and assemblers may implement the following pseudo-op syntax to simply programming and emit the required encoding for Imm8.</p>", + "html": "<p>Performs a carry-less multiplication of two quadwords, selected from the first source and second source operand according to the value of the immediate byte. Bits 4 and 0 are used to select which 64-bit half of each operand to use according to <a href=\"./PCLMULQDQ.html#tbl-4-13\">Table 4-13</a>, other bits of the immediate byte are ignored.</p><p>The first source operand and the destination operand are the same and must be an XMM register. The second source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>Compilers and assemblers may implement the following pseudo-op syntax to simply programming and emit the required encoding for Imm8.</p>", "tooltip": "Performs a carry-less multiplication of two quadwords, selected from the first source and second source operand according to the value of the immediate byte. Bits 4 and 0 are used to select which 64-bit half of each operand to use according to Table 4-13, other bits of the immediate byte are ignored." }; @@ -2452,7 +2468,7 @@ function getAsmOpcode(opcode) { case "PMADDWD": return { "url": "http://www.felixcloutier.com/x86/PMADDWD.html", - "html": "<p>Multiplies the individual signed words of the destination operand (first operand) by the corresponding signed words of the source operand (second operand), producing temporary signed, doubleword results. The adjacent double-word results are then summed and stored in the destination operand. For example, the corresponding low-order words (15-0) and (31-16) in the source and destination operands are multiplied by one another and the double-word results are added together and stored in the low doubleword of the destination register (31-0). The same operation is performed on the other pairs of adjacent words. (Figure 4-11 shows this operation when using 64-bit operands).</p><p>The (V)PMADDWD instruction wraps around only in one situation: when the 2 pairs of words being operated on in a group are all 8000H. In this case, the result wraps around to 80000000H.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version: The first source and destination operands are MMX registers. The second source operand is an MMX register or a 64-bit memory location.</p><p>128-bit Legacy SSE version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p>", + "html": "<p>Multiplies the individual signed words of the destination operand (first operand) by the corresponding signed words of the source operand (second operand), producing temporary signed, doubleword results. The adjacent double-word results are then summed and stored in the destination operand. For example, the corresponding low-order words (15-0) and (31-16) in the source and destination operands are multiplied by one another and the double-word results are added together and stored in the low doubleword of the destination register (31-0). The same operation is performed on the other pairs of adjacent words. (<a href=\"./PMADDWD.html#fig-4-11\">Figure 4-11</a> shows this operation when using 64-bit operands).</p><p>The (V)PMADDWD instruction wraps around only in one situation: when the 2 pairs of words being operated on in a group are all 8000H. In this case, the result wraps around to 80000000H.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version: The first source and destination operands are MMX registers. The second source operand is an MMX register or a 64-bit memory location.</p><p>128-bit Legacy SSE version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p>", "tooltip": "Multiplies the individual signed words of the destination operand (first operand) by the corresponding signed words of the source operand (second operand), producing temporary signed, doubleword results. The adjacent double-word results are then summed and stored in the destination operand. For example, the corresponding low-order words (15-0) and (31-16) in the source and destination operands are multiplied by one another and the double-word results are added together and stored in the low doubleword of the destination register (31-0). The same operation is performed on the other pairs of adjacent words. (Figure 4-11 shows this operation when using 64-bit operands)." }; @@ -2590,7 +2606,7 @@ function getAsmOpcode(opcode) { case "PMULHUW": return { "url": "http://www.felixcloutier.com/x86/PMULHUW.html", - "html": "<p>Performs a SIMD unsigned multiply of the packed unsigned word integers in the destination operand (first operand) and the source operand (second operand), and stores the high 16 bits of each 32-bit intermediate results in the destination operand. (Figure 4-12 shows this operation when using 64-bit operands.)</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version 64-bit operand: The source operand can be an MMX technology register or a 64-bit memory location. The destination operand is an MMX technology register.</p><p>128-bit Legacy SSE version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed. VEX.L must be 0, otherwise the instruction will #UD.</p>", + "html": "<p>Performs a SIMD unsigned multiply of the packed unsigned word integers in the destination operand (first operand) and the source operand (second operand), and stores the high 16 bits of each 32-bit intermediate results in the destination operand. (<a href=\"./PMULHUW.html#fig-4-12\">Figure 4-12</a> shows this operation when using 64-bit operands.)</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version 64-bit operand: The source operand can be an MMX technology register or a 64-bit memory location. The destination operand is an MMX technology register.</p><p>128-bit Legacy SSE version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed. VEX.L must be 0, otherwise the instruction will #UD.</p>", "tooltip": "Performs a SIMD unsigned multiply of the packed unsigned word integers in the destination operand (first operand) and the source operand (second operand), and stores the high 16 bits of each 32-bit intermediate results in the destination operand. (Figure 4-12 shows this operation when using 64-bit operands.)" }; @@ -2598,7 +2614,7 @@ function getAsmOpcode(opcode) { case "PMULHW": return { "url": "http://www.felixcloutier.com/x86/PMULHW.html", - "html": "<p>Performs a SIMD signed multiply of the packed signed word integers in the destination operand (first operand) and the source operand (second operand), and stores the high 16 bits of each intermediate 32-bit result in the destination operand. (Figure 4-12 shows this operation when using 64-bit operands.)</p><p>n 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version 64-bit operand: The source operand can be an MMX technology register or a 64-bit memory location. The destination operand is an MMX technology register.</p><p>128-bit Legacy SSE version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed. VEX.L must be 0, otherwise the instruction will #UD.</p>", + "html": "<p>Performs a SIMD signed multiply of the packed signed word integers in the destination operand (first operand) and the source operand (second operand), and stores the high 16 bits of each intermediate 32-bit result in the destination operand. (<a href=\"./PMULHUW.html#fig-4-12\">Figure 4-12</a> shows this operation when using 64-bit operands.)</p><p>n 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version 64-bit operand: The source operand can be an MMX technology register or a 64-bit memory location. The destination operand is an MMX technology register.</p><p>128-bit Legacy SSE version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed. VEX.L must be 0, otherwise the instruction will #UD.</p>", "tooltip": "Performs a SIMD signed multiply of the packed signed word integers in the destination operand (first operand) and the source operand (second operand), and stores the high 16 bits of each intermediate 32-bit result in the destination operand. (Figure 4-12 shows this operation when using 64-bit operands.)" }; @@ -2615,7 +2631,7 @@ function getAsmOpcode(opcode) { case "PMULLW": return { "url": "http://www.felixcloutier.com/x86/PMULLW.html", - "html": "<p>Performs a SIMD signed multiply of the packed signed word integers in the destination operand (first operand) and the source operand (second operand), and stores the low 16 bits of each intermediate 32-bit result in the destination operand. (Figure 4-12 shows this operation when using 64-bit operands.)</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version 64-bit operand: The source operand can be an MMX technology register or a 64-bit memory location. The destination operand is an MMX technology register.</p><p>128-bit Legacy SSE version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed. VEX.L must be 0, otherwise the instruction will #UD.</p>", + "html": "<p>Performs a SIMD signed multiply of the packed signed word integers in the destination operand (first operand) and the source operand (second operand), and stores the low 16 bits of each intermediate 32-bit result in the destination operand. (<a href=\"./PMULHUW.html#fig-4-12\">Figure 4-12</a> shows this operation when using 64-bit operands.)</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version 64-bit operand: The source operand can be an MMX technology register or a 64-bit memory location. The destination operand is an MMX technology register.</p><p>128-bit Legacy SSE version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The first source and destination operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed. VEX.L must be 0, otherwise the instruction will #UD.</p>", "tooltip": "Performs a SIMD signed multiply of the packed signed word integers in the destination operand (first operand) and the source operand (second operand), and stores the low 16 bits of each intermediate 32-bit result in the destination operand. (Figure 4-12 shows this operation when using 64-bit operands.)" }; @@ -2654,7 +2670,7 @@ function getAsmOpcode(opcode) { case "POPFQ": return { "url": "http://www.felixcloutier.com/x86/POPF%3APOPFD%3APOPFQ.html", - "html": "<p>Pops a doubleword (POPFD) from the top of the stack (if the current operand-size attribute is 32) and stores the value in the EFLAGS register, or pops a word from the top of the stack (if the operand-size attribute is 16) and stores it in the lower 16 bits of the EFLAGS register (that is, the FLAGS register). These instructions reverse the operation of the PUSHF/PUSHFD/PUSHFQ instructions.</p><p>The POPF (pop flags) and POPFD (pop flags double) mnemonics reference the same opcode. The POPF instruction is intended for use when the operand-size attribute is 16; the POPFD instruction is intended for use when the operand-size attribute is 32. Some assemblers may force the operand size to 16 for POPF and to 32 for POPFD. Others may treat the mnemonics as synonyms (POPF/POPFD) and use the setting of the operand-size attribute to determine the size of values to pop from the stack.</p><p>The effect of POPF/POPFD on the EFLAGS register changes, depending on the mode of operation. See Table 4-15 and the key below for details.</p><p>When operating in protected, compatibility, or 64-bit mode at privilege level 0 (or in real-address mode, the equivalent to privilege level 0), all non-reserved flags in the EFLAGS register except RF<sup>1</sup>, VIP, VIF, and VM may be modified. VIP, VIF and VM remain unaffected.</p><p>When operating in protected, compatibility, or 64-bit mode with a privilege level greater than 0, but less than or equal to IOPL, all flags can be modified except the IOPL field and RF, IF, VIP, VIF, and VM; these remain unaffected. The AC and ID flags can only be modified if the operand-size attribute is 32. The interrupt flag (IF) is altered only when executing at a level at least as privileged as the IOPL. If a POPF/POPFD instruction is executed with insufficient privilege, an exception does not occur but privileged bits do not change.</p>", + "html": "<p>Pops a doubleword (POPFD) from the top of the stack (if the current operand-size attribute is 32) and stores the value in the EFLAGS register, or pops a word from the top of the stack (if the operand-size attribute is 16) and stores it in the lower 16 bits of the EFLAGS register (that is, the FLAGS register). These instructions reverse the operation of the PUSHF/PUSHFD/PUSHFQ instructions.</p><p>The POPF (pop flags) and POPFD (pop flags double) mnemonics reference the same opcode. The POPF instruction is intended for use when the operand-size attribute is 16; the POPFD instruction is intended for use when the operand-size attribute is 32. Some assemblers may force the operand size to 16 for POPF and to 32 for POPFD. Others may treat the mnemonics as synonyms (POPF/POPFD) and use the setting of the operand-size attribute to determine the size of values to pop from the stack.</p><p>The effect of POPF/POPFD on the EFLAGS register changes, depending on the mode of operation. See <a href=\"./POPF:POPFD:POPFQ.html#tbl-4-15\">Table 4-15</a> and the key below for details.</p><p>When operating in protected, compatibility, or 64-bit mode at privilege level 0 (or in real-address mode, the equivalent to privilege level 0), all non-reserved flags in the EFLAGS register except RF<sup>1</sup>, VIP, VIF, and VM may be modified. VIP, VIF and VM remain unaffected.</p><p>When operating in protected, compatibility, or 64-bit mode with a privilege level greater than 0, but less than or equal to IOPL, all flags can be modified except the IOPL field and RF, IF, VIP, VIF, and VM; these remain unaffected. The AC and ID flags can only be modified if the operand-size attribute is 32. The interrupt flag (IF) is altered only when executing at a level at least as privileged as the IOPL. If a POPF/POPFD instruction is executed with insufficient privilege, an exception does not occur but privileged bits do not change.</p>", "tooltip": "Pops a doubleword (POPFD) from the top of the stack (if the current operand-size attribute is 32) and stores the value in the EFLAGS register, or pops a word from the top of the stack (if the operand-size attribute is 16) and stores it in the lower 16 bits of the EFLAGS register (that is, the FLAGS register). These instructions reverse the operation of the PUSHF/PUSHFD/PUSHFQ instructions." }; @@ -2696,7 +2712,7 @@ function getAsmOpcode(opcode) { case "PSADBW": return { "url": "http://www.felixcloutier.com/x86/PSADBW.html", - "html": "<p>Computes the absolute value of the difference of 8 unsigned byte integers from the source operand (second operand) and from the destination operand (first operand). These 8 differences are then summed to produce an unsigned word integer result that is stored in the destination operand. Figure 4-14 shows the operation of the PSADBW instruction when using 64-bit operands.</p><p>When operating on 64-bit operands, the word integer result is stored in the low word of the destination operand, and the remaining bytes in the destination operand are cleared to all 0s.</p><p>When operating on 128-bit operands, two packed results are computed. Here, the 8 low-order bytes of the source and destination operands are operated on to produce a word result that is stored in the low word of the destination operand, and the 8 high-order bytes are operated on to produce a word result that is stored in bits 64 through 79 of the destination operand. The remaining bytes of the destination operand are cleared.</p><p>For 256-bit version, the third group of 8 differences are summed to produce an unsigned word in bits[143:128] of the destination register and the fourth group of 8 differences are summed to produce an unsigned word in bits[207:192] of the destination register. The remaining words of the destination are set to 0.</p><p>For 512-bit version, the fifth group result is stored in bits [271:256] of the destination. The result from the sixth group is stored in bits [335:320]. The results for the seventh and eighth group are stored respectively in bits [399:384] and bits [463:447], respectively. The remaining bits in the destination are set to 0.</p>", + "html": "<p>Computes the absolute value of the difference of 8 unsigned byte integers from the source operand (second operand) and from the destination operand (first operand). These 8 differences are then summed to produce an unsigned word integer result that is stored in the destination operand. <a href=\"./PSADBW.html#fig-4-14\">Figure 4-14</a> shows the operation of the PSADBW instruction when using 64-bit operands.</p><p>When operating on 64-bit operands, the word integer result is stored in the low word of the destination operand, and the remaining bytes in the destination operand are cleared to all 0s.</p><p>When operating on 128-bit operands, two packed results are computed. Here, the 8 low-order bytes of the source and destination operands are operated on to produce a word result that is stored in the low word of the destination operand, and the 8 high-order bytes are operated on to produce a word result that is stored in bits 64 through 79 of the destination operand. The remaining bytes of the destination operand are cleared.</p><p>For 256-bit version, the third group of 8 differences are summed to produce an unsigned word in bits[143:128] of the destination register and the fourth group of 8 differences are summed to produce an unsigned word in bits[207:192] of the destination register. The remaining words of the destination are set to 0.</p><p>For 512-bit version, the fifth group result is stored in bits [271:256] of the destination. The result from the sixth group is stored in bits [335:320]. The results for the seventh and eighth group are stored respectively in bits [399:384] and bits [463:447], respectively. The remaining bits in the destination are set to 0.</p>", "tooltip": "Computes the absolute value of the difference of 8 unsigned byte integers from the source operand (second operand) and from the destination operand (first operand). These 8 differences are then summed to produce an unsigned word integer result that is stored in the destination operand. Figure 4-14 shows the operation of the PSADBW instruction when using 64-bit operands." }; @@ -2712,7 +2728,7 @@ function getAsmOpcode(opcode) { case "PSHUFD": return { "url": "http://www.felixcloutier.com/x86/PSHUFD.html", - "html": "<p>Copies doublewords from source operand (second operand) and inserts them in the destination operand (first operand) at the locations selected with the order operand (third operand). Figure 4-16 shows the operation of the 256-bit VPSHUFD instruction and the encoding of the order operand. Each 2-bit field in the order operand selects the contents of one doubleword location within a 128-bit lane and copy to the target element in the destination operand. For example, bits 0 and 1 of the order operand targets the first doubleword element in the low and high 128-bit lane of the destination operand for 256-bit VPSHUFD. The encoded value of bits 1:0 of the order operand (see the field encoding in Figure 4-16) determines which doubleword element (from the respective 128-bit lane) of the source operand will be copied to doubleword 0 of the destination operand.</p><p>For 128-bit operation, only the low 128-bit lane are operative. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. The order operand is an 8-bit immediate. Note that this instruction permits a doubleword in the source operand to be copied to more than one doubleword location in the destination operand.</p><p>10B - X2 ORDER Operand 11B-X7 7 6 5 4 3 2 1 0 Operand 11B-X3</p><p>The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. The order operand is an 8-bit immediate. Note that this instruction permits a doubleword in the source operand to be copied to more than one doubleword location in the destination operand.</p><p>In 64-bit mode and not encoded in VEX/EVEX, using REX.R permits this instruction to access XMM8-XMM15.</p>", + "html": "<p>Copies doublewords from source operand (second operand) and inserts them in the destination operand (first operand) at the locations selected with the order operand (third operand). <span class=\"not-imported\">Figure 4-16</span> shows the operation of the 256-bit VPSHUFD instruction and the encoding of the order operand. Each 2-bit field in the order operand selects the contents of one doubleword location within a 128-bit lane and copy to the target element in the destination operand. For example, bits 0 and 1 of the order operand targets the first doubleword element in the low and high 128-bit lane of the destination operand for 256-bit VPSHUFD. The encoded value of bits 1:0 of the order operand (see the field encoding in <span class=\"not-imported\">Figure 4-16</span>) determines which doubleword element (from the respective 128-bit lane) of the source operand will be copied to doubleword 0 of the destination operand.</p><p>For 128-bit operation, only the low 128-bit lane are operative. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. The order operand is an 8-bit immediate. Note that this instruction permits a doubleword in the source operand to be copied to more than one doubleword location in the destination operand.</p><p>10B - X2 ORDER Operand 11B-X7 7 6 5 4 3 2 1 0 Operand 11B-X3</p><p>The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. The order operand is an 8-bit immediate. Note that this instruction permits a doubleword in the source operand to be copied to more than one doubleword location in the destination operand.</p><p>In 64-bit mode and not encoded in VEX/EVEX, using REX.R permits this instruction to access XMM8-XMM15.</p>", "tooltip": "Copies doublewords from source operand (second operand) and inserts them in the destination operand (first operand) at the locations selected with the order operand (third operand). Figure 4-16 shows the operation of the 256-bit VPSHUFD instruction and the encoding of the order operand. Each 2-bit field in the order operand selects the contents of one doubleword location within a 128-bit lane and copy to the target element in the destination operand. For example, bits 0 and 1 of the order operand targets the first doubleword element in the low and high 128-bit lane of the destination operand for 256-bit VPSHUFD. The encoded value of bits 1:0 of the order operand (see the field encoding in Figure 4-16) determines which doubleword element (from the respective 128-bit lane) of the source operand will be copied to doubleword 0 of the destination operand." }; @@ -2720,7 +2736,7 @@ function getAsmOpcode(opcode) { case "PSHUFHW": return { "url": "http://www.felixcloutier.com/x86/PSHUFHW.html", - "html": "<p>Copies words from the high quadword of a 128-bit lane of the source operand and inserts them in the high quadword of the destination operand at word locations (of the respective lane) selected with the immediate operand. This 256-bit operation is similar to the in-lane operation used by the 256-bit VPSHUFD instruction, which is illustrated in Figure 4-16. For 128-bit operation, only the low 128-bit lane is operative. Each 2-bit field in the immediate operand selects the contents of one word location in the high quadword of the destination operand. The binary encodings of the immediate operand fields select words (0, 1, 2 or 3, 4) from the high quadword of the source operand to be copied to the destination operand. The low quadword of the source operand is copied to the low quadword of the destination operand, for each 128-bit lane.</p><p>Note that this instruction permits a word in the high quadword of the source operand to be copied to more than one word location in the high quadword of the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>128-bit Legacy SSE version: The destination operand is an XMM register. The source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The destination operand is an XMM register. The source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed. VEX.vvvv is reserved and must be 1111b, VEX.L must be 0, otherwise the instruction will #UD.</p>", + "html": "<p>Copies words from the high quadword of a 128-bit lane of the source operand and inserts them in the high quadword of the destination operand at word locations (of the respective lane) selected with the immediate operand. This 256-bit operation is similar to the in-lane operation used by the 256-bit VPSHUFD instruction, which is illustrated in <span class=\"not-imported\">Figure 4-16</span>. For 128-bit operation, only the low 128-bit lane is operative. Each 2-bit field in the immediate operand selects the contents of one word location in the high quadword of the destination operand. The binary encodings of the immediate operand fields select words (0, 1, 2 or 3, 4) from the high quadword of the source operand to be copied to the destination operand. The low quadword of the source operand is copied to the low quadword of the destination operand, for each 128-bit lane.</p><p>Note that this instruction permits a word in the high quadword of the source operand to be copied to more than one word location in the high quadword of the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>128-bit Legacy SSE version: The destination operand is an XMM register. The source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The destination operand is an XMM register. The source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed. VEX.vvvv is reserved and must be 1111b, VEX.L must be 0, otherwise the instruction will #UD.</p>", "tooltip": "Copies words from the high quadword of a 128-bit lane of the source operand and inserts them in the high quadword of the destination operand at word locations (of the respective lane) selected with the immediate operand. This 256-bit operation is similar to the in-lane operation used by the 256-bit VPSHUFD instruction, which is illustrated in Figure 4-16. For 128-bit operation, only the low 128-bit lane is operative. Each 2-bit field in the immediate operand selects the contents of one word location in the high quadword of the destination operand. The binary encodings of the immediate operand fields select words (0, 1, 2 or 3, 4) from the high quadword of the source operand to be copied to the destination operand. The low quadword of the source operand is copied to the low quadword of the destination operand, for each 128-bit lane." }; @@ -2728,14 +2744,14 @@ function getAsmOpcode(opcode) { case "VPSHUFLW": return { "url": "http://www.felixcloutier.com/x86/PSHUFLW.html", - "html": "<p>Copies words from the low quadword of a 128-bit lane of the source operand and inserts them in the low quadword of the destination operand at word locations (of the respective lane) selected with the immediate operand. The 256-bit operation is similar to the in-lane operation used by the 256-bit VPSHUFD instruction, which is illustrated in Figure 4-16. For 128-bit operation, only the low 128-bit lane is operative. Each 2-bit field in the immediate operand selects the contents of one word location in the low quadword of the destination operand. The binary encodings of the immediate operand fields select words (0, 1, 2 or 3) from the low quadword of the source operand to be copied to the destination operand. The high quadword of the source operand is copied to the high quadword of the destination operand, for each 128-bit lane.</p><p>Note that this instruction permits a word in the low quadword of the source operand to be copied to more than one word location in the low quadword of the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>128-bit Legacy SSE version: The destination operand is an XMM register. The source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The destination operand is an XMM register. The source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed.</p>", + "html": "<p>Copies words from the low quadword of a 128-bit lane of the source operand and inserts them in the low quadword of the destination operand at word locations (of the respective lane) selected with the immediate operand. The 256-bit operation is similar to the in-lane operation used by the 256-bit VPSHUFD instruction, which is illustrated in <span class=\"not-imported\">Figure 4-16</span>. For 128-bit operation, only the low 128-bit lane is operative. Each 2-bit field in the immediate operand selects the contents of one word location in the low quadword of the destination operand. The binary encodings of the immediate operand fields select words (0, 1, 2 or 3) from the low quadword of the source operand to be copied to the destination operand. The high quadword of the source operand is copied to the high quadword of the destination operand, for each 128-bit lane.</p><p>Note that this instruction permits a word in the low quadword of the source operand to be copied to more than one word location in the low quadword of the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>128-bit Legacy SSE version: The destination operand is an XMM register. The source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: The destination operand is an XMM register. The source operand can be an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the destination YMM register are zeroed.</p>", "tooltip": "Copies words from the low quadword of a 128-bit lane of the source operand and inserts them in the low quadword of the destination operand at word locations (of the respective lane) selected with the immediate operand. The 256-bit operation is similar to the in-lane operation used by the 256-bit VPSHUFD instruction, which is illustrated in Figure 4-16. For 128-bit operation, only the low 128-bit lane is operative. Each 2-bit field in the immediate operand selects the contents of one word location in the low quadword of the destination operand. The binary encodings of the immediate operand fields select words (0, 1, 2 or 3) from the low quadword of the source operand to be copied to the destination operand. The high quadword of the source operand is copied to the high quadword of the destination operand, for each 128-bit lane." }; case "PSHUFW": return { "url": "http://www.felixcloutier.com/x86/PSHUFW.html", - "html": "<p>Copies words from the source operand (second operand) and inserts them in the destination operand (first operand) at word locations selected with the order operand (third operand). This operation is similar to the operation used by the PSHUFD instruction, which is illustrated in Figure 4-16. For the PSHUFW instruction, each 2-bit field in the order operand selects the contents of one word location in the destination operand. The encodings of the order operand fields select words from the source operand to be copied to the destination operand.</p><p>The source operand can be an MMX technology register or a 64-bit memory location. The destination operand is an MMX technology register. The order operand is an 8-bit immediate. Note that this instruction permits a word in the source operand to be copied to more than one word location in the destination operand.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", + "html": "<p>Copies words from the source operand (second operand) and inserts them in the destination operand (first operand) at word locations selected with the order operand (third operand). This operation is similar to the operation used by the PSHUFD instruction, which is illustrated in <span class=\"not-imported\">Figure 4-16</span>. For the PSHUFW instruction, each 2-bit field in the order operand selects the contents of one word location in the destination operand. The encodings of the order operand fields select words from the source operand to be copied to the destination operand.</p><p>The source operand can be an MMX technology register or a 64-bit memory location. The destination operand is an MMX technology register. The order operand is an 8-bit immediate. Note that this instruction permits a word in the source operand to be copied to more than one word location in the destination operand.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", "tooltip": "Copies words from the source operand (second operand) and inserts them in the destination operand (first operand) at word locations selected with the order operand (third operand). This operation is similar to the operation used by the PSHUFD instruction, which is illustrated in Figure 4-16. For the PSHUFW instruction, each 2-bit field in the order operand selects the contents of one word location in the destination operand. The encodings of the order operand fields select words from the source operand to be copied to the destination operand." }; @@ -2767,7 +2783,7 @@ function getAsmOpcode(opcode) { case "VPSLLW": return { "url": "http://www.felixcloutier.com/x86/PSLLW%3APSLLD%3APSLLQ.html", - "html": "<p>Shifts the bits in the individual data elements (words, doublewords, or quadword) in the destination operand (first operand) to the left by the number of bits specified in the count operand (second operand). As the bits in the data elements are shifted left, the empty low-order bits are cleared (set to 0). If the value specified by the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a quadword), then the destination operand is set to all 0s. Figure 4-17 gives an example of shifting words in a 64-bit operand.</p><p>The (V)PSLLW instruction shifts each of the words in the destination operand to the left by the number of bits specified in the count operand; the (V)PSLLD instruction shifts each of the doublewords in the destination operand; and the (V)PSLLQ instruction shifts the quadword (or quadwords) in the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE instructions 64-bit operand: The destination operand is an MMX technology register; the count operand can be either an MMX technology register or an 64-bit memory location.</p><p>128-bit Legacy SSE version: The destination and first source operands are XMM registers. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged. The count operand can be either an XMM register or a 128-bit memory location or an 8-bit immediate. If the count operand is a memory address, 128 bits are loaded but the upper 64 bits are ignored.</p>", + "html": "<p>Shifts the bits in the individual data elements (words, doublewords, or quadword) in the destination operand (first operand) to the left by the number of bits specified in the count operand (second operand). As the bits in the data elements are shifted left, the empty low-order bits are cleared (set to 0). If the value specified by the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a quadword), then the destination operand is set to all 0s. <a href=\"./PSLLW:PSLLD:PSLLQ.html#fig-4-17\">Figure 4-17</a> gives an example of shifting words in a 64-bit operand.</p><p>The (V)PSLLW instruction shifts each of the words in the destination operand to the left by the number of bits specified in the count operand; the (V)PSLLD instruction shifts each of the doublewords in the destination operand; and the (V)PSLLQ instruction shifts the quadword (or quadwords) in the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE instructions 64-bit operand: The destination operand is an MMX technology register; the count operand can be either an MMX technology register or an 64-bit memory location.</p><p>128-bit Legacy SSE version: The destination and first source operands are XMM registers. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged. The count operand can be either an XMM register or a 128-bit memory location or an 8-bit immediate. If the count operand is a memory address, 128 bits are loaded but the upper 64 bits are ignored.</p>", "tooltip": "Shifts the bits in the individual data elements (words, doublewords, or quadword) in the destination operand (first operand) to the left by the number of bits specified in the count operand (second operand). As the bits in the data elements are shifted left, the empty low-order bits are cleared (set to 0). If the value specified by the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a quadword), then the destination operand is set to all 0s. Figure 4-17 gives an example of shifting words in a 64-bit operand." }; @@ -2777,7 +2793,7 @@ function getAsmOpcode(opcode) { case "VPSRAW": return { "url": "http://www.felixcloutier.com/x86/PSRAW%3APSRAD%3APSRAQ.html", - "html": "<p>Shifts the bits in the individual data elements (words, doublewords or quadwords) in the destination operand (first operand) to the right by the number of bits specified in the count operand (second operand). As the bits in the data elements are shifted right, the empty high-order bits are filled with the initial value of the sign bit of the data element. If the value specified by the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for quadwords), each destination data element is filled with the initial value of the sign bit of the element. (Figure 4-18 gives an example of shifting words in a 64-bit operand.)</p><p>Note that only the first 64-bits of a 128-bit count operand are checked to compute the count. If the second source operand is a memory address, 128 bits are loaded.</p><p>The (V)PSRAW instruction shifts each of the words in the destination operand to the right by the number of bits specified in the count operand, and the (V)PSRAD instruction shifts each of the doublewords in the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE instructions 64-bit operand: The destination operand is an MMX technology register; the count operand can be either an MMX technology register or an 64-bit memory location.</p>", + "html": "<p>Shifts the bits in the individual data elements (words, doublewords or quadwords) in the destination operand (first operand) to the right by the number of bits specified in the count operand (second operand). As the bits in the data elements are shifted right, the empty high-order bits are filled with the initial value of the sign bit of the data element. If the value specified by the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for quadwords), each destination data element is filled with the initial value of the sign bit of the element. (<a href=\"./PSRAW:PSRAD:PSRAQ.html#fig-4-18\">Figure 4-18</a> gives an example of shifting words in a 64-bit operand.)</p><p>Note that only the first 64-bits of a 128-bit count operand are checked to compute the count. If the second source operand is a memory address, 128 bits are loaded.</p><p>The (V)PSRAW instruction shifts each of the words in the destination operand to the right by the number of bits specified in the count operand, and the (V)PSRAD instruction shifts each of the doublewords in the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE instructions 64-bit operand: The destination operand is an MMX technology register; the count operand can be either an MMX technology register or an 64-bit memory location.</p>", "tooltip": "Shifts the bits in the individual data elements (words, doublewords or quadwords) in the destination operand (first operand) to the right by the number of bits specified in the count operand (second operand). As the bits in the data elements are shifted right, the empty high-order bits are filled with the initial value of the sign bit of the data element. If the value specified by the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for quadwords), each destination data element is filled with the initial value of the sign bit of the element. (Figure 4-18 gives an example of shifting words in a 64-bit operand.)" }; @@ -2797,7 +2813,7 @@ function getAsmOpcode(opcode) { case "PSRLD": return { "url": "http://www.felixcloutier.com/x86/PSRLW%3APSRLD%3APSRLQ.html", - "html": "<p>Shifts the bits in the individual data elements (words, doublewords, or quadword) in the destination operand (first operand) to the right by the number of bits specified in the count operand (second operand). As the bits in the data elements are shifted right, the empty high-order bits are cleared (set to 0). If the value specified by the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a quadword), then the destination operand is set to all 0s. Figure 4-19 gives an example of shifting words in a 64-bit operand.</p><p>Note that only the low 64-bits of a 128-bit count operand are checked to compute the count.</p><p>The (V)PSRLW instruction shifts each of the words in the destination operand to the right by the number of bits specified in the count operand; the (V)PSRLD instruction shifts each of the doublewords in the destination operand; and the PSRLQ instruction shifts the quadword (or quadwords) in the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE instruction 64-bit operand: The destination operand is an MMX technology register; the count operand can be either an MMX technology register or an 64-bit memory location.</p>", + "html": "<p>Shifts the bits in the individual data elements (words, doublewords, or quadword) in the destination operand (first operand) to the right by the number of bits specified in the count operand (second operand). As the bits in the data elements are shifted right, the empty high-order bits are cleared (set to 0). If the value specified by the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a quadword), then the destination operand is set to all 0s. <a href=\"./PSRLW:PSRLD:PSRLQ.html#fig-4-19\">Figure 4-19</a> gives an example of shifting words in a 64-bit operand.</p><p>Note that only the low 64-bits of a 128-bit count operand are checked to compute the count.</p><p>The (V)PSRLW instruction shifts each of the words in the destination operand to the right by the number of bits specified in the count operand; the (V)PSRLD instruction shifts each of the doublewords in the destination operand; and the PSRLQ instruction shifts the quadword (or quadwords) in the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE instruction 64-bit operand: The destination operand is an MMX technology register; the count operand can be either an MMX technology register or an 64-bit memory location.</p>", "tooltip": "Shifts the bits in the individual data elements (words, doublewords, or quadword) in the destination operand (first operand) to the right by the number of bits specified in the count operand (second operand). As the bits in the data elements are shifted right, the empty high-order bits are cleared (set to 0). If the value specified by the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a quadword), then the destination operand is set to all 0s. Figure 4-19 gives an example of shifting words in a 64-bit operand." }; @@ -2809,7 +2825,7 @@ function getAsmOpcode(opcode) { case "VPSUBW": return { "url": "http://www.felixcloutier.com/x86/PSUBB%3APSUBW%3APSUBD.html", - "html": "<p>Performs a SIMD subtract of the packed integers of the source operand (second operand) from the packed integers of the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with wraparound, as described in the following paragraphs.</p><p>The (V)PSUBB instruction subtracts packed byte integers. When an individual result is too large or too small to be represented in a byte, the result is wrapped around and the low 8 bits are written to the destination element.</p><p>The (V)PSUBW instruction subtracts packed word integers. When an individual result is too large or too small to be represented in a word, the result is wrapped around and the low 16 bits are written to the destination element.</p><p>The (V)PSUBD instruction subtracts packed doubleword integers. When an individual result is too large or too small to be represented in a doubleword, the result is wrapped around and the low 32 bits are written to the destination element.</p><p>Note that the (V)PSUBB, (V)PSUBW, and (V)PSUBD instructions can operate on either unsigned or signed (two's complement notation) packed integers; however, it does not set bits in the EFLAGS register to indicate overflow and/or a carry. To prevent undetected overflow conditions, software must control the ranges of values upon which it operates.</p>", + "html": "<p>Performs a SIMD subtract of the packed integers of the source operand (second operand) from the packed integers of the destination operand (first operand), and stores the packed integer results in the destination operand. See <span class=\"not-imported\">Figure 9-4</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with wraparound, as described in the following paragraphs.</p><p>The (V)PSUBB instruction subtracts packed byte integers. When an individual result is too large or too small to be represented in a byte, the result is wrapped around and the low 8 bits are written to the destination element.</p><p>The (V)PSUBW instruction subtracts packed word integers. When an individual result is too large or too small to be represented in a word, the result is wrapped around and the low 16 bits are written to the destination element.</p><p>The (V)PSUBD instruction subtracts packed doubleword integers. When an individual result is too large or too small to be represented in a doubleword, the result is wrapped around and the low 32 bits are written to the destination element.</p><p>Note that the (V)PSUBB, (V)PSUBW, and (V)PSUBD instructions can operate on either unsigned or signed (two's complement notation) packed integers; however, it does not set bits in the EFLAGS register to indicate overflow and/or a carry. To prevent undetected overflow conditions, software must control the ranges of values upon which it operates.</p>", "tooltip": "Performs a SIMD subtract of the packed integers of the source operand (second operand) from the packed integers of the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a SIMD operation. Overflow is handled with wraparound, as described in the following paragraphs." }; @@ -2827,7 +2843,7 @@ function getAsmOpcode(opcode) { case "PSUBSB": return { "url": "http://www.felixcloutier.com/x86/PSUBSB%3APSUBSW.html", - "html": "<p>Performs a SIMD subtract of the packed signed integers of the source operand (second operand) from the packed signed integers of the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with signed saturation, as described in the following paragraphs.</p><p>The (V)PSUBSB instruction subtracts packed signed byte integers. When an individual byte result is beyond the range of a signed byte integer (that is, greater than 7FH or less than 80H), the saturated value of 7FH or 80H, respectively, is written to the destination operand.</p><p>The (V)PSUBSW instruction subtracts packed signed word integers. When an individual word result is beyond the range of a signed word integer (that is, greater than 7FFFH or less than 8000H), the saturated value of 7FFFH or 8000H, respectively, is written to the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version 64-bit operand: The destination operand must be an MMX technology register and the source operand can be either an MMX technology register or a 64-bit memory location.</p>", + "html": "<p>Performs a SIMD subtract of the packed signed integers of the source operand (second operand) from the packed signed integers of the destination operand (first operand), and stores the packed integer results in the destination operand. See <span class=\"not-imported\">Figure 9-4</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with signed saturation, as described in the following paragraphs.</p><p>The (V)PSUBSB instruction subtracts packed signed byte integers. When an individual byte result is beyond the range of a signed byte integer (that is, greater than 7FH or less than 80H), the saturated value of 7FH or 80H, respectively, is written to the destination operand.</p><p>The (V)PSUBSW instruction subtracts packed signed word integers. When an individual word result is beyond the range of a signed word integer (that is, greater than 7FFFH or less than 8000H), the saturated value of 7FFFH or 8000H, respectively, is written to the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p><p>Legacy SSE version 64-bit operand: The destination operand must be an MMX technology register and the source operand can be either an MMX technology register or a 64-bit memory location.</p>", "tooltip": "Performs a SIMD subtract of the packed signed integers of the source operand (second operand) from the packed signed integers of the destination operand (first operand), and stores the packed integer results in the destination operand. See Figure 9-4 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a SIMD operation. Overflow is handled with signed saturation, as described in the following paragraphs." }; @@ -2837,7 +2853,7 @@ function getAsmOpcode(opcode) { case "PSUBUSB": return { "url": "http://www.felixcloutier.com/x86/PSUBUSB%3APSUBUSW.html", - "html": "<p>Performs a SIMD subtract of the packed unsigned integers of the source operand (second operand) from the packed unsigned integers of the destination operand (first operand), and stores the packed unsigned integer results in the destination operand. See Figure 9-4 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with unsigned saturation, as described in the following paragraphs.</p><p>These instructions can operate on either 64-bit or 128-bit operands.</p><p>The (V)PSUBUSB instruction subtracts packed unsigned byte integers. When an individual byte result is less than zero, the saturated value of 00H is written to the destination operand.</p><p>The (V)PSUBUSW instruction subtracts packed unsigned word integers. When an individual word result is less than zero, the saturated value of 0000H is written to the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", + "html": "<p>Performs a SIMD subtract of the packed unsigned integers of the source operand (second operand) from the packed unsigned integers of the destination operand (first operand), and stores the packed unsigned integer results in the destination operand. See <span class=\"not-imported\">Figure 9-4</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD operation. Overflow is handled with unsigned saturation, as described in the following paragraphs.</p><p>These instructions can operate on either 64-bit or 128-bit operands.</p><p>The (V)PSUBUSB instruction subtracts packed unsigned byte integers. When an individual byte result is less than zero, the saturated value of 00H is written to the destination operand.</p><p>The (V)PSUBUSW instruction subtracts packed unsigned word integers. When an individual word result is less than zero, the saturated value of 0000H is written to the destination operand.</p><p>In 64-bit mode and not encoded with VEX/EVEX, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", "tooltip": "Performs a SIMD subtract of the packed unsigned integers of the source operand (second operand) from the packed unsigned integers of the destination operand (first operand), and stores the packed unsigned integer results in the destination operand. See Figure 9-4 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a SIMD operation. Overflow is handled with unsigned saturation, as described in the following paragraphs." }; @@ -2866,7 +2882,7 @@ function getAsmOpcode(opcode) { case "VPUNPCKHDQ": return { "url": "http://www.felixcloutier.com/x86/PUNPCKHBW%3APUNPCKHWD%3APUNPCKHDQ%3APUNPCKHQDQ.html", - "html": "<p>Unpacks and interleaves the high-order data elements (bytes, words, doublewords, or quadwords) of the destination operand (first operand) and source operand (second operand) into the destination operand. Figure 4-20 shows the unpack operation for bytes in 64-bit operands. The low-order data elements are ignored.</p>", + "html": "<p>Unpacks and interleaves the high-order data elements (bytes, words, doublewords, or quadwords) of the destination operand (first operand) and source operand (second operand) into the destination operand. <a href=\"./PUNPCKHBW:PUNPCKHWD:PUNPCKHDQ:PUNPCKHQDQ.html#fig-4-20\">Figure 4-20</a> shows the unpack operation for bytes in 64-bit operands. The low-order data elements are ignored.</p>", "tooltip": "Unpacks and interleaves the high-order data elements (bytes, words, doublewords, or quadwords) of the destination operand (first operand) and source operand (second operand) into the destination operand. Figure 4-20 shows the unpack operation for bytes in 64-bit operands. The low-order data elements are ignored." }; @@ -2880,7 +2896,7 @@ function getAsmOpcode(opcode) { case "PUNPCKLDQ": return { "url": "http://www.felixcloutier.com/x86/PUNPCKLBW%3APUNPCKLWD%3APUNPCKLDQ%3APUNPCKLQDQ.html", - "html": "<p>Unpacks and interleaves the low-order data elements (bytes, words, doublewords, and quadwords) of the destination operand (first operand) and source operand (second operand) into the destination operand. (Figure 4-22 shows the unpack operation for bytes in 64-bit operands.). The high-order data elements are ignored.</p>", + "html": "<p>Unpacks and interleaves the low-order data elements (bytes, words, doublewords, and quadwords) of the destination operand (first operand) and source operand (second operand) into the destination operand. (<a href=\"./PUNPCKLBW:PUNPCKLWD:PUNPCKLDQ:PUNPCKLQDQ.html#fig-4-22\">Figure 4-22</a> shows the unpack operation for bytes in 64-bit operands.). The high-order data elements are ignored.</p>", "tooltip": "Unpacks and interleaves the low-order data elements (bytes, words, doublewords, and quadwords) of the destination operand (first operand) and source operand (second operand) into the destination operand. (Figure 4-22 shows the unpack operation for bytes in 64-bit operands.). The high-order data elements are ignored." }; @@ -2932,7 +2948,7 @@ function getAsmOpcode(opcode) { case "VRCPPS": return { "url": "http://www.felixcloutier.com/x86/RCPPS.html", - "html": "<p>Performs a SIMD computation of the approximate reciprocals of the four packed single-precision floating-point values in the source operand (second operand) stores the packed single-precision floating-point results in the destination operand. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. See Figure 10-5 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD single-precision floating-point operation.</p><p>The relative error for this approximation is:</p><p>|Relative Error| \u2264 1.5 \u2217 2<sup>\u221212</sup></p><p>The RCPPS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e of the sign of the source value is returned. A denormal source value is treated as a 0.0 (of the same sign). Tiny results (see Section 4.9.1.5, \u201cNumeric Underflow Exception (#U)\u201d in <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>) are always flushed to 0.0, with the sign of the operand. (Input values greater than or equal to |1.11111111110100000000000B\u22172<sup>125</sup>| are guaranteed to not produce tiny results; input values less than or equal to |1.00000000000110000000001B*2<sup>126</sup>| are guaranteed to produce tiny results, which are in turn flushed to 0.0; and input values in between this range may or may not produce tiny results, depending on the implementation.) When a source value is an SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", + "html": "<p>Performs a SIMD computation of the approximate reciprocals of the four packed single-precision floating-point values in the source operand (second operand) stores the packed single-precision floating-point results in the destination operand. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. See <span class=\"not-imported\">Figure 10-5</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD single-precision floating-point operation.</p><p>The relative error for this approximation is:</p><p>|Relative Error| \u2264 1.5 \u2217 2<sup>\u221212</sup></p><p>The RCPPS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e of the sign of the source value is returned. A denormal source value is treated as a 0.0 (of the same sign). Tiny results (see Section 4.9.1.5, \u201cNumeric Underflow Exception (#U)\u201d in <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>) are always flushed to 0.0, with the sign of the operand. (Input values greater than or equal to |1.11111111110100000000000B\u22172<sup>125</sup>| are guaranteed to not produce tiny results; input values less than or equal to |1.00000000000110000000001B*2<sup>126</sup>| are guaranteed to produce tiny results, which are in turn flushed to 0.0; and input values in between this range may or may not produce tiny results, depending on the implementation.) When a source value is an SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", "tooltip": "Performs a SIMD computation of the approximate reciprocals of the four packed single-precision floating-point values in the source operand (second operand) stores the packed single-precision floating-point results in the destination operand. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. See Figure 10-5 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a SIMD single-precision floating-point operation." }; @@ -2940,7 +2956,7 @@ function getAsmOpcode(opcode) { case "VRCPSS": return { "url": "http://www.felixcloutier.com/x86/RCPSS.html", - "html": "<p>Computes of an approximate reciprocal of the low single-precision floating-point value in the source operand (second operand) and stores the single-precision floating-point result in the destination operand. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register. The three high-order doublewords of the destination operand remain unchanged. See Figure 10-6 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a scalar single-precision floating-point operation.</p><p>The relative error for this approximation is:</p><p>|Relative Error| \u2264 1.5 \u2217 2<sup>\u221212</sup></p><p>The RCPSS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e of the sign of the source value is returned. A denormal source value is treated as a 0.0 (of the same sign). Tiny results (see Section 4.9.1.5, \u201cNumeric Underflow Exception (#U)\u201d in <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>) are always flushed to 0.0, with the sign of the operand. (Input values greater than or equal to |1.11111111110100000000000B\u22172<sup>125</sup>| are guaranteed to not produce tiny results; input values less than or equal to |1.00000000000110000000001B*2<sup>126</sup>| are guaranteed to produce tiny results, which are in turn flushed to 0.0; and input values in between this range may or may not produce tiny results, depending on the implementation.) When a source value is an SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", + "html": "<p>Computes of an approximate reciprocal of the low single-precision floating-point value in the source operand (second operand) and stores the single-precision floating-point result in the destination operand. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register. The three high-order doublewords of the destination operand remain unchanged. See <span class=\"not-imported\">Figure 10-6</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a scalar single-precision floating-point operation.</p><p>The relative error for this approximation is:</p><p>|Relative Error| \u2264 1.5 \u2217 2<sup>\u221212</sup></p><p>The RCPSS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e of the sign of the source value is returned. A denormal source value is treated as a 0.0 (of the same sign). Tiny results (see Section 4.9.1.5, \u201cNumeric Underflow Exception (#U)\u201d in <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>) are always flushed to 0.0, with the sign of the operand. (Input values greater than or equal to |1.11111111110100000000000B\u22172<sup>125</sup>| are guaranteed to not produce tiny results; input values less than or equal to |1.00000000000110000000001B*2<sup>126</sup>| are guaranteed to produce tiny results, which are in turn flushed to 0.0; and input values in between this range may or may not produce tiny results, depending on the implementation.) When a source value is an SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", "tooltip": "Computes of an approximate reciprocal of the low single-precision floating-point value in the source operand (second operand) and stores the single-precision floating-point result in the destination operand. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register. The three high-order doublewords of the destination operand remain unchanged. See Figure 10-6 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a scalar single-precision floating-point operation." }; @@ -2969,24 +2985,10 @@ function getAsmOpcode(opcode) { case "RDPMC": return { "url": "http://www.felixcloutier.com/x86/RDPMC.html", - "html": "<p>The EAX register is loaded with the low-order 32 bits. The EDX register is loaded with the supported high-order bits of the counter. The number of high-order bits loaded into EDX is implementation specific on processors that do no support architectural performance monitoring. The width of fixed-function and general-purpose performance counters on processors supporting architectural performance monitoring are reported by CPUID 0AH leaf. See below for the treatment of the EDX register for \u201cfast\u201d reads.</p><p>The ECX register specifies the counter type (if the processor supports architectural performance monitoring) and counter index. Counter type is specified in ECX[30] to select one of two type of performance counters. If the processor does not support architectural performance monitoring, ECX[30:0] specifies the counter index; otherwise ECX[29:0] specifies the index relative to the base of each counter type. ECX[31] selects \u201cfast\u201d read mode if supported. The two counter types are:</p><p>The width of fixed-function performance counters and general-purpose performance counters on processor supporting architectural performance monitoring are reported by CPUID 0AH leaf. The width of general-purpose performance counters are 40-bits for processors that do not support architectural performance monitoring counters. The width of special-purpose performance counters are implementation specific.</p><p>Table 4-16 lists valid indices of the general-purpose and special-purpose performance counters according to the DisplayFamily_DisplayModel values of CPUID encoding for each processor family (see CPUID instruction in Chapter 3, \u201cInstruction Set Reference, A-L\u201d in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2A</em>).</p><p>Processors based on Intel NetBurst microarchitecture support \u201cfast\u201d (32-bit) and \u201cslow\u201d (40-bit) reads on the first 18 performance counters. Selected this option using ECX[31]. If bit 31 is set, RDPMC reads only the low 32 bits of the selected performance counter. If bit 31 is clear, all 40 bits are read. A 32-bit result is returned in EAX and EDX is set to 0. A 32-bit read executes faster on these processors than a full 40-bit read.</p>", + "html": "<p>The EAX register is loaded with the low-order 32 bits. The EDX register is loaded with the supported high-order bits of the counter. The number of high-order bits loaded into EDX is implementation specific on processors that do no support architectural performance monitoring. The width of fixed-function and general-purpose performance counters on processors supporting architectural performance monitoring are reported by CPUID 0AH leaf. See below for the treatment of the EDX register for \u201cfast\u201d reads.</p><p>The ECX register specifies the counter type (if the processor supports architectural performance monitoring) and counter index. Counter type is specified in ECX[30] to select one of two type of performance counters. If the processor does not support architectural performance monitoring, ECX[30:0] specifies the counter index; otherwise ECX[29:0] specifies the index relative to the base of each counter type. ECX[31] selects \u201cfast\u201d read mode if supported. The two counter types are:</p><p>The width of fixed-function performance counters and general-purpose performance counters on processors supporting architectural performance monitoring are reported by CPUID 0AH leaf. The width of general-purpose performance counters are 40-bits for processors that do not support architectural performance monitoring counters. The width of special-purpose performance counters are implementation specific.</p><p>When in protected or virtual 8086 mode, the performance-monitoring counters enabled (PCE) flag in register CR4 restricts the use of the RDPMC instruction as follows. When the PCE flag is set, the RDPMC instruction can be executed at any privilege level; when the flag is clear, the instruction can only be executed at privilege level 0. (When in real-address mode, the RDPMC instruction is always enabled.)</p><p>The performance-monitoring counters can also be read with the RDMSR instruction, when executing at privilege level 0.</p>", "tooltip": "The EAX register is loaded with the low-order 32 bits. The EDX register is loaded with the supported high-order bits of the counter. The number of high-order bits loaded into EDX is implementation specific on processors that do no support architectural performance monitoring. The width of fixed-function and general-purpose performance counters on processors supporting architectural performance monitoring are reported by CPUID 0AH leaf. See below for the treatment of the EDX register for \u201cfast\u201d reads." }; - case "RDRAND": - return { - "url": "http://www.felixcloutier.com/x86/RDRAND.html", - "html": "<p>Loads a hardware generated random value and store it in the destination register. The size of the random value is determined by the destination register size and operating mode. The Carry Flag indicates whether a random value is available at the time the instruction is executed. CF=1 indicates that the data in the destination is valid. Otherwise CF=0 and the data in the destination operand will be returned as zeros for the specified width. All other flags are forced to 0 in either situation. Software must check the state of CF=1 for determining if a valid random value has been returned, otherwise it is expected to loop and retry execution of RDRAND (see <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, Section 7.3.17, \u201cRandom Number Generator Instructions\u201d).</p><p>This instruction is available at all privilege levels.</p><p>In 64-bit mode, the instruction's default operation size is 32 bits. Using a REX prefix in the form of REX.B permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bit operands. See the summary chart at the beginning of this section for encoding data and limits.</p>", - "tooltip": "Loads a hardware generated random value and store it in the destination register. The size of the random value is determined by the destination register size and operating mode. The Carry Flag indicates whether a random value is available at the time the instruction is executed. CF=1 indicates that the data in the destination is valid. Otherwise CF=0 and the data in the destination operand will be returned as zeros for the specified width. All other flags are forced to 0 in either situation. Software must check the state of CF=1 for determining if a valid random value has been returned, otherwise it is expected to loop and retry execution of RDRAND (see Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, Section 7.3.17, \u201cRandom Number Generator Instructions\u201d)." - }; - - case "RDSEED": - return { - "url": "http://www.felixcloutier.com/x86/RDSEED.html", - "html": "<p>Loads a hardware generated random value and store it in the destination register. The random value is generated from an Enhanced NRBG (Non Deterministic Random Bit Generator) that is compliant to NIST SP800-90B and NIST SP800-90C in the XOR construction mode. The size of the random value is determined by the destination register size and operating mode. The Carry Flag indicates whether a random value is available at the time the instruction is executed. CF=1 indicates that the data in the destination is valid. Otherwise CF=0 and the data in the destination operand will be returned as zeros for the specified width. All other flags are forced to 0 in either situation. Software must check the state of CF=1 for determining if a valid random seed value has been returned, otherwise it is expected to loop and retry execution of RDSEED (see Section 1.2).</p><p>The RDSEED instruction is available at all privilege levels. The RDSEED instruction executes normally either inside or outside a transaction region.</p><p>In 64-bit mode, the instruction's default operation size is 32 bits. Using a REX prefix in the form of REX.B permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bit operands. See the summary chart at the beginning of this section for encoding data and limits.</p>", - "tooltip": "Loads a hardware generated random value and store it in the destination register. The random value is generated from an Enhanced NRBG (Non Deterministic Random Bit Generator) that is compliant to NIST SP800-90B and NIST SP800-90C in the XOR construction mode. The size of the random value is determined by the destination register size and operating mode. The Carry Flag indicates whether a random value is available at the time the instruction is executed. CF=1 indicates that the data in the destination is valid. Otherwise CF=0 and the data in the destination operand will be returned as zeros for the specified width. All other flags are forced to 0 in either situation. Software must check the state of CF=1 for determining if a valid random seed value has been returned, otherwise it is expected to loop and retry execution of RDSEED (see Section 1.2)." - }; - case "RDTSC": return { "url": "http://www.felixcloutier.com/x86/RDTSC.html", @@ -3006,7 +3008,7 @@ function getAsmOpcode(opcode) { case "REPNE": return { "url": "http://www.felixcloutier.com/x86/REP%3AREPE%3AREPZ%3AREPNE%3AREPNZ.html", - "html": "<p>Repeats a string instruction the number of times specified in the count register or until the indicated condition of the ZF flag is no longer met. The REP (repeat), REPE (repeat while equal), REPNE (repeat while not equal), REPZ (repeat while zero), and REPNZ (repeat while not zero) mnemonics are prefixes that can be added to one of the string instructions. The REP prefix can be added to the INS, OUTS, MOVS, LODS, and STOS instructions, and the REPE, REPNE, REPZ, and REPNZ prefixes can be added to the CMPS and SCAS instructions. (The REPZ and REPNZ prefixes are synonymous forms of the REPE and REPNE prefixes, respectively.) The F3H prefix is defined for the following instructions and undefined for the rest:</p><p>The REP prefixes apply only to one string instruction at a time. To repeat a block of instructions, use the LOOP instruction or another looping construct. All of these repeat prefixes cause the associated instruction to be repeated until the count in register is decremented to 0. See Table 4-17.</p><p>The REPE, REPNE, REPZ, and REPNZ prefixes also check the state of the ZF flag after each iteration and terminate the repeat loop if the ZF flag is not in the specified state. When both termination conditions are tested, the cause of a repeat termination can be determined either by testing the count register with a JECXZ instruction or by testing the ZF flag (with a JZ, JNZ, or JNE instruction).</p><p>When the REPE/REPZ and REPNE/REPNZ prefixes are used, the ZF flag does not require initialization because both the CMPS and SCAS instructions affect the ZF flag according to the results of the comparisons they make.</p><p>A repeating string operation can be suspended by an exception or interrupt. When this happens, the state of the registers is preserved to allow the string operation to be resumed upon a return from the exception or interrupt handler. The source and destination registers point to the next string elements to be operated on, the EIP register points to the string instruction, and the ECX register has the value it held following the last successful iteration of the instruction. This mechanism allows long string operations to proceed without affecting the interrupt response time of the system.</p>", + "html": "<p>Repeats a string instruction the number of times specified in the count register or until the indicated condition of the ZF flag is no longer met. The REP (repeat), REPE (repeat while equal), REPNE (repeat while not equal), REPZ (repeat while zero), and REPNZ (repeat while not zero) mnemonics are prefixes that can be added to one of the string instructions. The REP prefix can be added to the INS, OUTS, MOVS, LODS, and STOS instructions, and the REPE, REPNE, REPZ, and REPNZ prefixes can be added to the CMPS and SCAS instructions. (The REPZ and REPNZ prefixes are synonymous forms of the REPE and REPNE prefixes, respectively.) The F3H prefix is defined for the following instructions and undefined for the rest:</p><p>The REP prefixes apply only to one string instruction at a time. To repeat a block of instructions, use the LOOP instruction or another looping construct. All of these repeat prefixes cause the associated instruction to be repeated until the count in register is decremented to 0. See <a href=\"./REP:REPE:REPZ:REPNE:REPNZ.html#tbl-4-16\">Table 4-16</a>.</p><p>The REPE, REPNE, REPZ, and REPNZ prefixes also check the state of the ZF flag after each iteration and terminate the repeat loop if the ZF flag is not in the specified state. When both termination conditions are tested, the cause of a repeat termination can be determined either by testing the count register with a JECXZ instruction or by testing the ZF flag (with a JZ, JNZ, or JNE instruction).</p><p>When the REPE/REPZ and REPNE/REPNZ prefixes are used, the ZF flag does not require initialization because both the CMPS and SCAS instructions affect the ZF flag according to the results of the comparisons they make.</p><p>A repeating string operation can be suspended by an exception or interrupt. When this happens, the state of the registers is preserved to allow the string operation to be resumed upon a return from the exception or interrupt handler. The source and destination registers point to the next string elements to be operated on, the EIP register points to the string instruction, and the ECX register has the value it held following the last successful iteration of the instruction. This mechanism allows long string operations to proceed without affecting the interrupt response time of the system.</p>", "tooltip": "Repeats a string instruction the number of times specified in the count register or until the indicated condition of the ZF flag is no longer met. The REP (repeat), REPE (repeat while equal), REPNE (repeat while not equal), REPZ (repeat while zero), and REPNZ (repeat while not zero) mnemonics are prefixes that can be added to one of the string instructions. The REP prefix can be added to the INS, OUTS, MOVS, LODS, and STOS instructions, and the REPE, REPNE, REPZ, and REPNZ prefixes can be added to the CMPS and SCAS instructions. (The REPZ and REPNZ prefixes are synonymous forms of the REPE and REPNE prefixes, respectively.) The F3H prefix is defined for the following instructions and undefined for the rest" }; @@ -3028,7 +3030,7 @@ function getAsmOpcode(opcode) { case "ROUNDPD": return { "url": "http://www.felixcloutier.com/x86/ROUNDPD.html", - "html": "<p>Round the 2 double-precision floating-point values in the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the results in the destination operand (first operand). The rounding process rounds each input floating-point value to an integer value and returns the integer result as a double-precision floating-point value.</p><p>The immediate operand specifies control fields for the rounding operation, three bit fields are defined and shown in Figure 4-24. Bit 3 of the immediate byte controls processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Table 4-18 lists the encoded values for rounding-mode field).</p><p>The Precision Floating-Point Exception is signaled according to the immediate operand. If any source operand is an SNaN then it will be converted to a QNaN. If DAZ is set to \u20181 then denormals will be converted to zero before rounding.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p><p>VEX.128 encoded version: the source operand second source operand or a 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding YMM register destination are zeroed.</p>", + "html": "<p>Round the 2 double-precision floating-point values in the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the results in the destination operand (first operand). The rounding process rounds each input floating-point value to an integer value and returns the integer result as a double-precision floating-point value.</p><p>The immediate operand specifies control fields for the rounding operation, three bit fields are defined and shown in <a href=\"./ROUNDPD.html#fig-4-24\">Figure 4-24</a>. Bit 3 of the immediate byte controls processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (<span class=\"not-imported\">Table 4-17</span> lists the encoded values for rounding-mode field).</p><p>The Precision Floating-Point Exception is signaled according to the immediate operand. If any source operand is an SNaN then it will be converted to a QNaN. If DAZ is set to \u20181 then denormals will be converted to zero before rounding.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p><p>VEX.128 encoded version: the source operand second source operand or a 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding YMM register destination are zeroed.</p>", "tooltip": "Round the 2 double-precision floating-point values in the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the results in the destination operand (first operand). The rounding process rounds each input floating-point value to an integer value and returns the integer result as a double-precision floating-point value." }; @@ -3036,7 +3038,7 @@ function getAsmOpcode(opcode) { case "VROUNDPS": return { "url": "http://www.felixcloutier.com/x86/ROUNDPS.html", - "html": "<p>Round the 4 single-precision floating-point values in the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the results in the destination operand (first operand). The rounding process rounds each input floating-point value to an integer value and returns the integer result as a single-precision floating-point value.</p><p>The immediate operand specifies control fields for the rounding operation, three bit fields are defined and shown in Figure 4-24. Bit 3 of the immediate byte controls processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Table 4-18 lists the encoded values for rounding-mode field).</p><p>The Precision Floating-Point Exception is signaled according to the immediate operand. If any source operand is an SNaN then it will be converted to a QNaN. If DAZ is set to \u20181 then denormals will be converted to zero before rounding.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p><p>VEX.128 encoded version: the source operand second source operand or a 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding YMM register destination are zeroed.</p>", + "html": "<p>Round the 4 single-precision floating-point values in the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the results in the destination operand (first operand). The rounding process rounds each input floating-point value to an integer value and returns the integer result as a single-precision floating-point value.</p><p>The immediate operand specifies control fields for the rounding operation, three bit fields are defined and shown in <a href=\"./ROUNDPD.html#fig-4-24\">Figure 4-24</a>. Bit 3 of the immediate byte controls processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (<span class=\"not-imported\">Table 4-17</span> lists the encoded values for rounding-mode field).</p><p>The Precision Floating-Point Exception is signaled according to the immediate operand. If any source operand is an SNaN then it will be converted to a QNaN. If DAZ is set to \u20181 then denormals will be converted to zero before rounding.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding YMM register destination are unmodified.</p><p>VEX.128 encoded version: the source operand second source operand or a 128-bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding YMM register destination are zeroed.</p>", "tooltip": "Round the 4 single-precision floating-point values in the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the results in the destination operand (first operand). The rounding process rounds each input floating-point value to an integer value and returns the integer result as a single-precision floating-point value." }; @@ -3044,7 +3046,7 @@ function getAsmOpcode(opcode) { case "VROUNDSD": return { "url": "http://www.felixcloutier.com/x86/ROUNDSD.html", - "html": "<p>Round the DP FP value in the lower qword of the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the result in the destination operand (first operand). The rounding process rounds a double-precision floating-point input to an integer value and returns the integer result as a double precision floating-point value in the lowest position. The upper double precision floating-point value in the destination is retained.</p><p>The immediate operand specifies control fields for the rounding operation, three bit fields are defined and shown in Figure 4-24. Bit 3 of the immediate byte controls processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Table 4-18 lists the encoded values for rounding-mode field).</p><p>The Precision Floating-Point Exception is signaled according to the immediate operand. If any source operand is an SNaN then it will be converted to a QNaN. If DAZ is set to \u20181 then denormals will be converted to zero before rounding.</p><p>128-bit Legacy SSE version: The first source operand and the destination operand are the same. Bits (MAXVL-1:64) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: Bits (MAXVL-1:128) of the destination YMM register are zeroed.</p>", + "html": "<p>Round the DP FP value in the lower qword of the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the result in the destination operand (first operand). The rounding process rounds a double-precision floating-point input to an integer value and returns the integer result as a double precision floating-point value in the lowest position. The upper double precision floating-point value in the destination is retained.</p><p>The immediate operand specifies control fields for the rounding operation, three bit fields are defined and shown in <a href=\"./ROUNDPD.html#fig-4-24\">Figure 4-24</a>. Bit 3 of the immediate byte controls processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (<span class=\"not-imported\">Table 4-17</span> lists the encoded values for rounding-mode field).</p><p>The Precision Floating-Point Exception is signaled according to the immediate operand. If any source operand is an SNaN then it will be converted to a QNaN. If DAZ is set to \u20181 then denormals will be converted to zero before rounding.</p><p>128-bit Legacy SSE version: The first source operand and the destination operand are the same. Bits (MAXVL-1:64) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: Bits (MAXVL-1:128) of the destination YMM register are zeroed.</p>", "tooltip": "Round the DP FP value in the lower qword of the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the result in the destination operand (first operand). The rounding process rounds a double-precision floating-point input to an integer value and returns the integer result as a double precision floating-point value in the lowest position. The upper double precision floating-point value in the destination is retained." }; @@ -3052,7 +3054,7 @@ function getAsmOpcode(opcode) { case "ROUNDSS": return { "url": "http://www.felixcloutier.com/x86/ROUNDSS.html", - "html": "<p>Round the single-precision floating-point value in the lowest dword of the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the result in the destination operand (first operand). The rounding process rounds a single-precision floating-point input to an integer value and returns the result as a single-precision floating-point value in the lowest position. The upper three single-precision floating-point values in the destination are retained.</p><p>The immediate operand specifies control fields for the rounding operation, three bit fields are defined and shown in Figure 4-24. Bit 3 of the immediate byte controls processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Table 4-18 lists the encoded values for rounding-mode field).</p><p>The Precision Floating-Point Exception is signaled according to the immediate operand. If any source operand is an SNaN then it will be converted to a QNaN. If DAZ is set to \u20181 then denormals will be converted to zero before rounding.</p><p>128-bit Legacy SSE version: The first source operand and the destination operand are the same. Bits (MAXVL-1:32) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: Bits (MAXVL-1:128) of the destination YMM register are zeroed.</p>", + "html": "<p>Round the single-precision floating-point value in the lowest dword of the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the result in the destination operand (first operand). The rounding process rounds a single-precision floating-point input to an integer value and returns the result as a single-precision floating-point value in the lowest position. The upper three single-precision floating-point values in the destination are retained.</p><p>The immediate operand specifies control fields for the rounding operation, three bit fields are defined and shown in <a href=\"./ROUNDPD.html#fig-4-24\">Figure 4-24</a>. Bit 3 of the immediate byte controls processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (<span class=\"not-imported\">Table 4-17</span> lists the encoded values for rounding-mode field).</p><p>The Precision Floating-Point Exception is signaled according to the immediate operand. If any source operand is an SNaN then it will be converted to a QNaN. If DAZ is set to \u20181 then denormals will be converted to zero before rounding.</p><p>128-bit Legacy SSE version: The first source operand and the destination operand are the same. Bits (MAXVL-1:32) of the corresponding YMM destination register remain unchanged.</p><p>VEX.128 encoded version: Bits (MAXVL-1:128) of the destination YMM register are zeroed.</p>", "tooltip": "Round the single-precision floating-point value in the lowest dword of the source operand (second operand) using the rounding mode specified in the immediate operand (third operand) and place the result in the destination operand (first operand). The rounding process rounds a single-precision floating-point input to an integer value and returns the result as a single-precision floating-point value in the lowest position. The upper three single-precision floating-point values in the destination are retained." }; @@ -3067,7 +3069,7 @@ function getAsmOpcode(opcode) { case "VRSQRTPS": return { "url": "http://www.felixcloutier.com/x86/RSQRTPS.html", - "html": "<p>Performs a SIMD computation of the approximate reciprocals of the square roots of the four packed single-precision floating-point values in the source operand (second operand) and stores the packed single-precision floating-point results in the destination operand. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. See Figure 10-5 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD single-precision floating-point operation.</p><p>The relative error for this approximation is:</p><p>|Relative Error| \u2264 1.5 \u2217 2<sup>\u221212</sup></p><p>The RSQRTPS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e of the sign of the source value is returned. A denormal source value is treated as a 0.0 (of the same sign). When a source value is a negative value (other than \u22120.0), a floating-point indefinite is returned. When a source value is an SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", + "html": "<p>Performs a SIMD computation of the approximate reciprocals of the square roots of the four packed single-precision floating-point values in the source operand (second operand) and stores the packed single-precision floating-point results in the destination operand. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. See <span class=\"not-imported\">Figure 10-5</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a SIMD single-precision floating-point operation.</p><p>The relative error for this approximation is:</p><p>|Relative Error| \u2264 1.5 \u2217 2<sup>\u221212</sup></p><p>The RSQRTPS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e of the sign of the source value is returned. A denormal source value is treated as a 0.0 (of the same sign). When a source value is a negative value (other than \u22120.0), a floating-point indefinite is returned. When a source value is an SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", "tooltip": "Performs a SIMD computation of the approximate reciprocals of the square roots of the four packed single-precision floating-point values in the source operand (second operand) and stores the packed single-precision floating-point results in the destination operand. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. See Figure 10-5 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a SIMD single-precision floating-point operation." }; @@ -3075,7 +3077,7 @@ function getAsmOpcode(opcode) { case "VRSQRTSS": return { "url": "http://www.felixcloutier.com/x86/RSQRTSS.html", - "html": "<p>Computes an approximate reciprocal of the square root of the low single-precision floating-point value in the source operand (second operand) stores the single-precision floating-point result in the destination operand. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register. The three high-order doublewords of the destination operand remain unchanged. See Figure 10-6 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a scalar single-precision floating-point operation.</p><p>The relative error for this approximation is:</p><p>|Relative Error| \u2264 1.5 \u2217 2<sup>\u221212</sup></p><p>The RSQRTSS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e of the sign of the source value is returned. A denormal source value is treated as a 0.0 (of the same sign). When a source value is a negative value (other than \u22120.0), a floating-point indefinite is returned. When a source value is an SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", + "html": "<p>Computes an approximate reciprocal of the square root of the low single-precision floating-point value in the source operand (second operand) stores the single-precision floating-point result in the destination operand. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register. The three high-order doublewords of the destination operand remain unchanged. See <span class=\"not-imported\">Figure 10-6</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for an illustration of a scalar single-precision floating-point operation.</p><p>The relative error for this approximation is:</p><p>|Relative Error| \u2264 1.5 \u2217 2<sup>\u221212</sup></p><p>The RSQRTSS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e of the sign of the source value is returned. A denormal source value is treated as a 0.0 (of the same sign). When a source value is a negative value (other than \u22120.0), a floating-point indefinite is returned. When a source value is an SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned.</p><p>In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).</p>", "tooltip": "Computes an approximate reciprocal of the square root of the low single-precision floating-point value in the source operand (second operand) stores the single-precision floating-point result in the destination operand. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register. The three high-order doublewords of the destination operand remain unchanged. See Figure 10-6 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1, for an illustration of a scalar single-precision floating-point operation." }; @@ -3091,7 +3093,7 @@ function getAsmOpcode(opcode) { case "SAL": return { "url": "http://www.felixcloutier.com/x86/SAL%3ASAR%3ASHL%3ASHR.html", - "html": "<p>Shifts the bits in the first operand (destination operand) to the left or right by the number of bits specified in the second operand (count operand). Bits shifted beyond the destination operand boundary are first shifted into the CF flag, then discarded. At the end of the shift operation, the CF flag contains the last bit shifted out of the destination operand.</p><p>The destination operand can be a register or a memory location. The count operand can be an immediate value or the CL register. The count is masked to 5 bits (or 6 bits if in 64-bit mode and REX.W is used). The count range is limited to 0 to 31 (or 63 if 64-bit mode and REX.W is used). A special opcode encoding is provided for a count of 1.</p><p>The shift arithmetic left (SAL) and shift logical left (SHL) instructions perform the same operation; they shift the bits in the destination operand to the left (toward more significant bit locations). For each shift count, the most significant bit of the destination operand is shifted into the CF flag, and the least significant bit is cleared (see Figure 7-7 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>).</p><p>The shift arithmetic right (SAR) and shift logical right (SHR) instructions shift the bits of the destination operand to the right (toward less significant bit locations). For each shift count, the least significant bit of the destination operand is shifted into the CF flag, and the most significant bit is either set or cleared depending on the instruction type. The SHR instruction clears the most significant bit (see Figure 7-8 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>); the SAR instruction sets or clears the most significant bit to correspond to the sign (most significant bit) of the original value in the destination operand. In effect, the SAR instruction fills the empty bit position\u2019s shifted value with the sign of the unshifted value (see Figure 7-9 in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>).</p><p>The SAR and SHR instructions can be used to perform signed or unsigned division, respectively, of the destination operand by powers of 2. For example, using the SAR instruction to shift a signed integer 1 bit to the right divides the value by 2.</p>", + "html": "<p>Shifts the bits in the first operand (destination operand) to the left or right by the number of bits specified in the second operand (count operand). Bits shifted beyond the destination operand boundary are first shifted into the CF flag, then discarded. At the end of the shift operation, the CF flag contains the last bit shifted out of the destination operand.</p><p>The destination operand can be a register or a memory location. The count operand can be an immediate value or the CL register. The count is masked to 5 bits (or 6 bits if in 64-bit mode and REX.W is used). The count range is limited to 0 to 31 (or 63 if 64-bit mode and REX.W is used). A special opcode encoding is provided for a count of 1.</p><p>The shift arithmetic left (SAL) and shift logical left (SHL) instructions perform the same operation; they shift the bits in the destination operand to the left (toward more significant bit locations). For each shift count, the most significant bit of the destination operand is shifted into the CF flag, and the least significant bit is cleared (see <span class=\"not-imported\">Figure 7-7</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>).</p><p>The shift arithmetic right (SAR) and shift logical right (SHR) instructions shift the bits of the destination operand to the right (toward less significant bit locations). For each shift count, the least significant bit of the destination operand is shifted into the CF flag, and the most significant bit is either set or cleared depending on the instruction type. The SHR instruction clears the most significant bit (see <span class=\"not-imported\">Figure 7-8</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>); the SAR instruction sets or clears the most significant bit to correspond to the sign (most significant bit) of the original value in the destination operand. In effect, the SAR instruction fills the empty bit position\u2019s shifted value with the sign of the unshifted value (see <span class=\"not-imported\">Figure 7-9</span> in the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>).</p><p>The SAR and SHR instructions can be used to perform signed or unsigned division, respectively, of the destination operand by powers of 2. For example, using the SAR instruction to shift a signed integer 1 bit to the right divides the value by 2.</p>", "tooltip": "Shifts the bits in the first operand (destination operand) to the left or right by the number of bits specified in the second operand (count operand). Bits shifted beyond the destination operand boundary are first shifted into the CF flag, then discarded. At the end of the shift operation, the CF flag contains the last bit shifted out of the destination operand." }; @@ -3321,8 +3323,8 @@ function getAsmOpcode(opcode) { case "STI": return { "url": "http://www.felixcloutier.com/x86/STI.html", - "html": "<p>In most cases, STI sets the interrupt flag (IF) in the EFLAGS register. After the IF flag is set, the processor begins responding to external, maskable interrupts after the next instruction is executed. The delayed effect of this instruction is provided to allow interrupts to be enabled just before returning from a procedure (or subroutine). For instance, if an STI instruction is followed by an RET instruction, the RET instruction is allowed to execute before external interrupts are recognized<sup>1</sup>. If the STI instruction is followed by a CLI instruction (which clears the IF flag), the effect of the STI instruction is negated.</p><p>The IF flag and the STI and CLI instructions do not prohibit the generation of exceptions and NMI interrupts. NMI interrupts (and SMIs) may be blocked for one macroinstruction following an STI.</p><p>Operation is different in two modes defined as follows:</p><p>If IOPL < 3, EFLAGS.VIP = 1, and either VME mode or PVI mode is active, STI sets the VIF flag in the EFLAGS register, leaving IF unaffected.</p><p>Table 4-19 indicates the action of the STI instruction depending on the processor operating mode, IOPL, CPL, and EFLAGS.VIP.</p>", - "tooltip": "In most cases, STI sets the interrupt flag (IF) in the EFLAGS register. After the IF flag is set, the processor begins responding to external, maskable interrupts after the next instruction is executed. The delayed effect of this instruction is provided to allow interrupts to be enabled just before returning from a procedure (or subroutine). For instance, if an STI instruction is followed by an RET instruction, the RET instruction is allowed to execute before external interrupts are recognized1. If the STI instruction is followed by a CLI instruction (which clears the IF flag), the effect of the STI instruction is negated." + "html": "<p>In most cases, STI sets the interrupt flag (IF) in the EFLAGS register. This allows the processor to respond to maskable hardware interrupts.</p><p>If IF = 0, maskable hardware interrupts remain inhibited on the instruction boundary following an execution of STI. (The delayed effect of this instruction is provided to allow interrupts to be enabled just before returning from a procedure or subroutine. For instance, if an STI instruction is followed by an RET instruction, the RET instruction is allowed to execute before external interrupts are recognized. No interrupts can be recognized if an execution of CLI immediately follow such an execution of STI.) The inhibition ends after delivery of another event (e.g., exception) or the execution of the next instruction.</p><p>The IF flag and the STI and CLI instructions do not prohibit the generation of exceptions and nonmaskable interrupts (NMIs). However, NMIs (and system-management interrupts) may be inhibited on the instruction boundary following an execution of STI that begins with IF = 0.</p><p>Operation is different in two modes defined as follows:</p><p>If IOPL < 3, EFLAGS.VIP = 1, and either VME mode or PVI mode is active, STI sets the VIF flag in the EFLAGS register, leaving IF unaffected.</p>", + "tooltip": "In most cases, STI sets the interrupt flag (IF) in the EFLAGS register. This allows the processor to respond to maskable hardware interrupts." }; case "VSTMXCSR": @@ -3400,7 +3402,7 @@ function getAsmOpcode(opcode) { case "SYSCALL": return { "url": "http://www.felixcloutier.com/x86/SYSCALL.html", - "html": "<p>SYSCALL invokes an OS system-call handler at privilege level 0. It does so by loading RIP from the IA32_LSTAR MSR (after saving the address of the instruction following SYSCALL into RCX). (The WRMSR instruction ensures that the IA32_LSTAR MSR always contain a canonical address.)</p><p>SYSCALL also saves RFLAGS into R11 and then masks RFLAGS using the IA32_FMASK MSR (MSR address C0000084H); specifically, the processor clears in RFLAGS every bit corresponding to a bit that is set in the IA32_FMASK MSR.</p><p>SYSCALL loads the CS and SS selectors with values derived from bits 47:32 of the IA32_STAR MSR. However, the CS and SS descriptor caches are <strong>not</strong> loaded from the descriptors (in GDT or LDT) referenced by those selectors. Instead, the descriptor caches are loaded with fixed values. See the Operation section for details. It is the responsibility of OS software to ensure that the descriptors (in GDT or LDT) referenced by those selector values correspond to the fixed values loaded into the descriptor caches; the SYSCALL instruction does not ensure this correspondence.</p><p>The SYSCALL instruction does not save the stack pointer (RSP). If the OS system-call handler will change the stack pointer, it is the responsibility of software to save the previous value of the stack pointer. This might be done prior to executing SYSCALL, with software restoring the stack pointer with the instruction following SYSCALL (which will be executed after SYSRET). Alternatively, the OS system-call handler may save the stack pointer and restore it before executing SYSRET.</p>", + "html": "<p>SYSCALL invokes an OS system-call handler at privilege level 0. It does so by loading RIP from the IA32_LSTAR MSR (after saving the address of the instruction following SYSCALL into RCX). (The WRMSR instruction ensures that the IA32_LSTAR MSR always contain a canonical address.)</p><p>SYSCALL also saves RFLAGS into R11 and then masks RFLAGS using the IA32_FMASK MSR (MSR address C0000084H); specifically, the processor clears in RFLAGS every bit corresponding to a bit that is set in the IA32_FMASK MSR.</p><p>SYSCALL loads the CS and SS selectors with values derived from bits 47:32 of the IA32_STAR MSR. However, the CS and SS descriptor caches are <strong>not</strong> loaded from the descriptors (in GDT or LDT) referenced by those selectors. Instead, the descriptor caches are loaded with fixed values. See the Operation section for details. It is the responsibility of OS software to ensure that the descriptors (in GDT or LDT) referenced by those selector values correspond to the fixed values loaded into the descriptor caches; the SYSCALL instruction does not ensure this correspondence.</p><p>The SYSCALL instruction does not save the stack pointer (RSP). If the OS system-call handler will change the stack pointer, it is the responsibility of software to save the previous value of the stack pointer. This might be done prior to executing SYSCALL, with software restoring the stack pointer with the instruction following SYSCALL (which will be executed after SYSRET). Alternatively, the OS system-call handler may save the stack pointer and restore it before executing SYSRET.</p><p><strong>Instruction ordering.</strong> Instructions following a SYSCALL may be fetched from memory before earlier instructions complete execution, but they will not execute (even speculatively) until all instructions prior to the SYSCALL have completed execution (the later instructions may execute before data stored by the earlier instructions have become globally visible).</p>", "tooltip": "SYSCALL invokes an OS system-call handler at privilege level 0. It does so by loading RIP from the IA32_LSTAR MSR (after saving the address of the instruction following SYSCALL into RCX). (The WRMSR instruction ensures that the IA32_LSTAR MSR always contain a canonical address.)" }; @@ -3421,7 +3423,7 @@ function getAsmOpcode(opcode) { case "SYSRET": return { "url": "http://www.felixcloutier.com/x86/SYSRET.html", - "html": "<p>SYSRET is a companion instruction to the SYSCALL instruction. It returns from an OS system-call handler to user code at privilege level 3. It does so by loading RIP from RCX and loading RFLAGS from R11.<sup>1</sup> With a 64-bit operand size, SYSRET remains in 64-bit mode; otherwise, it enters compatibility mode and only the low 32 bits of the registers are loaded.</p><p>SYSRET loads the CS and SS selectors with values derived from bits 63:48 of the IA32_STAR MSR. However, the CS and SS descriptor caches are <strong>not</strong> loaded from the descriptors (in GDT or LDT) referenced by those selectors. Instead, the descriptor caches are loaded with fixed values. See the Operation section for details. It is the responsibility of OS software to ensure that the descriptors (in GDT or LDT) referenced by those selector values correspond to the fixed values loaded into the descriptor caches; the SYSRET instruction does not ensure this correspondence.</p><p>The SYSRET instruction does not modify the stack pointer (ESP or RSP). For that reason, it is necessary for software to switch to the user stack. The OS may load the user stack pointer (if it was saved after SYSCALL) before executing SYSRET; alternatively, user code may load the stack pointer (if it was saved before SYSCALL) after receiving control from SYSRET.</p><p>If the OS loads the stack pointer before executing SYSRET, it must ensure that the handler of any interrupt or exception delivered between restoring the stack pointer and successful execution of SYSRET is not invoked with the user stack. It can do so using approaches such as the following:</p>", + "html": "<p>SYSRET is a companion instruction to the SYSCALL instruction. It returns from an OS system-call handler to user code at privilege level 3. It does so by loading RIP from RCX and loading RFLAGS from R11.<sup>1</sup> With a 64-bit operand size, SYSRET remains in 64-bit mode; otherwise, it enters compatibility mode and only the low 32 bits of the registers are loaded.</p><p>SYSRET loads the CS and SS selectors with values derived from bits 63:48 of the IA32_STAR MSR. However, the CS and SS descriptor caches are <strong>not</strong> loaded from the descriptors (in GDT or LDT) referenced by those selectors. Instead, the descriptor caches are loaded with fixed values. See the Operation section for details. It is the responsibility of OS software to ensure that the descriptors (in GDT or LDT) referenced by those selector values correspond to the fixed values loaded into the descriptor caches; the SYSRET instruction does not ensure this correspondence.</p><p>The SYSRET instruction does not modify the stack pointer (ESP or RSP). For that reason, it is necessary for software to switch to the user stack. The OS may load the user stack pointer (if it was saved after SYSCALL) before executing SYSRET; alternatively, user code may load the stack pointer (if it was saved before SYSCALL) after receiving control from SYSRET.</p><p>If the OS loads the stack pointer before executing SYSRET, it must ensure that the handler of any interrupt or exception delivered between restoring the stack pointer and successful execution of SYSRET is not invoked with the user stack. It can do so using approaches such as the following:</p><p><strong>Instruction ordering.</strong> Instructions following a SYSRET may be fetched from memory before earlier instructions complete execution, but they will not execute (even speculatively) until all instructions prior to the SYSRET have completed execution (the later instructions may execute before data stored by the earlier instructions have become globally visible).</p>", "tooltip": "SYSRET is a companion instruction to the SYSCALL instruction. It returns from an OS system-call handler to user code at privilege level 3. It does so by loading RIP from RCX and loading RFLAGS from R11.1 With a 64-bit operand size, SYSRET remains in 64-bit mode; otherwise, it enters compatibility mode and only the low 32 bits of the registers are loaded." }; @@ -3432,6 +3434,13 @@ function getAsmOpcode(opcode) { "tooltip": "Computes the bit-wise logical AND of first operand (source 1 operand) and the second operand (source 2 operand) and sets the SF, ZF, and PF status flags according to the result. The result is then discarded." }; + case "TPAUSE": + return { + "url": "http://www.felixcloutier.com/x86/TPAUSE.html", + "html": "<p>TPAUSE instructs the processor to enter an implementation-dependent optimized state. There are two such optimized states to choose from: light-weight power/performance optimized state, and improved power/performance optimized state. The selection between the two is governed by the explicit input register bit[0] source operand.</p><p>TPAUSE is available when CPUID.7.0:ECX.WAITPKG[bit 5] is enumerated as 1. TPAUSE may be executed at any privilege level. This instruction\u2019s operation is the same in non-64-bit modes and in 64-bit mode.</p><p>Unlike PAUSE, the TPAUSE instruction will not cause an abort when used inside a transactional region, described in the chapter Chapter 16, \u201cProgramming with Intel\u00ae Transactional Synchronization Extensions,\u201d of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>The input register contains information such as the preferred optimized state the processor should enter as described in the following table. Bits other than bit 0 are reserved and will result in #GP if non-zero.</p><p>The instruction execution wakes up when the time-stamp counter reaches or exceeds the implicit EDX:EAX 64-bit input value.</p>", + "tooltip": "TPAUSE instructs the processor to enter an implementation-dependent optimized state. There are two such optimized states to choose from: light-weight power/performance optimized state, and improved power/performance optimized state. The selection between the two is governed by the explicit input register bit[0] source operand." + }; + case "TZCNT": return { "url": "http://www.felixcloutier.com/x86/TZCNT.html", @@ -3464,11 +3473,25 @@ function getAsmOpcode(opcode) { "tooltip": "Generates an invalid opcode exception. This instruction is provided for software testing to explicitly generate an invalid opcode exception. The opcodes for this instruction are reserved for this purpose." }; + case "UMONITOR": + return { + "url": "http://www.felixcloutier.com/x86/UMONITOR.html", + "html": "<p>The UMONITOR instruction arms address monitoring hardware using an address specified in the source register (the address range that the monitoring hardware checks for store operations can be determined by using the CPUID monitor leaf function, EAX=05H). A store to an address within the specified address range triggers the monitoring hardware. The state of monitor hardware is used by UMWAIT.</p><p>The content of the source register is an effective address. By default, the DS segment is used to create a linear address that is monitored. Segment overrides can be used. The address range must use memory of the write-back type. Only write-back memory is guaranteed to correctly trigger the monitoring hardware. Additional information on determining what address range to use in order to prevent false wake-ups is described in Chapter 8, \u201cMultipleProcessor Management\u201d of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>.</p><p>The UMONITOR instruction is ordered as a load operation with respect to other memory transactions. The instruction is subject to the permission checking and faults associated with a byte load. Like a load, UMONITOR sets the A-bit but not the D-bit in page tables.</p><p>UMONITOR and UMWAIT are available when CPUID.7.0:ECX.WAITPKG[bit 5] is enumerated as 1. UMONITOR and UMWAIT may be executed at any privilege level. Except for the width of the source register, the instruction\u2019s operation is the same in non-64-bit modes and in 64-bit mode.</p><p>UMONITOR does not interoperate with the legacy MWAIT instruction. If UMONITOR was executed prior to executing MWAIT and following the most recent execution of the legacy MONITOR instruction, MWAIT will not enter an optimized state. Execution will continue to the instruction following MWAIT.</p>", + "tooltip": "The UMONITOR instruction arms address monitoring hardware using an address specified in the source register (the address range that the monitoring hardware checks for store operations can be determined by using the CPUID monitor leaf function, EAX=05H). A store to an address within the specified address range triggers the monitoring hardware. The state of monitor hardware is used by UMWAIT." + }; + + case "UMWAIT": + return { + "url": "http://www.felixcloutier.com/x86/UMWAIT.html", + "html": "<p>UMWAIT instructs the processor to enter an implementation-dependent optimized state while monitoring a range of addresses. The optimized state may be either a light-weight power/performance optimized state or an improved power/performance optimized state. The selection between the two states is governed by the explicit input register bit[0] source operand.</p><p>UMWAIT is available when CPUID.7.0:ECX.WAITPKG[bit 5] is enumerated as 1. UMWAIT may be executed at any privilege level. This instruction\u2019s operation is the same in non-64-bit modes and in 64-bit mode.</p><p>The input register contains information such as the preferred optimized state the processor should enter as described in the following table. Bits other than bit 0 are reserved and will result in #GP if nonzero.</p><p>The instruction wakes up when the time-stamp counter reaches or exceeds the implicit EDX:EAX 64-bit input value (if the monitoring hardware did not trigger beforehand).</p><p>Prior to executing the UMWAIT instruction, an operating system may specify the maximum delay it allows the processor to suspend its operation. It can do so by writing TSC-quanta value to the following 32bit MSR (IA32_UMWAIT_CONTROL at MSR index E1H):</p>", + "tooltip": "UMWAIT instructs the processor to enter an implementation-dependent optimized state while monitoring a range of addresses. The optimized state may be either a light-weight power/performance optimized state or an improved power/performance optimized state. The selection between the two states is governed by the explicit input register bit[0] source operand." + }; + case "UNPCKHPD": case "VUNPCKHPD": return { "url": "http://www.felixcloutier.com/x86/UNPCKHPD.html", - "html": "<p>Performs an interleaved unpack of the high double-precision floating-point values from the first source operand and the second source operand. See Figure 4-15 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2B.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding ZMM register destination are unmodified. When unpacking from a memory operand, an implementation may fetch only the appropriate 64 bits; however, alignment to 16-byte boundary and normal segment checking will still be enforced.</p><p>VEX.128 encoded version: The first source operand is a XMM register. The second source operand can be a XMM register or a 128-bit memory location. The destination operand is a XMM register. The upper bits (MAXVL-1:128) of the corresponding ZMM register destination are zeroed.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand can be a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p><p>EVEX.512 encoded version: The first source operand is a ZMM register. The second source operand is a ZMM register, a 512-bit memory location, or a 512-bit vector broadcasted from a 64-bit memory location. The destination operand is a ZMM register, conditionally updated using writemask k1.</p>", + "html": "<p>Performs an interleaved unpack of the high double-precision floating-point values from the first source operand and the second source operand. See <a href=\"./PSHUFB.html#fig-4-15\">Figure 4-15</a> in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2B.</p><p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding ZMM register destination are unmodified. When unpacking from a memory operand, an implementation may fetch only the appropriate 64 bits; however, alignment to 16-byte boundary and normal segment checking will still be enforced.</p><p>VEX.128 encoded version: The first source operand is a XMM register. The second source operand can be a XMM register or a 128-bit memory location. The destination operand is a XMM register. The upper bits (MAXVL-1:128) of the corresponding ZMM register destination are zeroed.</p><p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand can be a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p><p>EVEX.512 encoded version: The first source operand is a ZMM register. The second source operand is a ZMM register, a 512-bit memory location, or a 512-bit vector broadcasted from a 64-bit memory location. The destination operand is a ZMM register, conditionally updated using writemask k1.</p>", "tooltip": "Performs an interleaved unpack of the high double-precision floating-point values from the first source operand and the second source operand. See Figure 4-15 in the Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 2B." }; @@ -3496,6 +3519,22 @@ function getAsmOpcode(opcode) { "tooltip": "Performs an interleaved unpack of the low single-precision floating-point values from the first source operand and the second source operand." }; + case "V4FMADDPS": + case "V4FNMADDPS": + return { + "url": "http://www.felixcloutier.com/x86/V4FMADDPS%3AV4FNMADDPS.html", + "html": "<p>This instruction computes 4 sequential packed fused single-precision floating-point multiply-add instructions with a sequentially selected memory operand in each of the four steps.</p><p>In the above box, the notation of \u201c+3\u201d is used to denote that the instruction accesses 4 source registers based on that operand; sources are consecutive, start in a multiple of 4 boundary, and contain the encoded register operand.</p><p>This instruction supports memory fault suppression. The entire memory operand is loaded if any of the 16 lowest significant mask bits is set to 1 or if a \u201cno masking\u201d encoding is used.</p><p>The tuple type Tuple1_4X implies that four 32-bit elements (16 bytes) are referenced by the memory operation portion of this instruction.</p><p>Rounding is performed at every FMA (fused multiply and add) boundary. Exceptions are also taken sequentially. Pre- and post-computational exceptions of the first FMA take priority over the pre- and post-computational exceptions of the second FMA, etc.</p>", + "tooltip": "This instruction computes 4 sequential packed fused single-precision floating-point multiply-add instructions with a sequentially selected memory operand in each of the four steps." + }; + + case "V4FNMADDSS": + case "V4FMADDSS": + return { + "url": "http://www.felixcloutier.com/x86/V4FMADDSS%3AV4FNMADDSS.html", + "html": "<p>This instruction computes 4 sequential scalar fused single-precision floating-point multiply-add instructions with a sequentially selected memory operand in each of the four steps.</p><p>In the above box, the notation of \u201c+3\u201d is used to denote that the instruction accesses 4 source registers based that operand; sources are consecutive, start in a multiple of 4 boundary, and contain the encoded register operand.</p><p>This instruction supports memory fault suppression. The entire memory operand is loaded if the least significant mask bit is set to 1 or if a \u201cno masking\u201d encoding is used.</p><p>The tuple type Tuple1_4X implies that four 32-bit elements (16 bytes) are referenced by the memory operation portion of this instruction.</p><p>Rounding is performed at every FMA boundary. Exceptions are also taken sequentially. Pre- and post-computational exceptions of the first FMA take priority over the pre- and post-computational exceptions of the second FMA, etc.</p>", + "tooltip": "This instruction computes 4 sequential scalar fused single-precision floating-point multiply-add instructions with a sequentially selected memory operand in each of the four steps." + }; + case "VALIGND": case "VALIGNQ": return { @@ -3571,7 +3610,7 @@ function getAsmOpcode(opcode) { case "VCVTPS2PH": return { "url": "http://www.felixcloutier.com/x86/VCVTPS2PH.html", - "html": "<p>Convert packed single-precision floating values in the source operand to half-precision (16-bit) floating-point values and store to the destination operand. The rounding mode is specified using the immediate field (imm8).</p><p>Underflow results (i.e., tiny results) are converted to denormals. MXCSR.FTZ is ignored. If a source element is denormal relative to the input format with DM masked and at least one of PM or UM unmasked; a SIMD exception will be raised with DE, UE and PE set.</p><p>The immediate byte defines several bit fields that control rounding operation. The effect and encoding of the RC field are listed in Table 5-12.</p><p>VEX.128 version: The source operand is a XMM register. The destination operand is a XMM register or 64-bit memory location. If the destination operand is a register then the upper bits (MAXVL-1:64) of corresponding register are zeroed.</p><p>VEX.256 version: The source operand is a YMM register. The destination operand is a XMM register or 128-bit memory location. If the destination operand is a register, the upper bits (MAXVL-1:128) of the corresponding destination register are zeroed.</p>", + "html": "<p>Convert packed single-precision floating values in the source operand to half-precision (16-bit) floating-point values and store to the destination operand. The rounding mode is specified using the immediate field (imm8).</p><p>Underflow results (i.e., tiny results) are converted to denormals. MXCSR.FTZ is ignored. If a source element is denormal relative to the input format with DM masked and at least one of PM or UM unmasked; a SIMD exception will be raised with DE, UE and PE set.</p><p>The immediate byte defines several bit fields that control rounding operation. The effect and encoding of the RC field are listed in <a href=\"./VCVTPS2PH.html#tbl-5-12\">Table 5-12</a>.</p><p>VEX.128 version: The source operand is a XMM register. The destination operand is a XMM register or 64-bit memory location. If the destination operand is a register then the upper bits (MAXVL-1:64) of corresponding register are zeroed.</p><p>VEX.256 version: The source operand is a YMM register. The destination operand is a XMM register or 128-bit memory location. If the destination operand is a register, the upper bits (MAXVL-1:128) of the corresponding destination register are zeroed.</p>", "tooltip": "Convert packed single-precision floating values in the source operand to half-precision (16-bit) floating-point values and store to the destination operand. The rounding mode is specified using the immediate field (imm8)." }; @@ -3996,28 +4035,28 @@ function getAsmOpcode(opcode) { case "VFPCLASSPD": return { "url": "http://www.felixcloutier.com/x86/VFPCLASSPD.html", - "html": "<p>The FPCLASSPD instruction checks the packed double precision floating point values for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result of each element is written to the corresponding bit in a mask register k2 according to the writemask k1. Bits [MAX_KL-1:8/4/2] of the destination are cleared.</p><p>The classification categories specified by imm8 are shown in Figure 5-13. The classification test for each category is listed in Table 5-13.</p><p><strong>Bits Imm8[0] Imm8[1] Imm8[2] Imm8[3] Imm8[4] Imm8[5] Imm8[6] Imm8[7]</strong></p><p>Category QNAN PosZero NegZero PosINF NegINF Denormal Negative SNAN</p><p>Classifier Checks for Checks for Checks for Checks for Checks for Checks for Checks for Checks for QNaN +0 0 +INF INF Denormal Negative finite SNaN</p>", + "html": "<p>The FPCLASSPD instruction checks the packed double precision floating point values for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result of each element is written to the corresponding bit in a mask register k2 according to the writemask k1. Bits [MAX_KL-1:8/4/2] of the destination are cleared.</p><p>The classification categories specified by imm8 are shown in <a href=\"./VFPCLASSPD.html#fig-5-13\">Figure 5-13</a>. The classification test for each category is listed in <span class=\"not-imported\">Table 5-13</span>.</p><p><strong>Bits Imm8[0] Imm8[1] Imm8[2] Imm8[3] Imm8[4] Imm8[5] Imm8[6] Imm8[7]</strong></p><p>Category QNAN PosZero NegZero PosINF NegINF Denormal Negative SNAN</p><p>Classifier Checks for Checks for Checks for Checks for Checks for Checks for Checks for Checks for QNaN +0 0 +INF INF Denormal Negative finite SNaN</p>", "tooltip": "The FPCLASSPD instruction checks the packed double precision floating point values for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result of each element is written to the corresponding bit in a mask register k2 according to the writemask k1. Bits [MAX_KL-1:8/4/2] of the destination are cleared." }; case "VFPCLASSPS": return { "url": "http://www.felixcloutier.com/x86/VFPCLASSPS.html", - "html": "<p>The FPCLASSPS instruction checks the packed single-precision floating point values for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result of each element is written to the corresponding bit in a mask register k2 according to the writemask k1. Bits [MAX_KL-1:16/8/4] of the destination are cleared.</p><p>The classification categories specified by imm8 are shown in Figure 5-13. The classification test for each category is listed in Table 5-13.</p><p>The source operand is a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 32-bit memory location.</p><p>EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.</p>", + "html": "<p>The FPCLASSPS instruction checks the packed single-precision floating point values for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result of each element is written to the corresponding bit in a mask register k2 according to the writemask k1. Bits [MAX_KL-1:16/8/4] of the destination are cleared.</p><p>The classification categories specified by imm8 are shown in <a href=\"./VFPCLASSPD.html#fig-5-13\">Figure 5-13</a>. The classification test for each category is listed in <span class=\"not-imported\">Table 5-13</span>.</p><p>The source operand is a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 32-bit memory location.</p><p>EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.</p>", "tooltip": "The FPCLASSPS instruction checks the packed single-precision floating point values for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result of each element is written to the corresponding bit in a mask register k2 according to the writemask k1. Bits [MAX_KL-1:16/8/4] of the destination are cleared." }; case "VFPCLASSSD": return { "url": "http://www.felixcloutier.com/x86/VFPCLASSSD.html", - "html": "<p>The FPCLASSSD instruction checks the low double precision floating point value in the source operand for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result is written to the low bit in a mask register k2 according to the writemask k1. Bits MAX_KL-1: 1 of the destination are cleared.</p><p>The classification categories specified by imm8 are shown in Figure 5-13. The classification test for each category is listed in Table 5-13.</p><p>EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.</p>", + "html": "<p>The FPCLASSSD instruction checks the low double precision floating point value in the source operand for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result is written to the low bit in a mask register k2 according to the writemask k1. Bits MAX_KL-1: 1 of the destination are cleared.</p><p>The classification categories specified by imm8 are shown in <a href=\"./VFPCLASSPD.html#fig-5-13\">Figure 5-13</a>. The classification test for each category is listed in <span class=\"not-imported\">Table 5-13</span>.</p><p>EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.</p>", "tooltip": "The FPCLASSSD instruction checks the low double precision floating point value in the source operand for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result is written to the low bit in a mask register k2 according to the writemask k1. Bits MAX_KL-1: 1 of the destination are cleared." }; case "VFPCLASSSS": return { "url": "http://www.felixcloutier.com/x86/VFPCLASSSS.html", - "html": "<p>The FPCLASSSS instruction checks the low single-precision floating point value in the source operand for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result is written to the low bit in a mask register k2 according to the writemask k1. Bits MAX_KL-1: 1 of the destination are cleared.</p><p>The classification categories specified by imm8 are shown in Figure 5-13. The classification test for each category is listed in Table 5-13.</p><p>EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.</p>", + "html": "<p>The FPCLASSSS instruction checks the low single-precision floating point value in the source operand for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result is written to the low bit in a mask register k2 according to the writemask k1. Bits MAX_KL-1: 1 of the destination are cleared.</p><p>The classification categories specified by imm8 are shown in <a href=\"./VFPCLASSPD.html#fig-5-13\">Figure 5-13</a>. The classification test for each category is listed in <span class=\"not-imported\">Table 5-13</span>.</p><p>EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.</p>", "tooltip": "The FPCLASSSS instruction checks the low single-precision floating point value in the source operand for special categories, specified by the set bits in the imm8 byte. Each set bit in imm8 specifies a category of floating-point values that the input data element is classified against. The classified results of all specified categories of an input value are ORed together to form the final boolean result for the input element. The result is written to the low bit in a mask register k2 according to the writemask k1. Bits MAX_KL-1: 1 of the destination are cleared." }; @@ -4060,56 +4099,56 @@ function getAsmOpcode(opcode) { case "VGETEXPPD": return { "url": "http://www.felixcloutier.com/x86/VGETEXPPD.html", - "html": "<p>Extracts the biased exponents from the normalized DP FP representation of each qword data element of the source operand (the second operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. Each integer value of the unbiased exponent is converted to double-precision FP value and written to the corresponding qword elements of the destination operand (the first operand) as DP FP numbers.</p><p>The destination operand is a ZMM/YMM/XMM register and updated under the writemask. The source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 64-bit memory location.</p><p>EVEX.vvvv is reserved and must be 1111b, otherwise instructions will #UD.</p><p>Each GETEXP operation converts the exponent value into a FP number (permitting input value in denormal representation). Special cases of input values are listed in Table 5-14.</p>", + "html": "<p>Extracts the biased exponents from the normalized DP FP representation of each qword data element of the source operand (the second operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. Each integer value of the unbiased exponent is converted to double-precision FP value and written to the corresponding qword elements of the destination operand (the first operand) as DP FP numbers.</p><p>The destination operand is a ZMM/YMM/XMM register and updated under the writemask. The source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 64-bit memory location.</p><p>EVEX.vvvv is reserved and must be 1111b, otherwise instructions will #UD.</p><p>Each GETEXP operation converts the exponent value into a FP number (permitting input value in denormal representation). Special cases of input values are listed in <a href=\"./VGETEXPPD.html#tbl-5-14\">Table 5-14</a>.</p>", "tooltip": "Extracts the biased exponents from the normalized DP FP representation of each qword data element of the source operand (the second operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. Each integer value of the unbiased exponent is converted to double-precision FP value and written to the corresponding qword elements of the destination operand (the first operand) as DP FP numbers." }; case "VGETEXPPS": return { "url": "http://www.felixcloutier.com/x86/VGETEXPPS.html", - "html": "<p>Extracts the biased exponents from the normalized SP FP representation of each dword element of the source operand (the second operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. Each integer value of the unbiased exponent is converted to single-precision FP value and written to the corresponding dword elements of the destination operand (the first operand) as SP FP numbers.</p><p>The destination operand is a ZMM/YMM/XMM register and updated under the writemask. The source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 32-bit memory location.</p><p>EVEX.vvvv is reserved and must be 1111b, otherwise instructions will #UD.</p><p>Each GETEXP operation converts the exponent value into a FP number (permitting input value in denormal representation). Special cases of input values are listed in Table 5-15.</p>", + "html": "<p>Extracts the biased exponents from the normalized SP FP representation of each dword element of the source operand (the second operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. Each integer value of the unbiased exponent is converted to single-precision FP value and written to the corresponding dword elements of the destination operand (the first operand) as SP FP numbers.</p><p>The destination operand is a ZMM/YMM/XMM register and updated under the writemask. The source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 32-bit memory location.</p><p>EVEX.vvvv is reserved and must be 1111b, otherwise instructions will #UD.</p><p>Each GETEXP operation converts the exponent value into a FP number (permitting input value in denormal representation). Special cases of input values are listed in <a href=\"./VGETEXPPS.html#tbl-5-15\">Table 5-15</a>.</p>", "tooltip": "Extracts the biased exponents from the normalized SP FP representation of each dword element of the source operand (the second operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. Each integer value of the unbiased exponent is converted to single-precision FP value and written to the corresponding dword elements of the destination operand (the first operand) as SP FP numbers." }; case "VGETEXPSD": return { "url": "http://www.felixcloutier.com/x86/VGETEXPSD.html", - "html": "<p>Extracts the biased exponent from the normalized DP FP representation of the low qword data element of the source operand (the third operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. The integer value of the unbiased exponent is converted to double-precision FP value and written to the destination operand (the first operand) as DP FP numbers. Bits (127:64) of the XMM register destination are copied from corresponding bits in the first source operand.</p><p>The destination must be a XMM register, the source operand can be a XMM register or a float64 memory location. The low quadword element of the destination operand is conditionally updated with writemask k1.</p><p>Each GETEXP operation converts the exponent value into a FP number (permitting input value in denormal representation). Special cases of input values are listed in Table 5-14.</p>", + "html": "<p>Extracts the biased exponent from the normalized DP FP representation of the low qword data element of the source operand (the third operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. The integer value of the unbiased exponent is converted to double-precision FP value and written to the destination operand (the first operand) as DP FP numbers. Bits (127:64) of the XMM register destination are copied from corresponding bits in the first source operand.</p><p>The destination must be a XMM register, the source operand can be a XMM register or a float64 memory location. The low quadword element of the destination operand is conditionally updated with writemask k1.</p><p>Each GETEXP operation converts the exponent value into a FP number (permitting input value in denormal representation). Special cases of input values are listed in <a href=\"./VGETEXPPD.html#tbl-5-14\">Table 5-14</a>.</p>", "tooltip": "Extracts the biased exponent from the normalized DP FP representation of the low qword data element of the source operand (the third operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. The integer value of the unbiased exponent is converted to double-precision FP value and written to the destination operand (the first operand) as DP FP numbers. Bits (127:64) of the XMM register destination are copied from corresponding bits in the first source operand." }; case "VGETEXPSS": return { "url": "http://www.felixcloutier.com/x86/VGETEXPSS.html", - "html": "<p>Extracts the biased exponent from the normalized SP FP representation of the low doubleword data element of the source operand (the third operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. The integer value of the unbiased exponent is converted to single-precision FP value and written to the destination operand (the first operand) as SP FP numbers. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand.</p><p>The destination must be a XMM register, the source operand can be a XMM register or a float32 memory location. The the low doubleword element of the destination operand is conditionally updated with writemask k1.</p><p>Each GETEXP operation converts the exponent value into a FP number (permitting input value in denormal representation). Special cases of input values are listed in Table 5-15.</p>", + "html": "<p>Extracts the biased exponent from the normalized SP FP representation of the low doubleword data element of the source operand (the third operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. The integer value of the unbiased exponent is converted to single-precision FP value and written to the destination operand (the first operand) as SP FP numbers. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand.</p><p>The destination must be a XMM register, the source operand can be a XMM register or a float32 memory location. The the low doubleword element of the destination operand is conditionally updated with writemask k1.</p><p>Each GETEXP operation converts the exponent value into a FP number (permitting input value in denormal representation). Special cases of input values are listed in <a href=\"./VGETEXPPS.html#tbl-5-15\">Table 5-15</a>.</p>", "tooltip": "Extracts the biased exponent from the normalized SP FP representation of the low doubleword data element of the source operand (the third operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. The integer value of the unbiased exponent is converted to single-precision FP value and written to the destination operand (the first operand) as SP FP numbers. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand." }; case "VGETMANTPD": return { "url": "http://www.felixcloutier.com/x86/VGETMANTPD.html", - "html": "<p>Convert double-precision floating values in the source operand (the second operand) to DP FP values with the mantissa normalization and sign control specified by the imm8 byte, see Figure 5-15. The converted results are written to the destination operand (the first operand) using writemask k1. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte.</p><p>The destination operand is a ZMM/YMM/XMM register updated under the writemask. The source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 64-bit memory location.</p><p>For each input DP FP value x, The conversion operation is:</p><p><em>GetMant</em>(<em>x</em>) = <em>\u00b1</em>2<em><sup>k</sup>|x.significand|</em></p>", + "html": "<p>Convert double-precision floating values in the source operand (the second operand) to DP FP values with the mantissa normalization and sign control specified by the imm8 byte, see <a href=\"./VGETMANTPD.html#fig-5-15\">Figure 5-15</a>. The converted results are written to the destination operand (the first operand) using writemask k1. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte.</p><p>The destination operand is a ZMM/YMM/XMM register updated under the writemask. The source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 64-bit memory location.</p><p>For each input DP FP value x, The conversion operation is:</p><p><em>GetMant</em>(<em>x</em>) = <em>\u00b1</em>2<em><sup>k</sup>|x.significand|</em></p>", "tooltip": "Convert double-precision floating values in the source operand (the second operand) to DP FP values with the mantissa normalization and sign control specified by the imm8 byte, see Figure 5-15. The converted results are written to the destination operand (the first operand) using writemask k1. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte." }; case "VGETMANTPS": return { "url": "http://www.felixcloutier.com/x86/VGETMANTPS.html", - "html": "<p>Convert single-precision floating values in the source operand (the second operand) to SP FP values with the mantissa normalization and sign control specified by the imm8 byte, see Figure 5-15. The converted results are written to the destination operand (the first operand) using writemask k1. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte.</p><p>The destination operand is a ZMM/YMM/XMM register updated under the writemask. The source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 32-bit memory location.</p><p>For each input SP FP value x, The conversion operation is:</p><p><em>GetMant</em>(<em>x</em>) = <em>\u00b1</em>2<em><sup>k</sup>|x.significand|</em></p>", + "html": "<p>Convert single-precision floating values in the source operand (the second operand) to SP FP values with the mantissa normalization and sign control specified by the imm8 byte, see <a href=\"./VGETMANTPD.html#fig-5-15\">Figure 5-15</a>. The converted results are written to the destination operand (the first operand) using writemask k1. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte.</p><p>The destination operand is a ZMM/YMM/XMM register updated under the writemask. The source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 32-bit memory location.</p><p>For each input SP FP value x, The conversion operation is:</p><p><em>GetMant</em>(<em>x</em>) = <em>\u00b1</em>2<em><sup>k</sup>|x.significand|</em></p>", "tooltip": "Convert single-precision floating values in the source operand (the second operand) to SP FP values with the mantissa normalization and sign control specified by the imm8 byte, see Figure 5-15. The converted results are written to the destination operand (the first operand) using writemask k1. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte." }; case "VGETMANTSD": return { "url": "http://www.felixcloutier.com/x86/VGETMANTSD.html", - "html": "<p>Convert the double-precision floating values in the low quadword element of the second source operand (the third operand) to DP FP value with the mantissa normalization and sign control specified by the imm8 byte, see Figure 5-15. The converted result is written to the low quadword element of the destination operand (the first operand) using writemask k1. Bits (127:64) of the XMM register destination are copied from corresponding bits in the first source operand. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte.</p><p>The conversion operation is:</p><p><em>GetMant</em>(<em>x</em>) = <em>\u00b1</em>2<em><sup>k</sup>|x.significand|</em></p>", + "html": "<p>Convert the double-precision floating values in the low quadword element of the second source operand (the third operand) to DP FP value with the mantissa normalization and sign control specified by the imm8 byte, see <a href=\"./VGETMANTPD.html#fig-5-15\">Figure 5-15</a>. The converted result is written to the low quadword element of the destination operand (the first operand) using writemask k1. Bits (127:64) of the XMM register destination are copied from corresponding bits in the first source operand. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte.</p><p>The conversion operation is:</p><p><em>GetMant</em>(<em>x</em>) = <em>\u00b1</em>2<em><sup>k</sup>|x.significand|</em></p>", "tooltip": "Convert the double-precision floating values in the low quadword element of the second source operand (the third operand) to DP FP value with the mantissa normalization and sign control specified by the imm8 byte, see Figure 5-15. The converted result is written to the low quadword element of the destination operand (the first operand) using writemask k1. Bits (127:64) of the XMM register destination are copied from corresponding bits in the first source operand. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte." }; case "VGETMANTSS": return { "url": "http://www.felixcloutier.com/x86/VGETMANTSS.html", - "html": "<p>Convert the single-precision floating values in the low doubleword element of the second source operand (the third operand) to SP FP value with the mantissa normalization and sign control specified by the imm8 byte, see Figure 5-15. The converted result is written to the low doubleword element of the destination operand (the first operand) using writemask k1. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte.</p><p>The conversion operation is:</p><p><em>GetMant</em>(<em>x</em>) = <em>\u00b1</em>2<em><sup>k</sup>|x.significand|</em></p>", + "html": "<p>Convert the single-precision floating values in the low doubleword element of the second source operand (the third operand) to SP FP value with the mantissa normalization and sign control specified by the imm8 byte, see <a href=\"./VGETMANTPD.html#fig-5-15\">Figure 5-15</a>. The converted result is written to the low doubleword element of the destination operand (the first operand) using writemask k1. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte.</p><p>The conversion operation is:</p><p><em>GetMant</em>(<em>x</em>) = <em>\u00b1</em>2<em><sup>k</sup>|x.significand|</em></p>", "tooltip": "Convert the single-precision floating values in the low doubleword element of the second source operand (the third operand) to SP FP value with the mantissa normalization and sign control specified by the imm8 byte, see Figure 5-15. The converted result is written to the low doubleword element of the destination operand (the first operand) using writemask k1. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand. The normalized mantissa is specified by interv (imm8[1:0]) and the sign control (sc) is specified by bits 3:2 of the immediate byte." }; @@ -4143,6 +4182,20 @@ function getAsmOpcode(opcode) { "tooltip": "Conditionally moves packed data elements from the second source operand into the corresponding data element of the destination operand, depending on the mask bits associated with each data element. The mask bits are specified in the first source operand." }; + case "VP4DPWSSD": + return { + "url": "http://www.felixcloutier.com/x86/VP4DPWSSD.html", + "html": "<p>This instruction computes 4 sequential register source-block dot-products of two signed word operands with doubleword accumulation; see <a href=\"./VP4DPWSSD.html#fig-7-1\">Figure 7-1</a> below. The memory operand is sequentially selected in each of the four steps.</p><p>In the above box, the notation of \u201c+3\u201d' is used to denote that the instruction accesses 4 source registers based on that operand; sources are consecutive, start in a multiple of 4 boundary, and contain the encoded register operand.</p><p>This instruction supports memory fault suppression. The entire memory operand is loaded if any bit of the lowest 16-bits of the mask is set to 1 or if a \u201cno masking\u201d encoding is used.</p><p>The tuple type Tuple1_4X implies that four 32-bit elements (16 bytes) are referenced by the memory operation portion of this instruction.</p>", + "tooltip": "This instruction computes 4 sequential register source-block dot-products of two signed word operands with doubleword accumulation; see Figure 7-1 below. The memory operand is sequentially selected in each of the four steps." + }; + + case "VP4DPWSSDS": + return { + "url": "http://www.felixcloutier.com/x86/VP4DPWSSDS.html", + "html": "<p>This instruction computes 4 sequential register source-block dot-products of two signed word operands with doubleword accumulation and signed saturation. The memory operand is sequentially selected in each of the four steps.</p><p>In the above box, the notation of \u201c+3\u201d is used to denote that the instruction accesses 4 source registers based on that operand; sources are consecutive, start in a multiple of 4 boundary, and contain the encoded register operand.</p><p>This instruction supports memory fault suppression. The entire memory operand is loaded if any bit of the lowest 16-bits of the mask is set to 1 or if a \u201cno masking\u201d encoding is used.</p><p>The tuple type Tuple1_4X implies that four 32-bit elements (16 bytes) are referenced by the memory operation portion of this instruction.</p>", + "tooltip": "This instruction computes 4 sequential register source-block dot-products of two signed word operands with doubleword accumulation and signed saturation. The memory operand is sequentially selected in each of the four steps." + }; + case "VPBLENDD": return { "url": "http://www.felixcloutier.com/x86/VPBLENDD.html", @@ -4293,14 +4346,14 @@ function getAsmOpcode(opcode) { case "VPERMILPD": return { "url": "http://www.felixcloutier.com/x86/VPERMILPD.html", - "html": "<p>(variable control version)</p><p>Permute pairs of double-precision floating-point values in the first source operand (second operand), each using a 1-bit control field residing in the corresponding quadword element of the second source operand (third operand). Permuted results are stored in the destination operand (first operand).</p><p>The control bits are located at bit 0 of each quadword element (see Figure 5-24). Each control determines which of the source element in an input pair is selected for the destination element. Each pair of source elements must lie in the same 128-bit region as the destination.</p><p>EVEX version: The second source operand (third operand) is a ZMM/YMM/XMM register, a 512/256/128-bit memory location or a 512/256/128-bit vector broadcasted from a 64-bit memory location. Permuted results are written to the destination under the writemask.</p><p>VEX.256 encoded version: Bits (MAXVL-1:256) of the corresponding ZMM register are zeroed.</p>", + "html": "<p>(variable control version)</p><p>Permute pairs of double-precision floating-point values in the first source operand (second operand), each using a 1-bit control field residing in the corresponding quadword element of the second source operand (third operand). Permuted results are stored in the destination operand (first operand).</p><p>The control bits are located at bit 0 of each quadword element (see <a href=\"./VPERMILPD.html#fig-5-24\">Figure 5-24</a>). Each control determines which of the source element in an input pair is selected for the destination element. Each pair of source elements must lie in the same 128-bit region as the destination.</p><p>EVEX version: The second source operand (third operand) is a ZMM/YMM/XMM register, a 512/256/128-bit memory location or a 512/256/128-bit vector broadcasted from a 64-bit memory location. Permuted results are written to the destination under the writemask.</p><p>VEX.256 encoded version: Bits (MAXVL-1:256) of the corresponding ZMM register are zeroed.</p>", "tooltip": "(variable control version)" }; case "VPERMILPS": return { "url": "http://www.felixcloutier.com/x86/VPERMILPS.html", - "html": "<p>(variable control version)</p><p>Permute quadruples of single-precision floating-point values in the first source operand (second operand), each quadruplet using a 2-bit control field in the corresponding dword element of the second source operand. Permuted results are stored in the destination operand (first operand).</p><p>The 2-bit control fields are located at the low two bits of each dword element (see Figure 5-26). Each control determines which of the source element in an input quadruple is selected for the destination element. Each quadruple of source elements must lie in the same 128-bit region as the destination.</p><p>EVEX version: The second source operand (third operand) is a ZMM/YMM/XMM register, a 512/256/128-bit memory location or a 512/256/128-bit vector broadcasted from a 32-bit memory location. Permuted results are written to the destination under the writemask.</p><p>(immediate control version)</p>", + "html": "<p>(variable control version)</p><p>Permute quadruples of single-precision floating-point values in the first source operand (second operand), each quadruplet using a 2-bit control field in the corresponding dword element of the second source operand. Permuted results are stored in the destination operand (first operand).</p><p>The 2-bit control fields are located at the low two bits of each dword element (see <a href=\"./VPERMILPS.html#fig-5-26\">Figure 5-26</a>). Each control determines which of the source element in an input quadruple is selected for the destination element. Each quadruple of source elements must lie in the same 128-bit region as the destination.</p><p>EVEX version: The second source operand (third operand) is a ZMM/YMM/XMM register, a 512/256/128-bit memory location or a 512/256/128-bit vector broadcasted from a 32-bit memory location. Permuted results are written to the destination under the writemask.</p><p>(immediate control version)</p>", "tooltip": "(variable control version)" }; @@ -4528,7 +4581,7 @@ function getAsmOpcode(opcode) { case "VPSRAVD": return { "url": "http://www.felixcloutier.com/x86/VPSRAVW%3AVPSRAVD%3AVPSRAVQ.html", - "html": "<p>Shifts the bits in the individual data elements (word/doublewords/quadword) in the first source operand (the second operand) to the right by the number of bits specified in the count value of respective data elements in the second source operand (the third operand). As the bits in the data elements are shifted right, the empty high-order bits are set to the MSB (sign extension).</p><p>The count values are specified individually in each data element of the second source operand. If the unsigned integer value specified in the respective data element of the second source operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a quadword), then the destination data element are filled with the corresponding sign bit of the source element.</p><p>The count values are specified individually in each data element of the second source operand. If the unsigned integer value specified in the respective data element of the second source operand is greater than 16 (for word), 31 (for doublewords), or 63 (for a quadword), then the destination data element are written with 0.</p><p>VEX.128 encoded version: The destination and first source operands are XMM registers. The count operand can be either an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding destination register are zeroed.</p><p>VEX.256 encoded version: The destination and first source operands are YMM registers. The count operand can be either an YMM register or a 256-bit memory. Bits (MAXVL-1:256) of the corresponding destination register are zeroed.</p>", + "html": "<p>Shifts the bits in the individual data elements (word/doublewords/quadword) in the first source operand (the second operand) to the right by the number of bits specified in the count value of respective data elements in the second source operand (the third operand). As the bits in the data elements are shifted right, the empty high-order bits are set to the MSB (sign extension).</p><p>The count values are specified individually in each data element of the second source operand. If the unsigned integer value specified in the respective data element of the second source operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a quadword), then the destination data element is filled with the corresponding sign bit of the source element.</p><p>VEX.128 encoded version: The destination and first source operands are XMM registers. The count operand can be either an XMM register or a 128-bit memory location. Bits (MAXVL-1:128) of the corresponding destination register are zeroed.</p><p>VEX.256 encoded version: The destination and first source operands are YMM registers. The count operand can be either an YMM register or a 256-bit memory. Bits (MAXVL-1:256) of the corresponding destination register are zeroed.</p><p>EVEX.512/256/128 encoded VPSRAVD/W: The destination and first source operands are ZMM/YMM/XMM registers. The count operand can be either a ZMM/YMM/XMM register, a 512/256/128-bit memory location or a 512/256/128-bit vector broadcasted from a 32/64-bit memory location. The destination is conditionally updated with writemask k1.</p>", "tooltip": "Shifts the bits in the individual data elements (word/doublewords/quadword) in the first source operand (the second operand) to the right by the number of bits specified in the count value of respective data elements in the second source operand (the third operand). As the bits in the data elements are shifted right, the empty high-order bits are set to the MSB (sign extension)." }; @@ -4545,7 +4598,7 @@ function getAsmOpcode(opcode) { case "VPTERNLOGD": return { "url": "http://www.felixcloutier.com/x86/VPTERNLOGD%3AVPTERNLOGQ.html", - "html": "<p>VPTERNLOGD/Q takes three bit vectors of 512-bit length (in the first, second and third operand) as input data to form a set of 512 indices, each index is comprised of one bit from each input vector. The imm8 byte specifies a boolean logic table producing a binary value for each 3-bit index value. The final 512-bit boolean result is written to the destination operand (the first operand) using the writemask k1 with the granularity of doubleword element or quadword element into the destination.</p><p>The destination operand is a ZMM (EVEX.512)/YMM (EVEX.256)/XMM (EVEX.128) register. The first source operand is a ZMM/YMM/XMM register. The second source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location or a 512/256/128-bit vector broadcasted from a 32/64-bit memory location The destination operand is a ZMM register conditionally updated with writemask k1.</p><p>Table 5-18 shows two examples of Boolean functions specified by immediate values 0xE2 and 0xE4, with the look up result listed in the fourth column following the three columns containing all possible values of the 3-bit index.</p><p>Specifying different values in imm8 will allow any arbitrary three-input Boolean functions to be implemented in software using VPTERNLOGD/Q. Table 5-10 and Table 5-11 provide a mapping of all 256 possible imm8 values to various Boolean expressions.</p>", + "html": "<p>VPTERNLOGD/Q takes three bit vectors of 512-bit length (in the first, second and third operand) as input data to form a set of 512 indices, each index is comprised of one bit from each input vector. The imm8 byte specifies a boolean logic table producing a binary value for each 3-bit index value. The final 512-bit boolean result is written to the destination operand (the first operand) using the writemask k1 with the granularity of doubleword element or quadword element into the destination.</p><p>The destination operand is a ZMM (EVEX.512)/YMM (EVEX.256)/XMM (EVEX.128) register. The first source operand is a ZMM/YMM/XMM register. The second source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location or a 512/256/128-bit vector broadcasted from a 32/64-bit memory location The destination operand is a ZMM register conditionally updated with writemask k1.</p><p><a href=\"./VPTERNLOGD:VPTERNLOGQ.html#tbl-5-18\">Table 5-18</a> shows two examples of Boolean functions specified by immediate values 0xE2 and 0xE4, with the look up result listed in the fourth column following the three columns containing all possible values of the 3-bit index.</p><p>Specifying different values in imm8 will allow any arbitrary three-input Boolean functions to be implemented in software using VPTERNLOGD/Q. <span class=\"not-imported\">Table 5-10</span> and <span class=\"not-imported\">Table 5-11</span> provide a mapping of all 256 possible imm8 values to various Boolean expressions.</p>", "tooltip": "VPTERNLOGD/Q takes three bit vectors of 512-bit length (in the first, second and third operand) as input data to form a set of 512 indices, each index is comprised of one bit from each input vector. The imm8 byte specifies a boolean logic table producing a binary value for each 3-bit index value. The final 512-bit boolean result is written to the destination operand (the first operand) using the writemask k1 with the granularity of doubleword element or quadword element into the destination." }; @@ -4572,28 +4625,28 @@ function getAsmOpcode(opcode) { case "VRANGEPD": return { "url": "http://www.felixcloutier.com/x86/VRANGEPD.html", - "html": "<p>This instruction calculates 2/4/8 range operation outputs from two sets of packed input double-precision FP values in the first source operand (the second operand) and the second source operand (the third operand). The range outputs are written to the destination operand (the first operand) under the writemask k1.</p><p>Bits7:4 of imm8 byte must be zero. The range operation output is performed in two parts, each configured by a two-bit control field within imm8[3:0]:</p><p>The encodings of Imm8[1:0] and Imm8[3:2] are shown in Figure 5-27.</p><p>When one or more of the input value is a NAN, the comparison operation may signal invalid exception (IE). Details with one of more input value is NAN is listed in Table 5-19. If the comparison raises an IE, the sign select control (Imm8[3:2] has no effect to the range operation output, this is indicated also in Table 5-19.</p><p>When both input values are zeros of opposite signs, the comparison operation of MIN/MAX in the range compare operation is slightly different from the conceptually similar FP MIN/MAX operation that are found in the instructions VMAXPD/VMINPD. The details of MIN/MAX/MIN_ABS/MAX_ABS operation for VRANGEPD/PS/SD/SS for magni-tude-0, opposite-signed input cases are listed in Table 5-20.</p>", + "html": "<p>This instruction calculates 2/4/8 range operation outputs from two sets of packed input double-precision FP values in the first source operand (the second operand) and the second source operand (the third operand). The range outputs are written to the destination operand (the first operand) under the writemask k1.</p><p>Bits7:4 of imm8 byte must be zero. The range operation output is performed in two parts, each configured by a two-bit control field within imm8[3:0]:</p><p>The encodings of Imm8[1:0] and Imm8[3:2] are shown in <a href=\"./VRANGEPD.html#fig-5-27\">Figure 5-27</a>.</p><p>When one or more of the input value is a NAN, the comparison operation may signal invalid exception (IE). Details with one of more input value is NAN is listed in <a href=\"./VRANGEPD.html#tbl-5-19\">Table 5-19</a>. If the comparison raises an IE, the sign select control (Imm8[3:2] has no effect to the range operation output, this is indicated also in <a href=\"./VRANGEPD.html#tbl-5-19\">Table 5-19</a>.</p><p>When both input values are zeros of opposite signs, the comparison operation of MIN/MAX in the range compare operation is slightly different from the conceptually similar FP MIN/MAX operation that are found in the instructions VMAXPD/VMINPD. The details of MIN/MAX/MIN_ABS/MAX_ABS operation for VRANGEPD/PS/SD/SS for magni-tude-0, opposite-signed input cases are listed in <a href=\"./VRANGEPD.html#tbl-5-20\">Table 5-20</a>.</p>", "tooltip": "This instruction calculates 2/4/8 range operation outputs from two sets of packed input double-precision FP values in the first source operand (the second operand) and the second source operand (the third operand). The range outputs are written to the destination operand (the first operand) under the writemask k1." }; case "VRANGEPS": return { "url": "http://www.felixcloutier.com/x86/VRANGEPS.html", - "html": "<p>This instruction calculates 4/8/16 range operation outputs from two sets of packed input single-precision FP values in the first source operand (the second operand) and the second source operand (the third operand). The range outputs are written to the destination operand (the first operand) under the writemask k1.</p><p>Bits7:4 of imm8 byte must be zero. The range operation output is performed in two parts, each configured by a two-bit control field within imm8[3:0]:</p><p>The encodings of Imm8[1:0] and Imm8[3:2] are shown in Figure 5-27.</p><p>When one or more of the input value is a NAN, the comparison operation may signal invalid exception (IE). Details with one of more input value is NAN is listed in Table 5-19. If the comparison raises an IE, the sign select control (Imm8[3:2]) has no effect to the range operation output, this is indicated also in Table 5-19.</p><p>When both input values are zeros of opposite signs, the comparison operation of MIN/MAX in the range compare operation is slightly different from the conceptually similar FP MIN/MAX operation that are found in the instructions VMAXPD/VMINPD. The details of MIN/MAX/MIN_ABS/MAX_ABS operation for VRANGEPD/PS/SD/SS for magni-tude-0, opposite-signed input cases are listed in Table 5-20.</p>", + "html": "<p>This instruction calculates 4/8/16 range operation outputs from two sets of packed input single-precision FP values in the first source operand (the second operand) and the second source operand (the third operand). The range outputs are written to the destination operand (the first operand) under the writemask k1.</p><p>Bits7:4 of imm8 byte must be zero. The range operation output is performed in two parts, each configured by a two-bit control field within imm8[3:0]:</p><p>The encodings of Imm8[1:0] and Imm8[3:2] are shown in <a href=\"./VRANGEPD.html#fig-5-27\">Figure 5-27</a>.</p><p>When one or more of the input value is a NAN, the comparison operation may signal invalid exception (IE). Details with one of more input value is NAN is listed in <a href=\"./VRANGEPD.html#tbl-5-19\">Table 5-19</a>. If the comparison raises an IE, the sign select control (Imm8[3:2]) has no effect to the range operation output, this is indicated also in <a href=\"./VRANGEPD.html#tbl-5-19\">Table 5-19</a>.</p><p>When both input values are zeros of opposite signs, the comparison operation of MIN/MAX in the range compare operation is slightly different from the conceptually similar FP MIN/MAX operation that are found in the instructions VMAXPD/VMINPD. The details of MIN/MAX/MIN_ABS/MAX_ABS operation for VRANGEPD/PS/SD/SS for magni-tude-0, opposite-signed input cases are listed in <a href=\"./VRANGEPD.html#tbl-5-20\">Table 5-20</a>.</p>", "tooltip": "This instruction calculates 4/8/16 range operation outputs from two sets of packed input single-precision FP values in the first source operand (the second operand) and the second source operand (the third operand). The range outputs are written to the destination operand (the first operand) under the writemask k1." }; case "VRANGESD": return { "url": "http://www.felixcloutier.com/x86/VRANGESD.html", - "html": "<p>This instruction calculates a range operation output from two input double-precision FP values in the low qword element of the first source operand (the second operand) and second source operand (the third operand). The range output is written to the low qword element of the destination operand (the first operand) under the writemask k1.</p><p>Bits7:4 of imm8 byte must be zero. The range operation output is performed in two parts, each configured by a two-bit control field within imm8[3:0]:</p><p>The encodings of Imm8[1:0] and Imm8[3:2] are shown in Figure 5-27.</p><p>Bits 128:63 of the destination operand are copied from the respective element of the first source operand.</p><p>When one or more of the input value is a NAN, the comparison operation may signal invalid exception (IE). Details with one of more input value is NAN is listed in Table 5-19. If the comparison raises an IE, the sign select control (Imm8[3:2] has no effect to the range operation output, this is indicated also in Table 5-19.</p>", + "html": "<p>This instruction calculates a range operation output from two input double-precision FP values in the low qword element of the first source operand (the second operand) and second source operand (the third operand). The range output is written to the low qword element of the destination operand (the first operand) under the writemask k1.</p><p>Bits7:4 of imm8 byte must be zero. The range operation output is performed in two parts, each configured by a two-bit control field within imm8[3:0]:</p><p>The encodings of Imm8[1:0] and Imm8[3:2] are shown in <a href=\"./VRANGEPD.html#fig-5-27\">Figure 5-27</a>.</p><p>Bits 128:63 of the destination operand are copied from the respective element of the first source operand.</p><p>When one or more of the input value is a NAN, the comparison operation may signal invalid exception (IE). Details with one of more input value is NAN is listed in <a href=\"./VRANGEPD.html#tbl-5-19\">Table 5-19</a>. If the comparison raises an IE, the sign select control (Imm8[3:2] has no effect to the range operation output, this is indicated also in <a href=\"./VRANGEPD.html#tbl-5-19\">Table 5-19</a>.</p>", "tooltip": "This instruction calculates a range operation output from two input double-precision FP values in the low qword element of the first source operand (the second operand) and second source operand (the third operand). The range output is written to the low qword element of the destination operand (the first operand) under the writemask k1." }; case "VRANGESS": return { "url": "http://www.felixcloutier.com/x86/VRANGESS.html", - "html": "<p>This instruction calculates a range operation output from two input single-precision FP values in the low dword element of the first source operand (the second operand) and second source operand (the third operand). The range output is written to the low dword element of the destination operand (the first operand) under the writemask k1.</p><p>Bits7:4 of imm8 byte must be zero. The range operation output is performed in two parts, each configured by a two-bit control field within imm8[3:0]:</p><p>The encodings of Imm8[1:0] and Imm8[3:2] are shown in Figure 5-27.</p><p>Bits 128:31 of the destination operand are copied from the respective elements of the first source operand.</p><p>When one or more of the input value is a NAN, the comparison operation may signal invalid exception (IE). Details with one of more input value is NAN is listed in Table 5-19. If the comparison raises an IE, the sign select control (Imm8[3:2]) has no effect to the range operation output, this is indicated also in Table 5-19.</p>", + "html": "<p>This instruction calculates a range operation output from two input single-precision FP values in the low dword element of the first source operand (the second operand) and second source operand (the third operand). The range output is written to the low dword element of the destination operand (the first operand) under the writemask k1.</p><p>Bits7:4 of imm8 byte must be zero. The range operation output is performed in two parts, each configured by a two-bit control field within imm8[3:0]:</p><p>The encodings of Imm8[1:0] and Imm8[3:2] are shown in <a href=\"./VRANGEPD.html#fig-5-27\">Figure 5-27</a>.</p><p>Bits 128:31 of the destination operand are copied from the respective elements of the first source operand.</p><p>When one or more of the input value is a NAN, the comparison operation may signal invalid exception (IE). Details with one of more input value is NAN is listed in <a href=\"./VRANGEPD.html#tbl-5-19\">Table 5-19</a>. If the comparison raises an IE, the sign select control (Imm8[3:2]) has no effect to the range operation output, this is indicated also in <a href=\"./VRANGEPD.html#tbl-5-19\">Table 5-19</a>.</p>", "tooltip": "This instruction calculates a range operation output from two input single-precision FP values in the low dword element of the first source operand (the second operand) and second source operand (the third operand). The range output is written to the low dword element of the destination operand (the first operand) under the writemask k1." }; @@ -4614,14 +4667,14 @@ function getAsmOpcode(opcode) { case "VRCP14SD": return { "url": "http://www.felixcloutier.com/x86/VRCP14SD.html", - "html": "<p>This instruction performs a SIMD computation of the approximate reciprocal of the low double-precision floating-point value in the second source operand (the third operand) stores the result in the low quadword element of the destination operand (the first operand) according to the writemask k1. Bits (127:64) of the XMM register destination are copied from corresponding bits in the first source operand (the second operand). The maximum relative error for this approximation is less than 2<sup>-14</sup>. The source operand can be an XMM register or a 64-bit memory location. The destination operand is an XMM register.</p><p>The VRCP14SD instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e with the sign of the source value is returned. A denormal source value will be treated as zero only in case of DAZ bit set in MXCSR. Otherwise it is treated correctly (i.e. not as a 0.0). Underflow results are flushed to zero only in case of FTZ bit set in MXCSR. Otherwise it will be treated correctly (i.e. correct underflow result is written) with the sign of the operand. When a source value is a SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned. See Table 5-22 for special-case input values.</p><p>MXCSR exception flags are not affected by this instruction and floating-point exceptions are not reported.</p>", + "html": "<p>This instruction performs a SIMD computation of the approximate reciprocal of the low double-precision floating-point value in the second source operand (the third operand) stores the result in the low quadword element of the destination operand (the first operand) according to the writemask k1. Bits (127:64) of the XMM register destination are copied from corresponding bits in the first source operand (the second operand). The maximum relative error for this approximation is less than 2<sup>-14</sup>. The source operand can be an XMM register or a 64-bit memory location. The destination operand is an XMM register.</p><p>The VRCP14SD instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e with the sign of the source value is returned. A denormal source value will be treated as zero only in case of DAZ bit set in MXCSR. Otherwise it is treated correctly (i.e. not as a 0.0). Underflow results are flushed to zero only in case of FTZ bit set in MXCSR. Otherwise it will be treated correctly (i.e. correct underflow result is written) with the sign of the operand. When a source value is a SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned. See <a href=\"./VRCP14PD.html#tbl-5-22\">Table 5-22</a> for special-case input values.</p><p>MXCSR exception flags are not affected by this instruction and floating-point exceptions are not reported.</p><p>A numerically exact implementation of VRCP14xx can be found at:</p>", "tooltip": "This instruction performs a SIMD computation of the approximate reciprocal of the low double-precision floating-point value in the second source operand (the third operand) stores the result in the low quadword element of the destination operand (the first operand) according to the writemask k1. Bits (127:64) of the XMM register destination are copied from corresponding bits in the first source operand (the second operand). The maximum relative error for this approximation is less than 2-14. The source operand can be an XMM register or a 64-bit memory location. The destination operand is an XMM register." }; case "VRCP14SS": return { "url": "http://www.felixcloutier.com/x86/VRCP14SS.html", - "html": "<p>This instruction performs a SIMD computation of the approximate reciprocal of the low single-precision floating-point value in the second source operand (the third operand) and stores the result in the low quadword element of the destination operand (the first operand) according to the writemask k1. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand (the second operand). The maximum relative error for this approximation is less than 2<sup>-14</sup>. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register.</p><p>The VRCP14SS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e with the sign of the source value is returned. A denormal source value will be treated as zero only in case of DAZ bit set in MXCSR. Otherwise it is treated correctly (i.e. not as a 0.0). Underflow results are flushed to zero only in case of FTZ bit set in MXCSR. Otherwise it will be treated correctly (i.e. correct underflow result is written) with the sign of the operand. When a source value is a SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned. See Table 5-23 for special-case input values.</p><p>MXCSR exception flags are not affected by this instruction and floating-point exceptions are not reported.</p>", + "html": "<p>This instruction performs a SIMD computation of the approximate reciprocal of the low single-precision floating-point value in the second source operand (the third operand) and stores the result in the low quadword element of the destination operand (the first operand) according to the writemask k1. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand (the second operand). The maximum relative error for this approximation is less than 2<sup>-14</sup>. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register.</p><p>The VRCP14SS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an \u221e with the sign of the source value is returned. A denormal source value will be treated as zero only in case of DAZ bit set in MXCSR. Otherwise it is treated correctly (i.e. not as a 0.0). Underflow results are flushed to zero only in case of FTZ bit set in MXCSR. Otherwise it will be treated correctly (i.e. correct underflow result is written) with the sign of the operand. When a source value is a SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned. See <a href=\"./VRCP14PS.html#tbl-5-23\">Table 5-23</a> for special-case input values.</p><p>MXCSR exception flags are not affected by this instruction and floating-point exceptions are not reported.</p>", "tooltip": "This instruction performs a SIMD computation of the approximate reciprocal of the low single-precision floating-point value in the second source operand (the third operand) and stores the result in the low quadword element of the destination operand (the first operand) according to the writemask k1. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand (the second operand). The maximum relative error for this approximation is less than 2-14. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register." }; @@ -4656,56 +4709,56 @@ function getAsmOpcode(opcode) { case "VREDUCEPD": return { "url": "http://www.felixcloutier.com/x86/VREDUCEPD.html", - "html": "<p>Perform reduction transformation of the packed binary encoded double-precision FP values in the source operand (the second operand) and store the reduced results in binary FP format to the destination operand (the first operand) under the writemask k1.</p><p>The reduction transformation subtracts the integer part and the leading M fractional bits from the binary FP source value, where M is a unsigned integer specified by imm8[7:4], see Figure 5-28. Specifically, the reduction transformation can be expressed as:</p><p>dest = src \u2013 (ROUND(2<sup>M</sup>*src))*2<sup>-M</sup>;</p><p>where \u201cRound()\u201d treats \u201csrc\u201d, \u201c2<sup>M</sup>\u201d, and their product as binary FP numbers with normalized significand and biased exponents.</p><p>The magnitude of the reduced result can be expressed by considering src= 2<sup>p</sup>*man2,</p>", + "html": "<p>Perform reduction transformation of the packed binary encoded double-precision FP values in the source operand (the second operand) and store the reduced results in binary FP format to the destination operand (the first operand) under the writemask k1.</p><p>The reduction transformation subtracts the integer part and the leading M fractional bits from the binary FP source value, where M is a unsigned integer specified by imm8[7:4], see <a href=\"./VREDUCEPD.html#fig-5-28\">Figure 5-28</a>. Specifically, the reduction transformation can be expressed as:</p><p>dest = src \u2013 (ROUND(2<sup>M</sup>*src))*2<sup>-M</sup>;</p><p>where \u201cRound()\u201d treats \u201csrc\u201d, \u201c2<sup>M</sup>\u201d, and their product as binary FP numbers with normalized significand and biased exponents.</p><p>The magnitude of the reduced result can be expressed by considering src= 2<sup>p</sup>*man2,</p>", "tooltip": "Perform reduction transformation of the packed binary encoded double-precision FP values in the source operand (the second operand) and store the reduced results in binary FP format to the destination operand (the first operand) under the writemask k1." }; case "VREDUCEPS": return { "url": "http://www.felixcloutier.com/x86/VREDUCEPS.html", - "html": "<p>Perform reduction transformation of the packed binary encoded single-precision FP values in the source operand (the second operand) and store the reduced results in binary FP format to the destination operand (the first operand) under the writemask k1.</p><p>The reduction transformation subtracts the integer part and the leading M fractional bits from the binary FP source value, where M is a unsigned integer specified by imm8[7:4], see Figure 5-28. Specifically, the reduction transformation can be expressed as:</p><p>dest = src \u2013 (ROUND(2<sup>M</sup>*src))*2<sup>-M</sup>;</p><p>where \u201cRound()\u201d treats \u201csrc\u201d, \u201c2<sup>M</sup>\u201d, and their product as binary FP numbers with normalized significand and biased exponents.</p><p>The magnitude of the reduced result can be expressed by considering src= 2<sup>p</sup>*man2,</p>", + "html": "<p>Perform reduction transformation of the packed binary encoded single-precision FP values in the source operand (the second operand) and store the reduced results in binary FP format to the destination operand (the first operand) under the writemask k1.</p><p>The reduction transformation subtracts the integer part and the leading M fractional bits from the binary FP source value, where M is a unsigned integer specified by imm8[7:4], see <a href=\"./VREDUCEPD.html#fig-5-28\">Figure 5-28</a>. Specifically, the reduction transformation can be expressed as:</p><p>dest = src \u2013 (ROUND(2<sup>M</sup>*src))*2<sup>-M</sup>;</p><p>where \u201cRound()\u201d treats \u201csrc\u201d, \u201c2<sup>M</sup>\u201d, and their product as binary FP numbers with normalized significand and biased exponents.</p><p>The magnitude of the reduced result can be expressed by considering src= 2<sup>p</sup>*man2,</p>", "tooltip": "Perform reduction transformation of the packed binary encoded single-precision FP values in the source operand (the second operand) and store the reduced results in binary FP format to the destination operand (the first operand) under the writemask k1." }; case "VREDUCESD": return { "url": "http://www.felixcloutier.com/x86/VREDUCESD.html", - "html": "<p>Perform a reduction transformation of the binary encoded double-precision FP value in the low qword element of the second source operand (the third operand) and store the reduced result in binary FP format to the low qword element of the destination operand (the first operand) under the writemask k1. Bits 127:64 of the destination operand are copied from respective qword elements of the first source operand (the second operand).</p><p>The reduction transformation subtracts the integer part and the leading M fractional bits from the binary FP source value, where M is a unsigned integer specified by imm8[7:4], see Figure 5-28. Specifically, the reduction transformation can be expressed as:</p><p>dest = src \u2013 (ROUND(2<sup>M</sup>*src))*2<sup>-M</sup>;</p><p>where \u201cRound()\u201d treats \u201csrc\u201d, \u201c2<sup>M</sup>\u201d, and their product as binary FP numbers with normalized significand and biased exponents.</p><p>The magnitude of the reduced result can be expressed by considering src= 2<sup>p</sup>*man2,</p>", + "html": "<p>Perform a reduction transformation of the binary encoded double-precision FP value in the low qword element of the second source operand (the third operand) and store the reduced result in binary FP format to the low qword element of the destination operand (the first operand) under the writemask k1. Bits 127:64 of the destination operand are copied from respective qword elements of the first source operand (the second operand).</p><p>The reduction transformation subtracts the integer part and the leading M fractional bits from the binary FP source value, where M is a unsigned integer specified by imm8[7:4], see <a href=\"./VREDUCEPD.html#fig-5-28\">Figure 5-28</a>. Specifically, the reduction transformation can be expressed as:</p><p>dest = src \u2013 (ROUND(2<sup>M</sup>*src))*2<sup>-M</sup>;</p><p>where \u201cRound()\u201d treats \u201csrc\u201d, \u201c2<sup>M</sup>\u201d, and their product as binary FP numbers with normalized significand and biased exponents.</p><p>The magnitude of the reduced result can be expressed by considering src= 2<sup>p</sup>*man2,</p>", "tooltip": "Perform a reduction transformation of the binary encoded double-precision FP value in the low qword element of the second source operand (the third operand) and store the reduced result in binary FP format to the low qword element of the destination operand (the first operand) under the writemask k1. Bits 127:64 of the destination operand are copied from respective qword elements of the first source operand (the second operand)." }; case "VREDUCESS": return { "url": "http://www.felixcloutier.com/x86/VREDUCESS.html", - "html": "<p>Perform a reduction transformation of the binary encoded single-precision FP value in the low dword element of the second source operand (the third operand) and store the reduced result in binary FP format to the low dword element of the destination operand (the first operand) under the writemask k1. Bits 127:32 of the destination operand are copied from respective dword elements of the first source operand (the second operand).</p><p>The reduction transformation subtracts the integer part and the leading M fractional bits from the binary FP source value, where M is a unsigned integer specified by imm8[7:4], see Figure 5-28. Specifically, the reduction transformation can be expressed as:</p><p>dest = src \u2013 (ROUND(2<sup>M</sup>*src))*2<sup>-M</sup>;</p><p>where \u201cRound()\u201d treats \u201csrc\u201d, \u201c2<sup>M</sup>\u201d, and their product as binary FP numbers with normalized significand and biased exponents.</p><p>The magnitude of the reduced result can be expressed by considering src= 2<sup>p</sup>*man2,</p>", + "html": "<p>Perform a reduction transformation of the binary encoded single-precision FP value in the low dword element of the second source operand (the third operand) and store the reduced result in binary FP format to the low dword element of the destination operand (the first operand) under the writemask k1. Bits 127:32 of the destination operand are copied from respective dword elements of the first source operand (the second operand).</p><p>The reduction transformation subtracts the integer part and the leading M fractional bits from the binary FP source value, where M is a unsigned integer specified by imm8[7:4], see <a href=\"./VREDUCEPD.html#fig-5-28\">Figure 5-28</a>. Specifically, the reduction transformation can be expressed as:</p><p>dest = src \u2013 (ROUND(2<sup>M</sup>*src))*2<sup>-M</sup>;</p><p>where \u201cRound()\u201d treats \u201csrc\u201d, \u201c2<sup>M</sup>\u201d, and their product as binary FP numbers with normalized significand and biased exponents.</p><p>The magnitude of the reduced result can be expressed by considering src= 2<sup>p</sup>*man2,</p>", "tooltip": "Perform a reduction transformation of the binary encoded single-precision FP value in the low dword element of the second source operand (the third operand) and store the reduced result in binary FP format to the low dword element of the destination operand (the first operand) under the writemask k1. Bits 127:32 of the destination operand are copied from respective dword elements of the first source operand (the second operand)." }; case "VRNDSCALEPD": return { "url": "http://www.felixcloutier.com/x86/VRNDSCALEPD.html", - "html": "<p>Round the double-precision floating-point values in the source operand by the rounding mode specified in the immediate operand (see Figure 5-29) and places the result in the destination operand.</p><p>The destination operand (the first operand) is a ZMM/YMM/XMM register conditionally updated according to the writemask. The source operand (the second operand) can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 64-bit memory location.</p><p>The rounding process rounds the input to an integral value, plus number bits of fraction that are specified by imm8[7:4] (to be included in the result) and returns the result as a double-precision floating-point value.</p><p>It should be noticed that no overflow is induced while executing this instruction (although the source is scaled by the imm8[7:4] value).</p><p>The immediate operand also specifies control fields for the rounding operation, three bit fields are defined and shown in the \u201cImmediate Control Description\u201d figure below. Bit 3 of the immediate byte controls the processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Immediate control table below lists the encoded values for rounding-mode field).</p>", + "html": "<p>Round the double-precision floating-point values in the source operand by the rounding mode specified in the immediate operand (see <a href=\"./VRNDSCALEPD.html#fig-5-29\">Figure 5-29</a>) and places the result in the destination operand.</p><p>The destination operand (the first operand) is a ZMM/YMM/XMM register conditionally updated according to the writemask. The source operand (the second operand) can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 64-bit memory location.</p><p>The rounding process rounds the input to an integral value, plus number bits of fraction that are specified by imm8[7:4] (to be included in the result) and returns the result as a double-precision floating-point value.</p><p>It should be noticed that no overflow is induced while executing this instruction (although the source is scaled by the imm8[7:4] value).</p><p>The immediate operand also specifies control fields for the rounding operation, three bit fields are defined and shown in the \u201cImmediate Control Description\u201d figure below. Bit 3 of the immediate byte controls the processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Immediate control table below lists the encoded values for rounding-mode field).</p>", "tooltip": "Round the double-precision floating-point values in the source operand by the rounding mode specified in the immediate operand (see Figure 5-29) and places the result in the destination operand." }; case "VRNDSCALEPS": return { "url": "http://www.felixcloutier.com/x86/VRNDSCALEPS.html", - "html": "<p>Round the single-precision floating-point values in the source operand by the rounding mode specified in the immediate operand (see Figure 5-29) and places the result in the destination operand.</p><p>The destination operand (the first operand) is a ZMM register conditionally updated according to the writemask. The source operand (the second operand) can be a ZMM register, a 512-bit memory location, or a 512-bit vector broadcasted from a 32-bit memory location.</p><p>The rounding process rounds the input to an integral value, plus number bits of fraction that are specified by imm8[7:4] (to be included in the result) and returns the result as a single-precision floating-point value.</p><p>It should be noticed that no overflow is induced while executing this instruction (although the source is scaled by the imm8[7:4] value).</p><p>The immediate operand also specifies control fields for the rounding operation, three bit fields are defined and shown in the \u201cImmediate Control Description\u201d figure below. Bit 3 of the immediate byte controls the processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Immediate control table below lists the encoded values for rounding-mode field).</p>", + "html": "<p>Round the single-precision floating-point values in the source operand by the rounding mode specified in the immediate operand (see <a href=\"./VRNDSCALEPD.html#fig-5-29\">Figure 5-29</a>) and places the result in the destination operand.</p><p>The destination operand (the first operand) is a ZMM register conditionally updated according to the writemask. The source operand (the second operand) can be a ZMM register, a 512-bit memory location, or a 512-bit vector broadcasted from a 32-bit memory location.</p><p>The rounding process rounds the input to an integral value, plus number bits of fraction that are specified by imm8[7:4] (to be included in the result) and returns the result as a single-precision floating-point value.</p><p>It should be noticed that no overflow is induced while executing this instruction (although the source is scaled by the imm8[7:4] value).</p><p>The immediate operand also specifies control fields for the rounding operation, three bit fields are defined and shown in the \u201cImmediate Control Description\u201d figure below. Bit 3 of the immediate byte controls the processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Immediate control table below lists the encoded values for rounding-mode field).</p>", "tooltip": "Round the single-precision floating-point values in the source operand by the rounding mode specified in the immediate operand (see Figure 5-29) and places the result in the destination operand." }; case "VRNDSCALESD": return { "url": "http://www.felixcloutier.com/x86/VRNDSCALESD.html", - "html": "<p>Rounds a double-precision floating-point value in the low quadword (see Figure 5-29) element the second source operand (the third operand) by the rounding mode specified in the immediate operand and places the result in the corresponding element of the destination operand (the third operand) according to the writemask. The quadword element at bits 127:64 of the destination is copied from the first source operand (the second operand).</p><p>The destination and first source operands are XMM registers, the 2nd source operand can be an XMM register or memory location. Bits MAXVL-1:128 of the destination register are cleared.</p><p>The rounding process rounds the input to an integral value, plus number bits of fraction that are specified by imm8[7:4] (to be included in the result) and returns the result as a double-precision floating-point value.</p><p>It should be noticed that no overflow is induced while executing this instruction (although the source is scaled by the imm8[7:4] value).</p><p>The immediate operand also specifies control fields for the rounding operation, three bit fields are defined and shown in the \u201cImmediate Control Description\u201d figure below. Bit 3 of the immediate byte controls the processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Immediate control table below lists the encoded values for rounding-mode field).</p>", - "tooltip": "Rounds a double-precision floating-point value in the low quadword (see Figure 5-29) element the second source operand (the third operand) by the rounding mode specified in the immediate operand and places the result in the corresponding element of the destination operand (the third operand) according to the writemask. The quadword element at bits 127:64 of the destination is copied from the first source operand (the second operand)." + "html": "<p>Rounds a double-precision floating-point value in the low quadword (see <a href=\"./VRNDSCALEPD.html#fig-5-29\">Figure 5-29</a>) element of the second source operand (the third operand) by the rounding mode specified in the immediate operand and places the result in the corresponding element of the destination operand (the first operand) according to the writemask. The quadword element at bits 127:64 of the destination is copied from the first source operand (the second operand).</p><p>The destination and first source operands are XMM registers, the 2nd source operand can be an XMM register or memory location. Bits MAXVL-1:128 of the destination register are cleared.</p><p>The rounding process rounds the input to an integral value, plus number bits of fraction that are specified by imm8[7:4] (to be included in the result) and returns the result as a double-precision floating-point value.</p><p>It should be noticed that no overflow is induced while executing this instruction (although the source is scaled by the imm8[7:4] value).</p><p>The immediate operand also specifies control fields for the rounding operation, three bit fields are defined and shown in the \u201cImmediate Control Description\u201d figure below. Bit 3 of the immediate byte controls the processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Immediate control table below lists the encoded values for rounding-mode field).</p>", + "tooltip": "Rounds a double-precision floating-point value in the low quadword (see Figure 5-29) element of the second source operand (the third operand) by the rounding mode specified in the immediate operand and places the result in the corresponding element of the destination operand (the first operand) according to the writemask. The quadword element at bits 127:64 of the destination is copied from the first source operand (the second operand)." }; case "VRNDSCALESS": return { "url": "http://www.felixcloutier.com/x86/VRNDSCALESS.html", - "html": "<p>Rounds the single-precision floating-point value in the low doubleword element of the second source operand (the third operand) by the rounding mode specified in the immediate operand (see Figure 5-29) and places the result in the corresponding element of the destination operand (the first operand) according to the writemask. The double-word elements at bits 127:32 of the destination are copied from the first source operand (the second operand).</p><p>The destination and first source operands are XMM registers, the 2nd source operand can be an XMM register or memory location. Bits MAXVL-1:128 of the destination register are cleared.</p><p>The rounding process rounds the input to an integral value, plus number bits of fraction that are specified by imm8[7:4] (to be included in the result) and returns the result as a single-precision floating-point value.</p><p>It should be noticed that no overflow is induced while executing this instruction (although the source is scaled by the imm8[7:4] value).</p><p>The immediate operand also specifies control fields for the rounding operation, three bit fields are defined and shown in the \u201cImmediate Control Description\u201d figure below. Bit 3 of the immediate byte controls the processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Immediate control tables below lists the encoded values for rounding-mode field).</p>", + "html": "<p>Rounds the single-precision floating-point value in the low doubleword element of the second source operand (the third operand) by the rounding mode specified in the immediate operand (see <a href=\"./VRNDSCALEPD.html#fig-5-29\">Figure 5-29</a>) and places the result in the corresponding element of the destination operand (the first operand) according to the writemask. The double-word elements at bits 127:32 of the destination are copied from the first source operand (the second operand).</p><p>The destination and first source operands are XMM registers, the 2nd source operand can be an XMM register or memory location. Bits MAXVL-1:128 of the destination register are cleared.</p><p>The rounding process rounds the input to an integral value, plus number bits of fraction that are specified by imm8[7:4] (to be included in the result) and returns the result as a single-precision floating-point value.</p><p>It should be noticed that no overflow is induced while executing this instruction (although the source is scaled by the imm8[7:4] value).</p><p>The immediate operand also specifies control fields for the rounding operation, three bit fields are defined and shown in the \u201cImmediate Control Description\u201d figure below. Bit 3 of the immediate byte controls the processor behavior for a precision exception, bit 2 selects the source of rounding mode control. Bits 1:0 specify a non-sticky rounding-mode value (Immediate control tables below lists the encoded values for rounding-mode field).</p>", "tooltip": "Rounds the single-precision floating-point value in the low doubleword element of the second source operand (the third operand) by the rounding mode specified in the immediate operand (see Figure 5-29) and places the result in the corresponding element of the destination operand (the first operand) according to the writemask. The double-word elements at bits 127:32 of the destination are copied from the first source operand (the second operand)." }; @@ -4859,14 +4912,14 @@ function getAsmOpcode(opcode) { case "WAIT": return { "url": "http://www.felixcloutier.com/x86/WAIT%3AFWAIT.html", - "html": "<p>Causes the processor to check for and handle pending, unmasked, floating-point exceptions before proceeding. (FWAIT is an alternate mnemonic for WAIT.)</p><p>This instruction is useful for synchronizing exceptions in critical sections of code. Coding a WAIT instruction after a floating-point instruction ensures that any unmasked floating-point exceptions the instruction may raise are handled before the processor can modify the instruction\u2019s results. See the section titled \u201cFloating-Point Exception Synchronization\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for more information on using the WAIT/FWAIT instruction.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Causes the processor to check for and handle pending, unmasked, floating-point exceptions before proceeding. (FWAIT is an alternate mnemonic for WAIT.)</p><p>This instruction is useful for synchronizing exceptions in critical sections of code. Coding a WAIT instruction after a floating-point instruction ensures that any unmasked floating-point exceptions the instruction may raise are handled before the processor can modify the instruction\u2019s results. See the section titled \u201cFloating-Point Exception Synchronization\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, for more information on using the WAIT/FWAIT instruction.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Causes the processor to check for and handle pending, unmasked, floating-point exceptions before proceeding. (FWAIT is an alternate mnemonic for WAIT.)" }; case "WBINVD": return { "url": "http://www.felixcloutier.com/x86/WBINVD.html", - "html": "<p>Writes back all modified cache lines in the processor\u2019s internal cache to main memory and invalidates (flushes) the internal caches. The instruction then issues a special-function bus cycle that directs external caches to also write back modified data and another bus cycle to indicate that the external caches should be invalidated.</p><p>After executing this instruction, the processor does not wait for the external caches to complete their write-back and flushing operations before proceeding with instruction execution. It is the responsibility of hardware to respond to the cache write-back and flush signals. The amount of time or cycles for WBINVD to complete will vary due to size and other factors of different cache hierarchies. As a consequence, the use of the WBINVD instruction can have an impact on logical processor interrupt/event response time. Additional information of WBINVD behavior in a cache hierarchy with hierarchical sharing topology can be found in Chapter 2 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>.</p><p>The WBINVD instruction is a privileged instruction. When the processor is running in protected mode, the CPL of a program or procedure must be 0 to execute this instruction. This instruction is also a serializing instruction (see \u201cSerializing Instructions\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>).</p><p>In situations where cache coherency with main memory is not a concern, software can use the INVD instruction.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", + "html": "<p>Writes back all modified cache lines in the processor\u2019s internal cache to main memory and invalidates (flushes) the internal caches. The instruction then issues a special-function bus cycle that directs external caches to also write back modified data and another bus cycle to indicate that the external caches should be invalidated.</p><p>After executing this instruction, the processor does not wait for the external caches to complete their write-back and flushing operations before proceeding with instruction execution. It is the responsibility of hardware to respond to the cache write-back and flush signals. The amount of time or cycles for WBINVD to complete will vary due to size and other factors of different cache hierarchies. As a consequence, the use of the WBINVD instruction can have an impact on logical processor interrupt/event response time. Additional information of WBINVD behavior in a cache hierarchy with hierarchical sharing topology can be found in Chapter 2 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>.</p><p>The WBINVD instruction is a privileged instruction. When the processor is running in protected mode, the CPL of a program or procedure must be 0 to execute this instruction. This instruction is also a serializing instruction (see \u201cSerializing Instructions\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>).</p><p>In situations where cache coherency with main memory is not a concern, software can use the INVD instruction.</p><p>This instruction\u2019s operation is the same in non-64-bit modes and 64-bit mode.</p>", "tooltip": "Writes back all modified cache lines in the processor\u2019s internal cache to main memory and invalidates (flushes) the internal caches. The instruction then issues a special-function bus cycle that directs external caches to also write back modified data and another bus cycle to indicate that the external caches should be invalidated." }; @@ -4881,7 +4934,7 @@ function getAsmOpcode(opcode) { case "WRMSR": return { "url": "http://www.felixcloutier.com/x86/WRMSR.html", - "html": "<p>Writes the contents of registers EDX:EAX into the 64-bit model specific register (MSR) specified in the ECX register. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The contents of the EDX register are copied to high-order 32 bits of the selected MSR and the contents of the EAX register are copied to low-order 32 bits of the MSR. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are ignored.) Undefined or reserved bits in an MSR should be set to values previously read.</p><p>This instruction must be executed at privilege level 0 or in real-address mode; otherwise, a general protection exception #GP(0) is generated. Specifying a reserved or unimplemented MSR address in ECX will also cause a general protection exception. The processor will also generate a general protection exception if software attempts to write to bits in a reserved MSR.</p><p>When the WRMSR instruction is used to write to an MTRR, the TLBs are invalidated. This includes global entries (see \u201cTranslation Lookaside Buffers (TLBs)\u201d in Chapter 3 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>).</p><p>MSRs control functions for testability, execution tracing, performance-monitoring and machine check errors. Chapter 2, \u201cModel-Specific Registers (MSRs)\u201d of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 4</em>, lists all MSRs that can be written with this instruction and their addresses. Note that each processor family has its own set of MSRs.</p><p>The WRMSR instruction is a serializing instruction (see \u201cSerializing Instructions\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>). Note that WRMSR to the IA32_TSC_DEADLINE MSR (MSR index 6E0H) and the X2APIC MSRs (MSR indices 802H to 83FH) are not serializing.</p>", + "html": "<p>Writes the contents of registers EDX:EAX into the 64-bit model specific register (MSR) specified in the ECX register. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The contents of the EDX register are copied to high-order 32 bits of the selected MSR and the contents of the EAX register are copied to low-order 32 bits of the MSR. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are ignored.) Undefined or reserved bits in an MSR should be set to values previously read.</p><p>This instruction must be executed at privilege level 0 or in real-address mode; otherwise, a general protection exception #GP(0) is generated. Specifying a reserved or unimplemented MSR address in ECX will also cause a general protection exception. The processor will also generate a general protection exception if software attempts to write to bits in a reserved MSR.</p><p>When the WRMSR instruction is used to write to an MTRR, the TLBs are invalidated. This includes global entries (see \u201cTranslation Lookaside Buffers (TLBs)\u201d in Chapter 3 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>).</p><p>MSRs control functions for testability, execution tracing, performance-monitoring and machine check errors. Chapter 2, \u201cModel-Specific Registers (MSRs)\u201d of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 4</em>, lists all MSRs that can be written with this instruction and their addresses. Note that each processor family has its own set of MSRs.</p><p>The WRMSR instruction is a serializing instruction (see \u201cSerializing Instructions\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>). Note that WRMSR to the IA32_TSC_DEADLINE MSR (MSR index 6E0H) and the X2APIC MSRs (MSR indices 802H to 83FH) are not serializing.</p>", "tooltip": "Writes the contents of registers EDX:EAX into the 64-bit model specific register (MSR) specified in the ECX register. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The contents of the EDX register are copied to high-order 32 bits of the selected MSR and the contents of the EAX register are copied to low-order 32 bits of the MSR. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are ignored.) Undefined or reserved bits in an MSR should be set to values previously read." }; @@ -4903,7 +4956,7 @@ function getAsmOpcode(opcode) { case "XRELEASE": return { "url": "http://www.felixcloutier.com/x86/XACQUIRE%3AXRELEASE.html", - "html": "<p>The XACQUIRE prefix is a hint to start lock elision on the memory address specified by the instruction and the XRELEASE prefix is a hint to end lock elision on the memory address specified by the instruction.</p><p>The XACQUIRE prefix hint can only be used with the following instructions (these instructions are also referred to as XACQUIRE-enabled when used with the XACQUIRE prefix):</p><p>The XRELEASE prefix hint can only be used with the following instructions (also referred to as XRELEASE-enabled when used with the XRELEASE prefix):</p><p>The lock variables must satisfy the guidelines described in <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, Section 16.3.3, for elision to be successful, otherwise an HLE abort may be signaled.</p><p>If an encoded byte sequence that meets XACQUIRE/XRELEASE requirements includes both prefixes, then the HLE semantic is determined by the prefix byte that is placed closest to the instruction opcode. For example, an F3F2C6 will not be treated as a XRELEASE-enabled instruction since the F2H (XACQUIRE) is closest to the instruction opcode C6. Similarly, an F2F3F0 prefixed instruction will be treated as a XRELEASE-enabled instruction since F3H (XRELEASE) is closest to the instruction opcode.</p>", + "html": "<p>The XACQUIRE prefix is a hint to start lock elision on the memory address specified by the instruction and the XRELEASE prefix is a hint to end lock elision on the memory address specified by the instruction.</p><p>The XACQUIRE prefix hint can only be used with the following instructions (these instructions are also referred to as XACQUIRE-enabled when used with the XACQUIRE prefix):</p><p>The XRELEASE prefix hint can only be used with the following instructions (also referred to as XRELEASE-enabled when used with the XRELEASE prefix):</p><p>The lock variables must satisfy the guidelines described in <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>, Section 16.3.3, for elision to be successful, otherwise an HLE abort may be signaled.</p><p>If an encoded byte sequence that meets XACQUIRE/XRELEASE requirements includes both prefixes, then the HLE semantic is determined by the prefix byte that is placed closest to the instruction opcode. For example, an F3F2C6 will not be treated as a XRELEASE-enabled instruction since the F2H (XACQUIRE) is closest to the instruction opcode C6. Similarly, an F2F3F0 prefixed instruction will be treated as a XRELEASE-enabled instruction since F3H (XRELEASE) is closest to the instruction opcode.</p>", "tooltip": "The XACQUIRE prefix is a hint to start lock elision on the memory address specified by the instruction and the XRELEASE prefix is a hint to end lock elision on the memory address specified by the instruction." }; @@ -4924,7 +4977,7 @@ function getAsmOpcode(opcode) { case "XCHG": return { "url": "http://www.felixcloutier.com/x86/XCHG.html", - "html": "<p>Exchanges the contents of the destination (first) and source (second) operands. The operands can be two general-purpose registers or a register and a memory location. If a memory operand is referenced, the processor\u2019s locking protocol is automatically implemented for the duration of the exchange operation, regardless of the presence or absence of the LOCK prefix or of the value of the IOPL. (See the LOCK prefix description in this chapter for more information on the locking protocol.)</p><p>This instruction is useful for implementing semaphores or similar data structures for process synchronization. (See \u201cBus Locking\u201d in Chapter 8 of the <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for more information on bus locking.)</p><p>The XCHG instruction can also be used instead of the BSWAP instruction for 16-bit operands.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", + "html": "<p>Exchanges the contents of the destination (first) and source (second) operands. The operands can be two general-purpose registers or a register and a memory location. If a memory operand is referenced, the processor\u2019s locking protocol is automatically implemented for the duration of the exchange operation, regardless of the presence or absence of the LOCK prefix or of the value of the IOPL. (See the LOCK prefix description in this chapter for more information on the locking protocol.)</p><p>This instruction is useful for implementing semaphores or similar data structures for process synchronization. (See \u201cBus Locking\u201d in Chapter 8 of the <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 3A</em>, for more information on bus locking.)</p><p>The XCHG instruction can also be used instead of the BSWAP instruction for 16-bit operands.</p><p>In 64-bit mode, the instruction\u2019s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.</p>", "tooltip": "Exchanges the contents of the destination (first) and source (second) operands. The operands can be two general-purpose registers or a register and a memory location. If a memory operand is referenced, the processor\u2019s locking protocol is automatically implemented for the duration of the exchange operation, regardless of the presence or absence of the LOCK prefix or of the value of the IOPL. (See the LOCK prefix description in this chapter for more information on the locking protocol.)" }; @@ -4938,7 +4991,7 @@ function getAsmOpcode(opcode) { case "XGETBV": return { "url": "http://www.felixcloutier.com/x86/XGETBV.html", - "html": "<p>Reads the contents of the extended control register (XCR) specified in the ECX register into registers EDX:EAX. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The EDX register is loaded with the high-order 32 bits of the XCR and the EAX register is loaded with the low-order 32 bits. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are cleared.) If fewer than 64 bits are implemented in the XCR being read, the values returned to EDX:EAX in unimplemented bit locations are undefined.</p><p>XCR0 is supported on any processor that supports the XGETBV instruction. If CPUID.(EAX=0DH,ECX=1):EAX.XG1[bit 2] = 1, executing XGETBV with ECX = 1 returns in EDX:EAX the logicalAND of XCR0 and the current value of the XINUSE state-component bitmap. This allows software to discover the state of the init optimization used by XSAVEOPT and XSAVES. See Chapter 13, \u201cManaging State Using the XSAVE Feature Set\u201a\u201d in <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Use of any other value for ECX results in a general-protection (#GP) exception.</p>", + "html": "<p>Reads the contents of the extended control register (XCR) specified in the ECX register into registers EDX:EAX. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The EDX register is loaded with the high-order 32 bits of the XCR and the EAX register is loaded with the low-order 32 bits. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are cleared.) If fewer than 64 bits are implemented in the XCR being read, the values returned to EDX:EAX in unimplemented bit locations are undefined.</p><p>XCR0 is supported on any processor that supports the XGETBV instruction. If CPUID.(EAX=0DH,ECX=1):EAX.XG1[bit 2] = 1, executing XGETBV with ECX = 1 returns in EDX:EAX the logicalAND of XCR0 and the current value of the XINUSE state-component bitmap. This allows software to discover the state of the init optimization used by XSAVEOPT and XSAVES. See Chapter 13, \u201cManaging State Using the XSAVE Feature Set\u201a\u201d in <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Use of any other value for ECX results in a general-protection (#GP) exception.</p>", "tooltip": "Reads the contents of the extended control register (XCR) specified in the ECX register into registers EDX:EAX. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The EDX register is loaded with the high-order 32 bits of the XCR and the EAX register is loaded with the low-order 32 bits. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are cleared.) If fewer than 64 bits are implemented in the XCR being read, the values returned to EDX:EAX in unimplemented bit locations are undefined." }; @@ -4976,49 +5029,49 @@ function getAsmOpcode(opcode) { case "XRSTOR": return { "url": "http://www.felixcloutier.com/x86/XRSTOR.html", - "html": "<p>Performs a full or partial restore of processor state components from the XSAVE area located at the memory address specified by the source operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components restored correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.8, \u201cOperation of XRSTOR,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XRSTOR instruction. The following items provide a highlevel outline:</p><p>Use of a source operand not aligned to 64-byte boundary (for 64-bit and 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p><p>See Section 13.6, \u201cProcessor Tracking of XSAVE-Managed State,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> for discussion of the bitmaps XINUSE and XMODIFIED and of the quantity XRSTOR_INFO.</p>", + "html": "<p>Performs a full or partial restore of processor state components from the XSAVE area located at the memory address specified by the source operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components restored correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.8, \u201cOperation of XRSTOR,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XRSTOR instruction. The following items provide a highlevel outline:</p><p>Use of a source operand not aligned to 64-byte boundary (for 64-bit and 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p><p>See Section 13.6, \u201cProcessor Tracking of XSAVE-Managed State,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> for discussion of the bitmaps XINUSE and XMODIFIED and of the quantity XRSTOR_INFO.</p>", "tooltip": "Performs a full or partial restore of processor state components from the XSAVE area located at the memory address specified by the source operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components restored correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0." }; case "XRSTORS": return { "url": "http://www.felixcloutier.com/x86/XRSTORS.html", - "html": "<p>Performs a full or partial restore of processor state components from the XSAVE area located at the memory address specified by the source operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components restored correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XRSTORS may be executed only if CPL = 0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.12, \u201cOperation of XRSTORS,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XRSTOR instruction. The following items provide a high-level outline:</p><p>Use of a source operand not aligned to 64-byte boundary (for 64-bit and 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p><p>See Section 13.6, \u201cProcessor Tracking of XSAVE-Managed State,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> for discussion of the bitmaps XINUSE and XMODIFIED and of the quantity XRSTOR_INFO.</p>", + "html": "<p>Performs a full or partial restore of processor state components from the XSAVE area located at the memory address specified by the source operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components restored correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XRSTORS may be executed only if CPL = 0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.12, \u201cOperation of XRSTORS,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XRSTOR instruction. The following items provide a high-level outline:</p><p>Use of a source operand not aligned to 64-byte boundary (for 64-bit and 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p><p>See Section 13.6, \u201cProcessor Tracking of XSAVE-Managed State,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> for discussion of the bitmaps XINUSE and XMODIFIED and of the quantity XRSTOR_INFO.</p>", "tooltip": "Performs a full or partial restore of processor state components from the XSAVE area located at the memory address specified by the source operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components restored correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XRSTORS may be executed only if CPL = 0." }; case "XSAVE": return { "url": "http://www.felixcloutier.com/x86/XSAVE.html", - "html": "<p>Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.7, \u201cOperation of XSAVE,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XSAVE instruction. The following items provide a high-level outline:</p><p>Use of a destination operand not aligned to 64-byte boundary (in either 64-bit or 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p>", + "html": "<p>Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.7, \u201cOperation of XSAVE,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XSAVE instruction. The following items provide a high-level outline:</p><p>Use of a destination operand not aligned to 64-byte boundary (in either 64-bit or 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p>", "tooltip": "Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0." }; case "XSAVEC": return { "url": "http://www.felixcloutier.com/x86/XSAVEC.html", - "html": "<p>Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.10, \u201cOperation of XSAVEC,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XSAVEC instruction. The following items provide a highlevel outline:</p><p>Use of a destination operand not aligned to 64-byte boundary (in either 64-bit or 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p>", + "html": "<p>Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.10, \u201cOperation of XSAVEC,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XSAVEC instruction. The following items provide a highlevel outline:</p><p>Use of a destination operand not aligned to 64-byte boundary (in either 64-bit or 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p>", "tooltip": "Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0." }; case "XSAVEOPT": return { "url": "http://www.felixcloutier.com/x86/XSAVEOPT.html", - "html": "<p>Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.9, \u201cOperation of XSAVEOPT,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XSAVEOPT instruction. The following items provide a high-level outline:</p><p>Use of a destination operand not aligned to 64-byte boundary (in either 64-bit or 32-bit modes) will result in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p><p>See Section 13.6, \u201cProcessor Tracking of XSAVE-Managed State,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> for discussion of the bitmap XMODIFIED and of the quantity XRSTOR_INFO.</p>", + "html": "<p>Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.9, \u201cOperation of XSAVEOPT,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XSAVEOPT instruction. The following items provide a high-level outline:</p><p>Use of a destination operand not aligned to 64-byte boundary (in either 64-bit or 32-bit modes) will result in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p><p>See Section 13.6, \u201cProcessor Tracking of XSAVE-Managed State,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> for discussion of the bitmap XMODIFIED and of the quantity XRSTOR_INFO.</p>", "tooltip": "Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and XCR0." }; case "XSAVES": return { "url": "http://www.felixcloutier.com/x86/XSAVES.html", - "html": "<p>Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), the logicalAND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XSAVES may be executed only if CPL = 0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.11, \u201cOperation of XSAVES,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XSAVES instruction. The following items provide a highlevel outline:</p><p>Use of a destination operand not aligned to 64-byte boundary (in either 64-bit or 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p><p>See Section 13.6, \u201cProcessor Tracking of XSAVE-Managed State,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> for discussion of the bitmap XMODIFIED and of the quantity XRSTOR_INFO.</p>", + "html": "<p>Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), the logicalAND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XSAVES may be executed only if CPL = 0.</p><p>The format of the XSAVE area is detailed in Section 13.4, \u201cXSAVE Area,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p><p>Section 13.11, \u201cOperation of XSAVES,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> provides a detailed description of the operation of the XSAVES instruction. The following items provide a highlevel outline:</p><p>Use of a destination operand not aligned to 64-byte boundary (in either 64-bit or 32-bit modes) results in a general-protection (#GP) exception. In 64-bit mode, the upper 32 bits of RDX and RAX are ignored.</p><p>See Section 13.6, \u201cProcessor Tracking of XSAVE-Managed State,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em> for discussion of the bitmap XMODIFIED and of the quantity XRSTOR_INFO.</p>", "tooltip": "Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), the logicalAND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XSAVES may be executed only if CPL = 0." }; case "XSETBV": return { "url": "http://www.felixcloutier.com/x86/XSETBV.html", - "html": "<p>Writes the contents of registers EDX:EAX into the 64-bit extended control register (XCR) specified in the ECX register. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The contents of the EDX register are copied to high-order 32 bits of the selected XCR and the contents of the EAX register are copied to low-order 32 bits of the XCR. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are ignored.) Undefined or reserved bits in an XCR should be set to values previously read.</p><p>This instruction must be executed at privilege level 0 or in real-address mode; otherwise, a general protection exception #GP(0) is generated. Specifying a reserved or unimplemented XCR in ECX will also cause a general protection exception. The processor will also generate a general protection exception if software attempts to write to reserved bits in an XCR.</p><p>Currently, only XCR0 is supported. Thus, all other values of ECX are reserved and will cause a #GP(0). Note that bit 0 of XCR0 (corresponding to x87 state) must be set to 1; the instruction will cause a #GP(0) if an attempt is made to clear this bit. In addition, the instruction causes a #GP(0) if an attempt is made to set XCR0[2] (AVX state) while clearing XCR0[1] (SSE state); it is necessary to set both bits to use AVX instructions; Section 13.3, \u201cEnabling the XSAVE Feature Set and XSAVE-Enabled Features,\u201d of <em>Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p>", + "html": "<p>Writes the contents of registers EDX:EAX into the 64-bit extended control register (XCR) specified in the ECX register. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The contents of the EDX register are copied to high-order 32 bits of the selected XCR and the contents of the EAX register are copied to low-order 32 bits of the XCR. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are ignored.) Undefined or reserved bits in an XCR should be set to values previously read.</p><p>This instruction must be executed at privilege level 0 or in real-address mode; otherwise, a general protection exception #GP(0) is generated. Specifying a reserved or unimplemented XCR in ECX will also cause a general protection exception. The processor will also generate a general protection exception if software attempts to write to reserved bits in an XCR.</p><p>Currently, only XCR0 is supported. Thus, all other values of ECX are reserved and will cause a #GP(0). Note that bit 0 of XCR0 (corresponding to x87 state) must be set to 1; the instruction will cause a #GP(0) if an attempt is made to clear this bit. In addition, the instruction causes a #GP(0) if an attempt is made to set XCR0[2] (AVX state) while clearing XCR0[1] (SSE state); it is necessary to set both bits to use AVX instructions; Section 13.3, \u201cEnabling the XSAVE Feature Set and XSAVE-Enabled Features,\u201d of <em>Intel<sup>\u00ae</sup> 64 and IA-32 Architectures Software Developer\u2019s Manual, Volume 1</em>.</p>", "tooltip": "Writes the contents of registers EDX:EAX into the 64-bit extended control register (XCR) specified in the ECX register. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The contents of the EDX register are copied to high-order 32 bits of the selected XCR and the contents of the EAX register are copied to low-order 32 bits of the XCR. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are ignored.) Undefined or reserved bits in an XCR should be set to values previously read." }; diff --git a/lib/handlers/compile.js b/lib/handlers/compile.js index a1f7c3507899a669519ea8a5fe633e78a42487b3..124d82043dbe27b1a07cdacdb230b28f24928cf6 100644 --- a/lib/handlers/compile.js +++ b/lib/handlers/compile.js @@ -31,15 +31,15 @@ const temp = require('temp'), _ = require('underscore'), logger = require('../logger').logger, utils = require('../utils'), - Raven = require('raven'); + Sentry = require('@sentry/node'); temp.track(); -let oneTimeInit = false; +let hasSetUpAutoClean = false; function initialise(compilerEnv) { - if (oneTimeInit) return; - oneTimeInit = true; + if (hasSetUpAutoClean) return; + hasSetUpAutoClean = true; const tempDirCleanupSecs = compilerEnv.ceProps("tempDirCleanupSecs", 600); logger.info(`Cleaning temp dirs every ${tempDirCleanupSecs} secs`); setInterval(() => { @@ -55,14 +55,41 @@ function initialise(compilerEnv) { } class CompileHandler { - constructor(compilationEnvironment) { + constructor(compilationEnvironment, awsProps) { this.compilersById = {}; this.compilerEnv = compilationEnvironment; this.factories = {}; this.stat = denodeify(fs.stat); this.textBanner = this.compilerEnv.ceProps('textBanner'); this.proxy = httpProxy.createProxyServer({}); + this.awsProps = awsProps; initialise(this.compilerEnv); + + // Mostly cribbed from + // https://github.com/nodejitsu/node-http-proxy/blob/master/examples/middleware/bodyDecoder-middleware.js + // We just keep the body as-is though: no encoding using queryString.stringify(), as we don't use a form + // decoding middleware. + this.proxy.on('proxyReq', function (proxyReq, req) { + if (!req.body || !Object.keys(req.body).length) { + return; + } + + const contentType = proxyReq.getHeader('Content-Type'); + let bodyData; + + if (contentType === 'application/json') { + bodyData = JSON.stringify(req.body); + } + + if (contentType === 'application/x-www-form-urlencoded') { + bodyData = req.body; + } + + if (bodyData) { + proxyReq.setHeader('Content-Length', Buffer.byteLength(bodyData)); + proxyReq.write(bodyData); + } + }); } create(compiler) { @@ -90,7 +117,7 @@ class CompileHandler { }); }) .catch(err => { - logger.warn("Unable to stat compiler binary", err); + logger.warn(`Unable to stat ${compiler.id} compiler binary`, err); return null; }); } else { @@ -108,6 +135,8 @@ class CompileHandler { const langId = compiler.compiler.lang; if (!compilersById[langId]) compilersById[langId] = {}; compilersById[langId][compiler.compiler.id] = compiler; + + if (this.awsProps) compiler.possibleArguments.loadFromStorage(this.awsProps); }); this.compilersById = compilersById; return _.map(compilers, compiler => compiler.getInfo()); @@ -121,7 +150,7 @@ class CompileHandler { return langCompilers[compilerId]; } // If the lang is bad, try to find it in every language - let response; + let response = undefined; _.each(this.compilersById, compilerInLang => { if (response === undefined) { _.each(compilerInLang, compiler => { @@ -197,11 +226,32 @@ class CompileHandler { splitArguments(options) { return _.chain(quote.parse(options || '') - .map(x => typeof(x) === "string" ? x : x.pattern)) + .map(x => typeof (x) === "string" ? x : x.pattern)) .compact() .value(); } + handlePopularArguments(req, res, next) { + const compiler = this.compilerFor(req); + if (!compiler) { + return next(); + } + + let usedOptions = false; + if (req.body) { + let data = JSON.parse(req.body); + if (data.presplit) { + usedOptions = data.usedOptions; + } else { + usedOptions = this.splitArguments(data.usedOptions); + } + } + + const popularArguments = compiler.possibleArguments.getPopularArguments(usedOptions); + + res.end(JSON.stringify(popularArguments)); + } + handle(req, res, next) { const compiler = this.compilerFor(req); if (!compiler) { @@ -242,7 +292,7 @@ class CompileHandler { if (!_.isEmpty(result.stdout)) res.write("\nStandard out:\n" + textify(result.stdout)); if (!_.isEmpty(result.stderr)) res.write("\nStandard error:\n" + textify(result.stderr)); } catch (ex) { - Raven.captureException(ex, {req: req}); + Sentry.captureException(ex); res.write(`Error handling request: ${ex}`); } res.end('\n'); @@ -250,9 +300,9 @@ class CompileHandler { }, error => { logger.error("Error during compilation", error); - if (typeof(error) !== "string") { + if (typeof (error) !== "string") { if (error.code) { - if (typeof(error.stderr) === "string") { + if (typeof (error.stderr) === "string") { error.stdout = utils.parseOutput(error.stdout); error.stderr = utils.parseOutput(error.stderr); } @@ -267,3 +317,6 @@ class CompileHandler { } module.exports.Handler = CompileHandler; +module.exports.SetTestMode = function () { + hasSetUpAutoClean = true; +}; diff --git a/lib/languages.js b/lib/languages.js index 8155267b5e9601259ee0bd04641a8469fba20424..d4d0193d49cdd369bd54c00e2be4f6fed920e4f1 100644 --- a/lib/languages.js +++ b/lib/languages.js @@ -101,6 +101,12 @@ const languages = { extensions: ['.hs', '.haskell'], alias: [] }, + ocaml: { + name: 'OCaml', + monaco: 'ocaml', + extensions: ['.ml', '.mli'], + alias: [] + }, swift: { name: 'Swift', monaco: 'swift', @@ -136,7 +142,8 @@ const languages = { name: 'CUDA', monaco: 'cuda', extensions: ['.cu'], - alias: ['nvcc'] + alias: ['nvcc'], + monacoDisassembly: 'ptx' }, zig: { name: 'Zig', @@ -149,6 +156,12 @@ const languages = { monaco: 'clean', extensions: ['.icl'], alias: [] + }, + ada: { + name: 'Ada', + monaco: 'ada', + extensions: ['.adb', '.ads'], + alias: [] } }; diff --git a/lib/llvm-ir.js b/lib/llvm-ir.js new file mode 100644 index 0000000000000000000000000000000000000000..229c5104ccba615df191cc3fca2bd64f6088a41f --- /dev/null +++ b/lib/llvm-ir.js @@ -0,0 +1,186 @@ +// Copyright (c) 2018, Compiler Explorer Authors +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. + +const utils = require('./utils'), + _ = require('underscore'); + +class LlvmIrParser { + constructor(compilerProps) { + this.maxIrLines = 500; + if (compilerProps) { + this.maxIrLines = compilerProps('maxLinesOfAsm', this.maxIrLines); + } + + this.debugReference = /!dbg (!\d+)/; + this.metaNodeRe = /^(!\d+) = (?:distinct )?!DI([A-Za-z]+)\(([^)]+?)\)/; + this.metaNodeOptionsRe = /(\w+): (!?\d+|\w+|""|"(?:[^"]|\\")*[^\\]")/gi; + } + + getFileName(debugInfo, scope) { + const stdInLooking = /.*<stdin>|^-$|example\.[^/]+$|<source>/; + + if (!debugInfo[scope]) { + // No such meta info. + return null; + } + // MetaInfo is a file node + if (debugInfo[scope].filename) { + const filename = debugInfo[scope].filename; + return !filename.match(stdInLooking) ? filename : null; + } + // MetaInfo has a file reference. + if (debugInfo[scope].file) { + return this.getFileName(debugInfo, debugInfo[scope].file); + } + if (!debugInfo[scope].scope) { + // No higher scope => can't find file. + return null; + } + // "Bubbling" up. + return this.getFileName(debugInfo, debugInfo[scope].scope); + } + + getSourceLineNumber(debugInfo, scope) { + if (!debugInfo[scope]) { + return null; + } + if (debugInfo[scope].line) { + return Number(debugInfo[scope].line); + } + if (debugInfo[scope].scope) { + return this.getSourceLineNumber(debugInfo, debugInfo[scope].scope); + } + return null; + } + + parseMetaNode(line) { + // Metadata Nodes + // See: https://llvm.org/docs/LangRef.html#metadata + const match = line.match(this.metaNodeRe); + if (!match) { + return null; + } + let metaNode = {}; + metaNode.metaId = match[1]; + metaNode.metaType = match[2]; + + let keyValuePair; + while ((keyValuePair = this.metaNodeOptionsRe.exec(match[3]))) { + const key = keyValuePair[1]; + metaNode[key] = keyValuePair[2]; + // Remove "" from string + if (metaNode[key][0] === '"') { + metaNode[key] = metaNode[key].substr(1, metaNode[key].length - 2); + } + } + + return metaNode; + } + + processIr(ir, filters) { + const result = []; + let irLines = utils.splitLines(ir); + let debugInfo = {}; + let prevLineEmpty = false; + + // Filters + const commentOnly = /^\s*(;.*)$/; + + irLines.forEach(line => { + let source = null; + let match; + + if (!line.trim().length) { + // Avoid multiple successive empty lines. + if (!prevLineEmpty) { + result.push({text: "", source: null}); + } + prevLineEmpty = true; + return; + } + + if (filters.commentOnly && line.match(commentOnly)) { + return; + } + + // Non-Meta IR line. Metadata is attached to it using "!dbg !123" + match = line.match(this.debugReference); + if (match) { + result.push({ + text: (filters.trim ? utils.squashHorizontalWhitespace(line) : line), + source: source, + scope: match[1] + }); + prevLineEmpty = false; + return; + } + + const metaNode = this.parseMetaNode(line); + if (metaNode) { + debugInfo[metaNode.metaId] = metaNode; + } + + if (filters.directives && this.isLineLlvmDirective(line)) { + return; + } + result.push({text: (filters.trim ? utils.squashHorizontalWhitespace(line) : line), source: source}); + prevLineEmpty = false; + }); + + if (result.length >= this.maxIrLines) { + result.length = this.maxIrLines + 1; + result[this.maxIrLines] = {text: "[truncated; too many lines]", source: null}; + } + + result.forEach(line => { + if (!line.scope) return; + line.source = { + file: this.getFileName(debugInfo, line.scope), + line: this.getSourceLineNumber(debugInfo, line.scope) + }; + }); + + return result; + } + + process(ir, filters) { + if (_.isString(ir)) { + return this.processIr(ir, filters); + } + } + + isLineLlvmDirective(line) { + return !!(line.match(/^!\d+ = (distinct )?!(DI|{)/) + || line.match(/^!llvm./) + || line.match(/^source_filename = /) + || line.match(/^target datalayout = /) + || line.match(/^target triple = /)); + } + + isLlvmIr(code) { + return code.includes("@llvm") && code.includes("!DI") && code.includes("!dbg"); + } +} + +module.exports = LlvmIrParser; diff --git a/lib/options-handler.js b/lib/options-handler.js index 9aa28bdc8f0ef41b57ede7bbf9a45d94b4837fbe..1c9ce36581e68d6d33d481196db0062b901c13f2 100644 --- a/lib/options-handler.js +++ b/lib/options-handler.js @@ -62,6 +62,10 @@ class ClientOptionsHandler { return this.supportsBinary[lang.id] && !!res; }); this.supportsExecute = Object.values(this.supportsExecutePerLanguage).some(value => value); + + this.supportsLibraryCodeFilterPerLanguage = this.compilerProps(languages, 'supportsLibraryCodeFilter', false); + this.supportsLibraryCodeFilter = Object.values(this.supportsLibraryCodeFilterPerLanguage).some(value => value); + const libs = this.parseLibraries(this.compilerProps(languages, 'libs')); const tools = this.parseTools(this.compilerProps(languages, 'tools')); @@ -85,9 +89,10 @@ class ClientOptionsHandler { compileOptions: this.compilerProps(languages, 'defaultOptions', ''), supportsBinary: this.supportsBinary, supportsExecute: this.supportsExecute, + supportsLibraryCodeFilter: this.supportsLibraryCodeFilter, languages: languages, sources: sources, - raven: ceProps('ravenUrl', ''), + sentryDsn: ceProps('sentryDsn', ''), release: defArgs.gitReleaseName, environment: defArgs.env, cookieDomainRe: cookieDomainRe, diff --git a/lib/packager.js b/lib/packager.js new file mode 100644 index 0000000000000000000000000000000000000000..f561011dfb5725a6fd949012a70294c37403001c --- /dev/null +++ b/lib/packager.js @@ -0,0 +1,81 @@ +// Copyright (c) 2019, Compiler Explorer Team +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +"use strict"; + +const + tarGzip = require('node-targz'), + path = require('path'); + +class Packager { + constructor() { + } + + package(executable, destination) { + return new Promise((resolve) => { + resolve([path.basename(executable)]); + }).then(files => { + return this.tarGzFiles(path.dirname(executable), files, destination); + }); + } + + unpack(packageFile, destination) { + return new Promise((resolve, reject) => { + tarGzip.decompress({ + source: packageFile, + destination: destination + }, (err) => { + if (err) { + reject(err); + } else { + resolve(destination); + } + }); + }); + } + + tarGzFiles(cwd, files, destination) { + return new Promise((resolve, reject) => { + tarGzip.compress({ + source: cwd, + destination: destination, + level: 6, + memLevel: 6, + options: { + entries: files, + dereference: true + } + }, (err) => { + if (err) { + reject(err); + } else { + resolve(destination); + } + }); + }); + } +} + +module.exports = { + Packager: Packager +}; diff --git a/lib/restreamer.js b/lib/restreamer.js deleted file mode 100644 index 00b5aa9bd8eb024456e5df875640d16b273d54ec..0000000000000000000000000000000000000000 --- a/lib/restreamer.js +++ /dev/null @@ -1,23 +0,0 @@ -// Adapted from connect-restreamer, with bugfix to move "next" after the process.nextTick() -module.exports = function (options) { - options = options || {}; - options.property = options.property || 'body'; - options.stringify = options.stringify || JSON.stringify; - - return function (req, res, next) { - req.removeAllListeners('data'); - req.removeAllListeners('end'); - if (req.headers['content-length'] !== undefined) { - req.headers['content-length'] = Buffer.byteLength(options.stringify(req[options.property]), 'utf8'); - } - process.nextTick(function () { - if (req[options.property]) { - if ('function' === typeof options.modify) - req[options.property] = options.modify(req[options.property]); - req.emit('data', options.stringify(req[options.property])); - } - req.emit('end'); - }); - next(); - }; -}; diff --git a/lib/storage/storage-local.js b/lib/storage/storage-local.js index 18ca5683399dc386e2ee06f77c553a159c40ce1c..aa7bef0a4b28bc8afcdae1b845e9123980cf7de1 100644 --- a/lib/storage/storage-local.js +++ b/lib/storage/storage-local.js @@ -108,6 +108,10 @@ class StorageLocal extends StorageBase { throw err; }); } + incrementViewCount() { + // Nothing to do here, we don't store stats for local storage + return Promise.resolve(); + } } module.exports = StorageLocal; diff --git a/lib/storage/storage-null.js b/lib/storage/storage-null.js new file mode 100644 index 0000000000000000000000000000000000000000..3aceeaea51cd5ca71bf77334286029ce2226aaf1 --- /dev/null +++ b/lib/storage/storage-null.js @@ -0,0 +1,31 @@ +const StorageBase = require('./storage').StorageBase; + +class StorageNull extends StorageBase { + constructor(compilerProps) { + super(compilerProps); + } + + storeItem(item) { + return Promise.resolve(item); + } + + findUniqueSubhash() { + return Promise.resolve({ + prefix: "null", + uniqueSubHash: "null", + alreadyPresent: true + }); + } + + expandId() { + return Promise.resolve({ + config: "{}", + specialMetadata: null + }); + } + + incrementViewCount() { + return Promise.resolve(); + } +} +module.exports = StorageNull; diff --git a/lib/storage/storage-s3.js b/lib/storage/storage-s3.js index 24826ee1d6461e46e29bd7b30c29e0827e028f92..0386ef079ec65b2ef045c48f93fb903218f6c9a6 100644 --- a/lib/storage/storage-s3.js +++ b/lib/storage/storage-s3.js @@ -137,43 +137,59 @@ class StorageS3 extends StorageBase { }); } + getKeyStruct(id) { + return { + prefix: {S: id.substring(0, MIN_STORED_ID_LENGTH)}, + unique_subhash: {S: id} + }; + } + expandId(id) { - return this.dynamoDb.updateItem({ + // By just getting the item and not trying to update it, we save an update when the link does not exist + // for which we have less resources allocated, but get one extra read (But we do have more reserved for it) + return this.dynamoDb.getItem({ TableName: this.table, - Key: { - prefix: { - S: id.substring(0, MIN_STORED_ID_LENGTH) - }, - unique_subhash: { - S: id + Key: this.getKeyStruct(id) + }) + .promise() + .then(item => { + const attributes = item.Item; + if (attributes) { + return this.s3.get(attributes.full_hash.S, this.prefix) + .then(result => { + // If we're here, we are pretty confident there is a match. But never hurts to double check + if (result.hit) { + const metadata = attributes.named_metadata ? attributes.named_metadata.M : null; + return { + config: result.data.toString(), + specialMetadata: metadata + }; + } else { + throw new Error(`ID ${id} not present in storage`); + } + }) + .catch(err => { + logger.error(err.message); + throw err; + }); + } else { + return Promise.reject(); } - }, + }); // Exceptions caught at caller + } + + incrementViewCount(id) { + return this.dynamoDb.updateItem({ + TableName: this.table, + Key: this.getKeyStruct(id), UpdateExpression: 'SET stats.clicks = stats.clicks + :inc', ExpressionAttributeValues: { ':inc': {N: '1'} }, - ReturnValues: 'ALL_NEW' + ReturnValues: 'NONE' }).promise() - .then(item => { - const full_hash = item.Attributes.full_hash.S; - const special_metadata = item.Attributes.named_metadata ? item.Attributes.named_metadata.M : null; - return this.s3.get(full_hash, this.prefix) - .then(result => { - // If we're here, we are pretty confident there is a match. But never hurts to double check - if (result.hit) { - return { - config: result.data.toString(), - specialMetadata: special_metadata - }; - } else { - throw new Error(`ID ${id} not present in storage`); - } - }); - }) - .catch(err => { - logger.error(err.message); - throw err; - }); + // Swallow up errors + .catch(err => logger.error(`Error when incrementing view count for ${id} - ${err.message}`)); } } diff --git a/lib/storage/storage.js b/lib/storage/storage.js index ac77b50221370323bf51b6075e0fe1875943e11d..40ab5f003c255e4ab293d3ceee6ce9dc200df99c 100644 --- a/lib/storage/storage.js +++ b/lib/storage/storage.js @@ -24,10 +24,14 @@ // POSSIBILITY OF SUCH DAMAGE. const logger = require('../logger').logger, - hash = require('../utils').getBinaryHash; + hash = require('../utils').getBinaryHash, + /*** + * @type {string[]} + */ + profanities = require('profanities'); const FILE_HASH_VERSION = 'Compiler Explorer Config Hasher'; - +const CLEAN_NAME_MAX_LENGTH = 12; // Quite generous class StorageBase { constructor(compilerProps) { @@ -40,18 +44,54 @@ class StorageBase { * @returns {string} */ static safe64Encoded(buffer) { - return buffer.toString('base64').replace(/\+/g, '-').replace(/\//g, '_').replace(/=+$/, ''); + return buffer.toString('base64') + .replace(/\+/g, '-') + .replace(/\//g, '_') + .replace(/=+$/, ''); } - handler(req, res) { - let config = null; + static isCleanText(text) { + const lowercased = text.toLowerCase(); + return !profanities.some(badWord => lowercased.includes(badWord)); + } + + static getSafeHash(config) { + // Keep rehashing until no more profanities are found + let configHash = StorageBase.safe64Encoded(hash(JSON.stringify(config), FILE_HASH_VERSION)); + while (!StorageBase.isCleanText(configHash.substr(0, CLEAN_NAME_MAX_LENGTH))) { + // Shake up the hash a bit by adding, or incrementing a nonce value. + if (config.nonce === undefined) { + config.nonce = 1; + } else { + config.nonce++; + } + logger.info(`Profanity found in full hash ${configHash} - Trying again (${config.nonce})`); + configHash = StorageBase.safe64Encoded(hash(JSON.stringify(config), FILE_HASH_VERSION)); + } + // And stringify it for the rest of the request + config = JSON.stringify(config); + return {config, configHash}; + } + + static configFor(req) { if (req.body.config) { - config = JSON.stringify(req.body.config); + return req.body.config; } else if (req.body.sessions) { - config = JSON.stringify(req.body); + return req.body; } + return null; + } - const configHash = StorageBase.safe64Encoded(hash(config, FILE_HASH_VERSION)); + handler(req, res) { + // Get the desired config and check for profanities in its hash + const origConfig = StorageBase.configFor(req); + if (!origConfig) { + logger.error("No configuration found"); + res.status(500); + res.end("Missing config parameter"); + return; + } + const {config, configHash} = StorageBase.getSafeHash(origConfig); this.findUniqueSubhash(configHash) .then(result => { logger.info(`Unique subhash '${result.uniqueSubHash}' ` + @@ -94,6 +134,11 @@ class StorageBase { logger.error(`Trying to expand from base storage ${id}`); return Promise.reject(); } + + incrementViewCount(id) { + logger.error(`Trying to increment view count from base storage ${id}`); + return Promise.reject(); + } } function storageFactory(compilerProps, awsProps) { diff --git a/lib/utils.js b/lib/utils.js index ce5fa5f2109383a65daef36ce53cca33997eda95..69e2b78bca87fa92e097559f498adce3a147821e 100644 --- a/lib/utils.js +++ b/lib/utils.js @@ -29,6 +29,7 @@ const tabsRe = /\t/g; const lineRe = /\r?\n/; function splitLines(text) { + if (!text) return []; const result = text.split(lineRe); if (result.length > 0 && result[result.length - 1] === '') return result.slice(0, result.length - 1); @@ -87,6 +88,14 @@ function padRight(name, len) { exports.padRight = padRight; +function trimRight(name) { + var l = name.length; + while (l > 0 && name[l - 1] === ' ') l -= 1; + return name.substr(0, l); +} + +exports.trimRight = trimRight; + /*** * Anonymizes given IP. * For IPv4, it removes the last octet @@ -98,8 +107,7 @@ exports.padRight = padRight; exports.anonymizeIp = function anonymizeIp(ip) { if (ip.includes('localhost')) { return ip; - } - else if (ip.includes(':')) { + } else if (ip.includes(':')) { // IPv6 return ip.replace(/:[\da-fA-F]{0,4}:[\da-fA-F]{0,4}:[\da-fA-F]{0,4}$/, ':0:0:0'); } else { @@ -110,7 +118,7 @@ exports.anonymizeIp = function anonymizeIp(ip) { function objectToHashableString(object) { // See https://stackoverflow.com/questions/899574/which-is-best-to-use-typeof-or-instanceof/6625960#6625960 - return (typeof(object) === 'string') ? object : JSON.stringify(object); + return (typeof (object) === 'string') ? object : JSON.stringify(object); } const DefaultHash = 'Compiler Explorer Default Version 1'; @@ -167,3 +175,19 @@ exports.glGetMainContents = function glGetMainContents(content) { }); return contents; }; + +function squashHorizontalWhitespace(line, atStart) { + if (atStart === undefined) atStart = true; + if (!line.trim().length) { + return ""; + } + const splat = line.split(/\s+/); + if (splat[0] === "" && atStart) { + // An indented line: preserve a two-space indent (max) + const intent = line[1] !== " " ? " " : " "; + return intent + splat.slice(1).join(" "); + } + return splat.join(" "); +} + +exports.squashHorizontalWhitespace = squashHorizontalWhitespace; diff --git a/package.json b/package.json index 96b4d31437cf0b91863800684072457952f9e7ec..e5819dad05f440fb49f1ddb8373c18fc2b652b60 100644 --- a/package.json +++ b/package.json @@ -16,21 +16,23 @@ }, "main": "./app.js", "dependencies": { - "@fortawesome/fontawesome-free": "^5.3.1", + "@fortawesome/fontawesome-free": "5.8.1", + "@sentry/browser": "4.4.1", + "@sentry/node": "4.4.1", "aws-sdk": "^2.177.0", - "big-integer": "^1.6.25", + "big-integer": "1.6.43", "body-parser": "^1.18.2", - "bootstrap": "^4.1.3", - "bootstrap-slider": "^9.9.0", + "bootstrap": "4.1.3", + "bootstrap-slider": "10.6.1", "clipboard": "^1.7.1", "compiler-opt-info": "0.0.4", "compression": "^1.7.1", "cross-env": "^5.1.3", "denodeify": "^1.2.1", - "es6-promise": "^4.1.1", + "es6-promise": "4.2.6", "express": "4.16.x", "file-saver": "^1.3.3", - "fs-extra": "^7.0.0", + "fs-extra": "7.0.1", "golden-layout": "^1.5.9", "html-loader": "^0.5.5", "http-proxy": "^1.16.2", @@ -40,17 +42,18 @@ "lz-string": "^1.4.4", "mkdirp": "^0.5.1", "monaco-editor": "0.10.1", - "morgan": "^1.9.0", + "morgan": "^1.9.1", + "node-targz": "^0.2.0", "nopt": "3.0.x", "popper.js": "^1.14.4", + "profanities": "2.10.2", "promise-queue": "2.2.3", - "pug": "^2.0.1", - "raven": "^2.2.1", - "raven-js": "^3.19.1", + "pug": "2.0.3", "selectize": "^0.12.4", "semver": "^5.5.0", "serve-favicon": "^2.4.5", "shell-quote": "1.6.x", + "sinon": "^7.2.7", "systemd-socket": "0.0.0", "temp": "0.8.x", "tree-kill": "^1.2.0", @@ -59,23 +62,23 @@ "vis": "4.20.1", "winston": "^2.4.0", "wolfy87-eventemitter": "^5.2.3", - "yarn": "^1.7.0" + "yarn": "^1.15.2" }, "devDependencies": { "aws-sdk-mock": "^1.7.0", "chai": "3.5.x", "chai-as-promised": "^7.1.1", - "chai-http": "^3.0.0", + "chai-http": "^4.2.1", "codecov": "^3.0.0", "copy-webpack-plugin": "^4.1.1", - "css-loader": "^0.28.7", - "eslint": "^4.17.0", + "css-loader": "^2.1.0", + "eslint": "5.16.0", "extract-text-webpack-plugin": "^3.0.1", "file-loader": "^1.1.5", "istanbul": "^0.4.5", - "mocha": "^3.3.0", + "mocha": "^5.2.0", "nock": "^9.1.4", - "requirejs": "*", + "requirejs": "2.3.6", "style-loader": "^0.19.0", "supervisor": "*", "uglify-js": "*", diff --git a/static/analytics.js b/static/analytics.js index 0f9c99e43b7d3aacc407943022c9eabd3ef74e6b..71a1acfe3ad49131fcb8975143e91ded516d70e9 100644 --- a/static/analytics.js +++ b/static/analytics.js @@ -24,13 +24,14 @@ "use strict"; var options = require('options'); -var Raven = require('raven-js'); +var Sentry = require('@sentry/browser'); -if (options.raven) { - Raven.config(options.raven, { +if (options.sentryDsn) { + Sentry.init({ + dsn: options.sentryDsn, release: options.release, environment: options.environment.join("/") - }).install(); + }); } function GAProxy() { diff --git a/static/assets/cppinsights16.png b/static/assets/cppinsights16.png new file mode 100644 index 0000000000000000000000000000000000000000..312e0f3d246e68a3e4ef1f484f96746b417243d8 Binary files /dev/null and b/static/assets/cppinsights16.png differ diff --git a/static/compiler-service.js b/static/compiler-service.js index 1a20457ff1ea4b5a1a3d1a22ccc33c9d653b949e..e4b1266348375f4dddb18d0dbe219985411ae043 100644 --- a/static/compiler-service.js +++ b/static/compiler-service.js @@ -132,6 +132,60 @@ CompilerService.prototype.submit = function (request) { }, this)); }; +CompilerService.prototype.requestPopularArguments = function (compilerId, options) { + return new Promise(_.bind(function (resolve, reject) { + $.ajax({ + type: 'POST', + url: window.location.origin + this.base + 'api/popularArguments/' + compilerId, + dataType: 'json', + data: JSON.stringify({ + usedOptions: options, + presplit: false + }), + success: _.bind(function (result) { + resolve({ + request: compilerId, + result: result, + localCacheHit: false + }); + }, this), + error: function (xhr, textStatus, errorThrown) { + var error = errorThrown; + if (!error) { + switch (textStatus) { + case "timeout": + error = "Request timed out"; + break; + case "abort": + error = "Request was aborted"; + break; + case "error": + switch (xhr.status) { + case 500: + error = "Request failed: internal server error"; + break; + case 504: + error = "Request failed: gateway timeout"; + break; + default: + error = "Request failed: HTTP error code " + xhr.status; + break; + } + break; + default: + error = "Error sending request"; + break; + } + } + reject({ + request: compilerId, + error: error + }); + } + }); + }, this)); +}; + CompilerService.prototype.expand = function (source) { var includeFind = /^\s*#\s*include\s*["<](https?:\/\/[^>"]+)[>"]/; var lines = source.split("\n"); diff --git a/static/components.js b/static/components.js index 551f895413e8b43047017fbfb02ec6fcf10b6f3a..fe54c080b6156a8443823801652b238723d8f6c1 100644 --- a/static/components.js +++ b/static/components.js @@ -168,13 +168,34 @@ module.exports = { } }; }, - getConformanceView: function (editorid, source) { + getConformanceView: function (editorid, source, langId) { return { type: 'component', componentName: 'conformance', componentState: { editorid: editorid, - source: source + source: source, + langId: langId + } + }; + }, + getIrView: function () { + return { + type: 'component', + componentName: 'ir', + componentState: {} + }; + }, + getIrViewWith: function (id, source, irOutput, compilerName, editorid) { + return { + type: 'component', + componentName: 'ir', + componentState: { + id: id, + source: source, + irOutput: irOutput, + compilerName: compilerName, + editorid: editorid } }; } diff --git a/static/hub.js b/static/hub.js index 55e5f24e280d3f7e7bd847a8383b74fc11a7feb0..64cd60c8f90f4b94b6e1c1da9ee09af1d12cd4b3 100644 --- a/static/hub.js +++ b/static/hub.js @@ -25,7 +25,7 @@ 'use strict'; var _ = require('underscore'); -var Raven = require('raven-js'); +var Sentry = require('@sentry/browser'); var editor = require('./panes/editor'); var compiler = require('./panes/compiler'); var output = require('./panes/output'); @@ -34,6 +34,7 @@ var Components = require('components'); var diff = require('./panes/diff'); var optView = require('./panes/opt-view'); var astView = require('./panes/ast-view'); +var irView = require('./panes/ir-view'); var gccDumpView = require('./panes/gccdump-view'); var cfgView = require('./panes/cfg-view'); var conformanceView = require('./panes/conformance-view'); @@ -103,6 +104,10 @@ function Hub(layout, subLangId) { function (container, state) { return self.astViewFactory(container, state); }); + layout.registerComponent(Components.getIrView().componentName, + function (container, state) { + return self.irViewFactory(container, state); + }); layout.registerComponent(Components.getGccDumpView().componentName, function (container, state) { return self.gccDumpViewFactory(container, state); @@ -184,6 +189,11 @@ Hub.prototype.optViewFactory = function (container, state) { Hub.prototype.astViewFactory = function (container, state) { return new astView.Ast(this, container, state); }; + +Hub.prototype.irViewFactory = function (container, state) { + return new irView.Ir(this, container, state); +}; + Hub.prototype.gccDumpViewFactory = function (container, state) { return new gccDumpView.GccDump(this, container, state); }; @@ -222,7 +232,8 @@ WrappedEventHub.prototype.unsubscribe = function () { try { this.eventHub.off(obj.evt, obj.fn, obj.ctx); } catch (e) { - Raven.captureMessage('Can not unsubscribe from ' + obj.evt.toString() + ' :"' + e.msg + '"'); + Sentry.captureMessage('Can not unsubscribe from ' + obj.evt.toString()); + Sentry.captureException(e); } }, this)); this.subscriptions = []; diff --git a/static/libs-widget.js b/static/libs-widget.js index 44f40247fc928e8697534a3a21a9060a253751b6..59978104d88ff315bd6a159a0ce216e466c9befd 100644 --- a/static/libs-widget.js +++ b/static/libs-widget.js @@ -69,6 +69,8 @@ LibsWidget.prototype.updateAvailableLibs = function () { LibsWidget.prototype.setNewLangId = function (langId) { this.currentLangId = langId; + this.updateAvailableLibs(); + }; LibsWidget.prototype.lazyDropdownLoad = function () { @@ -78,26 +80,30 @@ LibsWidget.prototype.lazyDropdownLoad = function () { } if (this.domRoot === null) { var MAX_COLUMNS = 3; + var currentColumn = null; + var currentColumnItemCount = 0; + var libsKeys = _.keys(this.availableLibs[this.currentLangId]).sort(); + var itemsPerColumn = Math.ceil(libsKeys.length / MAX_COLUMNS); this.domRoot = $('<div></div>'); - var libsPanel = $('<div></div>') .addClass('card-columns'); - var currentColumn = -1; var getOrCreateNextColumn = function () { - var column = null; - currentColumn++; - if (libsPanel.children()[currentColumn] != null) { - column = $(libsPanel.children()[currentColumn]); - } else { - column = $('<div></div>') - .addClass('card'); - libsPanel.append(column); + if (currentColumn === null || currentColumnItemCount >= itemsPerColumn) { + currentColumn = $('<div></div>').addClass('card'); + libsPanel.append(currentColumn); + currentColumnItemCount = 0; } - if (currentColumn >= MAX_COLUMNS - 1) currentColumn = -1; - return column; + return currentColumn; + }; + var addLibCardToColumn = function (libCard) { + var column = getOrCreateNextColumn(); + column.append(libCard); + currentColumnItemCount++; }; var libsInUse = this.listUsedLibs(); - _.each(this.availableLibs[this.currentLangId], _.bind(function (libEntry, id) { + + _.each(libsKeys, _.bind(function (id) { + var libEntry = this.availableLibs[this.currentLangId][id]; var newLibCard = this.libsEntry.clone(); var label = newLibCard.find('.input-group-prepend label') .text(libEntry.name) @@ -129,8 +135,7 @@ LibsWidget.prototype.lazyDropdownLoad = function () { } this.onChangeCallback(); }, this)); - var column = getOrCreateNextColumn(); - column.append(newLibCard); + addLibCardToColumn(newLibCard); }, this)); this.domRoot.append(libsPanel); return this.domRoot; diff --git a/static/main.js b/static/main.js index e5ebed1596e46b4f7498e436d812825feaa2b761..0d9b70e8b7dccb3f3759c21f51161b297bd37e9b 100644 --- a/static/main.js +++ b/static/main.js @@ -37,7 +37,7 @@ require("monaco-loader")().then(function () { var url = require('./url'); var clipboard = require('clipboard'); var Hub = require('./hub'); - var Raven = require('raven-js'); + var Sentry = require('@sentry/browser'); var settings = require('./settings'); var local = require('./local'); var Alert = require('./alert'); @@ -226,6 +226,7 @@ require("monaco-loader")().then(function () { } } + // eslint-disable-next-line max-statements function start() { initializeResetLayoutLink(); @@ -280,7 +281,7 @@ require("monaco-loader")().then(function () { layout = new GoldenLayout(config, root); hub = new Hub(layout, subLangId); } catch (e) { - Raven.captureException(e); + Sentry.captureException(e); if (document.URL.includes("/z/")) { document.location = document.URL.replace("/z/", "/resetlayout/"); @@ -361,13 +362,22 @@ require("monaco-loader")().then(function () { } initPolicies(options); - // Don't fetch the motd on embedded mode + // Skip some steps if using embedded mode if (!options.embedded) { + // Don't fetch the motd motd.initialise(options.motdUrl, $('#motd'), subLangId, settings.enableCommunityAds, function () { hub.layout.eventHub.emit('modifySettings', { enableCommunityAds: false }); }); + + // Don't try to update Version tree link + var release = window.compilerExplorerOptions.release; + var versionLink = 'https://github.com/mattgodbolt/compiler-explorer/'; + if (release) { + versionLink += 'tree/' + release; + } + $('#version-tree').prop('href', versionLink); } sizeRoot(); lastState = JSON.stringify(layout.toConfig()); diff --git a/static/modes/ada-mode.js b/static/modes/ada-mode.js new file mode 100644 index 0000000000000000000000000000000000000000..85262a46e3ce4e75dd07864198efa11091117e90 --- /dev/null +++ b/static/modes/ada-mode.js @@ -0,0 +1,196 @@ +// Copyright (c) 2018, Mitch Kennedy +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +'use strict'; + +var monaco = require('../monaco'); + +function definition() { + // Ada 2012 Language Definition + return { + keywords: [ + 'abort', + 'else', + 'new', + 'return', + 'elsif', + 'reverse', + 'abstract', + 'end', + 'null', + 'accept', + 'entry', + 'select', + 'access', + 'exception', + 'of', + 'separate', + 'aliased', + 'exit', + 'some', + 'all', + 'others', + 'subtype', + 'for', + 'out', + 'synchronized', + 'array', + 'function', + 'overriding', + 'at', + 'tagged', + 'generic', + 'package', + 'task', + 'begin', + 'goto', + 'pragma', + 'terminate', + 'body', + 'private', + 'then', + 'if', + 'procedure', + 'type', + 'case', + 'in', + 'protected', + 'constant', + 'interface', + 'until', + 'is', + 'raise', + 'use', + 'declare', + 'range', + 'delay', + 'limited', + 'record', + 'when', + 'delta', + 'loop', + 'while', + 'digits', + 'renames', + 'with', + 'do', + 'requeue', + 'rem', + 'mod', + 'abs', + 'not', + 'and', + 'or', + 'xor' + ], + standardTypes :[ + // Defined in the package Standard + // See: http://www.adaic.org/resources/add_content/standards/12rm/html/RM-A-1.html + 'Boolean', + 'Integer', + 'Natural', + 'Positive ', + 'Float', + 'Character', + 'Wide_Character', + 'Wide_Wide_Character', + 'String', + 'Wide_String', + 'Wide_Wide_String', + 'Duration', + // Predefined Standard exceptions + 'Constraint_Error', + 'Program_Error', + 'Storage_Error', + 'Tasking_Error', + ], + + operators: [ + '+', '-', '*', '/', 'div', 'mod', + 'shl', 'shr', 'and', 'or', 'xor', 'not', + '<', '>', '<=', '>=', '==', '<>', + '+=', '-=', '*=', '/=' + ], + brackets: [ + ['(', ')', 'delimiter.parenthesis'], + ['[', ']', 'delimiter.square'] + ], + symbols: /[=><!~&|+\-*/^]+/, + delimiters: /[;=.:,`]/, + escapes: /\\(?:[abfnrtv\\'\n\r]|x[0-9A-Fa-f]{2}|[0-7]{3}|u[0-9A-Fa-f]{4}|U[0-9A-Fa-f]{8}|N\{\w+\})/, + + // The main tokenizer for our languages + tokenizer: { + root: [ + [/[a-zA-Z_][a-zA-Z0-9_]*/, { + cases: { + '@standardTypes': 'type', + '@keywords': 'keyword', + '@default': 'identifier' + } + }], + // Whitespace + {include: '@whitespace'}, + + [/[()[\]]/, '@brackets'], + + // Numbers + // See https://regex101.com/r/dflfeQ/2 for examples from the + // 2012 ARM (http://www.ada-auth.org/standards/12rm/html/RM-2-4-1.html#S0009) + [/[0-9_.]+(E[+-]?\d+)?/, 'number.float'], + // See https://regex101.com/r/dSSADT/3 for examples from the + // 2012 ARM (http://www.ada-auth.org/standards/12rm/html/RM-2-4-2.html#S0011) + [/[0-9]+#[0-9A-Fa-f_.]+#(E[+-]?\d+)?/, 'number.hex'], + + [/@delimiters/, { + cases: { + '@keywords': 'keyword', + '@default': 'delimiter' + } + }], + // strings + [/"([^"\\]|\\.)*$/, 'string.invalid'], // non-teminated string + [/"/, 'string', '@string'], + + // characters + [/'[^\\']'/, 'string'], + [/(')(@escapes)(')/, ['string', 'string.escape', 'string']], + [/'/, 'string.invalid'] + ], + + // Whitespace and comments + whitespace: [ + [/[ \t\r\n]+/, 'white'], + [/--.*$/, 'comment'] + ], + string: [ + [/[^\\"]+/, 'string'], + [/@escapes/, 'string.escape'], + [/\\./, 'string.escape.invalid'], + [/"/, 'string', '@pop'] + ] + } + }; +} +monaco.languages.register({id: 'ada'}); +monaco.languages.setMonarchTokensProvider('ada', definition()); diff --git a/static/modes/asm-mode.js b/static/modes/asm-mode.js index c56e60a2730d062bf20a6bfff842f701fc4d89ff..6dbb72d599b1306d4344c19bdd649ce82bddb994 100644 --- a/static/modes/asm-mode.js +++ b/static/modes/asm-mode.js @@ -41,13 +41,13 @@ function definition() { // Error document [/^<.*>$/, {token: 'annotation'}], // Label definition - [/^[.a-zA-Z0-9_$?@].*:/, {token: 'type.identifier', next: '@rest'}], + [/^[.a-zA-Z0-9_$?@].*:/, {token: 'type.identifier'}], // Label definition (ARM style) - [/^\s*[|][^|]*[|]/, {token: 'type.identifier', next: '@rest'}], + [/^\s*[|][^|]*[|]/, {token: 'type.identifier'}], // Label definition (CL style) - [/^\s*[.a-zA-Z0-9_$|]*\s*(PROC|ENDP|DB|DD)/, {token: 'type.identifier', next: '@rest'}], + [/^\s*[.a-zA-Z0-9_$|]*\s*(PROC|ENDP|DB|DD)/, {token: 'type.identifier'}], // Constant definition - [/^[.a-zA-Z0-9_$?@][^=]*=/, {token: 'type.identifier', next: '@rest'}], + [/^[.a-zA-Z0-9_$?@][^=]*=/, {token: 'type.identifier'}], // opcode [/[.a-zA-Z_][.a-zA-Z_0-9]*/, {token: 'keyword', next: '@rest'}], // braces and parentheses at the start of the line (e.g. nvcc output) @@ -119,5 +119,8 @@ function definition() { }; } +var def = definition(); monaco.languages.register({id: 'asm'}); -monaco.languages.setMonarchTokensProvider('asm', definition()); +monaco.languages.setMonarchTokensProvider('asm', def); + +module.exports = def; diff --git a/static/modes/llvm-ir-mode.js b/static/modes/llvm-ir-mode.js index 637778fed74424c54521edbce01a1d8fcc57f32b..184e92beba0dca6631fc4870cc32a108ebba6310 100644 --- a/static/modes/llvm-ir-mode.js +++ b/static/modes/llvm-ir-mode.js @@ -90,8 +90,8 @@ function definition() { [/-?\d+/, 'number'], // llvmNumber [/\b(true|false)\b/, 'keyword'], // llvmBoolean [/\b(zeroinitializer|undef|null|none)\b/, 'constant'], // llvmConstant - [/"([^"\\]|\\.)*$/, 'string.invalid' ], // non-teminated string - [/"/, 'string', '@string'], // push to string state + [/"([^"\\]|\\.)*$/, 'string.invalid'], // non-terminated string + [/"/, 'string', '@string'], // push to string state [/[-a-zA-Z$._][-a-zA-Z$._0-9]*:/, 'tag'], // llvmLabel [/[%@][-a-zA-Z$._][-a-zA-Z$._0-9]*/, 'variable.name'], // llvmIdentifier @@ -127,10 +127,10 @@ function definition() { ], string: [ - [/[^\\"]+/, 'string'], + [/[^\\"]+/, 'string'], [/@escapes/, 'string.escape'], - [/\\./, 'string.escape.invalid'], - [/"/, 'string', '@pop' ] + [/\\./, 'string.escape.invalid'], + [/"/, 'string', '@pop'] ] } }; diff --git a/static/modes/ocaml-mode.js b/static/modes/ocaml-mode.js new file mode 100644 index 0000000000000000000000000000000000000000..fd2e0fc19ffc630ae6e1878c33d3feaf90967e42 --- /dev/null +++ b/static/modes/ocaml-mode.js @@ -0,0 +1,135 @@ +// Copyright (c) 2018, Eugen Bulavin +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. + +"use strict"; + +var monaco = require('../monaco'); + +function definition() { + return { + keywords: [ + 'and', + 'as', + 'assert', + 'asr', + 'begin', + 'class', + 'constraint', + 'do', + 'done', + 'downto', + 'else', + 'end', + 'exception', + 'external', + 'false', + 'for', + 'fun', + 'function', + 'functor', + 'if', + 'in', + 'include', + 'inherit', + 'initializer', + 'land', + 'lazy', + 'let', + 'lor', + 'lsl', + 'lsr', + 'lxor', + 'match', + 'method', + 'mod', + 'module', + 'mutable', + 'new', + 'nonrec', + 'object', + 'of', + 'open', + 'or', + 'private', + 'rec', + 'sig', + 'struct', + 'then', + 'to', + 'true', + 'try', + 'type', + 'val', + 'virtual', + 'when', + 'while', + 'with', + ], + + typeKeywords: [ + 'int', + 'int32', + 'int64', + 'bool', + 'char', + 'unit', + ], + + numbers: /-?[0-9.]/, + + tokenizer: { + root: [ + // identifiers and keywords + [/[a-z_$][\w$]*/, { + cases: { + '@typeKeywords': 'keyword', + '@keywords': 'keyword', + '@default': 'identifier' + } + }], + + { include: '@whitespace' }, + + [/@numbers/, 'number'], + + [/[+\-*/=<>$@]/, 'operators'], + + [/(")(.*)(")/, ['string', 'string', 'string']] + ], + + comment: [ + [/[^(*]+/, 'comment'], + [/\*\)/, 'comment', '@pop'], + ], + + whitespace: [ + [/[ \t\r\n]+/, 'white'], + [/\(\*/, 'comment', '@comment'], + ], + } + }; +} + +monaco.languages.register({id: 'ocaml'}); +monaco.languages.setMonarchTokensProvider('ocaml', definition()); diff --git a/static/modes/ptx-mode.js b/static/modes/ptx-mode.js new file mode 100644 index 0000000000000000000000000000000000000000..18624275ba5a584e371e1534226b19deaa4e1d05 --- /dev/null +++ b/static/modes/ptx-mode.js @@ -0,0 +1,53 @@ +// Copyright (c) 2019, Compiler Explorer Authors +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +'use strict'; +var $ = require('jquery'); +var asm = require('./asm-mode'); + +function definition() { + var ptx = $.extend(true, {}, asm); // deep copy + + // Redefine registers for ptx: + // Usually ptx registers are in the form "%[pr][0-9]+", but a bunch of magic registers does not follow + // this scheme (see https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#special-registers ). + // Thus the register-regex captures everything that starts with a '%'. + ptx.registers = /%[a-z0-9_\\.]+/; + + + // Redefine whitespaces, as asm interprets strings with a leading '@' as comments. + ptx.tokenizer.whitespace = [ + [/[ \t\r\n]+/, 'white'], + [/\/\*/, 'comment', '@comment'], + [/\/\/.*$/, 'comment'], + [/[#;\\].*$/, 'comment'] + ]; + + // Add predicated instructions to the list of root tokens. Search for an opcode next, which is also a root token. + ptx.tokenizer.root.push([/@%p[0-9]+/, {token: 'operator', next: '@root'}]); + + return ptx; +} + +monaco.languages.register({id: 'ptx'}); +monaco.languages.setMonarchTokensProvider('ptx', definition()); diff --git a/static/monaco-loader.js b/static/monaco-loader.js index a26211e0e57b338a6064229ac5aeb76a935a3b7c..85af8eec6ba1d1f6be9436cd1b960b3af8e0e60e 100644 --- a/static/monaco-loader.js +++ b/static/monaco-loader.js @@ -39,6 +39,7 @@ var waitForMonaco = function () { return window.monaco; } + window.require.config({ baseUrl: window.httpRootDir }); window.require(['vs/editor/editor.main'], function () { resolve(window.monaco); }); diff --git a/static/motd.js b/static/motd.js index f6c4c0b2979befdc2be16c4a1797ed64cf0d8ba9..455cc32f4b7aab945b4923a9679e5e94a7ab0b18 100644 --- a/static/motd.js +++ b/static/motd.js @@ -24,14 +24,14 @@ "use strict"; var $ = require('jquery'), - Raven = require('raven-js'), + Sentry = require('@sentry/browser'), _ = require('underscore'), ga = require('analytics'); function handleMotd(motd, motdNode, subLang, adsEnabled, onHide) { if (motd.motd) { motdNode.find(".content").html(motd.motd); - motdNode.removeClass('hide'); + motdNode.removeClass('d-none'); motdNode.find(".close") .on('click', function () { motdNode.addClass('d-none'); @@ -73,8 +73,8 @@ function initialise(url, motdNode, defaultLanguage, adsEnabled, onHide) { .then(function (res) { handleMotd(res, motdNode, defaultLanguage, adsEnabled, onHide); }) - .catch(function (xhr, error, exc) { - Raven.captureException(exc); + .catch(function (exc) { + Sentry.captureException(exc); }); } diff --git a/static/panes/ast-view.js b/static/panes/ast-view.js index 92cd947a5221defd7672ff4041cedad528af6c37..394d0494b37ea802fc37aaab76eb5eac6443e57f 100644 --- a/static/panes/ast-view.js +++ b/static/panes/ast-view.js @@ -184,7 +184,8 @@ Ast.prototype.onSettingsChange = function (newSettings) { contextmenu: newSettings.useCustomContextMenu, minimap: { enabled: newSettings.showMinimap - } + }, + fontFamily: newSettings.editorsFFont }); }; diff --git a/static/panes/compiler.js b/static/panes/compiler.js index 64d12d6842819765496400f5f61316430ee1ed32..492e9d07354aa27df8d5709d61e4dde73893b7bf 100644 --- a/static/panes/compiler.js +++ b/static/panes/compiler.js @@ -37,9 +37,10 @@ var monaco = require('../monaco'); var Alert = require('../alert'); var bigInt = require('big-integer'); var local = require('../local'); -var Raven = require('raven-js'); +var Sentry = require('@sentry/browser'); var Libraries = require('../libs-widget'); require('../modes/asm-mode'); +require('../modes/ptx-mode'); require('selectize'); @@ -104,8 +105,8 @@ function Compiler(hub, container, state) { this.outputEditor = monaco.editor.create(this.monacoPlaceholder[0], { scrollBeyondLastLine: false, readOnly: true, - language: 'asm', - fontFamily: 'Consolas, "Liberation Mono", Courier, monospace', + language: languages[this.currentLangId].monacoDisassembly || 'asm', + fontFamily: this.settings.editorsFFont, glyphMargin: !options.embedded, fixedOverflowWidgets: true, minimap: { @@ -119,6 +120,7 @@ function Compiler(hub, container, state) { this.compilerPicker.selectize({ sortField: [ {field: '$order'}, + {field: '$score'}, {field: 'name'} ], valueField: 'id', @@ -215,6 +217,11 @@ Compiler.prototype.initPanerButtons = function () { this.sourceEditorId); }, this); + var createIrView = _.bind(function () { + return Components.getIrViewWith(this.id, this.source, this.lastResult.irOutput, this.getCompilerName(), + this.sourceEditorId); + }, this); + var createGccDumpView = _.bind(function () { return Components.getGccDumpViewWith(this.id, this.getCompilerName(), this.sourceEditorId, this.lastResult.gccDumpOutput); @@ -259,6 +266,16 @@ Compiler.prototype.initPanerButtons = function () { insertPoint.addChild(createAstView); }, this)); + this.container.layoutManager + .createDragSource(this.irButton, createIrView) + ._dragListener.on('dragStart', togglePannerAdder); + + this.irButton.click(_.bind(function () { + var insertPoint = this.hub.findParentRowOrColumn(this.container) || + this.container.layoutManager.root.contentItems[0]; + insertPoint.addChild(createIrView); + }, this)); + this.container.layoutManager .createDragSource(this.gccDumpButton, createGccDumpView) ._dragListener.on('dragStart', togglePannerAdder); @@ -393,6 +410,9 @@ Compiler.prototype.getEffectiveFilters = function () { if (filters.execute && !this.compiler.supportsExecute) { delete filters.execute; } + if (filters.libraryCode && !this.compiler.supportsLibraryCodeFilter) { + delete filters.libraryCode; + } _.each(this.compiler.disabledFilters, function (filter) { if (filters[filter]) { delete filters[filter]; @@ -405,8 +425,7 @@ Compiler.prototype.findTools = function (content, tools) { if (content.componentName === "tool") { if ( (content.componentState.editor === this.sourceEditorId) && - (content.componentState.compiler === this.id)) - { + (content.componentState.compiler === this.id)) { tools.push({ id: content.componentState.toolId, args: content.componentState.args @@ -464,7 +483,8 @@ Compiler.prototype.compile = function (bypassCache, newTools) { rtlDump: this.rtlDumpEnabled }, produceOptInfo: this.wantOptInfo, - produceCfg: this.cfgViewOpen + produceCfg: this.cfgViewOpen, + produceIr: this.irViewOpen }, filters: this.getEffectiveFilters(), tools: this.getActiveTools(newTools) @@ -600,6 +620,8 @@ Compiler.prototype.onCompileResponse = function (request, result, cached) { }); result.asm.splice(indexToDiscard + 1, result.asm.length - indexToDiscard); } + // Save which source produced this change. It should probably be saved earlier though + result.source = this.source; this.lastResult = result; var timeTaken = Math.max(0, Date.now() - this.pendingRequestSentAt); var wasRealReply = this.pendingRequestSentAt > 0; @@ -655,6 +677,18 @@ Compiler.prototype.onCompileResponse = function (request, result, cached) { this.compileTimeLabel.text(timeLabelText); + if (result.popularArguments) { + this.handlePopularArgumentsResult(result.popularArguments); + } else { + this.compilerService.requestPopularArguments(this.compiler.id, request.options.userArguments).then( + _.bind(function (result) { + if (result && result.result) { + this.handlePopularArgumentsResult(result.result); + } + }, this) + ); + } + this.eventHub.emit('compileResult', this.id, this.compiler, result, languages[this.currentLangId]); this.updateButtons(); this.setCompilationOptionsPopover(result.compilationOptions ? result.compilationOptions.join(' ') : ''); @@ -679,7 +713,9 @@ Compiler.prototype.onEditorChange = function (editor, source, langId, compilerId if (editor === this.sourceEditorId && langId === this.currentLangId && (compilerId === undefined || compilerId === this.id)) { this.source = source; - this.compile(); + if (this.settings.compileOnChange) { + this.compile(); + } } }; @@ -755,6 +791,22 @@ Compiler.prototype.onAstViewClosed = function (id) { } }; +Compiler.prototype.onIrViewOpened = function (id) { + if (this.id === id) { + this.irButton.prop('disabled', true); + this.irViewOpen = true; + this.compile(); + } +}; + +Compiler.prototype.onIrViewClosed = function (id) { + if (this.id === id) { + this.irButton.prop('disabled', true); + this.irViewOpen = false; + this.compile(); + } +}; + Compiler.prototype.onGccDumpUIInit = function (id) { if (this.id === id) { this.compile(); @@ -829,6 +881,7 @@ Compiler.prototype.initButtons = function (state) { this.optButton = this.domRoot.find('.btn.view-optimization'); this.astButton = this.domRoot.find('.btn.view-ast'); + this.irButton = this.domRoot.find('.btn.view-ir'); this.gccDumpButton = this.domRoot.find('.btn.view-gccdump'); this.cfgButton = this.domRoot.find('.btn.view-cfg'); this.libsButton = this.domRoot.find('.btn.show-libs'); @@ -842,6 +895,7 @@ Compiler.prototype.initButtons = function (state) { this.optionsField = this.domRoot.find('.options'); this.prependOptions = this.domRoot.find('.prepend-options'); + this.fullCompilerName = this.domRoot.find('.full-compiler-name'); this.setCompilationOptionsPopover(this.compiler ? this.compiler.options : null); // Dismiss on any click that isn't either in the opening element, inside // the popover or on any alert @@ -850,6 +904,10 @@ Compiler.prototype.initButtons = function (state) { if (!target.is(this.prependOptions) && this.prependOptions.has(target).length === 0 && target.closest('.popover').length === 0) this.prependOptions.popover("hide"); + + if (!target.is(this.fullCompilerName) && this.fullCompilerName.has(target).length === 0 && + target.closest('.popover').length === 0) + this.fullCompilerName.popover("hide"); }, this)); this.filterBinaryButton = this.domRoot.find("[data-bind='binary']"); @@ -864,6 +922,9 @@ Compiler.prototype.initButtons = function (state) { this.filterDirectivesButton = this.domRoot.find("[data-bind='directives']"); this.filterDirectivesTitle = this.filterDirectivesButton.prop('title'); + this.filterLibraryCodeButton = this.domRoot.find("[data-bind='libraryCode']"); + this.filterLibraryCodeTitle = this.filterLibraryCodeButton.prop('title'); + this.filterCommentsButton = this.domRoot.find("[data-bind='commentOnly']"); this.filterCommentsTitle = this.filterCommentsButton.prop('title'); @@ -878,10 +939,10 @@ Compiler.prototype.initButtons = function (state) { this.noBinaryFiltersButtons = this.domRoot.find('.nonbinary'); this.filterExecuteButton.toggle(options.supportsExecute); + this.filterLibraryCodeButton.toggle(options.supportsLibraryCodeFilter); this.optionsField.val(this.options); this.shortCompilerName = this.domRoot.find('.short-compiler-name'); - this.fullCompilerName = this.domRoot.find('.full-compiler-name'); this.compilerPicker = this.domRoot.find('.compiler-picker'); this.setCompilerVersionPopover(''); @@ -965,6 +1026,9 @@ Compiler.prototype.updateButtons = function () { var noBinaryFiltersDisabled = !!filters.binary && !this.compiler.supportsFiltersInBinary; this.noBinaryFiltersButtons.prop('disabled', noBinaryFiltersDisabled); + this.filterLibraryCodeButton.prop('disabled', !this.compiler.supportsLibraryCodeFilter); + formatFilterTitle(this.filterLibraryCodeButton, this.filterLibraryCodeTitle); + this.filterLabelsButton.prop('disabled', this.compiler.disabledFilters.indexOf('labels') !== -1); formatFilterTitle(this.filterLabelsButton, this.filterLabelsTitle); this.filterDirectivesButton.prop('disabled', this.compiler.disabledFilters.indexOf('directives') !== -1); @@ -976,6 +1040,7 @@ Compiler.prototype.updateButtons = function () { this.optButton.prop('disabled', !this.compiler.supportsOptOutput); this.astButton.prop('disabled', !this.compiler.supportsAstView); + this.irButton.prop('disabled', !this.compiler.supportsIrView); this.cfgButton.prop('disabled', !this.compiler.supportsCfg); this.gccDumpButton.prop('disabled', !this.compiler.supportsGccDump); @@ -988,6 +1053,50 @@ Compiler.prototype.updateButtons = function () { !(this.supportsTool("pahole") && !this.isToolActive(activeTools, "pahole"))); }; +Compiler.prototype.handlePopularArgumentsResult = function (result) { + var popularArgumentsMenu = this.domRoot.find("div.populararguments div.dropdown-menu"); + popularArgumentsMenu.html(""); + + if (result) { + var addedOption = false; + + _.forEach(result, _.bind(function (arg, key) { + var argumentButton = $(document.createElement("button")); + argumentButton.addClass('dropdown-item btn btn-light btn-sm'); + argumentButton.attr("title", arg.description); + argumentButton.data("arg", key); + argumentButton.html( + "<div class='argmenuitem'>" + + "<span class='argtitle'>" + _.escape(key) + "</span>" + + "<span class='argdescription'>" + arg.description + "</span>" + + "</div>"); + + argumentButton.click(_.bind(function () { + var button = argumentButton; + var curOptions = this.optionsField.val(); + if (curOptions.length > 0) { + this.optionsField.val(curOptions + " " + button.data("arg")); + } else { + this.optionsField.val(button.data("arg")); + } + + this.optionsField.change(); + }, this)); + + popularArgumentsMenu.append(argumentButton); + addedOption = true; + }, this)); + + if (!addedOption) { + $("div.populararguments").hide(); + } else { + $("div.populararguments").show(); + } + } else { + $("div.populararguments").hide(); + } +}; + Compiler.prototype.onFontScale = function () { if (this.getEffectiveFilters().binary) { this.setBinaryMargin(); @@ -1012,6 +1121,7 @@ Compiler.prototype.initListeners = function () { this.eventHub.on('findCompilers', this.sendCompiler, this); this.eventHub.on('compilerSetDecorations', this.onCompilerSetDecorations, this); this.eventHub.on('settingsChange', this.onSettingsChange, this); + this.eventHub.on('requestCompilation', this.onRequestCompilation, this); this.eventHub.on('toolSettingsChange', this.onToolSettingsChange, this); this.eventHub.on('toolOpened', this.onToolOpened, this); @@ -1021,6 +1131,8 @@ Compiler.prototype.initListeners = function () { this.eventHub.on('optViewClosed', this.onOptViewClosed, this); this.eventHub.on('astViewOpened', this.onAstViewOpened, this); this.eventHub.on('astViewClosed', this.onAstViewClosed, this); + this.eventHub.on('irViewOpened', this.onIrViewOpened, this); + this.eventHub.on('irViewClosed', this.onIrViewClosed, this); this.eventHub.on('outputOpened', this.onOutputOpened, this); this.eventHub.on('outputClosed', this.onOutputClosed, this); @@ -1272,6 +1384,12 @@ Compiler.prototype.setCompilerVersionPopover = function (version) { }); }; +Compiler.prototype.onRequestCompilation = function (editorId) { + if (editorId === this.sourceEditorId) { + this.compile(); + } +}; + Compiler.prototype.onSettingsChange = function (newSettings) { var before = this.settings; this.settings = _.clone(newSettings); @@ -1282,7 +1400,8 @@ Compiler.prototype.onSettingsChange = function (newSettings) { contextmenu: this.settings.useCustomContextMenu, minimap: { enabled: this.settings.showMinimap && !options.embedded - } + }, + fontFamily: this.settings.editorsFFont }); }; @@ -1559,7 +1678,7 @@ Compiler.prototype.langOfCompiler = function (compilerId) { return compiler.id === compilerId || compiler.alias === compilerId; }); if (!compiler) { - Raven.captureMessage('Unable to find compiler id "' + compilerId + '"'); + Sentry.captureMessage('Unable to find compiler id "' + compilerId + '"'); compiler = options.compilers[0]; } return compiler.lang; diff --git a/static/panes/conformance-view.js b/static/panes/conformance-view.js index 6359b8539e8ba285ee731015256ec5fa409308dd..b531d87bf1e5aa786486ab4d10a9d77a98989112 100644 --- a/static/panes/conformance-view.js +++ b/static/panes/conformance-view.js @@ -194,6 +194,7 @@ Conformance.prototype.addCompilerSelector = function (config) { .selectize({ sortField: [ {field: '$order'}, + {field: '$score'}, {field: 'name'} ], valueField: 'id', diff --git a/static/panes/diff.js b/static/panes/diff.js index 1771a3ca277aefe6747219ff8be8de6bd150429c..80c82c1b6773eb95e8362f745593691db735fad2 100644 --- a/static/panes/diff.js +++ b/static/panes/diff.js @@ -239,7 +239,8 @@ Diff.prototype.onSettingsChange = function (newSettings) { this.outputEditor.updateOptions({ minimap: { enabled: newSettings.showMinimap - } + }, + fontFamily: newSettings.editorsFFont }); }; diff --git a/static/panes/editor.js b/static/panes/editor.js index 825d6b9c21393bedd4e3836f85d80f80dff36822..e7f922be8b74f27a177a1e4af682fe81137ea6c0 100644 --- a/static/panes/editor.js +++ b/static/panes/editor.js @@ -39,12 +39,14 @@ require('../modes/rust-mode'); require('../modes/ispc-mode'); require('../modes/llvm-ir-mode'); require('../modes/haskell-mode'); +require('../modes/ocaml-mode'); require('../modes/clean-mode'); require('../modes/pascal-mode'); require('../modes/cuda-mode'); require('../modes/fortran-mode'); require('../modes/zig-mode'); require('../modes/nc-mode'); +require('../modes/ada-mode'); require('selectize'); var loadSave = new loadSaveLib.LoadSave(); @@ -88,7 +90,7 @@ function Editor(hub, state, container) { this.editor = monaco.editor.create(root[0], { scrollBeyondLastLine: false, language: this.currentLanguage.monaco, - fontFamily: 'Consolas, "Liberation Mono", Courier, monospace', + fontFamily: this.settings.editorsFFont, readOnly: !!options.readOnly || legacyReadOnly, glyphMargin: !options.embedded, quickSuggestions: false, @@ -101,6 +103,7 @@ function Editor(hub, state, container) { emptySelectionClipboard: true, autoIndent: true }); + this.editor.getModel().setEOL(monaco.editor.EndOfLineSequence.LF); if (state.source !== undefined) { this.setSource(state.source); @@ -113,7 +116,10 @@ function Editor(hub, state, container) { // With reference to https://github.com/Microsoft/monaco-editor/issues/115 // I tried that and it didn't work, but a delay of 500 seems to "be enough". setTimeout(_.bind(function () { + this.editor.setSelection(new monaco.Selection(1, 1, 1, 1)); + this.editor.focus(); this.editor.getAction("editor.fold").run(); + this.editor.clearSelection(); }, this), 500); } @@ -181,10 +187,12 @@ Editor.prototype.updateState = function () { }; this.fontScale.addState(state); this.container.setState(state); + + this.updateButtons(); }; Editor.prototype.setSource = function (newSource) { - this.editor.getModel().setValue(newSource); + this.updateSource(newSource); }; Editor.prototype.onNewSource = function (editorId, newSource) { @@ -222,6 +230,8 @@ Editor.prototype.initCallbacks = function () { this.container.layoutManager.on('initialised', function () { // Once initialized, let everyone know what text we have. this.maybeEmitChange(); + // And maybe ask for a compilation (Will hit the cache most of the time) + this.requestCompilation(); }, this); this.eventHub.on('compilerOpen', this.onCompilerOpen, this); @@ -295,7 +305,7 @@ Editor.prototype.initButtons = function (state) { }, this); var getConformanceConfig = _.bind(function () { - return Components.getConformanceView(this.id, this.getSource()); + return Components.getConformanceView(this.id, this.getSource(), this.currentLanguage.id); }, this); var getEditorConfig = _.bind(function () { @@ -336,6 +346,32 @@ Editor.prototype.initButtons = function (state) { } } }, this)); + + this.cppInsightsButton = this.domRoot.find('.open-in-cppinsights'); + this.cppInsightsButton.on('mousedown', _.bind(function () { + this.updateOpenInCppInsights(); + }, this)); +}; + +Editor.prototype.updateButtons = function () { + if (this.currentLanguage.id === 'c++') { + this.cppInsightsButton.show(); + } else { + this.cppInsightsButton.hide(); + } +}; + +Editor.prototype.b64UTFEncode = function (str) { + return btoa(encodeURIComponent(str).replace(/%([0-9A-F]{2})/g, function (match, v) { + return String.fromCharCode(parseInt(v, 16)); + })); +}; + +Editor.prototype.updateOpenInCppInsights = function () { + var cppStd = 'cpp2a'; // if a compiler is linked, maybe we can find this out? + var link = 'https://cppinsights.io/lnk?code=' + this.b64UTFEncode(this.getSource()) + '&std=' + cppStd + '&rev=1.0'; + + this.domRoot.find(".open-in-cppinsights").attr("href", link); }; Editor.prototype.changeLanguage = function (newLang) { @@ -360,6 +396,10 @@ Editor.prototype.tryCompilerLinkLine = function (thisLineNumber, reveal) { }, this)); }; +Editor.prototype.requestCompilation = function () { + this.eventHub.emit('requestCompilation', this.id); +}; + Editor.prototype.initEditorActions = function () { this.editor.addAction({ id: 'compile', @@ -369,7 +409,9 @@ Editor.prototype.initEditorActions = function () { contextMenuGroupId: 'navigation', contextMenuOrder: 1.5, run: _.bind(function () { + // This change request is mostly superfluous this.maybeEmitChange(); + this.requestCompilation(); }, this) }); @@ -436,9 +478,27 @@ Editor.prototype.confirmOverwrite = function (yes) { {yes: yes, no: null}); }; +Editor.prototype.updateSource = function (newSource) { + // Create something that looks like an edit operation for the whole text + var operation = { + range: this.editor.getModel().getFullModelRange(), + forceMoveMarkers: true, + text: newSource + }; + var nullFn = function () { + return null; + }; + var viewState = this.editor.saveViewState(); + // Add a undo stop so we don't go back further than expected + this.editor.pushUndoStop(); + // Apply de edit. Note that we lose cursor position, but I've not found a better alternative yet + this.editor.getModel().pushEditOperations(viewState.cursorState, [operation], nullFn); + this.numberUsedLines(); +}; + Editor.prototype.formatCurrentText = function () { var previousSource = this.getSource(); - var currentPosition = this.editor.getPosition(); + $.ajax({ type: 'POST', url: window.location.origin + this.httpRoot + 'api/format/clangformat', @@ -451,14 +511,10 @@ Editor.prototype.formatCurrentText = function () { success: _.bind(function (result) { if (result.exit === 0) { if (this.doesMatchEditor(previousSource)) { - this.setSource(result.answer); - this.numberUsedLines(); - this.editor.setPosition(currentPosition); + this.updateSource(result.answer); } else { this.confirmOverwrite(_.bind(function () { - this.setSource(result.answer); - this.numberUsedLines(); - this.editor.setPosition(currentPosition); + this.updateSource(result.answer); }, this), null); } } else { @@ -538,25 +594,15 @@ Editor.prototype.onSettingsChange = function (newSettings) { minimap: { enabled: this.settings.showMinimap && !options.embedded }, + fontFamily: this.settings.editorsFFont, wordWrap: this.settings.wordWrap ? 'bounded' : 'off', wordWrapColumn: this.editor.getLayoutInfo().viewportColumn // Ensure the column count is up to date }); - // * Turn off auto. - // * edit code - // * change compiler or compiler options (out of date code is used) - var bDac = before.compileOnChange ? before.delayAfterChange : 0; - var aDac = after.compileOnChange ? after.delayAfterChange : 0; - if (bDac !== aDac || !this.debouncedEmitChange) { - if (aDac) { - this.debouncedEmitChange = _.debounce(_.bind(function () { - this.maybeEmitChange(); - }, this), after.delayAfterChange); - this.maybeEmitChange(true); - } else { - this.debouncedEmitChange = _.noop; - } - } + // Unconditionally send editor changes. The compiler only compiles when needed + this.debouncedEmitChange = _.debounce(_.bind(function () { + this.maybeEmitChange(); + }, this), after.delayAfterChange); if (before.hoverShowSource && !after.hoverShowSource) { this.onEditorSetDecoration(this.id, -1, false); @@ -711,7 +757,8 @@ Editor.prototype.initLoadSaver = function () { loadSave.run(_.bind(function (text) { this.setSource(text); this.updateState(); - this.maybeEmitChange(); + this.maybeEmitChange(true); + this.requestCompilation(); }, this), this.getSource(), this.currentLanguage); }, this)); }; @@ -732,6 +779,7 @@ Editor.prototype.onLanguageChange = function (newLangId) { // Broadcast the change to other panels this.eventHub.emit("languageChange", this.id, newLangId); this.maybeEmitChange(true); + this.requestCompilation(); ga.proxy('send', { hitType: 'event', eventCategory: 'LanguageChange', diff --git a/static/panes/gccdump-view.js b/static/panes/gccdump-view.js index dd0a2ce93b710989bedc021455259241ea5718d9..638b7502d0db5c89bf8c3c3d91ebfdf1bb77d072 100644 --- a/static/panes/gccdump-view.js +++ b/static/panes/gccdump-view.js @@ -297,7 +297,8 @@ GccDump.prototype.onSettingsChange = function (newSettings) { contextmenu: newSettings.useCustomContextMenu, minimap: { enabled: newSettings.showMinimap - } + }, + fontFamily: newSettings.editorsFFont }); }; diff --git a/static/panes/ir-view.js b/static/panes/ir-view.js new file mode 100644 index 0000000000000000000000000000000000000000..00167124344e8c91b2651848d30f798b6285ebbf --- /dev/null +++ b/static/panes/ir-view.js @@ -0,0 +1,215 @@ +// Copyright (c) 2018, Compiler Explorer Authors +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. + +"use strict"; + +var FontScale = require('../fontscale'); +var monaco = require('../monaco'); +var _ = require('underscore'); +var $ = require('jquery'); +var colour = require('../colour'); +var ga = require('../analytics'); + +function Ir(hub, container, state) { + this.container = container; + this.eventHub = hub.createEventHub(); + this.domRoot = container.getElement(); + this.domRoot.html($('#ir').html()); + this._currentDecorations = []; + this.irEditor = monaco.editor.create(this.domRoot.find(".monaco-placeholder")[0], { + fontFamily: 'Consolas, "Liberation Mono", Courier, monospace', + value: "", + scrollBeyondLastLine: false, + language: 'llvm-ir', + readOnly: true, + folding: true, + glyphMargin: true, + quickSuggestions: false, + fixedOverflowWidgets: true, + minimap: { + maxColumn: 80 + }, + lineNumbersMinChars: 3 + }); + + this._compilerid = state.id; + this._compilerName = state.compilerName; + this._editorid = state.editorid; + + this.colours = []; + this.irCode = []; + this.lastColours = []; + this.lastColourScheme = {}; + + this.initButtons(state); + this.initCallbacks(); + + if (state && state.irOutput) { + this.showIrResults(state.irOutput); + } + this.setTitle(); + + ga.proxy('send', { + hitType: 'event', + eventCategory: 'OpenViewPane', + eventAction: 'Ir' + }); +} + +Ir.prototype.initButtons = function (state) { + this.fontScale = new FontScale(this.domRoot, state, this.irEditor); + + this.topBar = this.domRoot.find(".top-bar"); +}; + +Ir.prototype.initCallbacks = function () { + this.fontScale.on('change', _.bind(this.updateState, this)); + + this.container.on('destroy', this.close, this); + + this.eventHub.on('compileResult', this.onCompileResponse, this); + this.eventHub.on('compiler', this.onCompiler, this); + this.eventHub.on('colours', this.onColours, this); + this.eventHub.on('compilerClose', this.onCompilerClose, this); + this.eventHub.on('settingsChange', this.onSettingsChange, this); + this.eventHub.emit('irViewOpened', this._compilerid); + this.eventHub.emit('requestSettings'); + + this.container.on('resize', this.resize, this); + this.container.on('shown', this.resize, this); +}; + +// TODO: de-dupe with compiler etc +Ir.prototype.resize = function () { + var topBarHeight = this.topBar.outerHeight(true); + this.irEditor.layout({ + width: this.domRoot.width(), + height: this.domRoot.height() - topBarHeight + }); +}; + +Ir.prototype.onCompileResponse = function (id, compiler, result) { + if (this._compilerid !== id) return; + if (result.hasIrOutput) { + this.showIrResults(result.irOutput); + } + else if (compiler.supportsIrView) { + this.showIrResults([{text:"<No output>"}]); + } + + // Why call this explicitly instead of just listening to the "colours" event? + // Because the recolouring happens before this editors value is set using "showIrResults". + this.onColours(this._compilerid, this.lastColours, this.lastColourScheme); +}; + +Ir.prototype.setTitle = function () { + this.container.setTitle( + this._compilerName + " IR Viewer (Editor #" + this._editorid + ", Compiler #" + this._compilerid + ")" + ); +}; + +Ir.prototype.showIrResults = function (irCode) { + if (!this.irEditor) return; + this.irCode = irCode; + this.irEditor.getModel().setValue(irCode.length ? _.pluck(irCode, 'text').join('\n') : "<No IR generated>"); +}; + +Ir.prototype.onCompiler = function (id, compiler, options, editorid) { + if (id === this._compilerid) { + this._compilerName = compiler ? compiler.name : ''; + this._editorid = editorid; + this.setTitle(); + if (compiler && !compiler.supportsIrView) { + this.irEditor.setValue("<IR output is not supported for this compiler>"); + } + } +}; + +Ir.prototype.onColours = function (id, colours, scheme) { + this.lastColours = colours; + this.lastColourScheme = scheme; + + if (id === this._compilerid) { + var irColours = {}; + _.each(this.irCode, function (x, index) { + if (x.source && x.source.file === null && x.source.line > 0 && colours[x.source.line - 1] !== undefined) { + irColours[index] = colours[x.source.line - 1]; + } + }); + this.colours = colour.applyColours(this.irEditor, irColours, scheme, this.colours); + } +}; + +Ir.prototype.onCompilerClose = function (id) { + if (id === this._compilerid) { + // We can't immediately close as an outer loop somewhere in GoldenLayout is iterating over + // the hierarchy. We can't modify while it's being iterated over. + _.defer(function (self) { + self.container.close(); + }, this); + } +}; + +Ir.prototype.updateState = function () { + this.container.setState(this.currentState()); +}; + +Ir.prototype.currentState = function () { + var state = { + id: this._compilerid, + editorid: this._editorid + }; + this.fontScale.addState(state); + return state; +}; + +Ir.prototype.onCompilerClose = function (id) { + if (id === this._compilerid) { + // We can't immediately close as an outer loop somewhere in GoldenLayout is iterating over + // the hierarchy. We can't modify while it's being iterated over. + this.close(); + _.defer(function (self) { + self.container.close(); + }, this); + } +}; + +Ir.prototype.onSettingsChange = function (newSettings) { + this.irEditor.updateOptions({ + contextmenu: newSettings.useCustomContextMenu, + minimap: { + enabled: newSettings.showMinimap + } + }); +}; + +Ir.prototype.close = function () { + this.eventHub.unsubscribe(); + this.eventHub.emit("irViewClosed", this._compilerid); + this.irEditor.dispose(); +}; + +module.exports = { + Ir: Ir +}; diff --git a/static/panes/opt-view.js b/static/panes/opt-view.js index 6ce301bd19ece2029749b334ae729906ae08e889..0872b5f75b704d709e95fdd1901321d5b951e23d 100644 --- a/static/panes/opt-view.js +++ b/static/panes/opt-view.js @@ -76,13 +76,6 @@ function Opt(hub, container, state) { }); } -Opt.prototype.onEditorChange = function (id, source) { - if (this._editorid === id) { - this.code = source; - if (!this.isCompilerSupported) this.optEditor.setValue(source); - } -}; - Opt.prototype.initButtons = function (state) { this.fontScale = new FontScale(this.domRoot, state, this.optEditor); @@ -95,7 +88,6 @@ Opt.prototype.initCallbacks = function () { this.eventHub.on('compileResult', this.onCompileResult, this); this.eventHub.on('compiler', this.onCompiler, this); this.eventHub.on('compilerClose', this.onCompilerClose, this); - this.eventHub.on('editorChange', this.onEditorChange, this); this.eventHub.on('settingsChange', this.onSettingsChange, this); this.eventHub.on('resize', this.resize, this); this.container.on('destroy', this.close, this); @@ -106,7 +98,9 @@ Opt.prototype.initCallbacks = function () { }; Opt.prototype.onCompileResult = function (id, compiler, result, lang) { - if (this._compilerid !== id) return; + if (this._compilerid !== id || !this.isCompilerSupported) return; + this.code = result.source; + this.optEditor.setValue(this.code); if (result.hasOptOutput) { this.showOptResults(result.optOutput); } @@ -169,15 +163,12 @@ Opt.prototype.onCompiler = function (id, compiler, options, editorid) { if (id === this._compilerid) { this._compilerName = compiler ? compiler.name : ''; this.setTitle(); - if (!compiler || !compiler.supportsOptOutput) { - if (!this.isCompilerSupported) this.code = this.optEditor.getValue(); - this.optEditor.setValue("<OPT output is not supported for this compiler>"); - this.isCompilerSupported = true; - return; - } this._editorid = editorid; - this.optEditor.setValue(this.code); - this.isCompilerSupported = false; + if (compiler) { + this.isCompilerSupported = compiler.supportsOptOutput; + if (!this.isCompilerSupported) + this.optEditor.setValue("<OPT output is not supported for this compiler>"); + } } }; @@ -224,7 +215,8 @@ Opt.prototype.onSettingsChange = function (newSettings) { contextmenu: newSettings.useCustomContextMenu, minimap: { enabled: newSettings.showMinimap - } + }, + fontFamily: newSettings.editorsFFont }); }; diff --git a/static/settings.js b/static/settings.js index a8b6cce6c5d6b9f663ef12cf5f75b40b83253e86..3c964267d0e3896b1a573806044321f4b86ca215 100644 --- a/static/settings.js +++ b/static/settings.js @@ -78,6 +78,18 @@ Slider.prototype.putUi = function (elem, value) { elem.slider('setValue', value); }; +function Textbox() { +} + +Textbox.prototype.getUi = function (elem) { + return elem.val(); +}; + +Textbox.prototype.putUi = function (elem, value) { + elem.val(value); +}; + + function setupSettings(root, settings, onChange, langId) { settings = settings || {}; // Ensure the default language is not "null" but undefined. Temporary patch for a previous bug :( @@ -206,6 +218,7 @@ function setupSettings(root, settings, onChange, langId) { }) ); add(root.find('.enableCtrlS'), 'enableCtrlS', true, Checkbox); + add(root.find('.editorsFFont'), 'editorsFFont', 'Consolas, "Liberation Mono", Courier, monospace', Textbox); setSettings(settings); handleThemes(); diff --git a/static/thanks.html b/static/thanks.html index 686fcf4fb1a03443a6a51a2bdccaadfb7a88cbcc..cab423dc290576cf5e11eda4b0e7dcd1f47faec8 100644 --- a/static/thanks.html +++ b/static/thanks.html @@ -60,6 +60,7 @@ <li><a href="https://twitter.com/olafurw" target="_blank" rel="noreferrer noopener">Ólafur Waage</a></li> <li><a href="https://aras-p.info/" target="_blank" rel="noreferrer noopener">Aras Pranckevičius</a></li> <li><a href="https://stefan-hagen.website/" target="_blank" rel="noreferrer noopener">Stefan Hagen</a></li> + <li><a href="https://www.youtube.com/channel/UCxwGBrWeIIWO9V_uLwRWCdA/videos" target="_blank" rel="noreferrer noopener">Robert Douglas</a></li> </ul> <h3><a href="https://www.patreon.com/mattgodbolt" target="_blank" rel="noreferrer noopener">Patreon</a> Supporters</h3> <p>These amazing people have pledged their support to help the development of Compiler Explorer. Thanks to each and @@ -76,10 +77,36 @@ <li>TocarIP</li> <li>Solid Sands</li> <li>Shane Clifford</li> + <li>Eduardo Costa</li> + <li>Ryan Sims</li> + <li>Dylan Houlihan</li> + <li>Dmytro Lytovchenko</li> + <li>Wraithan McCarroll</li> + <li>Jean-Simon Lapointe</li> + <li>David C Black</li> + <li>Venkatesh Srinivas</li> + <li>Ruslan Abdikeev</li> + <li>Benjamin Demick</li> + <li>Reiner Eiteljoerge</li> + <li>Johnathan Roatch</li> + <li>John Biesnecker</li> + <li>Paul Williams</li> + <li>CB Bailey</li> + <li>Joe Doyle</li> + <li>Jason Rice</li> + <li>Rui Ueyama</li> + <li>Narut Sereewattanawoot</li> + <li>Travis Geiselbrecht</li> + <li>Chris Kennelly</li> + <li>Tom Hulton-Harrop</li> <li>Adenilson Cavalcanti</li> <li>Wojciech Bartnik</li> <li>Richard Powell</li> <li>Hayk Karapetyan</li> + <li>Colden Cullen</li> + <li>Josh Seba</li> + <li>Matt Pharr</li> + <li>Ajay Agrawal</li> <li>Dog Junko</li> <li>Robert Bigelow</li> <li>Lewis Cowles</li> diff --git a/static/themes/dark-theme.css b/static/themes/dark-theme.css index 55fe8211e6d9626667400079815fe4dd162cee47..ca36dd9eec16360ff2169420fc152e49b36e1137 100644 --- a/static/themes/dark-theme.css +++ b/static/themes/dark-theme.css @@ -351,3 +351,32 @@ kbd { .new-cookie-msg { color: white; } + +div.argmenuitem { + max-width: 250px; +} + +div.argmenuitem span.argtitle { + font-weight: bold; + display: block; + overflow-x: hidden; + overflow-anchor: visible; + text-overflow: ellipsis; +} + +div.argmenuitem span.argdescription { + max-height: 150px; + word-wrap: break-word; + overflow-wrap: break-word; + font-style: italic; + font-size: smaller; + display: block; + white-space: normal; + text-overflow: ellipsis; + overflow-anchor: visible; + overflow-y: hidden; +} + +.open-in-cppinsights * { + vertical-align: middle; +} diff --git a/static/themes/default-theme.css b/static/themes/default-theme.css index b7f1342ad983e7336808a07b5a5050750e15a760..658996b108568bd71eb0730d888a04641b957ac1 100644 --- a/static/themes/default-theme.css +++ b/static/themes/default-theme.css @@ -214,3 +214,32 @@ kbd { .new-cookie-msg { color: black; } + +div.argmenuitem { + max-width: 250px; +} + +div.argmenuitem span.argtitle { + font-weight: bold; + display: block; + overflow-x: hidden; + overflow-anchor: visible; + text-overflow: ellipsis; +} + +div.argmenuitem span.argdescription { + max-height: 150px; + word-wrap: break-word; + overflow-wrap: break-word; + font-style: italic; + font-size: smaller; + display: block; + white-space: normal; + text-overflow: ellipsis; + overflow-anchor: visible; + overflow-y: hidden; +} + +.open-in-cppinsights * { + vertical-align: middle; +} diff --git a/test/base-compiler-tests.js b/test/base-compiler-tests.js index 159a45b9db88a4f1f266fbb3a3187e864122fc7d..5ea6a5c62d9bac3b468700106a2ab6dbb1e5b0c7 100644 --- a/test/base-compiler-tests.js +++ b/test/base-compiler-tests.js @@ -64,6 +64,10 @@ describe('Basic compiler invariants', function () { compiler.isCfgCompiler("g++ (GCC-Explorer-Build) 8.0.1 20180223 (experimental)").should.equal(true); compiler.isCfgCompiler("g++ (GCC) 4.1.2").should.equal(true); + compiler.isCfgCompiler("foo-bar-g++ (GCC-Explorer-Build) 4.9.4").should.equal(true); + compiler.isCfgCompiler("foo-bar-gcc (GCC-Explorer-Build) 4.9.4").should.equal(true); + compiler.isCfgCompiler("foo-bar-gdc (GCC-Explorer-Build) 4.9.4").should.equal(true); + compiler.isCfgCompiler("fake-for-test (Based on g++)").should.equal(false); compiler.isCfgCompiler("gdc (crosstool-NG 203be35 - 20160205-2.066.1-e95a735b97) 5.2.0").should.equal(true); diff --git a/test/cases/6502-square.asm b/test/cases/6502-square.asm new file mode 100644 index 0000000000000000000000000000000000000000..19e8c08fcc52e1b065a775766535138e35f01b2f --- /dev/null +++ b/test/cases/6502-square.asm @@ -0,0 +1,45 @@ +; +; File generated by cc65 v 2.17 - Git f95481fa +; + .fopt compiler,"cc65 v 2.17 - Git f95481fa" + .setcpu "6502" + .smart on + .autoimport on + .case on + .debuginfo on + .importzp sp, sreg, regsave, regbank + .importzp tmp1, tmp2, tmp3, tmp4, ptr1, ptr2, ptr3, ptr4 + .macpack longbranch + .dbg file, "/tmp/test.c", 90, 1554043819 + .export _square + +; --------------------------------------------------------------- +; int __near__ square (int) +; --------------------------------------------------------------- + +.segment "CODE" + +.proc _square: near + + .dbg func, "square", "00", extern, "_square" + .dbg sym, "num", "00", auto, 0 + +.segment "CODE" + + .dbg line, "/tmp/test.c", 2 + jsr pushax + .dbg line, "/tmp/test.c", 3 + ldy #$01 + jsr ldaxysp + jsr pushax + ldy #$03 + jsr ldaxysp + jsr tosmulax + jmp L0001 + .dbg line, "/tmp/test.c", 4 +L0001: jsr incsp2 + rts + .dbg line + +.endproc + diff --git a/test/cases/6502-square.asm.directives.labels.comments.json b/test/cases/6502-square.asm.directives.labels.comments.json new file mode 100644 index 0000000000000000000000000000000000000000..337e48d7ac6705646466bca1f349850d370330da --- /dev/null +++ b/test/cases/6502-square.asm.directives.labels.comments.json @@ -0,0 +1,84 @@ +[ + { + "text": ".proc _square: near", + "source": null + }, + { + "text": "", + "source": null + }, + { + "text": " jsr pushax", + "source": { + "file": "/tmp/test.c", + "line": 2 + } + }, + { + "text": " ldy #$01", + "source": { + "file": "/tmp/test.c", + "line": 3 + } + }, + { + "text": " jsr ldaxysp", + "source": { + "file": "/tmp/test.c", + "line": 3 + } + }, + { + "text": " jsr pushax", + "source": { + "file": "/tmp/test.c", + "line": 3 + } + }, + { + "text": " ldy #$03", + "source": { + "file": "/tmp/test.c", + "line": 3 + } + }, + { + "text": " jsr ldaxysp", + "source": { + "file": "/tmp/test.c", + "line": 3 + } + }, + { + "text": " jsr tosmulax", + "source": { + "file": "/tmp/test.c", + "line": 3 + } + }, + { + "text": " jmp L0001", + "source": { + "file": "/tmp/test.c", + "line": 3 + } + }, + { + "text": "L0001: jsr incsp2", + "source": { + "file": "/tmp/test.c", + "line": 4 + } + }, + { + "text": " rts", + "source": { + "file": "/tmp/test.c", + "line": 4 + } + }, + { + "text": "", + "source": null + } +] \ No newline at end of file diff --git a/test/cases/bug-1229.asm b/test/cases/bug-1229.asm new file mode 100644 index 0000000000000000000000000000000000000000..52c156d430c7822a0ead1fdf2d176b7f6790d954 --- /dev/null +++ b/test/cases/bug-1229.asm @@ -0,0 +1,10353 @@ + .text + .intel_syntax noprefix + .file "example.cpp" + .file 1 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/libs/ctre/master/include/ctll/fixed_string.hpp" + .file 2 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/clang-trunk-20181013/lib/clang/8.0.0/include/stddef.h" + .file 3 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/example.cpp" + .file 4 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp" + .file 5 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/libs/ctre/master/include/ctre/wrapper.hpp" + .file 6 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/libs/ctre/master/include/ctre/atoms_characters.hpp" + .file 7 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/libs/ctre/master/include/ctre/atoms.hpp" + .file 8 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/clang-trunk-20181013/lib/clang/8.0.0/include/__stddef_max_align_t.h" + .file 9 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/cstddef" + .file 10 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/types.h" + .file 11 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/stdint-intn.h" + .file 12 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/cstdint" + .file 13 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/stdint.h" + .file 14 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/stdint-uintn.h" + .file 15 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/bits/exception_ptr.h" + .file 16 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/x86_64-linux-gnu/bits/c++config.h" + .file 17 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/debug/debug.h" + .file 18 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/types/__mbstate_t.h" + .file 19 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/types/mbstate_t.h" + .file 20 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/cwchar" + .file 21 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/types/wint_t.h" + .file 22 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/wchar.h" + .file 23 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/libio.h" + .file 24 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/types/__FILE.h" + .file 25 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/ext/new_allocator.h" + .file 26 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/clocale" + .file 27 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/locale.h" + .file 28 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/ctype.h" + .file 29 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/cctype" + .file 30 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/stdlib.h" + .file 31 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/bits/std_abs.h" + .file 32 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/cstdlib" + .file 33 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/stdlib-float.h" + .file 34 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/stdlib-bsearch.h" + .file 35 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/types/FILE.h" + .file 36 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/cstdio" + .file 37 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/_G_config.h" + .file 38 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/stdio.h" + .file 39 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/usr/include/x86_64-linux-gnu/bits/stdio.h" + .globl _Z6myfuncv # -- Begin function _Z6myfuncv + .p2align 4, 0x90 + .type _Z6myfuncv,@function +_Z6myfuncv: # @_Z6myfuncv +.Lfunc_begin0: + .loc 3 9 0 # /tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/example.cpp:9:0 + .cfi_startproc + .cfi_personality 3, __gxx_personality_v0 + .cfi_lsda 3, .Lexception0 +# %bb.0: + sub rsp, 88 + .cfi_def_cfa_offset 96 +.Ltmp3: + #DEBUG_VALUE: match:sv <- [DW_OP_LLVM_fragment 0 64] 5 + #DEBUG_VALUE: match:sv <- [DW_OP_deref] undef + #DEBUG_VALUE: regex_results:this <- undef + #DEBUG_VALUE: captures:this <- undef + #DEBUG_VALUE: storage:this <- undef + .loc 4 18 12 prologue_end # /opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp:18:12 + mov byte ptr [rsp + 32], 0 + mov qword ptr [rsp + 24], 0 +.Ltmp4: + .file 40 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp" + .loc 40 64 55 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:64:55 + mov qword ptr [rsp + 40], offset .L.str +.Ltmp5: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:begin <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:begin <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::star<ctre::any>, ctre::assert_end, ctre::end_mark, ctre::accept>:begin <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::character<'h'>, ctre::sequence<ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept, void>:current <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::character<'h'>, ctre::sequence<ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept, void>:begin <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::character<'h'>, ctre::star<ctre::any> , ctre::assert_end, ctre::end_mark, ctre::accept>:current <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::character<'h'>, ctre::star<ctre::any> , ctre::assert_end, ctre::end_mark, ctre::accept>:begin <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept>:captures <- [DW_OP_LLVM_fragment 0 64] undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept>:current <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept>:begin <- undef + #DEBUG_VALUE: match_re<const char *, const char *, ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> > >:begin <- undef + #DEBUG_VALUE: match<const char *>:begin <- undef + mov rax, qword ptr [rsp + 24] + mov qword ptr [rsp + 48], rax + mov al, byte ptr [rsp + 32] + mov byte ptr [rsp + 56], al + mov eax, dword ptr [rsp + 33] + mov dword ptr [rsp + 57], eax + movzx eax, word ptr [rsp + 37] + mov word ptr [rsp + 61], ax + mov al, byte ptr [rsp + 39] + mov byte ptr [rsp + 63], al +.Ltmp0: +.Ltmp6: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:i <- 0 + .loc 40 267 9 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:267:9 + mov rax, qword ptr [rsp + 56] + mov qword ptr [rsp + 16], rax + movups xmm0, xmmword ptr [rsp + 40] + movups xmmword ptr [rsp], xmm0 + lea rdi, [rsp + 64] +.Ltmp7: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:end <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:end <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::star<ctre::any>, ctre::assert_end, ctre::end_mark, ctre::accept>:end <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::character<'h'>, ctre::sequence<ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept, void>:end <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::character<'h'>, ctre::star<ctre::any> , ctre::assert_end, ctre::end_mark, ctre::accept>:end <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept>:end <- undef + #DEBUG_VALUE: match_re<const char *, const char *, ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> > >:end <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:current <- undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:current <- undef + xor esi, esi + mov edx, offset .L.str +.Ltmp8: + #DEBUG_VALUE: match:sv <- [DW_OP_LLVM_fragment 64 64] $rdx + mov ecx, offset .L.str+1 +.Ltmp9: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::star<ctre::any>, ctre::assert_end, ctre::end_mark, ctre::accept>:current <- $rcx + mov r8d, offset .L.str+5 +.Ltmp10: + #DEBUG_VALUE: match<const char *>:end <- $r8 + call _ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE +.Ltmp11: +.Ltmp1: +# %bb.1: + .loc 3 11 1 # /tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/example.cpp:11:1 + add rsp, 88 + .cfi_def_cfa_offset 8 + ret +.LBB0_2: + .cfi_def_cfa_offset 96 +.Ltmp2: +.Ltmp12: + .loc 40 298 9 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:298:9 + mov rdi, rax + call __clang_call_terminate +.Ltmp13: +.Lfunc_end0: + .size _Z6myfuncv, .Lfunc_end0-_Z6myfuncv + .cfi_endproc + .file 41 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/string_view" + .file 42 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/gcc-8.2.0/lib/gcc/x86_64-linux-gnu/8.2.0/../../../../include/c++/8.2.0/bits/char_traits.h" + .file 43 "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" "/opt/compiler-explorer/libs/ctre/master/include/ctll/list.hpp" + .section .gcc_except_table,"a",@progbits + .p2align 2 +GCC_except_table0: +.Lexception0: + .byte 255 # @LPStart Encoding = omit + .byte 3 # @TType Encoding = udata4 + .uleb128 .Lttbase0-.Lttbaseref0 +.Lttbaseref0: + .byte 1 # Call site Encoding = uleb128 + .uleb128 .Lcst_end0-.Lcst_begin0 +.Lcst_begin0: + .uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 1 << + .uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1 + .uleb128 .Ltmp2-.Lfunc_begin0 # jumps to .Ltmp2 + .byte 1 # On action: 1 +.Lcst_end0: + .byte 1 # >> Action Record 1 << + # Catch TypeInfo 1 + .byte 0 # No further actions + .p2align 2 + # >> Catch TypeInfos << + .long 0 # TypeInfo 1 +.Lttbase0: + .p2align 2 + # -- End function + .section .text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat + .hidden __clang_call_terminate # -- Begin function __clang_call_terminate + .weak __clang_call_terminate + .p2align 4, 0x90 + .type __clang_call_terminate,@function +__clang_call_terminate: # @__clang_call_terminate +.Lfunc_begin1: + .cfi_startproc +# %bb.0: + push rax + .cfi_def_cfa_offset 16 + call __cxa_begin_catch + call _ZSt9terminatev +.Lfunc_end1: + .size __clang_call_terminate, .Lfunc_end1-__clang_call_terminate + .cfi_endproc + # -- End function + .section .text._ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE,"axG",@progbits,_ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE,comdat + .weak _ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE # -- Begin function _ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE + .p2align 4, 0x90 + .type _ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE,@function +_ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE: # @_ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE +.Lfunc_begin2: + .loc 40 235 0 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:235:0 + .cfi_startproc +# %bb.0: + push rbx + .cfi_def_cfa_offset 16 + sub rsp, 80 + .cfi_def_cfa_offset 96 + .cfi_offset rbx, -16 + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:i <- $rsi + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:begin <- $rdx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:current <- $rcx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:end <- $r8 +.Ltmp14: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:begin <- $rdx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:current <- $rcx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:begin <- $rdx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:current <- $rcx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>: <- $rdx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>: <- $rdx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>: <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>: <- $r8 + #DEBUG_VALUE: operator bool:this <- $rdi + #DEBUG_VALUE: operator bool:this <- $rdi + #DEBUG_VALUE: regex_results:this <- $rdi + #DEBUG_VALUE: captures:this <- $rdi + #DEBUG_VALUE: storage:this <- $rdi + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::end_mark, ctre::accept>:captures <- [DW_OP_plus_uconst 96, DW_OP_plus_uconst 16, DW_OP_deref, DW_OP_stack_value, DW_OP_LLVM_fragment 128 64] [$rsp+0] + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::end_mark, ctre::accept>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::end_mark, ctre::accept>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::accept>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::accept>:end <- $r8 + mov rbx, rdi +.Ltmp15: + #DEBUG_VALUE: rec_result <- [$rbx+0] + #DEBUG_VALUE: storage:this <- $rbx + #DEBUG_VALUE: captures:this <- $rbx + #DEBUG_VALUE: regex_results:this <- $rbx + #DEBUG_VALUE: operator bool:this <- $rbx + #DEBUG_VALUE: operator bool:this <- $rbx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:end <- $r8 + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:current <- $rcx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:begin <- $rdx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:i <- $rsi + .loc 40 241 57 prologue_end # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:241:57 + mov rdi, qword ptr [rsp + 96] +.Ltmp16: + #DEBUG_VALUE: inner_result <- [DW_OP_deref] undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:captures <- [DW_OP_LLVM_fragment 0 64] $rdi + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:captures <- [DW_OP_LLVM_fragment 0 64] $rdi + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::end_mark, ctre::accept>:captures <- [DW_OP_LLVM_fragment 0 64] $rdi + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:current <- $rcx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:begin <- $rdx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:current <- $rcx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:begin <- $rdx + .loc 40 64 55 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:64:55 + movups xmm0, xmmword ptr [rsp + 104] + movaps xmmword ptr [rsp + 64], xmm0 +.Ltmp17: + .loc 40 65 10 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:65:10 + cmp r8, rcx +.Ltmp18: + .loc 40 65 6 is_stmt 0 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:65:6 + je .LBB2_3 +.Ltmp19: +# %bb.1: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:captures <- [DW_OP_LLVM_fragment 0 64] $rdi + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:captures <- [DW_OP_LLVM_fragment 0 64] $rdi + #DEBUG_VALUE: operator bool:this <- $rbx + #DEBUG_VALUE: operator bool:this <- $rbx + #DEBUG_VALUE: rec_result <- [$rbx+0] + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>: <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>: <- $rdx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:current <- $rcx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>:begin <- $rdx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:current <- $rcx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>:begin <- $rdx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:end <- $r8 + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:current <- $rcx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:begin <- $rdx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:i <- $rsi + .loc 40 67 32 is_stmt 1 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:67:32 + add rcx, 1 +.Ltmp20: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>:captures <- [DW_OP_LLVM_fragment 128 8] 1 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>:captures <- [DW_OP_plus_uconst 16, DW_OP_deref, DW_OP_stack_value, DW_OP_LLVM_fragment 128 8] undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>:captures <- [DW_OP_plus_uconst 8, DW_OP_deref, DW_OP_stack_value, DW_OP_LLVM_fragment 64 64] undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>:captures <- [DW_OP_deref, DW_OP_LLVM_fragment 0 64] undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>:captures <- [DW_OP_LLVM_fragment 64 64] $rcx + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>:current <- $rcx + .loc 40 57 9 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:57:9 + mov al, byte ptr [rsp + 79] + mov byte ptr [rsp + 38], al + movzx eax, word ptr [rsp + 77] + mov word ptr [rsp + 36], ax + mov eax, dword ptr [rsp + 73] + mov dword ptr [rsp + 32], eax +.Ltmp21: + #DEBUG_VALUE: operator bool:this <- undef + #DEBUG_VALUE: operator bool:this <- undef + #DEBUG_VALUE: inner_result <- [DW_OP_deref] undef + .loc 40 246 46 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:246:46 + add rsi, 1 +.Ltmp22: + .loc 40 246 95 is_stmt 0 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:246:95 + mov qword ptr [rsp + 40], rdi + mov qword ptr [rsp + 48], rcx + mov byte ptr [rsp + 56], 0 + mov eax, dword ptr [rsp + 32] + mov dword ptr [rsp + 57], eax + movzx eax, word ptr [rsp + 36] + mov word ptr [rsp + 61], ax + mov al, byte ptr [rsp + 38] + mov byte ptr [rsp + 63], al + .loc 40 246 26 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:246:26 + mov rax, qword ptr [rsp + 56] + mov qword ptr [rsp + 16], rax + movups xmm0, xmmword ptr [rsp + 40] + movups xmmword ptr [rsp], xmm0 + mov rdi, rbx +.Ltmp23: + call _ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE +.Ltmp24: + .loc 4 54 11 is_stmt 1 # /opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp:54:11 + cmp byte ptr [rbx + 16], 0 +.Ltmp25: + .loc 40 246 13 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:246:13 + je .LBB2_2 +.Ltmp26: +# %bb.4: + .loc 40 252 1 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:252:1 + mov rax, rbx + add rsp, 80 + .cfi_def_cfa_offset 16 + pop rbx + .cfi_def_cfa_offset 8 + ret +.LBB2_3: + .cfi_def_cfa_offset 96 +.Ltmp27: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::end_mark, ctre::accept>:captures <- [DW_OP_LLVM_fragment 0 64] $rdi + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::accept>:end <- $r8 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::end_mark, ctre::accept>:end <- $r8 + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:end <- $r8 + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:current <- $rcx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:begin <- $rdx + #DEBUG_VALUE: evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>:i <- $rsi + .loc 40 0 1 is_stmt 0 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:0:1 + lea rax, [rsp + 96] +.Ltmp28: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::accept>:captures <- [DW_OP_plus_uconst 8, DW_OP_deref, DW_OP_stack_value, DW_OP_LLVM_fragment 64 64] undef + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::accept>:captures <- [DW_OP_deref, DW_OP_LLVM_fragment 0 64] undef + #DEBUG_VALUE: operator bool:this <- undef + #DEBUG_VALUE: operator bool:this <- undef + #DEBUG_VALUE: inner_result <- [DW_OP_deref] undef + .loc 40 251 39 is_stmt 1 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:251:39 + mov rax, qword ptr [rax + 16] +.Ltmp29: + .loc 40 38 54 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:38:54 + mov qword ptr [rbx], rdi + mov qword ptr [rbx + 8], r8 +.Ltmp30: + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>:captures <- [DW_OP_LLVM_fragment 128 8] 1 + #DEBUG_VALUE: evaluate<ctre::regex_results<const char *>, const char *, const char *>:captures <- [DW_OP_plus_uconst 16, DW_OP_deref, DW_OP_stack_value, DW_OP_LLVM_fragment 128 8] undef + .loc 40 39 9 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:39:9 + mov byte ptr [rbx + 16], 1 + mov rcx, rax +.Ltmp31: + shr rcx, 8 + mov rdx, rax +.Ltmp32: + shr rdx, 56 + mov byte ptr [rbx + 23], dl + shr rax, 40 + mov word ptr [rbx + 21], ax + mov dword ptr [rbx + 17], ecx +.Ltmp33: + .loc 40 252 1 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:252:1 + mov rax, rbx + add rsp, 80 + .cfi_def_cfa_offset 16 + pop rbx + .cfi_def_cfa_offset 8 + ret +.Ltmp34: +.LBB2_2: + .cfi_def_cfa_offset 96 + .loc 4 18 12 # /opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp:18:12 + xorps xmm0, xmm0 + movups xmmword ptr [rbx], xmm0 + mov byte ptr [rbx + 16], 0 +.Ltmp35: + .loc 40 252 1 # /opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp:252:1 + mov rax, rbx + add rsp, 80 + .cfi_def_cfa_offset 16 + pop rbx + .cfi_def_cfa_offset 8 + ret +.Ltmp36: +.Lfunc_end2: + .size _ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE, .Lfunc_end2-_ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE + .cfi_endproc + # -- End function + .type .L.str,@object # @.str + .section .rodata.str1.1,"aMS",@progbits,1 +.L.str: + .asciz "hello" + .size .L.str, 6 + + .section .debug_str,"MS",@progbits,1 +.Linfo_string0: + .asciz "clang version 8.0.0 (trunk 344434)" # string offset=0 +.Linfo_string1: + .asciz "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/example.cpp" # string offset=35 +.Linfo_string2: + .asciz "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e" # string offset=104 +.Linfo_string3: + .asciz "pattern" # string offset=161 +.Linfo_string4: + .asciz "ctll" # string offset=169 +.Linfo_string5: + .asciz "content" # string offset=174 +.Linfo_string6: + .asciz "char" # string offset=182 +.Linfo_string7: + .asciz "__ARRAY_SIZE_TYPE__" # string offset=187 +.Linfo_string8: + .asciz "basic_fixed_string" # string offset=207 +.Linfo_string9: + .asciz "_ZNK4ctll18basic_fixed_stringIcLm4EE4sizeEv" # string offset=226 +.Linfo_string10: + .asciz "size" # string offset=270 +.Linfo_string11: + .asciz "long unsigned int" # string offset=275 +.Linfo_string12: + .asciz "size_t" # string offset=293 +.Linfo_string13: + .asciz "_ZNK4ctll18basic_fixed_stringIcLm4EEixEm" # string offset=300 +.Linfo_string14: + .asciz "operator[]" # string offset=341 +.Linfo_string15: + .asciz "_ZNK4ctll18basic_fixed_stringIcLm4EE5beginEv" # string offset=352 +.Linfo_string16: + .asciz "begin" # string offset=397 +.Linfo_string17: + .asciz "_ZNK4ctll18basic_fixed_stringIcLm4EE3endEv" # string offset=403 +.Linfo_string18: + .asciz "end" # string offset=446 +.Linfo_string19: + .asciz "CharT" # string offset=450 +.Linfo_string20: + .asciz "N" # string offset=456 +.Linfo_string21: + .asciz "basic_fixed_string<char, 4>" # string offset=458 +.Linfo_string22: + .asciz "_ZL7pattern" # string offset=486 +.Linfo_string23: + .asciz "ctre" # string offset=498 +.Linfo_string24: + .asciz "not_matched" # string offset=503 +.Linfo_string25: + .asciz "not_matched_tag_t" # string offset=515 +.Linfo_string26: + .asciz "_ZN4ctreL11not_matchedE" # string offset=533 +.Linfo_string27: + .asciz "regular_expression" # string offset=557 +.Linfo_string28: + .asciz "Content" # string offset=576 +.Linfo_string29: + .asciz "V" # string offset=584 +.Linfo_string30: + .asciz "character<'h'>" # string offset=586 +.Linfo_string31: + .asciz "any" # string offset=601 +.Linfo_string32: + .asciz "star<ctre::any>" # string offset=605 +.Linfo_string33: + .asciz "sequence<ctre::character<'h'>, ctre::star<ctre::any> >" # string offset=621 +.Linfo_string34: + .asciz "RE" # string offset=676 +.Linfo_string35: + .asciz "regular_expression<ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> > >" # string offset=679 +.Linfo_string36: + .asciz "bool" # string offset=761 +.Linfo_string37: + .asciz "std" # string offset=766 +.Linfo_string38: + .asciz "max_align_t" # string offset=770 +.Linfo_string39: + .asciz "signed char" # string offset=782 +.Linfo_string40: + .asciz "__int8_t" # string offset=794 +.Linfo_string41: + .asciz "int8_t" # string offset=803 +.Linfo_string42: + .asciz "short" # string offset=810 +.Linfo_string43: + .asciz "__int16_t" # string offset=816 +.Linfo_string44: + .asciz "int16_t" # string offset=826 +.Linfo_string45: + .asciz "int" # string offset=834 +.Linfo_string46: + .asciz "__int32_t" # string offset=838 +.Linfo_string47: + .asciz "int32_t" # string offset=848 +.Linfo_string48: + .asciz "long int" # string offset=856 +.Linfo_string49: + .asciz "__int64_t" # string offset=865 +.Linfo_string50: + .asciz "int64_t" # string offset=875 +.Linfo_string51: + .asciz "int_fast8_t" # string offset=883 +.Linfo_string52: + .asciz "int_fast16_t" # string offset=895 +.Linfo_string53: + .asciz "int_fast32_t" # string offset=908 +.Linfo_string54: + .asciz "int_fast64_t" # string offset=921 +.Linfo_string55: + .asciz "int_least8_t" # string offset=934 +.Linfo_string56: + .asciz "int_least16_t" # string offset=947 +.Linfo_string57: + .asciz "int_least32_t" # string offset=961 +.Linfo_string58: + .asciz "int_least64_t" # string offset=975 +.Linfo_string59: + .asciz "__intmax_t" # string offset=989 +.Linfo_string60: + .asciz "intmax_t" # string offset=1000 +.Linfo_string61: + .asciz "intptr_t" # string offset=1009 +.Linfo_string62: + .asciz "unsigned char" # string offset=1018 +.Linfo_string63: + .asciz "__uint8_t" # string offset=1032 +.Linfo_string64: + .asciz "uint8_t" # string offset=1042 +.Linfo_string65: + .asciz "unsigned short" # string offset=1050 +.Linfo_string66: + .asciz "__uint16_t" # string offset=1065 +.Linfo_string67: + .asciz "uint16_t" # string offset=1076 +.Linfo_string68: + .asciz "unsigned int" # string offset=1085 +.Linfo_string69: + .asciz "__uint32_t" # string offset=1098 +.Linfo_string70: + .asciz "uint32_t" # string offset=1109 +.Linfo_string71: + .asciz "__uint64_t" # string offset=1118 +.Linfo_string72: + .asciz "uint64_t" # string offset=1129 +.Linfo_string73: + .asciz "uint_fast8_t" # string offset=1138 +.Linfo_string74: + .asciz "uint_fast16_t" # string offset=1151 +.Linfo_string75: + .asciz "uint_fast32_t" # string offset=1165 +.Linfo_string76: + .asciz "uint_fast64_t" # string offset=1179 +.Linfo_string77: + .asciz "uint_least8_t" # string offset=1193 +.Linfo_string78: + .asciz "uint_least16_t" # string offset=1207 +.Linfo_string79: + .asciz "uint_least32_t" # string offset=1222 +.Linfo_string80: + .asciz "uint_least64_t" # string offset=1237 +.Linfo_string81: + .asciz "__uintmax_t" # string offset=1252 +.Linfo_string82: + .asciz "uintmax_t" # string offset=1264 +.Linfo_string83: + .asciz "uintptr_t" # string offset=1274 +.Linfo_string84: + .asciz "__exception_ptr" # string offset=1284 +.Linfo_string85: + .asciz "_M_exception_object" # string offset=1300 +.Linfo_string86: + .asciz "exception_ptr" # string offset=1320 +.Linfo_string87: + .asciz "_ZNSt15__exception_ptr13exception_ptr9_M_addrefEv" # string offset=1334 +.Linfo_string88: + .asciz "_M_addref" # string offset=1384 +.Linfo_string89: + .asciz "_ZNSt15__exception_ptr13exception_ptr10_M_releaseEv" # string offset=1394 +.Linfo_string90: + .asciz "_M_release" # string offset=1446 +.Linfo_string91: + .asciz "_ZNKSt15__exception_ptr13exception_ptr6_M_getEv" # string offset=1457 +.Linfo_string92: + .asciz "_M_get" # string offset=1505 +.Linfo_string93: + .asciz "decltype(nullptr)" # string offset=1512 +.Linfo_string94: + .asciz "nullptr_t" # string offset=1530 +.Linfo_string95: + .asciz "_ZNSt15__exception_ptr13exception_ptraSERKS0_" # string offset=1540 +.Linfo_string96: + .asciz "operator=" # string offset=1586 +.Linfo_string97: + .asciz "_ZNSt15__exception_ptr13exception_ptraSEOS0_" # string offset=1596 +.Linfo_string98: + .asciz "~exception_ptr" # string offset=1641 +.Linfo_string99: + .asciz "_ZNSt15__exception_ptr13exception_ptr4swapERS0_" # string offset=1656 +.Linfo_string100: + .asciz "swap" # string offset=1704 +.Linfo_string101: + .asciz "_ZNKSt15__exception_ptr13exception_ptrcvbEv" # string offset=1709 +.Linfo_string102: + .asciz "operator bool" # string offset=1753 +.Linfo_string103: + .asciz "_ZNKSt15__exception_ptr13exception_ptr20__cxa_exception_typeEv" # string offset=1767 +.Linfo_string104: + .asciz "__cxa_exception_type" # string offset=1830 +.Linfo_string105: + .asciz "type_info" # string offset=1851 +.Linfo_string106: + .asciz "_ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE" # string offset=1861 +.Linfo_string107: + .asciz "rethrow_exception" # string offset=1921 +.Linfo_string108: + .asciz "__gnu_debug" # string offset=1939 +.Linfo_string109: + .asciz "__debug" # string offset=1951 +.Linfo_string110: + .asciz "__count" # string offset=1959 +.Linfo_string111: + .asciz "__value" # string offset=1967 +.Linfo_string112: + .asciz "__wch" # string offset=1975 +.Linfo_string113: + .asciz "__wchb" # string offset=1981 +.Linfo_string114: + .asciz "__mbstate_t" # string offset=1988 +.Linfo_string115: + .asciz "mbstate_t" # string offset=2000 +.Linfo_string116: + .asciz "wint_t" # string offset=2010 +.Linfo_string117: + .asciz "btowc" # string offset=2017 +.Linfo_string118: + .asciz "fgetwc" # string offset=2023 +.Linfo_string119: + .asciz "_flags" # string offset=2030 +.Linfo_string120: + .asciz "_IO_read_ptr" # string offset=2037 +.Linfo_string121: + .asciz "_IO_read_end" # string offset=2050 +.Linfo_string122: + .asciz "_IO_read_base" # string offset=2063 +.Linfo_string123: + .asciz "_IO_write_base" # string offset=2077 +.Linfo_string124: + .asciz "_IO_write_ptr" # string offset=2092 +.Linfo_string125: + .asciz "_IO_write_end" # string offset=2106 +.Linfo_string126: + .asciz "_IO_buf_base" # string offset=2120 +.Linfo_string127: + .asciz "_IO_buf_end" # string offset=2133 +.Linfo_string128: + .asciz "_IO_save_base" # string offset=2145 +.Linfo_string129: + .asciz "_IO_backup_base" # string offset=2159 +.Linfo_string130: + .asciz "_IO_save_end" # string offset=2175 +.Linfo_string131: + .asciz "_markers" # string offset=2188 +.Linfo_string132: + .asciz "_IO_marker" # string offset=2197 +.Linfo_string133: + .asciz "_chain" # string offset=2208 +.Linfo_string134: + .asciz "_fileno" # string offset=2215 +.Linfo_string135: + .asciz "_flags2" # string offset=2223 +.Linfo_string136: + .asciz "_old_offset" # string offset=2231 +.Linfo_string137: + .asciz "__off_t" # string offset=2243 +.Linfo_string138: + .asciz "_cur_column" # string offset=2251 +.Linfo_string139: + .asciz "_vtable_offset" # string offset=2263 +.Linfo_string140: + .asciz "_shortbuf" # string offset=2278 +.Linfo_string141: + .asciz "_lock" # string offset=2288 +.Linfo_string142: + .asciz "_IO_lock_t" # string offset=2294 +.Linfo_string143: + .asciz "_offset" # string offset=2305 +.Linfo_string144: + .asciz "__off64_t" # string offset=2313 +.Linfo_string145: + .asciz "__pad1" # string offset=2323 +.Linfo_string146: + .asciz "__pad2" # string offset=2330 +.Linfo_string147: + .asciz "__pad3" # string offset=2337 +.Linfo_string148: + .asciz "__pad4" # string offset=2344 +.Linfo_string149: + .asciz "__pad5" # string offset=2351 +.Linfo_string150: + .asciz "_mode" # string offset=2358 +.Linfo_string151: + .asciz "_unused2" # string offset=2364 +.Linfo_string152: + .asciz "_IO_FILE" # string offset=2373 +.Linfo_string153: + .asciz "__FILE" # string offset=2382 +.Linfo_string154: + .asciz "fgetws" # string offset=2389 +.Linfo_string155: + .asciz "wchar_t" # string offset=2396 +.Linfo_string156: + .asciz "fputwc" # string offset=2404 +.Linfo_string157: + .asciz "fputws" # string offset=2411 +.Linfo_string158: + .asciz "fwide" # string offset=2418 +.Linfo_string159: + .asciz "fwprintf" # string offset=2424 +.Linfo_string160: + .asciz "fwscanf" # string offset=2433 +.Linfo_string161: + .asciz "getwc" # string offset=2441 +.Linfo_string162: + .asciz "getwchar" # string offset=2447 +.Linfo_string163: + .asciz "mbrlen" # string offset=2456 +.Linfo_string164: + .asciz "mbrtowc" # string offset=2463 +.Linfo_string165: + .asciz "mbsinit" # string offset=2471 +.Linfo_string166: + .asciz "mbsrtowcs" # string offset=2479 +.Linfo_string167: + .asciz "putwc" # string offset=2489 +.Linfo_string168: + .asciz "putwchar" # string offset=2495 +.Linfo_string169: + .asciz "swprintf" # string offset=2504 +.Linfo_string170: + .asciz "swscanf" # string offset=2513 +.Linfo_string171: + .asciz "ungetwc" # string offset=2521 +.Linfo_string172: + .asciz "vfwprintf" # string offset=2529 +.Linfo_string173: + .asciz "gp_offset" # string offset=2539 +.Linfo_string174: + .asciz "fp_offset" # string offset=2549 +.Linfo_string175: + .asciz "overflow_arg_area" # string offset=2559 +.Linfo_string176: + .asciz "reg_save_area" # string offset=2577 +.Linfo_string177: + .asciz "__va_list_tag" # string offset=2591 +.Linfo_string178: + .asciz "vfwscanf" # string offset=2605 +.Linfo_string179: + .asciz "vswprintf" # string offset=2614 +.Linfo_string180: + .asciz "vswscanf" # string offset=2624 +.Linfo_string181: + .asciz "vwprintf" # string offset=2633 +.Linfo_string182: + .asciz "vwscanf" # string offset=2642 +.Linfo_string183: + .asciz "wcrtomb" # string offset=2650 +.Linfo_string184: + .asciz "wcscat" # string offset=2658 +.Linfo_string185: + .asciz "wcscmp" # string offset=2665 +.Linfo_string186: + .asciz "wcscoll" # string offset=2672 +.Linfo_string187: + .asciz "wcscpy" # string offset=2680 +.Linfo_string188: + .asciz "wcscspn" # string offset=2687 +.Linfo_string189: + .asciz "wcsftime" # string offset=2695 +.Linfo_string190: + .asciz "tm" # string offset=2704 +.Linfo_string191: + .asciz "wcslen" # string offset=2707 +.Linfo_string192: + .asciz "wcsncat" # string offset=2714 +.Linfo_string193: + .asciz "wcsncmp" # string offset=2722 +.Linfo_string194: + .asciz "wcsncpy" # string offset=2730 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"ldiv" # string offset=3275 +.Linfo_string263: + .asciz "malloc" # string offset=3280 +.Linfo_string264: + .asciz "mblen" # string offset=3287 +.Linfo_string265: + .asciz "mbstowcs" # string offset=3293 +.Linfo_string266: + .asciz "mbtowc" # string offset=3302 +.Linfo_string267: + .asciz "qsort" # string offset=3309 +.Linfo_string268: + .asciz "quick_exit" # string offset=3315 +.Linfo_string269: + .asciz "rand" # string offset=3326 +.Linfo_string270: + .asciz "realloc" # string offset=3331 +.Linfo_string271: + .asciz "srand" # string offset=3339 +.Linfo_string272: + .asciz "strtod" # string offset=3345 +.Linfo_string273: + .asciz "strtol" # string offset=3352 +.Linfo_string274: + .asciz "strtoul" # string offset=3359 +.Linfo_string275: + .asciz "system" # string offset=3367 +.Linfo_string276: + .asciz "wcstombs" # string offset=3374 +.Linfo_string277: + .asciz "wctomb" # string offset=3383 +.Linfo_string278: + .asciz "lldiv_t" # string offset=3390 +.Linfo_string279: + .asciz "_Exit" # string offset=3398 +.Linfo_string280: + .asciz "llabs" # string offset=3404 +.Linfo_string281: + .asciz "lldiv" # string offset=3410 +.Linfo_string282: + .asciz "atoll" # string offset=3416 +.Linfo_string283: + .asciz "strtoll" # string offset=3422 +.Linfo_string284: + .asciz "strtoull" # string offset=3430 +.Linfo_string285: + .asciz "strtof" # string offset=3439 +.Linfo_string286: + .asciz "strtold" # string offset=3446 +.Linfo_string287: + .asciz "_ZN9__gnu_cxx3divExx" # string offset=3454 +.Linfo_string288: + .asciz "FILE" # string offset=3475 +.Linfo_string289: + .asciz "_G_fpos_t" # string offset=3480 +.Linfo_string290: + .asciz "fpos_t" # string offset=3490 +.Linfo_string291: + .asciz "clearerr" # string offset=3497 +.Linfo_string292: + .asciz "fclose" # string offset=3506 +.Linfo_string293: + .asciz "feof" # string offset=3513 +.Linfo_string294: + .asciz "ferror" # string offset=3518 +.Linfo_string295: + .asciz "fflush" # string offset=3525 +.Linfo_string296: + .asciz "fgetc" # string offset=3532 +.Linfo_string297: + .asciz "fgetpos" # string offset=3538 +.Linfo_string298: + .asciz "fgets" # string offset=3546 +.Linfo_string299: + .asciz "fopen" # string offset=3552 +.Linfo_string300: + .asciz "fprintf" # string offset=3558 +.Linfo_string301: + .asciz "fputc" # string offset=3566 +.Linfo_string302: + .asciz "fputs" # string offset=3572 +.Linfo_string303: + .asciz "fread" # string offset=3578 +.Linfo_string304: + .asciz "freopen" # string offset=3584 +.Linfo_string305: + .asciz "fscanf" # string offset=3592 +.Linfo_string306: + .asciz "fseek" # string offset=3599 +.Linfo_string307: + .asciz "fsetpos" # string offset=3605 +.Linfo_string308: + .asciz "ftell" # string offset=3613 +.Linfo_string309: + .asciz "fwrite" # string offset=3619 +.Linfo_string310: + .asciz "getc" # string offset=3626 +.Linfo_string311: + .asciz "getchar" # string offset=3631 +.Linfo_string312: + .asciz "perror" # string offset=3639 +.Linfo_string313: + .asciz "printf" # string offset=3646 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+.Linfo_string346: + .asciz "unmatch" # string offset=4003 +.Linfo_string347: + .asciz "_ZN4ctre16captured_contentILm0EvE7storageIPKcE9set_startES4_" # string offset=4011 +.Linfo_string348: + .asciz "set_start" # string offset=4072 +.Linfo_string349: + .asciz "_ZN4ctre16captured_contentILm0EvE7storageIPKcE7set_endES4_" # string offset=4082 +.Linfo_string350: + .asciz "set_end" # string offset=4141 +.Linfo_string351: + .asciz "_ZNK4ctre16captured_contentILm0EvE7storageIPKcE7get_endEv" # string offset=4149 +.Linfo_string352: + .asciz "get_end" # string offset=4207 +.Linfo_string353: + .asciz "_ZNK4ctre16captured_contentILm0EvE7storageIPKcEcvbEv" # string offset=4215 +.Linfo_string354: + .asciz "_ZNK4ctre16captured_contentILm0EvE7storageIPKcEcvSt17basic_string_viewIcSt11char_traitsIcEEEv" # string offset=4268 +.Linfo_string355: + .asciz "operator basic_string_view" # string offset=4362 +.Linfo_string356: + .asciz "npos" # string offset=4389 +.Linfo_string357: + .asciz "size_type" # string offset=4394 +.Linfo_string358: + .asciz "_M_len" # string offset=4404 +.Linfo_string359: + .asciz "_M_str" # string offset=4411 +.Linfo_string360: + .asciz "basic_string_view" # string offset=4418 +.Linfo_string361: + .asciz "_ZNSt17basic_string_viewIcSt11char_traitsIcEEaSERKS2_" # string offset=4436 +.Linfo_string362: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE5beginEv" # string offset=4490 +.Linfo_string363: + .asciz "const_iterator" # string offset=4545 +.Linfo_string364: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE3endEv" # string offset=4560 +.Linfo_string365: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE6cbeginEv" # string offset=4613 +.Linfo_string366: + .asciz "cbegin" # string offset=4669 +.Linfo_string367: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE4cendEv" # string offset=4676 +.Linfo_string368: + .asciz "cend" # string offset=4730 +.Linfo_string369: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE6rbeginEv" # string offset=4735 +.Linfo_string370: + .asciz "rbegin" # string offset=4791 +.Linfo_string371: + .asciz "reverse_iterator<const char *>" # string offset=4798 +.Linfo_string372: + .asciz "const_reverse_iterator" # string offset=4829 +.Linfo_string373: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE4rendEv" # string offset=4852 +.Linfo_string374: + .asciz "rend" # string offset=4906 +.Linfo_string375: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE7crbeginEv" # string offset=4911 +.Linfo_string376: + .asciz "crbegin" # string offset=4968 +.Linfo_string377: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE5crendEv" # string offset=4976 +.Linfo_string378: + .asciz "crend" # string offset=5031 +.Linfo_string379: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE4sizeEv" # string offset=5037 +.Linfo_string380: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE6lengthEv" # string offset=5091 +.Linfo_string381: + .asciz "length" # string offset=5147 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string offset=5508 +.Linfo_string394: + .asciz "data" # string offset=5562 +.Linfo_string395: + .asciz "_ZNSt17basic_string_viewIcSt11char_traitsIcEE13remove_prefixEm" # string offset=5567 +.Linfo_string396: + .asciz "remove_prefix" # string offset=5630 +.Linfo_string397: + .asciz "_ZNSt17basic_string_viewIcSt11char_traitsIcEE13remove_suffixEm" # string offset=5644 +.Linfo_string398: + .asciz "remove_suffix" # string offset=5707 +.Linfo_string399: + .asciz "_ZNSt17basic_string_viewIcSt11char_traitsIcEE4swapERS2_" # string offset=5721 +.Linfo_string400: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE4copyEPcmm" # string offset=5777 +.Linfo_string401: + .asciz "copy" # string offset=5834 +.Linfo_string402: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE6substrEmm" # string offset=5839 +.Linfo_string403: + .asciz "substr" # string offset=5896 +.Linfo_string404: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE7compareES2_" # string offset=5903 +.Linfo_string405: + .asciz "compare" # string offset=5962 +.Linfo_string406: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE7compareEmmS2_" # string offset=5970 +.Linfo_string407: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE7compareEmmS2_mm" # string offset=6031 +.Linfo_string408: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE7compareEPKc" # string offset=6094 +.Linfo_string409: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE7compareEmmPKc" # string offset=6153 +.Linfo_string410: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE7compareEmmPKcm" # string offset=6214 +.Linfo_string411: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE4findES2_m" # string offset=6276 +.Linfo_string412: + .asciz "find" # string offset=6333 +.Linfo_string413: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE4findEcm" # string offset=6338 +.Linfo_string414: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE4findEPKcmm" # string offset=6393 +.Linfo_string415: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE4findEPKcm" # string offset=6451 +.Linfo_string416: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE5rfindES2_m" # string offset=6508 +.Linfo_string417: + .asciz "rfind" # string offset=6566 +.Linfo_string418: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE5rfindEcm" # string offset=6572 +.Linfo_string419: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE5rfindEPKcmm" # string offset=6628 +.Linfo_string420: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE5rfindEPKcm" # string offset=6687 +.Linfo_string421: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE13find_first_ofES2_m" # string offset=6745 +.Linfo_string422: + .asciz "find_first_of" # string offset=6812 +.Linfo_string423: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE13find_first_ofEcm" # string offset=6826 +.Linfo_string424: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE13find_first_ofEPKcmm" # string offset=6891 +.Linfo_string425: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE13find_first_ofEPKcm" # string offset=6959 +.Linfo_string426: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE12find_last_ofES2_m" # string offset=7026 +.Linfo_string427: + .asciz "find_last_of" # string offset=7092 +.Linfo_string428: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE12find_last_ofEcm" # string offset=7105 +.Linfo_string429: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE12find_last_ofEPKcmm" # string offset=7169 +.Linfo_string430: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE12find_last_ofEPKcm" # string offset=7236 +.Linfo_string431: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE17find_first_not_ofES2_m" # string offset=7302 +.Linfo_string432: + .asciz "find_first_not_of" # string offset=7373 +.Linfo_string433: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE17find_first_not_ofEcm" # string offset=7391 +.Linfo_string434: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE17find_first_not_ofEPKcmm" # string offset=7460 +.Linfo_string435: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE17find_first_not_ofEPKcm" # string offset=7532 +.Linfo_string436: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE16find_last_not_ofES2_m" # string offset=7603 +.Linfo_string437: + .asciz "find_last_not_of" # string offset=7673 +.Linfo_string438: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE16find_last_not_ofEcm" # string offset=7690 +.Linfo_string439: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE16find_last_not_ofEPKcmm" # string offset=7758 +.Linfo_string440: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE16find_last_not_ofEPKcm" # string offset=7829 +.Linfo_string441: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE8_M_checkEmPKc" # string offset=7899 +.Linfo_string442: + .asciz "_M_check" # string offset=7960 +.Linfo_string443: + .asciz "_ZNKSt17basic_string_viewIcSt11char_traitsIcEE8_M_limitEmm" # string offset=7969 +.Linfo_string444: + .asciz "_M_limit" # string offset=8028 +.Linfo_string445: + .asciz "_ZNSt17basic_string_viewIcSt11char_traitsIcEE10_S_compareEmm" # string offset=8037 +.Linfo_string446: + .asciz "_S_compare" # string offset=8098 +.Linfo_string447: + .asciz "_CharT" # string offset=8109 +.Linfo_string448: + .asciz "_ZNSt11char_traitsIcE6assignERcRKc" # string offset=8116 +.Linfo_string449: + .asciz "assign" # string offset=8151 +.Linfo_string450: + .asciz "char_type" # string offset=8158 +.Linfo_string451: + .asciz "_ZNSt11char_traitsIcE2eqERKcS2_" # string offset=8168 +.Linfo_string452: + .asciz "eq" # string offset=8200 +.Linfo_string453: + .asciz "_ZNSt11char_traitsIcE2ltERKcS2_" # string offset=8203 +.Linfo_string454: + .asciz "lt" # string offset=8235 +.Linfo_string455: + .asciz "_ZNSt11char_traitsIcE7compareEPKcS2_m" # string offset=8238 +.Linfo_string456: + .asciz "_ZNSt11char_traitsIcE6lengthEPKc" # string offset=8276 +.Linfo_string457: + .asciz "_ZNSt11char_traitsIcE4findEPKcmRS1_" # string offset=8309 +.Linfo_string458: + .asciz "_ZNSt11char_traitsIcE4moveEPcPKcm" # string offset=8345 +.Linfo_string459: + .asciz "move" # string offset=8379 +.Linfo_string460: + .asciz "_ZNSt11char_traitsIcE4copyEPcPKcm" # string offset=8384 +.Linfo_string461: + .asciz "_ZNSt11char_traitsIcE6assignEPcmc" # string offset=8418 +.Linfo_string462: + .asciz "_ZNSt11char_traitsIcE12to_char_typeERKi" # string offset=8452 +.Linfo_string463: + .asciz "to_char_type" # string offset=8492 +.Linfo_string464: + .asciz "int_type" # string offset=8505 +.Linfo_string465: + .asciz "_ZNSt11char_traitsIcE11to_int_typeERKc" # string offset=8514 +.Linfo_string466: + .asciz "to_int_type" # string offset=8553 +.Linfo_string467: + .asciz "_ZNSt11char_traitsIcE11eq_int_typeERKiS2_" # string offset=8565 +.Linfo_string468: + .asciz "eq_int_type" # string offset=8607 +.Linfo_string469: + .asciz "_ZNSt11char_traitsIcE3eofEv" # string offset=8619 +.Linfo_string470: + .asciz "eof" # string offset=8647 +.Linfo_string471: + .asciz "_ZNSt11char_traitsIcE7not_eofERKi" # string offset=8651 +.Linfo_string472: + .asciz "not_eof" # string offset=8685 +.Linfo_string473: + .asciz "char_traits<char>" # string offset=8693 +.Linfo_string474: + .asciz "_Traits" # string offset=8711 +.Linfo_string475: + .asciz "basic_string_view<char, std::char_traits<char> >" # string offset=8719 +.Linfo_string476: + .asciz "_ZN4ctre16captured_contentILm0EvE7storageIPKcE6get_idEv" # string offset=8768 +.Linfo_string477: + .asciz "get_id" # string offset=8824 +.Linfo_string478: + .asciz "Iterator" # string offset=8831 +.Linfo_string479: + .asciz "storage<const char *>" # string offset=8840 +.Linfo_string480: + .asciz "_ZN4ctre16captured_contentILm0EvE7storageIPKcEC2Ev" # string offset=8862 +.Linfo_string481: + .asciz "this" # string offset=8913 +.Linfo_string482: + .asciz "captures" # string offset=8918 +.Linfo_string483: + .asciz "Captures" # string offset=8927 +.Linfo_string484: + .asciz "captures<>" # string offset=8936 +.Linfo_string485: + .asciz "head" # string offset=8947 +.Linfo_string486: + .asciz "captures<ctre::captured_content<0, void>::storage<const char *> >" # string offset=8952 +.Linfo_string487: + .asciz "_ZN4ctre8capturesIJNS_16captured_contentILm0EvE7storageIPKcEEEEC2Ev" # string offset=9018 +.Linfo_string488: + .asciz "_captures" # string offset=9086 +.Linfo_string489: + .asciz "regex_results" # string offset=9096 +.Linfo_string490: + .asciz "Ts" # string offset=9110 +.Linfo_string491: + .asciz "list<>" # string offset=9113 +.Linfo_string492: + .asciz "_ZN4ctre13regex_resultsIPKcJEE4sizeEv" # string offset=9120 +.Linfo_string493: + .asciz "_ZN4ctre13regex_resultsIPKcJEE7matchedEv" # string offset=9158 +.Linfo_string494: + .asciz "_ZN4ctre13regex_resultsIPKcJEE7unmatchEv" # string offset=9199 +.Linfo_string495: + .asciz "_ZNK4ctre13regex_resultsIPKcJEEcvbEv" # string offset=9240 +.Linfo_string496: + .asciz "_ZNK4ctre13regex_resultsIPKcJEEcvSt17basic_string_viewIcSt11char_traitsIcEEEv" # string offset=9277 +.Linfo_string497: + .asciz "_ZN4ctre13regex_resultsIPKcJEE14set_start_markES2_" # string offset=9355 +.Linfo_string498: + .asciz "set_start_mark" # string offset=9406 +.Linfo_string499: + .asciz "_ZN4ctre13regex_resultsIPKcJEE12set_end_markES2_" # string offset=9421 +.Linfo_string500: + .asciz "set_end_mark" # string offset=9470 +.Linfo_string501: + .asciz "_ZNK4ctre13regex_resultsIPKcJEE16get_end_positionEv" # string offset=9483 +.Linfo_string502: + .asciz "get_end_position" # string offset=9535 +.Linfo_string503: + .asciz "regex_results<const char *>" # string offset=9552 +.Linfo_string504: + .asciz "_ZN4ctre13regex_resultsIPKcJEEC2Ev" # string offset=9580 +.Linfo_string505: + .asciz "EndIterator" # string offset=9615 +.Linfo_string506: + .asciz "Pattern" # string offset=9627 +.Linfo_string507: + .asciz "_ZN4ctre8match_reIPKcS2_NS_8sequenceIJNS_9characterILc104EEENS_4starIJNS_3anyEEEEEEEEEDaT_T0_T1_" # string offset=9635 +.Linfo_string508: + .asciz "match_re<const char *, const char *, ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> > >" # string offset=9732 +.Linfo_string509: + .asciz "_ZN4ctre18regular_expressionINS_8sequenceIJNS_9characterILc104EEENS_4starIJNS_3anyEEEEEEEE5matchIPKcEEDaT_SC_" # string offset=9832 +.Linfo_string510: + .asciz "match<const char *>" # string offset=9942 +.Linfo_string511: + .asciz "_ZN4ctre18regular_expressionINS_8sequenceIJNS_9characterILc104EEENS_4starIJNS_3anyEEEEEEEE5matchESt17basic_string_viewIcSt11char_traitsIcEE" # string offset=9962 +.Linfo_string512: + .asciz "match" # string offset=10102 +.Linfo_string513: + .asciz "string_view" # string offset=10108 +.Linfo_string514: + .asciz "sv" # string offset=10120 +.Linfo_string515: + .asciz "_Z5matchSt17basic_string_viewIcSt11char_traitsIcEE" # string offset=10123 +.Linfo_string516: + .asciz "R" # string offset=10174 +.Linfo_string517: + .asciz "CharacterLike" # string offset=10176 +.Linfo_string518: + .asciz "Tail" # string offset=10190 +.Linfo_string519: + .asciz "sequence<ctre::star<ctre::any> >" # string offset=10195 +.Linfo_string520: + .asciz "assert_end" # string offset=10228 +.Linfo_string521: + .asciz "end_mark" # string offset=10239 +.Linfo_string522: + .asciz "accept" # string offset=10248 +.Linfo_string523: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_NS_9characterILc104EEEJNS_8sequenceIJNS_4starIJNS_3anyEEEEEEENS_10assert_endENS_8end_markENS_6acceptEEvEET_T0_SG_T1_SF_N4ctll4listIJT2_DpT3_EEE" # string offset=10255 +.Linfo_string524: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::character<'h'>, ctre::sequence<ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept, void>" # string offset=10449 +.Linfo_string525: + .asciz "current" # string offset=10637 +.Linfo_string526: + .asciz "list<ctre::character<'h'>, ctre::sequence<ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=10645 +.Linfo_string527: + .asciz "HeadContent" # string offset=10760 +.Linfo_string528: + .asciz "TailContent" # string offset=10772 +.Linfo_string529: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_NS_9characterILc104EEEJNS_4starIJNS_3anyEEEEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_T0_SE_T1_SD_N4ctll4listIJNS_8sequenceIJT2_DpT3_EEEDpT4_EEE" # string offset=10784 +.Linfo_string530: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::character<'h'>, ctre::star<ctre::any> , ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=10984 +.Linfo_string531: + .asciz "list<ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=11150 +.Linfo_string532: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_JNS_8sequenceIJNS_9characterILc104EEENS_4starIJNS_3anyEEEEEEENS_10assert_endENS_8end_markENS_6acceptEEEET_T0_SG_T1_SF_N4ctll4listIJNS_10start_markEDpT2_EEE" # string offset=11265 +.Linfo_string533: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=11471 +.Linfo_string534: + .asciz "start_mark" # string offset=11653 +.Linfo_string535: + .asciz "list<ctre::start_mark, ctre::sequence<ctre::character<'h'>, ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=11664 +.Linfo_string536: + .asciz "A" # string offset=11797 +.Linfo_string537: + .asciz "B" # string offset=11799 +.Linfo_string538: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_T0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE" # string offset=11801 +.Linfo_string539: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=11979 +.Linfo_string540: + .asciz "stack" # string offset=12116 +.Linfo_string541: + .asciz "a" # string offset=12122 +.Linfo_string542: + .asciz "b" # string offset=12124 +.Linfo_string543: + .asciz "repeat<0, 0, ctre::any>" # string offset=12126 +.Linfo_string544: + .asciz "list<ctre::repeat<0, 0, ctre::any>, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=12150 +.Linfo_string545: + .asciz "i" # string offset=12234 +.Linfo_string546: + .asciz "inner_result" # string offset=12236 +.Linfo_string547: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_JNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_T0_SA_T1_S9_N4ctll4listIJNS_4starIJDpT2_EEEDpT3_EEE" # string offset=12249 +.Linfo_string548: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=12407 +.Linfo_string549: + .asciz "list<ctre::star<ctre::any>, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=12538 +.Linfo_string550: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_NS_4starIJNS_3anyEEEEJEJNS_10assert_endENS_8end_markENS_6acceptEEEET_T0_SC_T1_SB_N4ctll4listIJNS_8sequenceIJT2_DpT3_EEEDpT4_EEE" # string offset=12614 +.Linfo_string551: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::star<ctre::any>, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=12792 +.Linfo_string552: + .asciz "list<ctre::sequence<ctre::star<ctre::any> >, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=12935 +.Linfo_string553: + .asciz "end_cycle_mark" # string offset=13028 +.Linfo_string554: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_NS_3anyEJNS_14end_cycle_markEEvEET_T0_S8_T1_S7_N4ctll4listIJT2_DpT3_EEE" # string offset=13043 +.Linfo_string555: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark, void>" # string offset=13165 +.Linfo_string556: + .asciz "list<ctre::any, ctre::end_cycle_mark>" # string offset=13276 +.Linfo_string557: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_NS_3anyEJEJNS_14end_cycle_markEEEET_T0_S8_T1_S7_N4ctll4listIJNS_8sequenceIJT2_DpT3_EEEDpT4_EEE" # string offset=13314 +.Linfo_string558: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::any, ctre::end_cycle_mark>" # string offset=13459 +.Linfo_string559: + .asciz "sequence<ctre::any>" # string offset=13564 +.Linfo_string560: + .asciz "list<ctre::sequence<ctre::any>, ctre::end_cycle_mark>" # string offset=13584 +.Linfo_string561: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_JEEET_T0_S6_T1_S5_N4ctll4listIJNS_14end_cycle_markEEEE" # string offset=13638 +.Linfo_string562: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *>" # string offset=13743 +.Linfo_string563: + .asciz "list<ctre::end_cycle_mark>" # string offset=13815 +.Linfo_string564: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_EET_T0_S6_T1_S5_N4ctll4listIJNS_6acceptEEEE" # string offset=13842 +.Linfo_string565: + .asciz "list<ctre::accept>" # string offset=13936 +.Linfo_string566: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_JNS_6acceptEEEET_T0_S7_T1_S6_N4ctll4listIJNS_8end_markEDpT2_EEE" # string offset=13955 +.Linfo_string567: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::accept>" # string offset=14069 +.Linfo_string568: + .asciz "list<ctre::end_mark, ctre::accept>" # string offset=14155 +.Linfo_string569: + .asciz "_ZN4ctre8evaluateINS_13regex_resultsIPKcJEEES3_S3_JNS_8end_markENS_6acceptEEEET_T0_S8_T1_S7_N4ctll4listIJNS_10assert_endEDpT2_EEE" # string offset=14190 +.Linfo_string570: + .asciz "evaluate<ctre::regex_results<const char *>, const char *, const char *, ctre::end_mark, ctre::accept>" # string offset=14320 +.Linfo_string571: + .asciz "list<ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=14422 +.Linfo_string572: + .asciz "_ZN4ctre13regex_resultsIPKcJEEC2ENS_17not_matched_tag_tE" # string offset=14475 +.Linfo_string573: + .asciz "_Z6myfuncv" # string offset=14532 +.Linfo_string574: + .asciz "myfunc" # string offset=14543 +.Linfo_string575: + .asciz "_ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE" # string offset=14550 +.Linfo_string576: + .asciz "evaluate_recursive<ctre::regex_results<const char *>, const char *, const char *, 0, 0, ctre::any, ctre::assert_end, ctre::end_mark, ctre::accept>" # string offset=14740 +.Linfo_string577: + .asciz "rec_result" # string offset=14887 + .section .debug_loc,"",@progbits +.Ldebug_loc0: + .quad .Ltmp3 + .quad .Ltmp8 + .short 4 # Loc expr size + .byte 53 # DW_OP_lit5 + .byte 159 # DW_OP_stack_value + .byte 147 # DW_OP_piece + .byte 8 # 8 + .quad .Ltmp8 + .quad .Ltmp11 + .short 7 # Loc expr size + .byte 53 # DW_OP_lit5 + .byte 159 # DW_OP_stack_value + .byte 147 # DW_OP_piece + .byte 8 # 8 + .byte 81 # DW_OP_reg1 + .byte 147 # DW_OP_piece + .byte 8 # 8 + .quad 0 + .quad 0 +.Ldebug_loc1: + .quad .Ltmp9 + .quad .Ltmp11 + .short 1 # Loc expr size + .byte 82 # DW_OP_reg2 + .quad 0 + .quad 0 +.Ldebug_loc2: + .quad .Ltmp10 + .quad .Ltmp11 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad 0 + .quad 0 +.Ldebug_loc3: + .quad .Lfunc_begin2 + .quad .Ltmp22 + .short 1 # Loc expr size + .byte 84 # DW_OP_reg4 + .quad .Ltmp27 + .quad .Ltmp34 + .short 1 # Loc expr size + .byte 84 # DW_OP_reg4 + .quad 0 + .quad 0 +.Ldebug_loc4: + .quad .Lfunc_begin2 + .quad .Ltmp24 + .short 1 # Loc expr size + .byte 81 # DW_OP_reg1 + .quad .Ltmp27 + .quad .Ltmp32 + .short 1 # Loc expr size + .byte 81 # DW_OP_reg1 + .quad 0 + .quad 0 +.Ldebug_loc5: + .quad .Lfunc_begin2 + .quad .Ltmp20 + .short 1 # Loc expr size + .byte 82 # DW_OP_reg2 + .quad .Ltmp27 + .quad .Ltmp31 + .short 1 # Loc expr size + .byte 82 # DW_OP_reg2 + .quad 0 + .quad 0 +.Ldebug_loc6: + .quad .Lfunc_begin2 + .quad .Ltmp24 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad .Ltmp27 + .quad .Ltmp34 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad 0 + .quad 0 +.Ldebug_loc7: + .quad .Ltmp14 + .quad .Ltmp24 + .short 1 # Loc expr size + .byte 81 # DW_OP_reg1 + .quad 0 + .quad 0 +.Ldebug_loc8: + .quad .Ltmp14 + .quad .Ltmp20 + .short 1 # Loc expr size + .byte 82 # DW_OP_reg2 + .quad 0 + .quad 0 +.Ldebug_loc9: + .quad .Ltmp14 + .quad .Ltmp24 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad 0 + .quad 0 +.Ldebug_loc10: + .quad .Ltmp14 + .quad .Ltmp24 + .short 1 # Loc expr size + .byte 81 # DW_OP_reg1 + .quad 0 + .quad 0 +.Ldebug_loc11: + .quad .Ltmp14 + .quad .Ltmp20 + .short 1 # Loc expr size + .byte 82 # DW_OP_reg2 + .quad 0 + .quad 0 +.Ldebug_loc12: + .quad .Ltmp14 + .quad .Ltmp24 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad 0 + .quad 0 +.Ldebug_loc13: + .quad .Ltmp14 + .quad .Ltmp24 + .short 1 # Loc expr size + .byte 81 # DW_OP_reg1 + .quad 0 + .quad 0 +.Ldebug_loc14: + .quad .Ltmp14 + .quad .Ltmp24 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad 0 + .quad 0 +.Ldebug_loc15: + .quad .Ltmp14 + .quad .Ltmp15 + .short 1 # Loc expr size + .byte 85 # DW_OP_reg5 + .quad .Ltmp15 + .quad .Ltmp26 + .short 1 # Loc expr size + .byte 83 # DW_OP_reg3 + .quad 0 + .quad 0 +.Ldebug_loc16: + .quad .Ltmp14 + .quad .Ltmp15 + .short 1 # Loc expr size + .byte 85 # DW_OP_reg5 + .quad .Ltmp15 + .quad .Ltmp26 + .short 1 # Loc expr size + .byte 83 # DW_OP_reg3 + .quad 0 + .quad 0 +.Ldebug_loc17: + .quad .Ltmp14 + .quad .Ltmp15 + .short 1 # Loc expr size + .byte 85 # DW_OP_reg5 + .quad .Ltmp15 + .quad .Ltmp19 + .short 1 # Loc expr size + .byte 83 # DW_OP_reg3 + .quad 0 + .quad 0 +.Ldebug_loc18: + .quad .Ltmp14 + .quad .Ltmp15 + .short 1 # Loc expr size + .byte 85 # DW_OP_reg5 + .quad .Ltmp15 + .quad .Ltmp19 + .short 1 # Loc expr size + .byte 83 # DW_OP_reg3 + .quad 0 + .quad 0 +.Ldebug_loc19: + .quad .Ltmp14 + .quad .Ltmp15 + .short 1 # Loc expr size + .byte 85 # DW_OP_reg5 + .quad .Ltmp15 + .quad .Ltmp19 + .short 1 # Loc expr size + .byte 83 # DW_OP_reg3 + .quad 0 + .quad 0 +.Ldebug_loc20: + .quad .Ltmp14 + .quad .Ltmp16 + .short 11 # Loc expr size + .byte 147 # DW_OP_piece + .byte 16 # 16 + .byte 119 # DW_OP_breg7 + .byte 224 # 96 + .byte 0 # + .byte 35 # DW_OP_plus_uconst + .byte 16 # 16 + .byte 6 # DW_OP_deref + .byte 159 # DW_OP_stack_value + .byte 147 # DW_OP_piece + .byte 8 # 8 + .quad .Ltmp16 + .quad .Ltmp19 + .short 14 # Loc expr size + .byte 85 # DW_OP_reg5 + .byte 147 # DW_OP_piece + .byte 8 # 8 + .byte 147 # DW_OP_piece + .byte 8 # 8 + .byte 119 # DW_OP_breg7 + .byte 224 # 96 + .byte 0 # + .byte 35 # DW_OP_plus_uconst + .byte 16 # 16 + .byte 6 # DW_OP_deref + .byte 159 # DW_OP_stack_value + .byte 147 # DW_OP_piece + .byte 8 # 8 + .quad .Ltmp27 + .quad .Ltmp34 + .short 14 # Loc expr size + .byte 85 # DW_OP_reg5 + .byte 147 # DW_OP_piece + .byte 8 # 8 + .byte 147 # DW_OP_piece + .byte 8 # 8 + .byte 119 # DW_OP_breg7 + .byte 224 # 96 + .byte 0 # + .byte 35 # DW_OP_plus_uconst + .byte 16 # 16 + .byte 6 # DW_OP_deref + .byte 159 # DW_OP_stack_value + .byte 147 # DW_OP_piece + .byte 8 # 8 + .quad 0 + .quad 0 +.Ldebug_loc21: + .quad .Ltmp14 + .quad .Ltmp19 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad .Ltmp27 + .quad .Ltmp34 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad 0 + .quad 0 +.Ldebug_loc22: + .quad .Ltmp14 + .quad .Ltmp19 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad .Ltmp27 + .quad .Ltmp34 + .short 1 # Loc expr size + .byte 88 # DW_OP_reg8 + .quad 0 + .quad 0 +.Ldebug_loc23: + .quad .Ltmp15 + .quad .Ltmp26 + .short 2 # Loc expr size + .byte 115 # DW_OP_breg3 + .byte 0 # 0 + .quad 0 + .quad 0 +.Ldebug_loc24: + .quad .Ltmp16 + .quad .Ltmp23 + .short 3 # Loc expr size + .byte 85 # DW_OP_reg5 + .byte 147 # DW_OP_piece + .byte 8 # 8 + .quad 0 + .quad 0 +.Ldebug_loc25: + .quad .Ltmp16 + .quad .Ltmp23 + .short 3 # Loc expr size + .byte 85 # DW_OP_reg5 + .byte 147 # DW_OP_piece + .byte 8 # 8 + .quad 0 + .quad 0 +.Ldebug_loc26: + .quad .Ltmp20 + .quad .Ltmp24 + .short 9 # Loc expr size + .byte 147 # DW_OP_piece + .byte 8 # 8 + .byte 82 # DW_OP_reg2 + .byte 147 # DW_OP_piece + .byte 8 # 8 + .byte 49 # DW_OP_lit1 + .byte 159 # DW_OP_stack_value + .byte 147 # DW_OP_piece + .byte 1 # 1 + .quad 0 + .quad 0 +.Ldebug_loc27: + .quad .Ltmp20 + .quad .Ltmp24 + .short 1 # Loc expr size + .byte 82 # DW_OP_reg2 + .quad 0 + .quad 0 +.Ldebug_loc28: + .quad .Ltmp30 + .quad .Ltmp30 + .short 6 # Loc expr size + .byte 147 # DW_OP_piece + .byte 16 # 16 + .byte 49 # DW_OP_lit1 + .byte 159 # DW_OP_stack_value + .byte 147 # DW_OP_piece + .byte 1 # 1 + .quad 0 + .quad 0 + .section .debug_abbrev,"",@progbits + .byte 1 # Abbreviation Code + .byte 17 # DW_TAG_compile_unit + .byte 1 # DW_CHILDREN_yes + .byte 37 # DW_AT_producer + .byte 14 # DW_FORM_strp + .byte 19 # DW_AT_language + .byte 5 # DW_FORM_data2 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 16 # DW_AT_stmt_list + .byte 23 # DW_FORM_sec_offset + .byte 27 # DW_AT_comp_dir + .byte 14 # DW_FORM_strp + .byte 17 # DW_AT_low_pc + .byte 1 # DW_FORM_addr + .byte 85 # DW_AT_ranges + .byte 23 # DW_FORM_sec_offset + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 2 # Abbreviation Code + .byte 52 # DW_TAG_variable + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 3 # Abbreviation Code + .byte 38 # DW_TAG_const_type + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 4 # Abbreviation Code + .byte 57 # DW_TAG_namespace + .byte 1 # DW_CHILDREN_yes + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 5 # Abbreviation Code + .byte 2 # DW_TAG_class_type + .byte 1 # DW_CHILDREN_yes + .byte 54 # DW_AT_calling_convention + .byte 11 # DW_FORM_data1 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 6 # Abbreviation Code + .byte 13 # DW_TAG_member + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 56 # DW_AT_data_member_location + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 7 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 50 # DW_AT_accessibility + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 8 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 52 # DW_AT_artificial + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 9 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 10 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 50 # DW_AT_accessibility + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 11 # Abbreviation Code + .byte 47 # DW_TAG_template_type_parameter + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 12 # Abbreviation Code + .byte 48 # DW_TAG_template_value_parameter + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 28 # DW_AT_const_value + .byte 15 # DW_FORM_udata + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 13 # Abbreviation Code + .byte 19 # DW_TAG_structure_type + .byte 1 # DW_CHILDREN_yes + .byte 54 # DW_AT_calling_convention + .byte 11 # DW_FORM_data1 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 14 # Abbreviation Code + .ascii "\207\202\001" # DW_TAG_GNU_template_parameter_pack + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 15 # Abbreviation Code + .ascii "\207\202\001" # DW_TAG_GNU_template_parameter_pack + .byte 1 # DW_CHILDREN_yes + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 16 # Abbreviation Code + .byte 47 # DW_TAG_template_type_parameter + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 17 # Abbreviation Code + .byte 1 # DW_TAG_array_type + .byte 1 # DW_CHILDREN_yes + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 18 # Abbreviation Code + .byte 33 # DW_TAG_subrange_type + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 55 # DW_AT_count + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 19 # Abbreviation Code + .byte 36 # DW_TAG_base_type + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 62 # DW_AT_encoding + .byte 11 # DW_FORM_data1 + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 20 # Abbreviation Code + .byte 36 # DW_TAG_base_type + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 62 # DW_AT_encoding + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 21 # Abbreviation Code + .byte 15 # DW_TAG_pointer_type + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 22 # Abbreviation Code + .byte 16 # DW_TAG_reference_type + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 23 # Abbreviation Code + .byte 22 # DW_TAG_typedef + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 24 # Abbreviation Code + .byte 19 # DW_TAG_structure_type + .byte 0 # DW_CHILDREN_no + .byte 54 # DW_AT_calling_convention + .byte 11 # DW_FORM_data1 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 25 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 26 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 27 # Abbreviation Code + .byte 48 # DW_TAG_template_value_parameter + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 28 # DW_AT_const_value + .byte 13 # DW_FORM_sdata + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 28 # Abbreviation Code + .byte 47 # DW_TAG_template_type_parameter + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 29 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 30 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 0 # DW_CHILDREN_no + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 31 # Abbreviation Code + .byte 28 # DW_TAG_inheritance + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 56 # DW_AT_data_member_location + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 32 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 32 # DW_AT_inline + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 33 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 34 # Abbreviation Code + .byte 47 # DW_TAG_template_type_parameter + .byte 0 # DW_CHILDREN_no + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 35 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 36 # Abbreviation Code + .byte 52 # DW_TAG_variable + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 37 # Abbreviation Code + .byte 11 # DW_TAG_lexical_block + .byte 1 # DW_CHILDREN_yes + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 38 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 32 # DW_AT_inline + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 39 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 40 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 41 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 17 # DW_AT_low_pc + .byte 1 # DW_FORM_addr + .byte 18 # DW_AT_high_pc + .byte 6 # DW_FORM_data4 + .byte 64 # DW_AT_frame_base + .byte 24 # DW_FORM_exprloc + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 42 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 23 # DW_FORM_sec_offset + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 43 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 24 # DW_FORM_exprloc + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 44 # Abbreviation Code + .byte 11 # DW_TAG_lexical_block + .byte 1 # DW_CHILDREN_yes + .byte 17 # DW_AT_low_pc + .byte 1 # DW_FORM_addr + .byte 18 # DW_AT_high_pc + .byte 6 # DW_FORM_data4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 45 # Abbreviation Code + .byte 52 # DW_TAG_variable + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 46 # Abbreviation Code + .byte 29 # DW_TAG_inlined_subroutine + .byte 1 # DW_CHILDREN_yes + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 17 # DW_AT_low_pc + .byte 1 # DW_FORM_addr + .byte 18 # DW_AT_high_pc + .byte 6 # DW_FORM_data4 + .byte 88 # DW_AT_call_file + .byte 11 # DW_FORM_data1 + .byte 89 # DW_AT_call_line + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 47 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 23 # DW_FORM_sec_offset + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 48 # Abbreviation Code + .byte 52 # DW_TAG_variable + .byte 0 # DW_CHILDREN_no + .byte 2 # DW_AT_location + .byte 23 # DW_FORM_sec_offset + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 49 # Abbreviation Code + .byte 29 # DW_TAG_inlined_subroutine + .byte 1 # DW_CHILDREN_yes + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 85 # DW_AT_ranges + .byte 23 # DW_FORM_sec_offset + .byte 88 # DW_AT_call_file + .byte 11 # DW_FORM_data1 + .byte 89 # DW_AT_call_line + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 50 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 51 # Abbreviation Code + .byte 8 # DW_TAG_imported_declaration + .byte 0 # DW_CHILDREN_no + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 24 # DW_AT_import + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 52 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 99 # DW_AT_explicit + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 53 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 50 # DW_AT_accessibility + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 54 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 50 # DW_AT_accessibility + .byte 11 # DW_FORM_data1 + .byte 99 # DW_AT_explicit + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 55 # Abbreviation Code + .byte 2 # DW_TAG_class_type + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 56 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .ascii "\207\001" # DW_AT_noreturn + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 57 # Abbreviation Code + .byte 57 # DW_TAG_namespace + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 58 # Abbreviation Code + .byte 8 # DW_TAG_imported_declaration + .byte 0 # DW_CHILDREN_no + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 24 # DW_AT_import + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 59 # Abbreviation Code + .byte 13 # DW_TAG_member + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 50 # DW_AT_accessibility + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 60 # Abbreviation Code + .byte 13 # DW_TAG_member + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 56 # DW_AT_data_member_location + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 61 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 50 # DW_AT_accessibility + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 62 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 63 # Abbreviation Code + .byte 19 # DW_TAG_structure_type + .byte 1 # DW_CHILDREN_yes + .byte 54 # DW_AT_calling_convention + .byte 11 # DW_FORM_data1 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 64 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 65 # Abbreviation Code + .byte 22 # DW_TAG_typedef + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 66 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 0 # DW_CHILDREN_no + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 67 # Abbreviation Code + .byte 19 # DW_TAG_structure_type + .byte 0 # DW_CHILDREN_no + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 68 # Abbreviation Code + .byte 15 # DW_TAG_pointer_type + .byte 0 # DW_CHILDREN_no + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 69 # Abbreviation Code + .byte 59 # DW_TAG_unspecified_type + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 70 # Abbreviation Code + .byte 66 # DW_TAG_rvalue_reference_type + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 71 # Abbreviation Code + .byte 58 # DW_TAG_imported_module + .byte 0 # DW_CHILDREN_no + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 24 # DW_AT_import + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 72 # Abbreviation Code + .byte 19 # DW_TAG_structure_type + .byte 1 # DW_CHILDREN_yes + .byte 54 # DW_AT_calling_convention + .byte 11 # DW_FORM_data1 + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 73 # Abbreviation Code + .byte 23 # DW_TAG_union_type + .byte 1 # DW_CHILDREN_yes + .byte 54 # DW_AT_calling_convention + .byte 11 # DW_FORM_data1 + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 74 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 75 # Abbreviation Code + .byte 19 # DW_TAG_structure_type + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 76 # Abbreviation Code + .byte 22 # DW_TAG_typedef + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 77 # Abbreviation Code + .byte 55 # DW_TAG_restrict_type + .byte 0 # DW_CHILDREN_no + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 78 # Abbreviation Code + .byte 24 # DW_TAG_unspecified_parameters + .byte 0 # DW_CHILDREN_no + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 79 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 80 # Abbreviation Code + .byte 19 # DW_TAG_structure_type + .byte 1 # DW_CHILDREN_yes + .byte 54 # DW_AT_calling_convention + .byte 11 # DW_FORM_data1 + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 11 # DW_AT_byte_size + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 81 # Abbreviation Code + .byte 13 # DW_TAG_member + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 56 # DW_AT_data_member_location + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 82 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 83 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 84 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .ascii "\207\001" # DW_AT_noreturn + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 85 # Abbreviation Code + .byte 21 # DW_TAG_subroutine_type + .byte 0 # DW_CHILDREN_no + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 86 # Abbreviation Code + .byte 38 # DW_TAG_const_type + .byte 0 # DW_CHILDREN_no + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 87 # Abbreviation Code + .byte 21 # DW_TAG_subroutine_type + .byte 1 # DW_CHILDREN_yes + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 88 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .ascii "\207\001" # DW_AT_noreturn + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 89 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 5 # DW_FORM_data2 + .byte 60 # DW_AT_declaration + .byte 25 # DW_FORM_flag_present + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 90 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 71 # DW_AT_specification + .byte 19 # DW_FORM_ref4 + .byte 32 # DW_AT_inline + .byte 11 # DW_FORM_data1 + .byte 100 # DW_AT_object_pointer + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 91 # Abbreviation Code + .byte 5 # DW_TAG_formal_parameter + .byte 0 # DW_CHILDREN_no + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 73 # DW_AT_type + .byte 19 # DW_FORM_ref4 + .byte 52 # DW_AT_artificial + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 92 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 71 # DW_AT_specification + .byte 19 # DW_FORM_ref4 + .byte 32 # DW_AT_inline + .byte 11 # DW_FORM_data1 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 93 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 17 # DW_AT_low_pc + .byte 1 # DW_FORM_addr + .byte 18 # DW_AT_high_pc + .byte 6 # DW_FORM_data4 + .byte 64 # DW_AT_frame_base + .byte 24 # DW_FORM_exprloc + .byte 110 # DW_AT_linkage_name + .byte 14 # DW_FORM_strp + .byte 3 # DW_AT_name + .byte 14 # DW_FORM_strp + .byte 58 # DW_AT_decl_file + .byte 11 # DW_FORM_data1 + .byte 59 # DW_AT_decl_line + .byte 11 # DW_FORM_data1 + .byte 63 # DW_AT_external + .byte 25 # DW_FORM_flag_present + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 94 # Abbreviation Code + .byte 29 # DW_TAG_inlined_subroutine + .byte 1 # DW_CHILDREN_yes + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 17 # DW_AT_low_pc + .byte 1 # DW_FORM_addr + .byte 18 # DW_AT_high_pc + .byte 6 # DW_FORM_data4 + .byte 88 # DW_AT_call_file + .byte 11 # DW_FORM_data1 + .byte 89 # DW_AT_call_line + .byte 5 # DW_FORM_data2 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 95 # Abbreviation Code + .byte 52 # DW_TAG_variable + .byte 0 # DW_CHILDREN_no + .byte 28 # DW_AT_const_value + .byte 15 # DW_FORM_udata + .byte 49 # DW_AT_abstract_origin + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 96 # Abbreviation Code + .byte 46 # DW_TAG_subprogram + .byte 1 # DW_CHILDREN_yes + .byte 71 # DW_AT_specification + .byte 19 # DW_FORM_ref4 + .byte 32 # DW_AT_inline + .byte 11 # DW_FORM_data1 + .byte 100 # DW_AT_object_pointer + .byte 19 # DW_FORM_ref4 + .byte 0 # EOM(1) + .byte 0 # EOM(2) + .byte 0 # EOM(3) + .section .debug_info,"",@progbits +.Lcu_begin0: + .long 13941 # Length of Unit + .short 4 # DWARF version number + .long .debug_abbrev # Offset Into Abbrev. Section + .byte 8 # Address Size (in bytes) + .byte 1 # Abbrev [1] 0xb:0x366e DW_TAG_compile_unit + .long .Linfo_string0 # DW_AT_producer + .short 4 # DW_AT_language + .long .Linfo_string1 # DW_AT_name + .long .Lline_table_start0 # DW_AT_stmt_list + .long .Linfo_string2 # DW_AT_comp_dir + .quad 0 # DW_AT_low_pc + .long .Ldebug_ranges10 # DW_AT_ranges + .byte 2 # Abbrev [2] 0x2a:0xf DW_TAG_variable + .long .Linfo_string3 # DW_AT_name + .long 57 # DW_AT_type + .byte 3 # DW_AT_decl_file + .byte 3 # DW_AT_decl_line + .long .Linfo_string22 # DW_AT_linkage_name + .byte 3 # Abbrev [3] 0x39:0x5 DW_TAG_const_type + .long 67 # DW_AT_type + .byte 4 # Abbrev [4] 0x3e:0x227 DW_TAG_namespace + .long .Linfo_string4 # DW_AT_name + .byte 5 # Abbrev [5] 0x43:0x99 DW_TAG_class_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string21 # DW_AT_name + .byte 4 # DW_AT_byte_size + .byte 1 # DW_AT_decl_file + .byte 9 # DW_AT_decl_line + .byte 6 # Abbrev [6] 0x4c:0xc DW_TAG_member + .long .Linfo_string5 # DW_AT_name + .long 613 # DW_AT_type + .byte 1 # DW_AT_decl_file + .byte 10 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 7 # Abbrev [7] 0x58:0x13 DW_TAG_subprogram + .long .Linfo_string8 # DW_AT_name + .byte 1 # DW_AT_decl_file + .byte 16 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x60:0x5 DW_TAG_formal_parameter + .long 639 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x65:0x5 DW_TAG_formal_parameter + .long 644 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x6b:0x16 DW_TAG_subprogram + .long .Linfo_string9 # DW_AT_linkage_name + .long .Linfo_string10 # DW_AT_name + .byte 1 # DW_AT_decl_file + .byte 18 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x7b:0x5 DW_TAG_formal_parameter + .long 684 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x81:0x1b DW_TAG_subprogram + .long .Linfo_string13 # DW_AT_linkage_name + .long .Linfo_string14 # DW_AT_name + .byte 1 # DW_AT_decl_file + .byte 23 # DW_AT_decl_line + .long 625 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x91:0x5 DW_TAG_formal_parameter + .long 684 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x96:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x9c:0x16 DW_TAG_subprogram + .long .Linfo_string15 # DW_AT_linkage_name + .long .Linfo_string16 # DW_AT_name + .byte 1 # DW_AT_decl_file + .byte 26 # DW_AT_decl_line + .long 689 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0xac:0x5 DW_TAG_formal_parameter + .long 684 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0xb2:0x16 DW_TAG_subprogram + .long .Linfo_string17 # DW_AT_linkage_name + .long .Linfo_string18 # DW_AT_name + .byte 1 # DW_AT_decl_file + .byte 29 # DW_AT_decl_line + .long 689 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0xc2:0x5 DW_TAG_formal_parameter + .long 684 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 11 # Abbrev [11] 0xc8:0x9 DW_TAG_template_type_parameter + .long 625 # DW_AT_type + .long .Linfo_string19 # DW_AT_name + .byte 12 # Abbrev [12] 0xd1:0xa DW_TAG_template_value_parameter + .long 677 # DW_AT_type + .long .Linfo_string20 # DW_AT_name + .byte 4 # DW_AT_const_value + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0xdc:0xf DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string491 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 14 # Abbrev [14] 0xe5:0x5 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0xeb:0x29 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string526 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0xf4:0x1f DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0xf9:0x5 DW_TAG_template_type_parameter + .long 855 # DW_AT_type + .byte 16 # Abbrev [16] 0xfe:0x5 DW_TAG_template_type_parameter + .long 1709 # DW_AT_type + .byte 16 # Abbrev [16] 0x103:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x108:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x10d:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x114:0x24 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string531 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x11d:0x1a DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x122:0x5 DW_TAG_template_type_parameter + .long 829 # DW_AT_type + .byte 16 # Abbrev [16] 0x127:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x12c:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x131:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x138:0x29 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string535 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x141:0x1f DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x146:0x5 DW_TAG_template_type_parameter + .long 2014 # DW_AT_type + .byte 16 # Abbrev [16] 0x14b:0x5 DW_TAG_template_type_parameter + .long 829 # DW_AT_type + .byte 16 # Abbrev [16] 0x150:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x155:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x15a:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x161:0x24 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string544 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x16a:0x1a DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x16f:0x5 DW_TAG_template_type_parameter + .long 2200 # DW_AT_type + .byte 16 # Abbrev [16] 0x174:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x179:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x17e:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x185:0x24 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string549 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x18e:0x1a DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x193:0x5 DW_TAG_template_type_parameter + .long 876 # DW_AT_type + .byte 16 # Abbrev [16] 0x198:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x19d:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x1a2:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x1a9:0x24 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string552 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x1b2:0x1a DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x1b7:0x5 DW_TAG_template_type_parameter + .long 1709 # DW_AT_type + .byte 16 # Abbrev [16] 0x1bc:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x1c1:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x1c6:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x1cd:0x1a DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string556 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x1d6:0x10 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x1db:0x5 DW_TAG_template_type_parameter + .long 897 # DW_AT_type + .byte 16 # Abbrev [16] 0x1e0:0x5 DW_TAG_template_type_parameter + .long 2620 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x1e7:0x1a DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string560 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x1f0:0x10 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x1f5:0x5 DW_TAG_template_type_parameter + .long 2749 # DW_AT_type + .byte 16 # Abbrev [16] 0x1fa:0x5 DW_TAG_template_type_parameter + .long 2620 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x201:0x15 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string563 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x20a:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x20f:0x5 DW_TAG_template_type_parameter + .long 2620 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x216:0x15 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string565 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x21f:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x224:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x22b:0x1a DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string568 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x234:0x10 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x239:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x23e:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x245:0x1f DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string571 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 43 # DW_AT_decl_file + .byte 8 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x24e:0x15 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string490 # DW_AT_name + .byte 16 # Abbrev [16] 0x253:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x258:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x25d:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 17 # Abbrev [17] 0x265:0xc DW_TAG_array_type + .long 625 # DW_AT_type + .byte 18 # Abbrev [18] 0x26a:0x6 DW_TAG_subrange_type + .long 632 # DW_AT_type + .byte 4 # DW_AT_count + .byte 0 # End Of Children Mark + .byte 19 # Abbrev [19] 0x271:0x7 DW_TAG_base_type + .long .Linfo_string6 # DW_AT_name + .byte 6 # DW_AT_encoding + .byte 1 # DW_AT_byte_size + .byte 20 # Abbrev [20] 0x278:0x7 DW_TAG_base_type + .long .Linfo_string7 # DW_AT_name + .byte 8 # DW_AT_byte_size + .byte 7 # DW_AT_encoding + .byte 21 # Abbrev [21] 0x27f:0x5 DW_TAG_pointer_type + .long 67 # DW_AT_type + .byte 22 # Abbrev [22] 0x284:0x5 DW_TAG_reference_type + .long 649 # DW_AT_type + .byte 17 # Abbrev [17] 0x289:0xc DW_TAG_array_type + .long 661 # DW_AT_type + .byte 18 # Abbrev [18] 0x28e:0x6 DW_TAG_subrange_type + .long 632 # DW_AT_type + .byte 4 # DW_AT_count + .byte 0 # End Of Children Mark + .byte 3 # Abbrev [3] 0x295:0x5 DW_TAG_const_type + .long 625 # DW_AT_type + .byte 23 # Abbrev [23] 0x29a:0xb DW_TAG_typedef + .long 677 # DW_AT_type + .long .Linfo_string12 # DW_AT_name + .byte 2 # DW_AT_decl_file + .byte 62 # DW_AT_decl_line + .byte 19 # Abbrev [19] 0x2a5:0x7 DW_TAG_base_type + .long .Linfo_string11 # DW_AT_name + .byte 7 # DW_AT_encoding + .byte 8 # DW_AT_byte_size + .byte 21 # Abbrev [21] 0x2ac:0x5 DW_TAG_pointer_type + .long 57 # DW_AT_type + .byte 21 # Abbrev [21] 0x2b1:0x5 DW_TAG_pointer_type + .long 661 # DW_AT_type + .byte 4 # Abbrev [4] 0x2b6:0xc34 DW_TAG_namespace + .long .Linfo_string23 # DW_AT_name + .byte 2 # Abbrev [2] 0x2bb:0xf DW_TAG_variable + .long .Linfo_string24 # DW_AT_name + .long 3818 # DW_AT_type + .byte 4 # DW_AT_decl_file + .byte 13 # DW_AT_decl_line + .long .Linfo_string26 # DW_AT_linkage_name + .byte 24 # Abbrev [24] 0x2ca:0x9 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string25 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 4 # DW_AT_decl_file + .byte 11 # DW_AT_decl_line + .byte 13 # Abbrev [13] 0x2d3:0x6a DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string35 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 5 # DW_AT_decl_file + .byte 27 # DW_AT_decl_line + .byte 25 # Abbrev [25] 0x2dc:0xd DW_TAG_subprogram + .long .Linfo_string27 # DW_AT_name + .byte 5 # DW_AT_decl_file + .byte 34 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x2e3:0x5 DW_TAG_formal_parameter + .long 3823 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 25 # Abbrev [25] 0x2e9:0x12 DW_TAG_subprogram + .long .Linfo_string27 # DW_AT_name + .byte 5 # DW_AT_decl_file + .byte 35 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x2f0:0x5 DW_TAG_formal_parameter + .long 3823 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x2f5:0x5 DW_TAG_formal_parameter + .long 829 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 11 # Abbrev [11] 0x2fb:0x9 DW_TAG_template_type_parameter + .long 829 # DW_AT_type + .long .Linfo_string34 # DW_AT_name + .byte 26 # Abbrev [26] 0x304:0x23 DW_TAG_subprogram + .long .Linfo_string509 # DW_AT_linkage_name + .long .Linfo_string510 # DW_AT_name + .byte 5 # DW_AT_decl_file + .byte 36 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 11 # Abbrev [11] 0x313:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 9 # Abbrev [9] 0x31c:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x321:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x327:0x15 DW_TAG_subprogram + .long .Linfo_string511 # DW_AT_linkage_name + .long .Linfo_string512 # DW_AT_name + .byte 5 # DW_AT_decl_file + .byte 51 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x336:0x5 DW_TAG_formal_parameter + .long 7937 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x33d:0x1a DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string33 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 21 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x346:0x10 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string28 # DW_AT_name + .byte 16 # Abbrev [16] 0x34b:0x5 DW_TAG_template_type_parameter + .long 855 # DW_AT_type + .byte 16 # Abbrev [16] 0x350:0x5 DW_TAG_template_type_parameter + .long 876 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x357:0x15 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string30 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 6 # DW_AT_decl_file + .byte 20 # DW_AT_decl_line + .byte 27 # Abbrev [27] 0x360:0xb DW_TAG_template_value_parameter + .long 625 # DW_AT_type + .long .Linfo_string29 # DW_AT_name + .asciz "\350" # DW_AT_const_value + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x36c:0x15 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string32 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 25 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x375:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string28 # DW_AT_name + .byte 16 # Abbrev [16] 0x37a:0x5 DW_TAG_template_type_parameter + .long 897 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 24 # Abbrev [24] 0x381:0x9 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string31 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 6 # DW_AT_decl_file + .byte 26 # DW_AT_decl_line + .byte 13 # Abbrev [13] 0x38a:0xfd DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string338 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 4 # DW_AT_decl_file + .byte 15 # DW_AT_decl_line + .byte 12 # Abbrev [12] 0x393:0xa DW_TAG_template_value_parameter + .long 677 # DW_AT_type + .long .Linfo_string336 # DW_AT_name + .byte 0 # DW_AT_const_value + .byte 28 # Abbrev [28] 0x39d:0x5 DW_TAG_template_type_parameter + .long .Linfo_string337 # DW_AT_name + .byte 13 # Abbrev [13] 0x3a2:0xe4 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string479 # DW_AT_name + .byte 24 # DW_AT_byte_size + .byte 4 # DW_AT_decl_file + .byte 16 # DW_AT_decl_line + .byte 6 # Abbrev [6] 0x3ab:0xc DW_TAG_member + .long .Linfo_string339 # DW_AT_name + .long 689 # DW_AT_type + .byte 4 # DW_AT_decl_file + .byte 17 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x3b7:0xc DW_TAG_member + .long .Linfo_string340 # DW_AT_name + .long 689 # DW_AT_type + .byte 4 # DW_AT_decl_file + .byte 18 # DW_AT_decl_line + .byte 8 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x3c3:0xc DW_TAG_member + .long .Linfo_string341 # DW_AT_name + .long 3828 # DW_AT_type + .byte 4 # DW_AT_decl_file + .byte 22 # DW_AT_decl_line + .byte 16 # DW_AT_data_member_location + .byte 25 # Abbrev [25] 0x3cf:0xd DW_TAG_subprogram + .long .Linfo_string342 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 26 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x3d6:0x5 DW_TAG_formal_parameter + .long 13183 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 29 # Abbrev [29] 0x3dc:0x11 DW_TAG_subprogram + .long .Linfo_string343 # DW_AT_linkage_name + .long .Linfo_string344 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 28 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x3e7:0x5 DW_TAG_formal_parameter + .long 13183 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 29 # Abbrev [29] 0x3ed:0x11 DW_TAG_subprogram + .long .Linfo_string345 # DW_AT_linkage_name + .long .Linfo_string346 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 31 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x3f8:0x5 DW_TAG_formal_parameter + .long 13183 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 29 # Abbrev [29] 0x3fe:0x16 DW_TAG_subprogram + .long .Linfo_string347 # DW_AT_linkage_name + .long .Linfo_string348 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 34 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x409:0x5 DW_TAG_formal_parameter + .long 13183 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x40e:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x414:0x1a DW_TAG_subprogram + .long .Linfo_string349 # DW_AT_linkage_name + .long .Linfo_string350 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 37 # DW_AT_decl_line + .long 13188 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x423:0x5 DW_TAG_formal_parameter + .long 13183 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x428:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x42e:0x15 DW_TAG_subprogram + .long .Linfo_string351 # DW_AT_linkage_name + .long .Linfo_string352 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 41 # DW_AT_decl_line + .long 689 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x43d:0x5 DW_TAG_formal_parameter + .long 13193 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x443:0x15 DW_TAG_subprogram + .long .Linfo_string353 # DW_AT_linkage_name + .long .Linfo_string102 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 53 # DW_AT_decl_line + .long 3828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x452:0x5 DW_TAG_formal_parameter + .long 13193 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x458:0x15 DW_TAG_subprogram + .long .Linfo_string354 # DW_AT_linkage_name + .long .Linfo_string355 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 65 # DW_AT_decl_line + .long 5659 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x467:0x5 DW_TAG_formal_parameter + .long 13193 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 30 # Abbrev [30] 0x46d:0xf DW_TAG_subprogram + .long .Linfo_string476 # DW_AT_linkage_name + .long .Linfo_string477 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 69 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 11 # Abbrev [11] 0x47c:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x487:0x34 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string486 # DW_AT_name + .byte 24 # DW_AT_byte_size + .byte 4 # DW_AT_decl_file + .byte 81 # DW_AT_decl_line + .byte 31 # Abbrev [31] 0x490:0x6 DW_TAG_inheritance + .long 1211 # DW_AT_type + .byte 0 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x496:0xc DW_TAG_member + .long .Linfo_string485 # DW_AT_name + .long 930 # DW_AT_type + .byte 4 # DW_AT_decl_file + .byte 82 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 25 # Abbrev [25] 0x4a2:0xd DW_TAG_subprogram + .long .Linfo_string482 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 83 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x4a9:0x5 DW_TAG_formal_parameter + .long 13318 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 15 # Abbrev [15] 0x4af:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string483 # DW_AT_name + .byte 16 # Abbrev [16] 0x4b4:0x5 DW_TAG_template_type_parameter + .long 930 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x4bb:0x1c DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string484 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 4 # DW_AT_decl_file + .byte 128 # DW_AT_decl_line + .byte 25 # Abbrev [25] 0x4c4:0xd DW_TAG_subprogram + .long .Linfo_string482 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 129 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x4cb:0x5 DW_TAG_formal_parameter + .long 13313 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 14 # Abbrev [14] 0x4d1:0x5 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string483 # DW_AT_name + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x4d7:0x106 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string503 # DW_AT_name + .byte 24 # DW_AT_byte_size + .byte 4 # DW_AT_decl_file + .byte 144 # DW_AT_decl_line + .byte 6 # Abbrev [6] 0x4e0:0xc DW_TAG_member + .long .Linfo_string488 # DW_AT_name + .long 1159 # DW_AT_type + .byte 4 # DW_AT_decl_file + .byte 147 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 25 # Abbrev [25] 0x4ec:0xd DW_TAG_subprogram + .long .Linfo_string489 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 149 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x4f3:0x5 DW_TAG_formal_parameter + .long 13352 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 25 # Abbrev [25] 0x4f9:0x12 DW_TAG_subprogram + .long .Linfo_string489 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 150 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x500:0x5 DW_TAG_formal_parameter + .long 13352 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x505:0x5 DW_TAG_formal_parameter + .long 714 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 25 # Abbrev [25] 0x50b:0x17 DW_TAG_subprogram + .long .Linfo_string489 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 153 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x512:0x5 DW_TAG_formal_parameter + .long 13352 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x517:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x51c:0x5 DW_TAG_formal_parameter + .long 220 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 30 # Abbrev [30] 0x522:0xf DW_TAG_subprogram + .long .Linfo_string492 # DW_AT_linkage_name + .long .Linfo_string10 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 161 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 26 # Abbrev [26] 0x531:0x15 DW_TAG_subprogram + .long .Linfo_string493 # DW_AT_linkage_name + .long .Linfo_string344 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 164 # DW_AT_decl_line + .long 13357 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x540:0x5 DW_TAG_formal_parameter + .long 13352 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x546:0x15 DW_TAG_subprogram + .long .Linfo_string494 # DW_AT_linkage_name + .long .Linfo_string346 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 168 # DW_AT_decl_line + .long 13357 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x555:0x5 DW_TAG_formal_parameter + .long 13352 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x55b:0x15 DW_TAG_subprogram + .long .Linfo_string495 # DW_AT_linkage_name + .long .Linfo_string102 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 172 # DW_AT_decl_line + .long 3828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x56a:0x5 DW_TAG_formal_parameter + .long 13362 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x570:0x15 DW_TAG_subprogram + .long .Linfo_string496 # DW_AT_linkage_name + .long .Linfo_string355 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 176 # DW_AT_decl_line + .long 5659 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x57f:0x5 DW_TAG_formal_parameter + .long 13362 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x585:0x1a DW_TAG_subprogram + .long .Linfo_string497 # DW_AT_linkage_name + .long .Linfo_string498 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 184 # DW_AT_decl_line + .long 13357 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x594:0x5 DW_TAG_formal_parameter + .long 13352 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x599:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x59f:0x1a DW_TAG_subprogram + .long .Linfo_string499 # DW_AT_linkage_name + .long .Linfo_string500 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 188 # DW_AT_decl_line + .long 13357 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x5ae:0x5 DW_TAG_formal_parameter + .long 13352 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x5b3:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x5b9:0x15 DW_TAG_subprogram + .long .Linfo_string501 # DW_AT_linkage_name + .long .Linfo_string502 # DW_AT_name + .byte 4 # DW_AT_decl_file + .byte 192 # DW_AT_decl_line + .long 689 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x5c8:0x5 DW_TAG_formal_parameter + .long 13362 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 11 # Abbrev [11] 0x5ce:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 14 # Abbrev [14] 0x5d7:0x5 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string483 # DW_AT_name + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0x5dd:0x4d DW_TAG_subprogram + .long .Linfo_string507 # DW_AT_linkage_name + .long .Linfo_string508 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 13 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0x5ed:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0x5f6:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 11 # Abbrev [11] 0x5ff:0x9 DW_TAG_template_type_parameter + .long 829 # DW_AT_type + .long .Linfo_string506 # DW_AT_name + .byte 33 # Abbrev [33] 0x608:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 13 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x613:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 13 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x61e:0xb DW_TAG_formal_parameter + .long .Linfo_string3 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 13 # DW_AT_decl_line + .long 829 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0x62a:0x83 DW_TAG_subprogram + .long .Linfo_string523 # DW_AT_linkage_name + .long .Linfo_string524 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0x63a:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0x643:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0x64c:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 11 # Abbrev [11] 0x655:0x9 DW_TAG_template_type_parameter + .long 855 # DW_AT_type + .long .Linfo_string517 # DW_AT_name + .byte 15 # Abbrev [15] 0x65e:0x1a DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0x663:0x5 DW_TAG_template_type_parameter + .long 1709 # DW_AT_type + .byte 16 # Abbrev [16] 0x668:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x66d:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x672:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 34 # Abbrev [34] 0x678:0x1 DW_TAG_template_type_parameter + .byte 33 # Abbrev [33] 0x679:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x684:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0x68f:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x69a:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0x6a5:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 235 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x6ad:0x15 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string519 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 21 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0x6b6:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string28 # DW_AT_name + .byte 16 # Abbrev [16] 0x6bb:0x5 DW_TAG_template_type_parameter + .long 876 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 24 # Abbrev [24] 0x6c2:0x9 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string520 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 50 # DW_AT_decl_line + .byte 24 # Abbrev [24] 0x6cb:0x9 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string521 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 11 # DW_AT_decl_line + .byte 24 # Abbrev [24] 0x6d4:0x9 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string522 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 9 # DW_AT_decl_line + .byte 32 # Abbrev [32] 0x6dd:0x88 DW_TAG_subprogram + .long .Linfo_string529 # DW_AT_linkage_name + .long .Linfo_string530 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0x6ed:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0x6f6:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0x6ff:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 11 # Abbrev [11] 0x708:0x9 DW_TAG_template_type_parameter + .long 855 # DW_AT_type + .long .Linfo_string527 # DW_AT_name + .byte 15 # Abbrev [15] 0x711:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string528 # DW_AT_name + .byte 16 # Abbrev [16] 0x716:0x5 DW_TAG_template_type_parameter + .long 876 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 15 # Abbrev [15] 0x71c:0x15 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0x721:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x726:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x72b:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 33 # Abbrev [33] 0x731:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x73c:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0x747:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x752:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0x75d:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 276 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0x765:0x79 DW_TAG_subprogram + .long .Linfo_string532 # DW_AT_linkage_name + .long .Linfo_string533 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0x775:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0x77e:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0x787:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 15 # Abbrev [15] 0x790:0x1a DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0x795:0x5 DW_TAG_template_type_parameter + .long 829 # DW_AT_type + .byte 16 # Abbrev [16] 0x79a:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x79f:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x7a4:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 33 # Abbrev [33] 0x7aa:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x7b5:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0x7c0:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x7cb:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0x7d6:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .long 312 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 24 # Abbrev [24] 0x7de:0x9 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string534 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 10 # DW_AT_decl_line + .byte 32 # Abbrev [32] 0x7e7:0xb1 DW_TAG_subprogram + .long .Linfo_string538 # DW_AT_linkage_name + .long .Linfo_string539 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 255 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0x7f7:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0x800:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0x809:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 12 # Abbrev [12] 0x812:0xa DW_TAG_template_value_parameter + .long 677 # DW_AT_type + .long .Linfo_string536 # DW_AT_name + .byte 0 # DW_AT_const_value + .byte 12 # Abbrev [12] 0x81c:0xa DW_TAG_template_value_parameter + .long 677 # DW_AT_type + .long .Linfo_string537 # DW_AT_name + .byte 0 # DW_AT_const_value + .byte 15 # Abbrev [15] 0x826:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string28 # DW_AT_name + .byte 16 # Abbrev [16] 0x82b:0x5 DW_TAG_template_type_parameter + .long 897 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 15 # Abbrev [15] 0x831:0x15 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0x836:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x83b:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x840:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 33 # Abbrev [33] 0x846:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 255 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x851:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 255 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0x85c:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 255 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x867:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 255 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 33 # Abbrev [33] 0x872:0xb DW_TAG_formal_parameter + .long .Linfo_string540 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 255 # DW_AT_decl_line + .long 353 # DW_AT_type + .byte 36 # Abbrev [36] 0x87d:0xc DW_TAG_variable + .long .Linfo_string545 # DW_AT_name + .byte 40 # DW_AT_decl_file + .short 257 # DW_AT_decl_line + .long 666 # DW_AT_type + .byte 37 # Abbrev [37] 0x889:0xe DW_TAG_lexical_block + .byte 36 # Abbrev [36] 0x88a:0xc DW_TAG_variable + .long .Linfo_string546 # DW_AT_name + .byte 40 # DW_AT_decl_file + .short 259 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0x898:0x29 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string543 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 26 # DW_AT_decl_line + .byte 12 # Abbrev [12] 0x8a1:0xa DW_TAG_template_value_parameter + .long 677 # DW_AT_type + .long .Linfo_string541 # DW_AT_name + .byte 0 # DW_AT_const_value + .byte 12 # Abbrev [12] 0x8ab:0xa DW_TAG_template_value_parameter + .long 677 # DW_AT_type + .long .Linfo_string542 # DW_AT_name + .byte 0 # DW_AT_const_value + .byte 15 # Abbrev [15] 0x8b5:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string28 # DW_AT_name + .byte 16 # Abbrev [16] 0x8ba:0x5 DW_TAG_template_type_parameter + .long 897 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 38 # Abbrev [38] 0x8c1:0x85 DW_TAG_subprogram + .long .Linfo_string547 # DW_AT_linkage_name + .long .Linfo_string548 # DW_AT_name + .byte 40 # DW_AT_decl_file + .short 297 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0x8d2:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0x8db:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0x8e4:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 15 # Abbrev [15] 0x8ed:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string28 # DW_AT_name + .byte 16 # Abbrev [16] 0x8f2:0x5 DW_TAG_template_type_parameter + .long 897 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 15 # Abbrev [15] 0x8f8:0x15 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0x8fd:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x902:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x907:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 39 # Abbrev [39] 0x90d:0xc DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .short 297 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 39 # Abbrev [39] 0x919:0xc DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .short 297 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 39 # Abbrev [39] 0x925:0xc DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .short 297 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 39 # Abbrev [39] 0x931:0xc DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .short 297 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 40 # Abbrev [40] 0x93d:0x8 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .short 297 # DW_AT_decl_line + .long 389 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0x946:0x82 DW_TAG_subprogram + .long .Linfo_string550 # DW_AT_linkage_name + .long .Linfo_string551 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0x956:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0x95f:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0x968:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 11 # Abbrev [11] 0x971:0x9 DW_TAG_template_type_parameter + .long 876 # DW_AT_type + .long .Linfo_string527 # DW_AT_name + .byte 14 # Abbrev [14] 0x97a:0x5 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string528 # DW_AT_name + .byte 15 # Abbrev [15] 0x97f:0x15 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0x984:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0x989:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0x98e:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 33 # Abbrev [33] 0x994:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x99f:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0x9aa:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0x9b5:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0x9c0:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 425 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0x9c8:0x74 DW_TAG_subprogram + .long .Linfo_string554 # DW_AT_linkage_name + .long .Linfo_string555 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0x9d8:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0x9e1:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0x9ea:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 11 # Abbrev [11] 0x9f3:0x9 DW_TAG_template_type_parameter + .long 897 # DW_AT_type + .long .Linfo_string517 # DW_AT_name + .byte 15 # Abbrev [15] 0x9fc:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0xa01:0x5 DW_TAG_template_type_parameter + .long 2620 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 34 # Abbrev [34] 0xa07:0x1 DW_TAG_template_type_parameter + .byte 33 # Abbrev [33] 0xa08:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xa13:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0xa1e:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xa29:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0xa34:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 461 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 24 # Abbrev [24] 0xa3c:0x9 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string553 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 12 # DW_AT_decl_line + .byte 32 # Abbrev [32] 0xa45:0x78 DW_TAG_subprogram + .long .Linfo_string557 # DW_AT_linkage_name + .long .Linfo_string558 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0xa55:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0xa5e:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0xa67:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 11 # Abbrev [11] 0xa70:0x9 DW_TAG_template_type_parameter + .long 897 # DW_AT_type + .long .Linfo_string527 # DW_AT_name + .byte 14 # Abbrev [14] 0xa79:0x5 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string528 # DW_AT_name + .byte 15 # Abbrev [15] 0xa7e:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0xa83:0x5 DW_TAG_template_type_parameter + .long 2620 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 33 # Abbrev [33] 0xa89:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xa94:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0xa9f:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xaaa:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0xab5:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 487 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 13 # Abbrev [13] 0xabd:0x15 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string559 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 7 # DW_AT_decl_file + .byte 21 # DW_AT_decl_line + .byte 15 # Abbrev [15] 0xac6:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string28 # DW_AT_name + .byte 16 # Abbrev [16] 0xacb:0x5 DW_TAG_template_type_parameter + .long 897 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0xad2:0x5c DW_TAG_subprogram + .long .Linfo_string561 # DW_AT_linkage_name + .long .Linfo_string562 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 56 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0xae2:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0xaeb:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0xaf4:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 14 # Abbrev [14] 0xafd:0x5 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 35 # Abbrev [35] 0xb02:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 56 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xb09:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 56 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 35 # Abbrev [35] 0xb14:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 56 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xb1b:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 56 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0xb26:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 56 # DW_AT_decl_line + .long 513 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0xb2e:0x53 DW_TAG_subprogram + .long .Linfo_string564 # DW_AT_linkage_name + .long .Linfo_string562 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 38 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0xb3e:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0xb47:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0xb50:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 35 # Abbrev [35] 0xb59:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 38 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 35 # Abbrev [35] 0xb60:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 38 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 35 # Abbrev [35] 0xb67:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 38 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xb6e:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 38 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0xb79:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 38 # DW_AT_decl_line + .long 534 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0xb81:0x6a DW_TAG_subprogram + .long .Linfo_string566 # DW_AT_linkage_name + .long .Linfo_string567 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 50 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0xb91:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0xb9a:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0xba3:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 15 # Abbrev [15] 0xbac:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0xbb1:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 33 # Abbrev [33] 0xbb7:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 50 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xbc2:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 50 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0xbcd:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 50 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xbd8:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 50 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0xbe3:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 50 # DW_AT_decl_line + .long 555 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0xbeb:0x6f DW_TAG_subprogram + .long .Linfo_string569 # DW_AT_linkage_name + .long .Linfo_string570 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 166 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0xbfb:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0xc04:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0xc0d:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 15 # Abbrev [15] 0xc16:0x10 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0xc1b:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0xc20:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 33 # Abbrev [33] 0xc26:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 166 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xc31:0xb DW_TAG_formal_parameter + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 166 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0xc3c:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 166 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 33 # Abbrev [33] 0xc47:0xb DW_TAG_formal_parameter + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 166 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 35 # Abbrev [35] 0xc52:0x7 DW_TAG_formal_parameter + .byte 40 # DW_AT_decl_file + .byte 166 # DW_AT_decl_line + .long 581 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 41 # Abbrev [41] 0xc5a:0x28f DW_TAG_subprogram + .quad .Lfunc_begin2 # DW_AT_low_pc + .long .Lfunc_end2-.Lfunc_begin2 # DW_AT_high_pc + .byte 1 # DW_AT_frame_base + .byte 87 + .long .Linfo_string575 # DW_AT_linkage_name + .long .Linfo_string576 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 235 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 42 # Abbrev [42] 0xc77:0xf DW_TAG_formal_parameter + .long .Ldebug_loc3 # DW_AT_location + .long .Linfo_string545 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 235 # DW_AT_decl_line + .long 666 # DW_AT_type + .byte 42 # Abbrev [42] 0xc86:0xf DW_TAG_formal_parameter + .long .Ldebug_loc4 # DW_AT_location + .long .Linfo_string16 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 235 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 42 # Abbrev [42] 0xc95:0xf DW_TAG_formal_parameter + .long .Ldebug_loc5 # DW_AT_location + .long .Linfo_string525 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 235 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 42 # Abbrev [42] 0xca4:0xf DW_TAG_formal_parameter + .long .Ldebug_loc6 # DW_AT_location + .long .Linfo_string18 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 235 # DW_AT_decl_line + .long 13401 # DW_AT_type + .byte 43 # Abbrev [43] 0xcb3:0xf DW_TAG_formal_parameter + .byte 3 # DW_AT_location + .byte 145 + .asciz "\340" + .long .Linfo_string482 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 235 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 33 # Abbrev [33] 0xcc2:0xb DW_TAG_formal_parameter + .long .Linfo_string540 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 235 # DW_AT_decl_line + .long 353 # DW_AT_type + .byte 44 # Abbrev [44] 0xccd:0x118 DW_TAG_lexical_block + .quad .Ltmp15 # DW_AT_low_pc + .long .Ltmp26-.Ltmp15 # DW_AT_high_pc + .byte 45 # Abbrev [45] 0xcda:0xb DW_TAG_variable + .long .Linfo_string546 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 241 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 46 # Abbrev [46] 0xce5:0xa8 DW_TAG_inlined_subroutine + .long 2629 # DW_AT_abstract_origin + .quad .Ltmp16 # DW_AT_low_pc + .long .Ltmp21-.Ltmp16 # DW_AT_high_pc + .byte 40 # DW_AT_call_file + .byte 241 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xcf8:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc7 # DW_AT_location + .long 2697 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xd01:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc8 # DW_AT_location + .long 2708 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xd0a:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc9 # DW_AT_location + .long 2719 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xd13:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc24 # DW_AT_location + .long 2730 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0xd1c:0x70 DW_TAG_inlined_subroutine + .long 2504 # DW_AT_abstract_origin + .quad .Ltmp16 # DW_AT_low_pc + .long .Ltmp21-.Ltmp16 # DW_AT_high_pc + .byte 40 # DW_AT_call_file + .byte 146 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xd2f:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc10 # DW_AT_location + .long 2568 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xd38:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc11 # DW_AT_location + .long 2579 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xd41:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc12 # DW_AT_location + .long 2590 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xd4a:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc25 # DW_AT_location + .long 2601 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0xd53:0x38 DW_TAG_inlined_subroutine + .long 2770 # DW_AT_abstract_origin + .quad .Ltmp20 # DW_AT_low_pc + .long .Ltmp21-.Ltmp20 # DW_AT_high_pc + .byte 40 # DW_AT_call_file + .byte 67 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xd66:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc13 # DW_AT_location + .long 2818 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xd6f:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc27 # DW_AT_location + .long 2825 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xd78:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc14 # DW_AT_location + .long 2836 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xd81:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc26 # DW_AT_location + .long 2843 # DW_AT_abstract_origin + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 44 # Abbrev [44] 0xd8d:0x57 DW_TAG_lexical_block + .quad .Ltmp21 # DW_AT_low_pc + .long .Ltmp25-.Ltmp21 # DW_AT_high_pc + .byte 48 # Abbrev [48] 0xd9a:0xf DW_TAG_variable + .long .Ldebug_loc23 # DW_AT_location + .long .Linfo_string577 # DW_AT_name + .byte 40 # DW_AT_decl_file + .byte 246 # DW_AT_decl_line + .long 1239 # DW_AT_type + .byte 46 # Abbrev [46] 0xda9:0x3a DW_TAG_inlined_subroutine + .long 13888 # DW_AT_abstract_origin + .quad .Ltmp24 # DW_AT_low_pc + .long .Ltmp25-.Ltmp24 # DW_AT_high_pc + .byte 40 # DW_AT_call_file + .byte 246 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xdbc:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc15 # DW_AT_location + .long 13898 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0xdc5:0x1d DW_TAG_inlined_subroutine + .long 13863 # DW_AT_abstract_origin + .quad .Ltmp24 # DW_AT_low_pc + .long .Ltmp25-.Ltmp24 # DW_AT_high_pc + .byte 4 # DW_AT_call_file + .byte 173 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xdd8:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc16 # DW_AT_location + .long 13873 # DW_AT_abstract_origin + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 49 # Abbrev [49] 0xde5:0xb4 DW_TAG_inlined_subroutine + .long 3051 # DW_AT_abstract_origin + .long .Ldebug_ranges9 # DW_AT_ranges + .byte 40 # DW_AT_call_file + .byte 251 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xdf0:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc21 # DW_AT_location + .long 3132 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0xdf9:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc20 # DW_AT_location + .long 3143 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0xe02:0x3f DW_TAG_inlined_subroutine + .long 2945 # DW_AT_abstract_origin + .quad .Ltmp29 # DW_AT_low_pc + .long .Ltmp33-.Ltmp29 # DW_AT_high_pc + .byte 40 # DW_AT_call_file + .byte 170 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xe15:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc22 # DW_AT_location + .long 3021 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0xe1e:0x5 DW_TAG_formal_parameter + .long 3032 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0xe23:0x1d DW_TAG_inlined_subroutine + .long 2862 # DW_AT_abstract_origin + .quad .Ltmp29 # DW_AT_low_pc + .long .Ltmp33-.Ltmp29 # DW_AT_high_pc + .byte 40 # DW_AT_call_file + .byte 51 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xe36:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc28 # DW_AT_location + .long 2926 # DW_AT_abstract_origin + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 46 # Abbrev [46] 0xe41:0x57 DW_TAG_inlined_subroutine + .long 13913 # DW_AT_abstract_origin + .quad .Ltmp34 # DW_AT_low_pc + .long .Ltmp35-.Ltmp34 # DW_AT_high_pc + .byte 40 # DW_AT_call_file + .byte 168 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xe54:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc17 # DW_AT_location + .long 13927 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0xe5d:0x3a DW_TAG_inlined_subroutine + .long 13323 # DW_AT_abstract_origin + .quad .Ltmp34 # DW_AT_low_pc + .long .Ltmp35-.Ltmp34 # DW_AT_high_pc + .byte 4 # DW_AT_call_file + .byte 147 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xe70:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc18 # DW_AT_location + .long 13337 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0xe79:0x1d DW_TAG_inlined_subroutine + .long 13284 # DW_AT_abstract_origin + .quad .Ltmp34 # DW_AT_low_pc + .long .Ltmp35-.Ltmp34 # DW_AT_high_pc + .byte 4 # DW_AT_call_file + .byte 82 # DW_AT_call_line + .byte 47 # Abbrev [47] 0xe8c:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc19 # DW_AT_location + .long 13298 # DW_AT_abstract_origin + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 11 # Abbrev [11] 0xe99:0x9 DW_TAG_template_type_parameter + .long 1239 # DW_AT_type + .long .Linfo_string516 # DW_AT_name + .byte 11 # Abbrev [11] 0xea2:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 11 # Abbrev [11] 0xeab:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string505 # DW_AT_name + .byte 12 # Abbrev [12] 0xeb4:0xa DW_TAG_template_value_parameter + .long 677 # DW_AT_type + .long .Linfo_string536 # DW_AT_name + .byte 0 # DW_AT_const_value + .byte 12 # Abbrev [12] 0xebe:0xa DW_TAG_template_value_parameter + .long 677 # DW_AT_type + .long .Linfo_string537 # DW_AT_name + .byte 0 # DW_AT_const_value + .byte 15 # Abbrev [15] 0xec8:0xb DW_TAG_GNU_template_parameter_pack + .long .Linfo_string28 # DW_AT_name + .byte 16 # Abbrev [16] 0xecd:0x5 DW_TAG_template_type_parameter + .long 897 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 15 # Abbrev [15] 0xed3:0x15 DW_TAG_GNU_template_parameter_pack + .long .Linfo_string518 # DW_AT_name + .byte 16 # Abbrev [16] 0xed8:0x5 DW_TAG_template_type_parameter + .long 1730 # DW_AT_type + .byte 16 # Abbrev [16] 0xedd:0x5 DW_TAG_template_type_parameter + .long 1739 # DW_AT_type + .byte 16 # Abbrev [16] 0xee2:0x5 DW_TAG_template_type_parameter + .long 1748 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 3 # Abbrev [3] 0xeea:0x5 DW_TAG_const_type + .long 714 # DW_AT_type + .byte 21 # Abbrev [21] 0xeef:0x5 DW_TAG_pointer_type + .long 723 # DW_AT_type + .byte 19 # Abbrev [19] 0xef4:0x7 DW_TAG_base_type + .long .Linfo_string36 # DW_AT_name + .byte 2 # DW_AT_encoding + .byte 1 # DW_AT_byte_size + .byte 4 # Abbrev [4] 0xefb:0x1013 DW_TAG_namespace + .long .Linfo_string37 # DW_AT_name + .byte 51 # Abbrev [51] 0xf00:0x7 DW_TAG_imported_declaration + .byte 9 # DW_AT_decl_file + .byte 56 # DW_AT_decl_line + .long 7950 # DW_AT_import + .byte 51 # Abbrev [51] 0xf07:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 48 # DW_AT_decl_line + .long 7962 # DW_AT_import + .byte 51 # Abbrev [51] 0xf0e:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 49 # DW_AT_decl_line + .long 7991 # DW_AT_import + .byte 51 # Abbrev [51] 0xf15:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 50 # DW_AT_decl_line + .long 8020 # DW_AT_import + .byte 51 # Abbrev [51] 0xf1c:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 51 # DW_AT_decl_line + .long 8049 # DW_AT_import + .byte 51 # Abbrev [51] 0xf23:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 53 # DW_AT_decl_line + .long 8078 # DW_AT_import + .byte 51 # Abbrev [51] 0xf2a:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 54 # DW_AT_decl_line + .long 8089 # DW_AT_import + .byte 51 # Abbrev [51] 0xf31:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 55 # DW_AT_decl_line + .long 8100 # DW_AT_import + .byte 51 # Abbrev [51] 0xf38:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 56 # DW_AT_decl_line + .long 8111 # DW_AT_import + .byte 51 # Abbrev [51] 0xf3f:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 58 # DW_AT_decl_line + .long 8122 # DW_AT_import + .byte 51 # Abbrev [51] 0xf46:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 59 # DW_AT_decl_line + .long 8133 # DW_AT_import + .byte 51 # Abbrev [51] 0xf4d:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 60 # DW_AT_decl_line + .long 8144 # DW_AT_import + .byte 51 # Abbrev [51] 0xf54:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 61 # DW_AT_decl_line + .long 8155 # DW_AT_import + .byte 51 # Abbrev [51] 0xf5b:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 63 # DW_AT_decl_line + .long 8166 # DW_AT_import + .byte 51 # Abbrev [51] 0xf62:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 8188 # DW_AT_import + .byte 51 # Abbrev [51] 0xf69:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 66 # DW_AT_decl_line + .long 8199 # DW_AT_import + .byte 51 # Abbrev [51] 0xf70:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 67 # DW_AT_decl_line + .long 8228 # DW_AT_import + .byte 51 # Abbrev [51] 0xf77:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 68 # DW_AT_decl_line + .long 8257 # DW_AT_import + .byte 51 # Abbrev [51] 0xf7e:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 69 # DW_AT_decl_line + .long 8286 # DW_AT_import + .byte 51 # Abbrev [51] 0xf85:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 71 # DW_AT_decl_line + .long 8308 # DW_AT_import + .byte 51 # Abbrev [51] 0xf8c:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 72 # DW_AT_decl_line + .long 8319 # DW_AT_import + .byte 51 # Abbrev [51] 0xf93:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 73 # DW_AT_decl_line + .long 8330 # DW_AT_import + .byte 51 # Abbrev [51] 0xf9a:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 74 # DW_AT_decl_line + .long 8341 # DW_AT_import + .byte 51 # Abbrev [51] 0xfa1:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 76 # DW_AT_decl_line + .long 8352 # DW_AT_import + .byte 51 # Abbrev [51] 0xfa8:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 77 # DW_AT_decl_line + .long 8363 # DW_AT_import + .byte 51 # Abbrev [51] 0xfaf:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 78 # DW_AT_decl_line + .long 8374 # DW_AT_import + .byte 51 # Abbrev [51] 0xfb6:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 79 # DW_AT_decl_line + .long 8385 # DW_AT_import + .byte 51 # Abbrev [51] 0xfbd:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 81 # DW_AT_decl_line + .long 8396 # DW_AT_import + .byte 51 # Abbrev [51] 0xfc4:0x7 DW_TAG_imported_declaration + .byte 12 # DW_AT_decl_file + .byte 82 # DW_AT_decl_line + .long 8418 # DW_AT_import + .byte 4 # Abbrev [4] 0xfcb:0x13a DW_TAG_namespace + .long .Linfo_string84 # DW_AT_name + .byte 5 # Abbrev [5] 0xfd0:0x12d DW_TAG_class_type + .byte 4 # DW_AT_calling_convention + .long .Linfo_string86 # DW_AT_name + .byte 8 # DW_AT_byte_size + .byte 15 # DW_AT_decl_file + .byte 79 # DW_AT_decl_line + .byte 6 # Abbrev [6] 0xfd9:0xc DW_TAG_member + .long .Linfo_string85 # DW_AT_name + .long 8429 # DW_AT_type + .byte 15 # DW_AT_decl_file + .byte 81 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 52 # Abbrev [52] 0xfe5:0x12 DW_TAG_subprogram + .long .Linfo_string86 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 83 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + # DW_AT_explicit + .byte 8 # Abbrev [8] 0xfec:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0xff1:0x5 DW_TAG_formal_parameter + .long 8429 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 29 # Abbrev [29] 0xff7:0x11 DW_TAG_subprogram + .long .Linfo_string87 # DW_AT_linkage_name + .long .Linfo_string88 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 85 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x1002:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 29 # Abbrev [29] 0x1008:0x11 DW_TAG_subprogram + .long .Linfo_string89 # DW_AT_linkage_name + .long .Linfo_string90 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 86 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x1013:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 26 # Abbrev [26] 0x1019:0x15 DW_TAG_subprogram + .long .Linfo_string91 # DW_AT_linkage_name + .long .Linfo_string92 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 88 # DW_AT_decl_line + .long 8429 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 8 # Abbrev [8] 0x1028:0x5 DW_TAG_formal_parameter + .long 8435 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 7 # Abbrev [7] 0x102e:0xe DW_TAG_subprogram + .long .Linfo_string86 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 96 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1036:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 7 # Abbrev [7] 0x103c:0x13 DW_TAG_subprogram + .long .Linfo_string86 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 98 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1044:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1049:0x5 DW_TAG_formal_parameter + .long 8445 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 7 # Abbrev [7] 0x104f:0x13 DW_TAG_subprogram + .long .Linfo_string86 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 101 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1057:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x105c:0x5 DW_TAG_formal_parameter + .long 4357 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 7 # Abbrev [7] 0x1062:0x13 DW_TAG_subprogram + .long .Linfo_string86 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 105 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x106a:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x106f:0x5 DW_TAG_formal_parameter + .long 8455 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x1075:0x1b DW_TAG_subprogram + .long .Linfo_string95 # DW_AT_linkage_name + .long .Linfo_string96 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 118 # DW_AT_decl_line + .long 8460 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1085:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x108a:0x5 DW_TAG_formal_parameter + .long 8445 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x1090:0x1b DW_TAG_subprogram + .long .Linfo_string97 # DW_AT_linkage_name + .long .Linfo_string96 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 122 # DW_AT_decl_line + .long 8460 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x10a0:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x10a5:0x5 DW_TAG_formal_parameter + .long 8455 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 7 # Abbrev [7] 0x10ab:0xe DW_TAG_subprogram + .long .Linfo_string98 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 129 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x10b3:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 53 # Abbrev [53] 0x10b9:0x17 DW_TAG_subprogram + .long .Linfo_string99 # DW_AT_linkage_name + .long .Linfo_string100 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 132 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x10c5:0x5 DW_TAG_formal_parameter + .long 8430 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x10ca:0x5 DW_TAG_formal_parameter + .long 8460 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 54 # Abbrev [54] 0x10d0:0x16 DW_TAG_subprogram + .long .Linfo_string101 # DW_AT_linkage_name + .long .Linfo_string102 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 144 # DW_AT_decl_line + .long 3828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + # DW_AT_explicit + .byte 8 # Abbrev [8] 0x10e0:0x5 DW_TAG_formal_parameter + .long 8435 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x10e6:0x16 DW_TAG_subprogram + .long .Linfo_string103 # DW_AT_linkage_name + .long .Linfo_string104 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 153 # DW_AT_decl_line + .long 8465 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x10f6:0x5 DW_TAG_formal_parameter + .long 8435 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 51 # Abbrev [51] 0x10fd:0x7 DW_TAG_imported_declaration + .byte 15 # DW_AT_decl_file + .byte 73 # DW_AT_decl_line + .long 4380 # DW_AT_import + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x1105:0xb DW_TAG_typedef + .long 8450 # DW_AT_type + .long .Linfo_string94 # DW_AT_name + .byte 16 # DW_AT_decl_file + .byte 242 # DW_AT_decl_line + .byte 55 # Abbrev [55] 0x1110:0x5 DW_TAG_class_type + .long .Linfo_string105 # DW_AT_name + # DW_AT_declaration + .byte 51 # Abbrev [51] 0x1115:0x7 DW_TAG_imported_declaration + .byte 15 # DW_AT_decl_file + .byte 57 # DW_AT_decl_line + .long 4048 # DW_AT_import + .byte 56 # Abbrev [56] 0x111c:0x11 DW_TAG_subprogram + .long .Linfo_string106 # DW_AT_linkage_name + .long .Linfo_string107 # DW_AT_name + .byte 15 # DW_AT_decl_file + .byte 69 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + # DW_AT_noreturn + .byte 9 # Abbrev [9] 0x1127:0x5 DW_TAG_formal_parameter + .long 4048 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 57 # Abbrev [57] 0x112d:0x5 DW_TAG_namespace + .long .Linfo_string109 # DW_AT_name + .byte 51 # Abbrev [51] 0x1132:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 8488 # DW_AT_import + .byte 51 # Abbrev [51] 0x1139:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 139 # DW_AT_decl_line + .long 8570 # DW_AT_import + .byte 51 # Abbrev [51] 0x1140:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 141 # DW_AT_decl_line + .long 8581 # DW_AT_import + .byte 51 # Abbrev [51] 0x1147:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 8599 # DW_AT_import + .byte 51 # Abbrev [51] 0x114e:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 143 # DW_AT_decl_line + .long 9092 # DW_AT_import + .byte 51 # Abbrev [51] 0x1155:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 144 # DW_AT_decl_line + .long 9142 # DW_AT_import + .byte 51 # Abbrev [51] 0x115c:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 145 # DW_AT_decl_line + .long 9165 # DW_AT_import + .byte 51 # Abbrev [51] 0x1163:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 146 # DW_AT_decl_line + .long 9203 # DW_AT_import + .byte 51 # Abbrev [51] 0x116a:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 147 # DW_AT_decl_line + .long 9226 # DW_AT_import + .byte 51 # Abbrev [51] 0x1171:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 148 # DW_AT_decl_line + .long 9250 # DW_AT_import + .byte 51 # Abbrev [51] 0x1178:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 149 # DW_AT_decl_line + .long 9274 # DW_AT_import + .byte 51 # Abbrev [51] 0x117f:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 150 # DW_AT_decl_line + .long 9292 # DW_AT_import + .byte 51 # Abbrev [51] 0x1186:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 151 # DW_AT_decl_line + .long 9304 # DW_AT_import + .byte 51 # Abbrev [51] 0x118d:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 152 # DW_AT_decl_line + .long 9347 # DW_AT_import + .byte 51 # Abbrev [51] 0x1194:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 153 # DW_AT_decl_line + .long 9380 # DW_AT_import + .byte 51 # Abbrev [51] 0x119b:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 154 # DW_AT_decl_line + .long 9408 # DW_AT_import + .byte 51 # Abbrev [51] 0x11a2:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 155 # DW_AT_decl_line + .long 9451 # DW_AT_import + .byte 51 # Abbrev [51] 0x11a9:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 156 # DW_AT_decl_line + .long 9474 # DW_AT_import + .byte 51 # Abbrev [51] 0x11b0:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 158 # DW_AT_decl_line + .long 9492 # DW_AT_import + .byte 51 # Abbrev [51] 0x11b7:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 160 # DW_AT_decl_line + .long 9521 # DW_AT_import + .byte 51 # Abbrev [51] 0x11be:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 161 # DW_AT_decl_line + .long 9545 # DW_AT_import + .byte 51 # Abbrev [51] 0x11c5:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 162 # DW_AT_decl_line + .long 9568 # DW_AT_import + .byte 51 # Abbrev [51] 0x11cc:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 164 # DW_AT_decl_line + .long 9649 # DW_AT_import + .byte 51 # Abbrev [51] 0x11d3:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 167 # DW_AT_decl_line + .long 9677 # DW_AT_import + .byte 51 # Abbrev [51] 0x11da:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 170 # DW_AT_decl_line + .long 9710 # DW_AT_import + .byte 51 # Abbrev [51] 0x11e1:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 172 # DW_AT_decl_line + .long 9738 # DW_AT_import + .byte 51 # Abbrev [51] 0x11e8:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 174 # DW_AT_decl_line + .long 9761 # DW_AT_import + .byte 51 # Abbrev [51] 0x11ef:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 176 # DW_AT_decl_line + .long 9784 # DW_AT_import + .byte 51 # Abbrev [51] 0x11f6:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 177 # DW_AT_decl_line + .long 9817 # DW_AT_import + .byte 51 # Abbrev [51] 0x11fd:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 178 # DW_AT_decl_line + .long 9839 # DW_AT_import + .byte 51 # Abbrev [51] 0x1204:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 179 # DW_AT_decl_line + .long 9861 # DW_AT_import + .byte 51 # Abbrev [51] 0x120b:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 180 # DW_AT_decl_line + .long 9883 # DW_AT_import + .byte 51 # Abbrev [51] 0x1212:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 181 # DW_AT_decl_line + .long 9905 # DW_AT_import + .byte 51 # Abbrev [51] 0x1219:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 182 # DW_AT_decl_line + .long 9927 # DW_AT_import + .byte 51 # Abbrev [51] 0x1220:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 183 # DW_AT_decl_line + .long 9980 # DW_AT_import + .byte 51 # Abbrev [51] 0x1227:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 184 # DW_AT_decl_line + .long 9997 # DW_AT_import + .byte 51 # Abbrev [51] 0x122e:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 185 # DW_AT_decl_line + .long 10024 # DW_AT_import + .byte 51 # Abbrev [51] 0x1235:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 186 # DW_AT_decl_line + .long 10051 # DW_AT_import + .byte 51 # Abbrev [51] 0x123c:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 187 # DW_AT_decl_line + .long 10078 # DW_AT_import + .byte 51 # Abbrev [51] 0x1243:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 188 # DW_AT_decl_line + .long 10121 # DW_AT_import + .byte 51 # Abbrev [51] 0x124a:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 189 # DW_AT_decl_line + .long 10143 # DW_AT_import + .byte 51 # Abbrev [51] 0x1251:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 191 # DW_AT_decl_line + .long 10183 # DW_AT_import + .byte 51 # Abbrev [51] 0x1258:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 193 # DW_AT_decl_line + .long 10213 # DW_AT_import + .byte 51 # Abbrev [51] 0x125f:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 194 # DW_AT_decl_line + .long 10240 # DW_AT_import + .byte 51 # Abbrev [51] 0x1266:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 195 # DW_AT_decl_line + .long 10268 # DW_AT_import + .byte 51 # Abbrev [51] 0x126d:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 196 # DW_AT_decl_line + .long 10296 # DW_AT_import + .byte 51 # Abbrev [51] 0x1274:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 197 # DW_AT_decl_line + .long 10323 # DW_AT_import + .byte 51 # Abbrev [51] 0x127b:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 198 # DW_AT_decl_line + .long 10341 # DW_AT_import + .byte 51 # Abbrev [51] 0x1282:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 199 # DW_AT_decl_line + .long 10369 # DW_AT_import + .byte 51 # Abbrev [51] 0x1289:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 200 # DW_AT_decl_line + .long 10397 # DW_AT_import + .byte 51 # Abbrev [51] 0x1290:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 201 # DW_AT_decl_line + .long 10425 # DW_AT_import + .byte 51 # Abbrev [51] 0x1297:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 202 # DW_AT_decl_line + .long 10453 # DW_AT_import + .byte 51 # Abbrev [51] 0x129e:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 203 # DW_AT_decl_line + .long 10472 # DW_AT_import + .byte 51 # Abbrev [51] 0x12a5:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 204 # DW_AT_decl_line + .long 10491 # DW_AT_import + .byte 51 # Abbrev [51] 0x12ac:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 205 # DW_AT_decl_line + .long 10513 # DW_AT_import + .byte 51 # Abbrev [51] 0x12b3:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 206 # DW_AT_decl_line + .long 10535 # DW_AT_import + .byte 51 # Abbrev [51] 0x12ba:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 207 # DW_AT_decl_line + .long 10557 # DW_AT_import + .byte 51 # Abbrev [51] 0x12c1:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 208 # DW_AT_decl_line + .long 10579 # DW_AT_import + .byte 58 # Abbrev [58] 0x12c8:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 264 # DW_AT_decl_line + .long 10773 # DW_AT_import + .byte 58 # Abbrev [58] 0x12d0:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 265 # DW_AT_decl_line + .long 10803 # DW_AT_import + .byte 58 # Abbrev [58] 0x12d8:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 266 # DW_AT_decl_line + .long 10838 # DW_AT_import + .byte 58 # Abbrev [58] 0x12e0:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 280 # DW_AT_decl_line + .long 10183 # DW_AT_import + .byte 58 # Abbrev [58] 0x12e8:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 283 # DW_AT_decl_line + .long 9649 # DW_AT_import + .byte 58 # Abbrev [58] 0x12f0:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 286 # DW_AT_decl_line + .long 9710 # DW_AT_import + .byte 58 # Abbrev [58] 0x12f8:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 289 # DW_AT_decl_line + .long 9761 # DW_AT_import + .byte 58 # Abbrev [58] 0x1300:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 293 # DW_AT_decl_line + .long 10773 # DW_AT_import + .byte 58 # Abbrev [58] 0x1308:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 294 # DW_AT_decl_line + .long 10803 # DW_AT_import + .byte 58 # Abbrev [58] 0x1310:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 295 # DW_AT_decl_line + .long 10838 # DW_AT_import + .byte 23 # Abbrev [23] 0x1318:0xb DW_TAG_typedef + .long 677 # DW_AT_type + .long .Linfo_string12 # DW_AT_name + .byte 16 # DW_AT_decl_file + .byte 238 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1323:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string224 # DW_AT_name + .byte 16 # DW_AT_decl_file + .byte 239 # DW_AT_decl_line + .byte 51 # Abbrev [51] 0x132e:0x7 DW_TAG_imported_declaration + .byte 26 # DW_AT_decl_file + .byte 53 # DW_AT_decl_line + .long 10873 # DW_AT_import + .byte 51 # Abbrev [51] 0x1335:0x7 DW_TAG_imported_declaration + .byte 26 # DW_AT_decl_file + .byte 54 # DW_AT_decl_line + .long 10878 # DW_AT_import + .byte 51 # Abbrev [51] 0x133c:0x7 DW_TAG_imported_declaration + .byte 26 # DW_AT_decl_file + .byte 55 # DW_AT_decl_line + .long 10900 # DW_AT_import + .byte 51 # Abbrev [51] 0x1343:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 64 # DW_AT_decl_line + .long 10916 # DW_AT_import + .byte 51 # Abbrev [51] 0x134a:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 65 # DW_AT_decl_line + .long 10933 # DW_AT_import + .byte 51 # Abbrev [51] 0x1351:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 66 # DW_AT_decl_line + .long 10950 # DW_AT_import + .byte 51 # Abbrev [51] 0x1358:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 67 # DW_AT_decl_line + .long 10967 # DW_AT_import + .byte 51 # Abbrev [51] 0x135f:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 68 # DW_AT_decl_line + .long 10984 # DW_AT_import + .byte 51 # Abbrev [51] 0x1366:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 69 # DW_AT_decl_line + .long 11001 # DW_AT_import + .byte 51 # Abbrev [51] 0x136d:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 70 # DW_AT_decl_line + .long 11018 # DW_AT_import + .byte 51 # Abbrev [51] 0x1374:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 71 # DW_AT_decl_line + .long 11035 # DW_AT_import + .byte 51 # Abbrev [51] 0x137b:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 72 # DW_AT_decl_line + .long 11052 # DW_AT_import + .byte 51 # Abbrev [51] 0x1382:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 73 # DW_AT_decl_line + .long 11069 # DW_AT_import + .byte 51 # Abbrev [51] 0x1389:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 74 # DW_AT_decl_line + .long 11086 # DW_AT_import + .byte 51 # Abbrev [51] 0x1390:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 75 # DW_AT_decl_line + .long 11103 # DW_AT_import + .byte 51 # Abbrev [51] 0x1397:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 76 # DW_AT_decl_line + .long 11120 # DW_AT_import + .byte 51 # Abbrev [51] 0x139e:0x7 DW_TAG_imported_declaration + .byte 29 # DW_AT_decl_file + .byte 87 # DW_AT_decl_line + .long 11137 # DW_AT_import + .byte 51 # Abbrev [51] 0x13a5:0x7 DW_TAG_imported_declaration + .byte 31 # DW_AT_decl_file + .byte 52 # DW_AT_decl_line + .long 11154 # DW_AT_import + .byte 51 # Abbrev [51] 0x13ac:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 127 # DW_AT_decl_line + .long 11172 # DW_AT_import + .byte 51 # Abbrev [51] 0x13b3:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 128 # DW_AT_decl_line + .long 11184 # DW_AT_import + .byte 51 # Abbrev [51] 0x13ba:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 130 # DW_AT_decl_line + .long 11225 # DW_AT_import + .byte 51 # Abbrev [51] 0x13c1:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 132 # DW_AT_decl_line + .long 11233 # DW_AT_import + .byte 51 # Abbrev [51] 0x13c8:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 134 # DW_AT_decl_line + .long 11256 # DW_AT_import + .byte 51 # Abbrev [51] 0x13cf:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 137 # DW_AT_decl_line + .long 11280 # DW_AT_import + .byte 51 # Abbrev [51] 0x13d6:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 140 # DW_AT_decl_line + .long 11298 # DW_AT_import + .byte 51 # Abbrev [51] 0x13dd:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 141 # DW_AT_decl_line + .long 11315 # DW_AT_import + .byte 51 # Abbrev [51] 0x13e4:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 142 # DW_AT_decl_line + .long 11333 # DW_AT_import + .byte 51 # Abbrev [51] 0x13eb:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 143 # DW_AT_decl_line + .long 11351 # DW_AT_import + .byte 51 # Abbrev [51] 0x13f2:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 144 # DW_AT_decl_line + .long 11427 # DW_AT_import + .byte 51 # Abbrev [51] 0x13f9:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 145 # DW_AT_decl_line + .long 11450 # DW_AT_import + .byte 51 # Abbrev [51] 0x1400:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 146 # DW_AT_decl_line + .long 11473 # DW_AT_import + .byte 51 # Abbrev [51] 0x1407:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 147 # DW_AT_decl_line + .long 11487 # DW_AT_import + .byte 51 # Abbrev [51] 0x140e:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 148 # DW_AT_decl_line + .long 11501 # DW_AT_import + .byte 51 # Abbrev [51] 0x1415:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 149 # DW_AT_decl_line + .long 11519 # DW_AT_import + .byte 51 # Abbrev [51] 0x141c:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 150 # DW_AT_decl_line + .long 11537 # DW_AT_import + .byte 51 # Abbrev [51] 0x1423:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 151 # DW_AT_decl_line + .long 11560 # DW_AT_import + .byte 51 # Abbrev [51] 0x142a:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 153 # DW_AT_decl_line + .long 11578 # DW_AT_import + .byte 51 # Abbrev [51] 0x1431:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 154 # DW_AT_decl_line + .long 11601 # DW_AT_import + .byte 51 # Abbrev [51] 0x1438:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 155 # DW_AT_decl_line + .long 11629 # DW_AT_import + .byte 51 # Abbrev [51] 0x143f:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 157 # DW_AT_decl_line + .long 11657 # DW_AT_import + .byte 51 # Abbrev [51] 0x1446:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 160 # DW_AT_decl_line + .long 11686 # DW_AT_import + .byte 51 # Abbrev [51] 0x144d:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 163 # DW_AT_decl_line + .long 11700 # DW_AT_import + .byte 51 # Abbrev [51] 0x1454:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 164 # DW_AT_decl_line + .long 11712 # DW_AT_import + .byte 51 # Abbrev [51] 0x145b:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 165 # DW_AT_decl_line + .long 11735 # DW_AT_import + .byte 51 # Abbrev [51] 0x1462:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 166 # DW_AT_decl_line + .long 11749 # DW_AT_import + .byte 51 # Abbrev [51] 0x1469:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 167 # DW_AT_decl_line + .long 11781 # DW_AT_import + .byte 51 # Abbrev [51] 0x1470:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 168 # DW_AT_decl_line + .long 11808 # DW_AT_import + .byte 51 # Abbrev [51] 0x1477:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 169 # DW_AT_decl_line + .long 11835 # DW_AT_import + .byte 51 # Abbrev [51] 0x147e:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 171 # DW_AT_decl_line + .long 11853 # DW_AT_import + .byte 51 # Abbrev [51] 0x1485:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 172 # DW_AT_decl_line + .long 11881 # DW_AT_import + .byte 51 # Abbrev [51] 0x148c:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 240 # DW_AT_decl_line + .long 11904 # DW_AT_import + .byte 51 # Abbrev [51] 0x1493:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 242 # DW_AT_decl_line + .long 11945 # DW_AT_import + .byte 51 # Abbrev [51] 0x149a:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 244 # DW_AT_decl_line + .long 11959 # DW_AT_import + .byte 51 # Abbrev [51] 0x14a1:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 245 # DW_AT_decl_line + .long 10711 # DW_AT_import + .byte 51 # Abbrev [51] 0x14a8:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 246 # DW_AT_decl_line + .long 11977 # DW_AT_import + .byte 51 # Abbrev [51] 0x14af:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 248 # DW_AT_decl_line + .long 12000 # DW_AT_import + .byte 51 # Abbrev [51] 0x14b6:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 249 # DW_AT_decl_line + .long 12072 # DW_AT_import + .byte 51 # Abbrev [51] 0x14bd:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 250 # DW_AT_decl_line + .long 12018 # DW_AT_import + .byte 51 # Abbrev [51] 0x14c4:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 251 # DW_AT_decl_line + .long 12045 # DW_AT_import + .byte 51 # Abbrev [51] 0x14cb:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 252 # DW_AT_decl_line + .long 12094 # DW_AT_import + .byte 51 # Abbrev [51] 0x14d2:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 98 # DW_AT_decl_line + .long 12116 # DW_AT_import + .byte 51 # Abbrev [51] 0x14d9:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 99 # DW_AT_decl_line + .long 12127 # DW_AT_import + .byte 51 # Abbrev [51] 0x14e0:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 101 # DW_AT_decl_line + .long 12150 # DW_AT_import + .byte 51 # Abbrev [51] 0x14e7:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 102 # DW_AT_decl_line + .long 12169 # DW_AT_import + .byte 51 # Abbrev [51] 0x14ee:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 103 # DW_AT_decl_line + .long 12186 # DW_AT_import + .byte 51 # Abbrev [51] 0x14f5:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 104 # DW_AT_decl_line + .long 12204 # DW_AT_import + .byte 51 # Abbrev [51] 0x14fc:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 105 # DW_AT_decl_line + .long 12222 # DW_AT_import + .byte 51 # Abbrev [51] 0x1503:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 106 # DW_AT_decl_line + .long 12239 # DW_AT_import + .byte 51 # Abbrev [51] 0x150a:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 107 # DW_AT_decl_line + .long 12257 # DW_AT_import + .byte 51 # Abbrev [51] 0x1511:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 108 # DW_AT_decl_line + .long 12295 # DW_AT_import + .byte 51 # Abbrev [51] 0x1518:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 109 # DW_AT_decl_line + .long 12323 # DW_AT_import + .byte 51 # Abbrev [51] 0x151f:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 110 # DW_AT_decl_line + .long 12345 # DW_AT_import + .byte 51 # Abbrev [51] 0x1526:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 111 # DW_AT_decl_line + .long 12369 # DW_AT_import + .byte 51 # Abbrev [51] 0x152d:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 112 # DW_AT_decl_line + .long 12392 # DW_AT_import + .byte 51 # Abbrev [51] 0x1534:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 113 # DW_AT_decl_line + .long 12415 # DW_AT_import + .byte 51 # Abbrev [51] 0x153b:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 114 # DW_AT_decl_line + .long 12453 # DW_AT_import + .byte 51 # Abbrev [51] 0x1542:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 115 # DW_AT_decl_line + .long 12480 # DW_AT_import + .byte 51 # Abbrev [51] 0x1549:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 116 # DW_AT_decl_line + .long 12504 # DW_AT_import + .byte 51 # Abbrev [51] 0x1550:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 117 # DW_AT_decl_line + .long 12532 # DW_AT_import + .byte 51 # Abbrev [51] 0x1557:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 118 # DW_AT_decl_line + .long 12565 # DW_AT_import + .byte 51 # Abbrev [51] 0x155e:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 119 # DW_AT_decl_line + .long 12583 # DW_AT_import + .byte 51 # Abbrev [51] 0x1565:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 120 # DW_AT_decl_line + .long 12621 # DW_AT_import + .byte 51 # Abbrev [51] 0x156c:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 121 # DW_AT_decl_line + .long 12639 # DW_AT_import + .byte 51 # Abbrev [51] 0x1573:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 126 # DW_AT_decl_line + .long 12650 # DW_AT_import + .byte 51 # Abbrev [51] 0x157a:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 127 # DW_AT_decl_line + .long 12664 # DW_AT_import + .byte 51 # Abbrev [51] 0x1581:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 128 # DW_AT_decl_line + .long 12683 # DW_AT_import + .byte 51 # Abbrev [51] 0x1588:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 129 # DW_AT_decl_line + .long 12706 # DW_AT_import + .byte 51 # Abbrev [51] 0x158f:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 130 # DW_AT_decl_line + .long 12723 # DW_AT_import + .byte 51 # Abbrev [51] 0x1596:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 131 # DW_AT_decl_line + .long 12741 # DW_AT_import + .byte 51 # Abbrev [51] 0x159d:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 132 # DW_AT_decl_line + .long 12758 # DW_AT_import + .byte 51 # Abbrev [51] 0x15a4:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 133 # DW_AT_decl_line + .long 12780 # DW_AT_import + .byte 51 # Abbrev [51] 0x15ab:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 134 # DW_AT_decl_line + .long 12794 # DW_AT_import + .byte 51 # Abbrev [51] 0x15b2:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 135 # DW_AT_decl_line + .long 12813 # DW_AT_import + .byte 51 # Abbrev [51] 0x15b9:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 136 # DW_AT_decl_line + .long 12832 # DW_AT_import + .byte 51 # Abbrev [51] 0x15c0:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 137 # DW_AT_decl_line + .long 12865 # DW_AT_import + .byte 51 # Abbrev [51] 0x15c7:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 138 # DW_AT_decl_line + .long 12889 # DW_AT_import + .byte 51 # Abbrev [51] 0x15ce:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 139 # DW_AT_decl_line + .long 12913 # DW_AT_import + .byte 51 # Abbrev [51] 0x15d5:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 141 # DW_AT_decl_line + .long 12924 # DW_AT_import + .byte 51 # Abbrev [51] 0x15dc:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 143 # DW_AT_decl_line + .long 12941 # DW_AT_import + .byte 51 # Abbrev [51] 0x15e3:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 144 # DW_AT_decl_line + .long 12964 # DW_AT_import + .byte 51 # Abbrev [51] 0x15ea:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 145 # DW_AT_decl_line + .long 12992 # DW_AT_import + .byte 51 # Abbrev [51] 0x15f1:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 146 # DW_AT_decl_line + .long 13014 # DW_AT_import + .byte 51 # Abbrev [51] 0x15f8:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 185 # DW_AT_decl_line + .long 13042 # DW_AT_import + .byte 51 # Abbrev [51] 0x15ff:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 186 # DW_AT_decl_line + .long 13071 # DW_AT_import + .byte 51 # Abbrev [51] 0x1606:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 187 # DW_AT_decl_line + .long 13099 # DW_AT_import + .byte 51 # Abbrev [51] 0x160d:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 188 # DW_AT_decl_line + .long 13122 # DW_AT_import + .byte 51 # Abbrev [51] 0x1614:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 189 # DW_AT_decl_line + .long 13155 # DW_AT_import + .byte 5 # Abbrev [5] 0x161b:0x745 DW_TAG_class_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string475 # DW_AT_name + .byte 16 # DW_AT_byte_size + .byte 41 # DW_AT_decl_file + .byte 71 # DW_AT_decl_line + .byte 59 # Abbrev [59] 0x1624:0xc DW_TAG_member + .long .Linfo_string356 # DW_AT_name + .long 13203 # DW_AT_type + .byte 41 # DW_AT_decl_file + .byte 88 # DW_AT_decl_line + # DW_AT_external + # DW_AT_declaration + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 60 # Abbrev [60] 0x1630:0xd DW_TAG_member + .long .Linfo_string358 # DW_AT_name + .long 4888 # DW_AT_type + .byte 41 # DW_AT_decl_file + .short 419 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x163d:0xd DW_TAG_member + .long .Linfo_string359 # DW_AT_name + .long 689 # DW_AT_type + .byte 41 # DW_AT_decl_file + .short 420 # DW_AT_decl_line + .byte 8 # DW_AT_data_member_location + .byte 7 # Abbrev [7] 0x164a:0xe DW_TAG_subprogram + .long .Linfo_string360 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 93 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1652:0x5 DW_TAG_formal_parameter + .long 13219 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 7 # Abbrev [7] 0x1658:0x13 DW_TAG_subprogram + .long .Linfo_string360 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 97 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1660:0x5 DW_TAG_formal_parameter + .long 13219 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1665:0x5 DW_TAG_formal_parameter + .long 13224 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 7 # Abbrev [7] 0x166b:0x13 DW_TAG_subprogram + .long .Linfo_string360 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 99 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1673:0x5 DW_TAG_formal_parameter + .long 13219 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1678:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 7 # Abbrev [7] 0x167e:0x18 DW_TAG_subprogram + .long .Linfo_string360 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 105 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1686:0x5 DW_TAG_formal_parameter + .long 13219 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x168b:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1690:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x1696:0x1b DW_TAG_subprogram + .long .Linfo_string361 # DW_AT_linkage_name + .long .Linfo_string96 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 110 # DW_AT_decl_line + .long 13234 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x16a6:0x5 DW_TAG_formal_parameter + .long 13219 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x16ab:0x5 DW_TAG_formal_parameter + .long 13224 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x16b1:0x16 DW_TAG_subprogram + .long .Linfo_string362 # DW_AT_linkage_name + .long .Linfo_string16 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 115 # DW_AT_decl_line + .long 5831 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x16c1:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x16c7:0xb DW_TAG_typedef + .long 689 # DW_AT_type + .long .Linfo_string363 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 82 # DW_AT_decl_line + .byte 10 # Abbrev [10] 0x16d2:0x16 DW_TAG_subprogram + .long .Linfo_string364 # DW_AT_linkage_name + .long .Linfo_string18 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 119 # DW_AT_decl_line + .long 5831 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x16e2:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x16e8:0x16 DW_TAG_subprogram + .long .Linfo_string365 # DW_AT_linkage_name + .long .Linfo_string366 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 123 # DW_AT_decl_line + .long 5831 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x16f8:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x16fe:0x16 DW_TAG_subprogram + .long .Linfo_string367 # DW_AT_linkage_name + .long .Linfo_string368 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 127 # DW_AT_decl_line + .long 5831 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x170e:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x1714:0x16 DW_TAG_subprogram + .long .Linfo_string369 # DW_AT_linkage_name + .long .Linfo_string370 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 131 # DW_AT_decl_line + .long 5930 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1724:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x172a:0xb DW_TAG_typedef + .long 7520 # DW_AT_type + .long .Linfo_string372 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 84 # DW_AT_decl_line + .byte 10 # Abbrev [10] 0x1735:0x16 DW_TAG_subprogram + .long .Linfo_string373 # DW_AT_linkage_name + .long .Linfo_string374 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 135 # DW_AT_decl_line + .long 5930 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1745:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x174b:0x16 DW_TAG_subprogram + .long .Linfo_string375 # DW_AT_linkage_name + .long .Linfo_string376 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 139 # DW_AT_decl_line + .long 5930 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x175b:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x1761:0x16 DW_TAG_subprogram + .long .Linfo_string377 # DW_AT_linkage_name + .long .Linfo_string378 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 143 # DW_AT_decl_line + .long 5930 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1771:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x1777:0x16 DW_TAG_subprogram + .long .Linfo_string379 # DW_AT_linkage_name + .long .Linfo_string10 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 149 # DW_AT_decl_line + .long 13208 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1787:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x178d:0x16 DW_TAG_subprogram + .long .Linfo_string380 # DW_AT_linkage_name + .long .Linfo_string381 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 153 # DW_AT_decl_line + .long 13208 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x179d:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x17a3:0x16 DW_TAG_subprogram + .long .Linfo_string382 # DW_AT_linkage_name + .long .Linfo_string383 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 157 # DW_AT_decl_line + .long 13208 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x17b3:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x17b9:0x16 DW_TAG_subprogram + .long .Linfo_string384 # DW_AT_linkage_name + .long .Linfo_string385 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 164 # DW_AT_decl_line + .long 3828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x17c9:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x17cf:0x1b DW_TAG_subprogram + .long .Linfo_string386 # DW_AT_linkage_name + .long .Linfo_string14 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 170 # DW_AT_decl_line + .long 13244 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x17df:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x17e4:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x17ea:0x1b DW_TAG_subprogram + .long .Linfo_string387 # DW_AT_linkage_name + .long .Linfo_string388 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 178 # DW_AT_decl_line + .long 13244 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x17fa:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x17ff:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x1805:0x16 DW_TAG_subprogram + .long .Linfo_string389 # DW_AT_linkage_name + .long .Linfo_string390 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 188 # DW_AT_decl_line + .long 13244 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1815:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x181b:0x16 DW_TAG_subprogram + .long .Linfo_string391 # DW_AT_linkage_name + .long .Linfo_string392 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 196 # DW_AT_decl_line + .long 13244 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x182b:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x1831:0x16 DW_TAG_subprogram + .long .Linfo_string393 # DW_AT_linkage_name + .long .Linfo_string394 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 204 # DW_AT_decl_line + .long 689 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1841:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 53 # Abbrev [53] 0x1847:0x17 DW_TAG_subprogram + .long .Linfo_string395 # DW_AT_linkage_name + .long .Linfo_string396 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 210 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1853:0x5 DW_TAG_formal_parameter + .long 13219 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1858:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 53 # Abbrev [53] 0x185e:0x17 DW_TAG_subprogram + .long .Linfo_string397 # DW_AT_linkage_name + .long .Linfo_string398 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 218 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x186a:0x5 DW_TAG_formal_parameter + .long 13219 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x186f:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 53 # Abbrev [53] 0x1875:0x17 DW_TAG_subprogram + .long .Linfo_string399 # DW_AT_linkage_name + .long .Linfo_string100 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 222 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1881:0x5 DW_TAG_formal_parameter + .long 13219 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1886:0x5 DW_TAG_formal_parameter + .long 13234 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x188c:0x25 DW_TAG_subprogram + .long .Linfo_string400 # DW_AT_linkage_name + .long .Linfo_string401 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 233 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x189c:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x18a1:0x5 DW_TAG_formal_parameter + .long 9014 # DW_AT_type + .byte 9 # Abbrev [9] 0x18a6:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x18ab:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x18b1:0xb DW_TAG_typedef + .long 4888 # DW_AT_type + .long .Linfo_string357 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 86 # DW_AT_decl_line + .byte 10 # Abbrev [10] 0x18bc:0x20 DW_TAG_subprogram + .long .Linfo_string402 # DW_AT_linkage_name + .long .Linfo_string403 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 245 # DW_AT_decl_line + .long 5659 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x18cc:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x18d1:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x18d6:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 10 # Abbrev [10] 0x18dc:0x1b DW_TAG_subprogram + .long .Linfo_string404 # DW_AT_linkage_name + .long .Linfo_string405 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 253 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x18ec:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x18f1:0x5 DW_TAG_formal_parameter + .long 5659 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x18f7:0x26 DW_TAG_subprogram + .long .Linfo_string406 # DW_AT_linkage_name + .long .Linfo_string405 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 263 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1908:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x190d:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1912:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1917:0x5 DW_TAG_formal_parameter + .long 5659 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x191d:0x30 DW_TAG_subprogram + .long .Linfo_string407 # DW_AT_linkage_name + .long .Linfo_string405 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 267 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x192e:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1933:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1938:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x193d:0x5 DW_TAG_formal_parameter + .long 5659 # DW_AT_type + .byte 9 # Abbrev [9] 0x1942:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1947:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x194d:0x1c DW_TAG_subprogram + .long .Linfo_string408 # DW_AT_linkage_name + .long .Linfo_string405 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 274 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x195e:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1963:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1969:0x26 DW_TAG_subprogram + .long .Linfo_string409 # DW_AT_linkage_name + .long .Linfo_string405 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 278 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x197a:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x197f:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1984:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1989:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x198f:0x2b DW_TAG_subprogram + .long .Linfo_string410 # DW_AT_linkage_name + .long .Linfo_string405 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 282 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x19a0:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x19a5:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x19aa:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x19af:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x19b4:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x19ba:0x21 DW_TAG_subprogram + .long .Linfo_string411 # DW_AT_linkage_name + .long .Linfo_string412 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 290 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x19cb:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x19d0:0x5 DW_TAG_formal_parameter + .long 5659 # DW_AT_type + .byte 9 # Abbrev [9] 0x19d5:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x19db:0x21 DW_TAG_subprogram + .long .Linfo_string413 # DW_AT_linkage_name + .long .Linfo_string412 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 294 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x19ec:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x19f1:0x5 DW_TAG_formal_parameter + .long 625 # DW_AT_type + .byte 9 # Abbrev [9] 0x19f6:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x19fc:0x26 DW_TAG_subprogram + .long .Linfo_string414 # DW_AT_linkage_name + .long .Linfo_string412 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 297 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1a0d:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1a12:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1a17:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1a1c:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1a22:0x21 DW_TAG_subprogram + .long .Linfo_string415 # DW_AT_linkage_name + .long .Linfo_string412 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 300 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1a33:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1a38:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1a3d:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1a43:0x21 DW_TAG_subprogram + .long .Linfo_string416 # DW_AT_linkage_name + .long .Linfo_string417 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 304 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1a54:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1a59:0x5 DW_TAG_formal_parameter + .long 5659 # DW_AT_type + .byte 9 # Abbrev [9] 0x1a5e:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1a64:0x21 DW_TAG_subprogram + .long .Linfo_string418 # DW_AT_linkage_name + .long .Linfo_string417 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 308 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1a75:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1a7a:0x5 DW_TAG_formal_parameter + .long 625 # DW_AT_type + .byte 9 # Abbrev [9] 0x1a7f:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1a85:0x26 DW_TAG_subprogram + .long .Linfo_string419 # DW_AT_linkage_name + .long .Linfo_string417 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 311 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1a96:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1a9b:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1aa0:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1aa5:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1aab:0x21 DW_TAG_subprogram + .long .Linfo_string420 # DW_AT_linkage_name + .long .Linfo_string417 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 314 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1abc:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1ac1:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1ac6:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1acc:0x21 DW_TAG_subprogram + .long .Linfo_string421 # DW_AT_linkage_name + .long .Linfo_string422 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 318 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1add:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1ae2:0x5 DW_TAG_formal_parameter + .long 5659 # DW_AT_type + .byte 9 # Abbrev [9] 0x1ae7:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1aed:0x21 DW_TAG_subprogram + .long .Linfo_string423 # DW_AT_linkage_name + .long .Linfo_string422 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 322 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1afe:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1b03:0x5 DW_TAG_formal_parameter + .long 625 # DW_AT_type + .byte 9 # Abbrev [9] 0x1b08:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1b0e:0x26 DW_TAG_subprogram + .long .Linfo_string424 # DW_AT_linkage_name + .long .Linfo_string422 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 326 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1b1f:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1b24:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1b29:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1b2e:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1b34:0x21 DW_TAG_subprogram + .long .Linfo_string425 # DW_AT_linkage_name + .long .Linfo_string422 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 329 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1b45:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1b4a:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1b4f:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1b55:0x21 DW_TAG_subprogram + .long .Linfo_string426 # DW_AT_linkage_name + .long .Linfo_string427 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 333 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1b66:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1b6b:0x5 DW_TAG_formal_parameter + .long 5659 # DW_AT_type + .byte 9 # Abbrev [9] 0x1b70:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1b76:0x21 DW_TAG_subprogram + .long .Linfo_string428 # DW_AT_linkage_name + .long .Linfo_string427 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 338 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1b87:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1b8c:0x5 DW_TAG_formal_parameter + .long 625 # DW_AT_type + .byte 9 # Abbrev [9] 0x1b91:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1b97:0x26 DW_TAG_subprogram + .long .Linfo_string429 # DW_AT_linkage_name + .long .Linfo_string427 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 342 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1ba8:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1bad:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1bb2:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1bb7:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1bbd:0x21 DW_TAG_subprogram + .long .Linfo_string430 # DW_AT_linkage_name + .long .Linfo_string427 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 346 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1bce:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1bd3:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1bd8:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1bde:0x21 DW_TAG_subprogram + .long .Linfo_string431 # DW_AT_linkage_name + .long .Linfo_string432 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 350 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1bef:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1bf4:0x5 DW_TAG_formal_parameter + .long 5659 # DW_AT_type + .byte 9 # Abbrev [9] 0x1bf9:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1bff:0x21 DW_TAG_subprogram + .long .Linfo_string433 # DW_AT_linkage_name + .long .Linfo_string432 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 355 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1c10:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1c15:0x5 DW_TAG_formal_parameter + .long 625 # DW_AT_type + .byte 9 # Abbrev [9] 0x1c1a:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1c20:0x26 DW_TAG_subprogram + .long .Linfo_string434 # DW_AT_linkage_name + .long .Linfo_string432 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 358 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1c31:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1c36:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1c3b:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1c40:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1c46:0x21 DW_TAG_subprogram + .long .Linfo_string435 # DW_AT_linkage_name + .long .Linfo_string432 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 362 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1c57:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1c5c:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1c61:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1c67:0x21 DW_TAG_subprogram + .long .Linfo_string436 # DW_AT_linkage_name + .long .Linfo_string437 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 369 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1c78:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1c7d:0x5 DW_TAG_formal_parameter + .long 5659 # DW_AT_type + .byte 9 # Abbrev [9] 0x1c82:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1c88:0x21 DW_TAG_subprogram + .long .Linfo_string438 # DW_AT_linkage_name + .long .Linfo_string437 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 374 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1c99:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1c9e:0x5 DW_TAG_formal_parameter + .long 625 # DW_AT_type + .byte 9 # Abbrev [9] 0x1ca3:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1ca9:0x26 DW_TAG_subprogram + .long .Linfo_string439 # DW_AT_linkage_name + .long .Linfo_string437 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 377 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1cba:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1cbf:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1cc4:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1cc9:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1ccf:0x21 DW_TAG_subprogram + .long .Linfo_string440 # DW_AT_linkage_name + .long .Linfo_string437 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 381 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1ce0:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1ce5:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x1cea:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1cf0:0x21 DW_TAG_subprogram + .long .Linfo_string441 # DW_AT_linkage_name + .long .Linfo_string442 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 389 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1d01:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1d06:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1d0b:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 61 # Abbrev [61] 0x1d11:0x21 DW_TAG_subprogram + .long .Linfo_string443 # DW_AT_linkage_name + .long .Linfo_string444 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 400 # DW_AT_decl_line + .long 6321 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 1 # DW_AT_accessibility + # DW_ACCESS_public + .byte 8 # Abbrev [8] 0x1d22:0x5 DW_TAG_formal_parameter + .long 13239 # DW_AT_type + # DW_AT_artificial + .byte 9 # Abbrev [9] 0x1d27:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1d2c:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1d32:0x1b DW_TAG_subprogram + .long .Linfo_string445 # DW_AT_linkage_name + .long .Linfo_string446 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 409 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1d42:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 9 # Abbrev [9] 0x1d47:0x5 DW_TAG_formal_parameter + .long 13208 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 11 # Abbrev [11] 0x1d4d:0x9 DW_TAG_template_type_parameter + .long 625 # DW_AT_type + .long .Linfo_string447 # DW_AT_name + .byte 11 # Abbrev [11] 0x1d56:0x9 DW_TAG_template_type_parameter + .long 7525 # DW_AT_type + .long .Linfo_string474 # DW_AT_name + .byte 0 # End Of Children Mark + .byte 55 # Abbrev [55] 0x1d60:0x5 DW_TAG_class_type + .long .Linfo_string371 # DW_AT_name + # DW_AT_declaration + .byte 63 # Abbrev [63] 0x1d65:0x19c DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string473 # DW_AT_name + .byte 1 # DW_AT_byte_size + .byte 42 # DW_AT_decl_file + .short 275 # DW_AT_decl_line + .byte 64 # Abbrev [64] 0x1d6f:0x17 DW_TAG_subprogram + .long .Linfo_string448 # DW_AT_linkage_name + .long .Linfo_string449 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 284 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1d7b:0x5 DW_TAG_formal_parameter + .long 13249 # DW_AT_type + .byte 9 # Abbrev [9] 0x1d80:0x5 DW_TAG_formal_parameter + .long 13254 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 65 # Abbrev [65] 0x1d86:0xc DW_TAG_typedef + .long 625 # DW_AT_type + .long .Linfo_string450 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 277 # DW_AT_decl_line + .byte 62 # Abbrev [62] 0x1d92:0x1b DW_TAG_subprogram + .long .Linfo_string451 # DW_AT_linkage_name + .long .Linfo_string452 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 288 # DW_AT_decl_line + .long 3828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1da2:0x5 DW_TAG_formal_parameter + .long 13254 # DW_AT_type + .byte 9 # Abbrev [9] 0x1da7:0x5 DW_TAG_formal_parameter + .long 13254 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1dad:0x1b DW_TAG_subprogram + .long .Linfo_string453 # DW_AT_linkage_name + .long .Linfo_string454 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 292 # DW_AT_decl_line + .long 3828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1dbd:0x5 DW_TAG_formal_parameter + .long 13254 # DW_AT_type + .byte 9 # Abbrev [9] 0x1dc2:0x5 DW_TAG_formal_parameter + .long 13254 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1dc8:0x20 DW_TAG_subprogram + .long .Linfo_string455 # DW_AT_linkage_name + .long .Linfo_string405 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 300 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1dd8:0x5 DW_TAG_formal_parameter + .long 13264 # DW_AT_type + .byte 9 # Abbrev [9] 0x1ddd:0x5 DW_TAG_formal_parameter + .long 13264 # DW_AT_type + .byte 9 # Abbrev [9] 0x1de2:0x5 DW_TAG_formal_parameter + .long 4888 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1de8:0x16 DW_TAG_subprogram + .long .Linfo_string456 # DW_AT_linkage_name + .long .Linfo_string381 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 314 # DW_AT_decl_line + .long 4888 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1df8:0x5 DW_TAG_formal_parameter + .long 13264 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1dfe:0x20 DW_TAG_subprogram + .long .Linfo_string457 # DW_AT_linkage_name + .long .Linfo_string412 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 324 # DW_AT_decl_line + .long 13264 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1e0e:0x5 DW_TAG_formal_parameter + .long 13264 # DW_AT_type + .byte 9 # Abbrev [9] 0x1e13:0x5 DW_TAG_formal_parameter + .long 4888 # DW_AT_type + .byte 9 # Abbrev [9] 0x1e18:0x5 DW_TAG_formal_parameter + .long 13254 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1e1e:0x20 DW_TAG_subprogram + .long .Linfo_string458 # DW_AT_linkage_name + .long .Linfo_string459 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 338 # DW_AT_decl_line + .long 13269 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1e2e:0x5 DW_TAG_formal_parameter + .long 13269 # DW_AT_type + .byte 9 # Abbrev [9] 0x1e33:0x5 DW_TAG_formal_parameter + .long 13264 # DW_AT_type + .byte 9 # Abbrev [9] 0x1e38:0x5 DW_TAG_formal_parameter + .long 4888 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1e3e:0x20 DW_TAG_subprogram + .long .Linfo_string460 # DW_AT_linkage_name + .long .Linfo_string401 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 346 # DW_AT_decl_line + .long 13269 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1e4e:0x5 DW_TAG_formal_parameter + .long 13269 # DW_AT_type + .byte 9 # Abbrev [9] 0x1e53:0x5 DW_TAG_formal_parameter + .long 13264 # DW_AT_type + .byte 9 # Abbrev [9] 0x1e58:0x5 DW_TAG_formal_parameter + .long 4888 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1e5e:0x20 DW_TAG_subprogram + .long .Linfo_string461 # DW_AT_linkage_name + .long .Linfo_string449 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 354 # DW_AT_decl_line + .long 13269 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1e6e:0x5 DW_TAG_formal_parameter + .long 13269 # DW_AT_type + .byte 9 # Abbrev [9] 0x1e73:0x5 DW_TAG_formal_parameter + .long 4888 # DW_AT_type + .byte 9 # Abbrev [9] 0x1e78:0x5 DW_TAG_formal_parameter + .long 7558 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1e7e:0x16 DW_TAG_subprogram + .long .Linfo_string462 # DW_AT_linkage_name + .long .Linfo_string463 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 362 # DW_AT_decl_line + .long 7558 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1e8e:0x5 DW_TAG_formal_parameter + .long 13274 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 65 # Abbrev [65] 0x1e94:0xc DW_TAG_typedef + .long 8042 # DW_AT_type + .long .Linfo_string464 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 278 # DW_AT_decl_line + .byte 62 # Abbrev [62] 0x1ea0:0x16 DW_TAG_subprogram + .long .Linfo_string465 # DW_AT_linkage_name + .long .Linfo_string466 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 368 # DW_AT_decl_line + .long 7828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1eb0:0x5 DW_TAG_formal_parameter + .long 13254 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 62 # Abbrev [62] 0x1eb6:0x1b DW_TAG_subprogram + .long .Linfo_string467 # DW_AT_linkage_name + .long .Linfo_string468 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 372 # DW_AT_decl_line + .long 3828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1ec6:0x5 DW_TAG_formal_parameter + .long 13274 # DW_AT_type + .byte 9 # Abbrev [9] 0x1ecb:0x5 DW_TAG_formal_parameter + .long 13274 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 66 # Abbrev [66] 0x1ed1:0x10 DW_TAG_subprogram + .long .Linfo_string469 # DW_AT_linkage_name + .long .Linfo_string470 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 376 # DW_AT_decl_line + .long 7828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 62 # Abbrev [62] 0x1ee1:0x16 DW_TAG_subprogram + .long .Linfo_string471 # DW_AT_linkage_name + .long .Linfo_string472 # DW_AT_name + .byte 42 # DW_AT_decl_file + .short 380 # DW_AT_decl_line + .long 7828 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x1ef1:0x5 DW_TAG_formal_parameter + .long 13274 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 11 # Abbrev [11] 0x1ef7:0x9 DW_TAG_template_type_parameter + .long 625 # DW_AT_type + .long .Linfo_string447 # DW_AT_name + .byte 0 # End Of Children Mark + .byte 65 # Abbrev [65] 0x1f01:0xc DW_TAG_typedef + .long 5659 # DW_AT_type + .long .Linfo_string513 # DW_AT_name + .byte 41 # DW_AT_decl_file + .short 552 # DW_AT_decl_line + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x1f0e:0xb DW_TAG_typedef + .long 7961 # DW_AT_type + .long .Linfo_string38 # DW_AT_name + .byte 8 # DW_AT_decl_file + .byte 40 # DW_AT_decl_line + .byte 67 # Abbrev [67] 0x1f19:0x1 DW_TAG_structure_type + # DW_AT_declaration + .byte 23 # Abbrev [23] 0x1f1a:0xb DW_TAG_typedef + .long 7973 # DW_AT_type + .long .Linfo_string41 # DW_AT_name + .byte 11 # DW_AT_decl_file + .byte 24 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1f25:0xb DW_TAG_typedef + .long 7984 # DW_AT_type + .long .Linfo_string40 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 36 # DW_AT_decl_line + .byte 19 # Abbrev [19] 0x1f30:0x7 DW_TAG_base_type + .long .Linfo_string39 # DW_AT_name + .byte 6 # DW_AT_encoding + .byte 1 # DW_AT_byte_size + .byte 23 # Abbrev [23] 0x1f37:0xb DW_TAG_typedef + .long 8002 # DW_AT_type + .long .Linfo_string44 # DW_AT_name + .byte 11 # DW_AT_decl_file + .byte 25 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1f42:0xb DW_TAG_typedef + .long 8013 # DW_AT_type + .long .Linfo_string43 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 38 # DW_AT_decl_line + .byte 19 # Abbrev [19] 0x1f4d:0x7 DW_TAG_base_type + .long .Linfo_string42 # DW_AT_name + .byte 5 # DW_AT_encoding + .byte 2 # DW_AT_byte_size + .byte 23 # Abbrev [23] 0x1f54:0xb DW_TAG_typedef + .long 8031 # DW_AT_type + .long .Linfo_string47 # DW_AT_name + .byte 11 # DW_AT_decl_file + .byte 26 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1f5f:0xb DW_TAG_typedef + .long 8042 # DW_AT_type + .long .Linfo_string46 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 40 # DW_AT_decl_line + .byte 19 # Abbrev [19] 0x1f6a:0x7 DW_TAG_base_type + .long .Linfo_string45 # DW_AT_name + .byte 5 # DW_AT_encoding + .byte 4 # DW_AT_byte_size + .byte 23 # Abbrev [23] 0x1f71:0xb DW_TAG_typedef + .long 8060 # DW_AT_type + .long .Linfo_string50 # DW_AT_name + .byte 11 # DW_AT_decl_file + .byte 27 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1f7c:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string49 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 43 # DW_AT_decl_line + .byte 19 # Abbrev [19] 0x1f87:0x7 DW_TAG_base_type + .long .Linfo_string48 # DW_AT_name + .byte 5 # DW_AT_encoding + .byte 8 # DW_AT_byte_size + .byte 23 # Abbrev [23] 0x1f8e:0xb DW_TAG_typedef + .long 7984 # DW_AT_type + .long .Linfo_string51 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 68 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1f99:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string52 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 70 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1fa4:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string53 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 71 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1faf:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string54 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 72 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1fba:0xb DW_TAG_typedef + .long 7984 # DW_AT_type + .long .Linfo_string55 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 43 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1fc5:0xb DW_TAG_typedef + .long 8013 # DW_AT_type + .long .Linfo_string56 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1fd0:0xb DW_TAG_typedef + .long 8042 # DW_AT_type + .long .Linfo_string57 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 45 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1fdb:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string58 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 47 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1fe6:0xb DW_TAG_typedef + .long 8177 # DW_AT_type + .long .Linfo_string60 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 111 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1ff1:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string59 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 61 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x1ffc:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string61 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 97 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x2007:0xb DW_TAG_typedef + .long 8210 # DW_AT_type + .long .Linfo_string64 # DW_AT_name + .byte 14 # DW_AT_decl_file + .byte 24 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x2012:0xb DW_TAG_typedef + .long 8221 # DW_AT_type + .long .Linfo_string63 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 37 # DW_AT_decl_line + .byte 19 # Abbrev [19] 0x201d:0x7 DW_TAG_base_type + .long .Linfo_string62 # DW_AT_name + .byte 8 # DW_AT_encoding + .byte 1 # DW_AT_byte_size + .byte 23 # Abbrev [23] 0x2024:0xb DW_TAG_typedef + .long 8239 # DW_AT_type + .long .Linfo_string67 # DW_AT_name + .byte 14 # DW_AT_decl_file + .byte 25 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x202f:0xb DW_TAG_typedef + .long 8250 # DW_AT_type + .long .Linfo_string66 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 39 # DW_AT_decl_line + .byte 19 # Abbrev [19] 0x203a:0x7 DW_TAG_base_type + .long .Linfo_string65 # DW_AT_name + .byte 7 # DW_AT_encoding + .byte 2 # DW_AT_byte_size + .byte 23 # Abbrev [23] 0x2041:0xb DW_TAG_typedef + .long 8268 # DW_AT_type + .long .Linfo_string70 # DW_AT_name + .byte 14 # DW_AT_decl_file + .byte 26 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x204c:0xb DW_TAG_typedef + .long 8279 # DW_AT_type + .long .Linfo_string69 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 41 # DW_AT_decl_line + .byte 19 # Abbrev [19] 0x2057:0x7 DW_TAG_base_type + .long .Linfo_string68 # DW_AT_name + .byte 7 # DW_AT_encoding + .byte 4 # DW_AT_byte_size + .byte 23 # Abbrev [23] 0x205e:0xb DW_TAG_typedef + .long 8297 # DW_AT_type + .long .Linfo_string72 # DW_AT_name + .byte 14 # DW_AT_decl_file + .byte 27 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x2069:0xb DW_TAG_typedef + .long 677 # DW_AT_type + .long .Linfo_string71 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x2074:0xb DW_TAG_typedef + .long 8221 # DW_AT_type + .long .Linfo_string73 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 81 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x207f:0xb DW_TAG_typedef + .long 677 # DW_AT_type + .long .Linfo_string74 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 83 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x208a:0xb DW_TAG_typedef + .long 677 # DW_AT_type + .long .Linfo_string75 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 84 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x2095:0xb DW_TAG_typedef + .long 677 # DW_AT_type + .long .Linfo_string76 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 85 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x20a0:0xb DW_TAG_typedef + .long 8221 # DW_AT_type + .long .Linfo_string77 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 54 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x20ab:0xb DW_TAG_typedef + .long 8250 # DW_AT_type + .long .Linfo_string78 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 55 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x20b6:0xb DW_TAG_typedef + .long 8279 # DW_AT_type + .long .Linfo_string79 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 56 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x20c1:0xb DW_TAG_typedef + .long 677 # DW_AT_type + .long .Linfo_string80 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 58 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x20cc:0xb DW_TAG_typedef + .long 8407 # DW_AT_type + .long .Linfo_string82 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 112 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x20d7:0xb DW_TAG_typedef + .long 677 # DW_AT_type + .long .Linfo_string81 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 62 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x20e2:0xb DW_TAG_typedef + .long 677 # DW_AT_type + .long .Linfo_string83 # DW_AT_name + .byte 13 # DW_AT_decl_file + .byte 100 # DW_AT_decl_line + .byte 68 # Abbrev [68] 0x20ed:0x1 DW_TAG_pointer_type + .byte 21 # Abbrev [21] 0x20ee:0x5 DW_TAG_pointer_type + .long 4048 # DW_AT_type + .byte 21 # Abbrev [21] 0x20f3:0x5 DW_TAG_pointer_type + .long 8440 # DW_AT_type + .byte 3 # Abbrev [3] 0x20f8:0x5 DW_TAG_const_type + .long 4048 # DW_AT_type + .byte 22 # Abbrev [22] 0x20fd:0x5 DW_TAG_reference_type + .long 8440 # DW_AT_type + .byte 69 # Abbrev [69] 0x2102:0x5 DW_TAG_unspecified_type + .long .Linfo_string93 # DW_AT_name + .byte 70 # Abbrev [70] 0x2107:0x5 DW_TAG_rvalue_reference_type + .long 4048 # DW_AT_type + .byte 22 # Abbrev [22] 0x210c:0x5 DW_TAG_reference_type + .long 4048 # DW_AT_type + .byte 21 # Abbrev [21] 0x2111:0x5 DW_TAG_pointer_type + .long 8470 # DW_AT_type + .byte 3 # Abbrev [3] 0x2116:0x5 DW_TAG_const_type + .long 4368 # DW_AT_type + .byte 4 # Abbrev [4] 0x211b:0xd DW_TAG_namespace + .long .Linfo_string108 # DW_AT_name + .byte 71 # Abbrev [71] 0x2120:0x7 DW_TAG_imported_module + .byte 17 # DW_AT_decl_file + .byte 58 # DW_AT_decl_line + .long 4397 # DW_AT_import + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x2128:0xb DW_TAG_typedef + .long 8499 # DW_AT_type + .long .Linfo_string115 # DW_AT_name + .byte 19 # DW_AT_decl_file + .byte 6 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x2133:0xb DW_TAG_typedef + .long 8510 # DW_AT_type + .long .Linfo_string114 # DW_AT_name + .byte 18 # DW_AT_decl_file + .byte 21 # DW_AT_decl_line + .byte 72 # Abbrev [72] 0x213e:0x3c DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .byte 8 # DW_AT_byte_size + .byte 18 # DW_AT_decl_file + .byte 13 # DW_AT_decl_line + .byte 6 # Abbrev [6] 0x2143:0xc DW_TAG_member + .long .Linfo_string110 # DW_AT_name + .long 8042 # DW_AT_type + .byte 18 # DW_AT_decl_file + .byte 15 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x214f:0xc DW_TAG_member + .long .Linfo_string111 # DW_AT_name + .long 8539 # DW_AT_type + .byte 18 # DW_AT_decl_file + .byte 20 # DW_AT_decl_line + .byte 4 # DW_AT_data_member_location + .byte 73 # Abbrev [73] 0x215b:0x1e DW_TAG_union_type + .byte 5 # DW_AT_calling_convention + .byte 4 # DW_AT_byte_size + .byte 18 # DW_AT_decl_file + .byte 16 # DW_AT_decl_line + .byte 6 # Abbrev [6] 0x2160:0xc DW_TAG_member + .long .Linfo_string112 # DW_AT_name + .long 8279 # DW_AT_type + .byte 18 # DW_AT_decl_file + .byte 18 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x216c:0xc DW_TAG_member + .long .Linfo_string113 # DW_AT_name + .long 613 # DW_AT_type + .byte 18 # DW_AT_decl_file + .byte 19 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x217a:0xb DW_TAG_typedef + .long 8279 # DW_AT_type + .long .Linfo_string116 # DW_AT_name + .byte 21 # DW_AT_decl_file + .byte 20 # DW_AT_decl_line + .byte 74 # Abbrev [74] 0x2185:0x12 DW_TAG_subprogram + .long .Linfo_string117 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 318 # DW_AT_decl_line + .long 8570 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2191:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2197:0x12 DW_TAG_subprogram + .long .Linfo_string118 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 727 # DW_AT_decl_line + .long 8570 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x21a3:0x5 DW_TAG_formal_parameter + .long 8617 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x21a9:0x5 DW_TAG_pointer_type + .long 8622 # DW_AT_type + .byte 23 # Abbrev [23] 0x21ae:0xb DW_TAG_typedef + .long 8633 # DW_AT_type + .long .Linfo_string153 # DW_AT_name + .byte 24 # DW_AT_decl_file + .byte 5 # DW_AT_decl_line + .byte 13 # Abbrev [13] 0x21b9:0x17d DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string152 # DW_AT_name + .byte 216 # DW_AT_byte_size + .byte 23 # DW_AT_decl_file + .byte 245 # DW_AT_decl_line + .byte 6 # Abbrev [6] 0x21c2:0xc DW_TAG_member + .long .Linfo_string119 # DW_AT_name + .long 8042 # DW_AT_type + .byte 23 # DW_AT_decl_file + .byte 246 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x21ce:0xc DW_TAG_member + .long .Linfo_string120 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .byte 251 # DW_AT_decl_line + .byte 8 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x21da:0xc DW_TAG_member + .long .Linfo_string121 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .byte 252 # DW_AT_decl_line + .byte 16 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x21e6:0xc DW_TAG_member + .long .Linfo_string122 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .byte 253 # DW_AT_decl_line + .byte 24 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x21f2:0xc DW_TAG_member + .long .Linfo_string123 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .byte 254 # DW_AT_decl_line + .byte 32 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x21fe:0xc DW_TAG_member + .long .Linfo_string124 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .byte 255 # DW_AT_decl_line + .byte 40 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x220a:0xd DW_TAG_member + .long .Linfo_string125 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 256 # DW_AT_decl_line + .byte 48 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x2217:0xd DW_TAG_member + .long .Linfo_string126 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 257 # DW_AT_decl_line + .byte 56 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x2224:0xd DW_TAG_member + .long .Linfo_string127 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 258 # DW_AT_decl_line + .byte 64 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x2231:0xd DW_TAG_member + .long .Linfo_string128 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 260 # DW_AT_decl_line + .byte 72 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x223e:0xd DW_TAG_member + .long .Linfo_string129 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 261 # DW_AT_decl_line + .byte 80 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x224b:0xd DW_TAG_member + .long .Linfo_string130 # DW_AT_name + .long 9014 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 262 # DW_AT_decl_line + .byte 88 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x2258:0xd DW_TAG_member + .long .Linfo_string131 # DW_AT_name + .long 9019 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 264 # DW_AT_decl_line + .byte 96 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x2265:0xd DW_TAG_member + .long .Linfo_string133 # DW_AT_name + .long 9029 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 266 # DW_AT_decl_line + .byte 104 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x2272:0xd DW_TAG_member + .long .Linfo_string134 # DW_AT_name + .long 8042 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 268 # DW_AT_decl_line + .byte 112 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x227f:0xd DW_TAG_member + .long .Linfo_string135 # DW_AT_name + .long 8042 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 272 # DW_AT_decl_line + .byte 116 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x228c:0xd DW_TAG_member + .long .Linfo_string136 # DW_AT_name + .long 9034 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 274 # DW_AT_decl_line + .byte 120 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x2299:0xd DW_TAG_member + .long .Linfo_string138 # DW_AT_name + .long 8250 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 278 # DW_AT_decl_line + .byte 128 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x22a6:0xd DW_TAG_member + .long .Linfo_string139 # DW_AT_name + .long 7984 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 279 # DW_AT_decl_line + .byte 130 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x22b3:0xd DW_TAG_member + .long .Linfo_string140 # DW_AT_name + .long 9045 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 280 # DW_AT_decl_line + .byte 131 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x22c0:0xd DW_TAG_member + .long .Linfo_string141 # DW_AT_name + .long 9057 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 284 # DW_AT_decl_line + .byte 136 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x22cd:0xd DW_TAG_member + .long .Linfo_string143 # DW_AT_name + .long 9069 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 293 # DW_AT_decl_line + .byte 144 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x22da:0xd DW_TAG_member + .long .Linfo_string145 # DW_AT_name + .long 8429 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 301 # DW_AT_decl_line + .byte 152 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x22e7:0xd DW_TAG_member + .long .Linfo_string146 # DW_AT_name + .long 8429 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 302 # DW_AT_decl_line + .byte 160 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x22f4:0xd DW_TAG_member + .long .Linfo_string147 # DW_AT_name + .long 8429 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 303 # DW_AT_decl_line + .byte 168 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x2301:0xd DW_TAG_member + .long .Linfo_string148 # DW_AT_name + .long 8429 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 304 # DW_AT_decl_line + .byte 176 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x230e:0xd DW_TAG_member + .long .Linfo_string149 # DW_AT_name + .long 666 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 306 # DW_AT_decl_line + .byte 184 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x231b:0xd DW_TAG_member + .long .Linfo_string150 # DW_AT_name + .long 8042 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 307 # DW_AT_decl_line + .byte 192 # DW_AT_data_member_location + .byte 60 # Abbrev [60] 0x2328:0xd DW_TAG_member + .long .Linfo_string151 # DW_AT_name + .long 9080 # DW_AT_type + .byte 23 # DW_AT_decl_file + .short 309 # DW_AT_decl_line + .byte 196 # DW_AT_data_member_location + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x2336:0x5 DW_TAG_pointer_type + .long 625 # DW_AT_type + .byte 21 # Abbrev [21] 0x233b:0x5 DW_TAG_pointer_type + .long 9024 # DW_AT_type + .byte 75 # Abbrev [75] 0x2340:0x5 DW_TAG_structure_type + .long .Linfo_string132 # DW_AT_name + # DW_AT_declaration + .byte 21 # Abbrev [21] 0x2345:0x5 DW_TAG_pointer_type + .long 8633 # DW_AT_type + .byte 23 # Abbrev [23] 0x234a:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string137 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 140 # DW_AT_decl_line + .byte 17 # Abbrev [17] 0x2355:0xc DW_TAG_array_type + .long 625 # DW_AT_type + .byte 18 # Abbrev [18] 0x235a:0x6 DW_TAG_subrange_type + .long 632 # DW_AT_type + .byte 1 # DW_AT_count + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x2361:0x5 DW_TAG_pointer_type + .long 9062 # DW_AT_type + .byte 76 # Abbrev [76] 0x2366:0x7 DW_TAG_typedef + .long .Linfo_string142 # DW_AT_name + .byte 23 # DW_AT_decl_file + .byte 154 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x236d:0xb DW_TAG_typedef + .long 8071 # DW_AT_type + .long .Linfo_string144 # DW_AT_name + .byte 10 # DW_AT_decl_file + .byte 141 # DW_AT_decl_line + .byte 17 # Abbrev [17] 0x2378:0xc DW_TAG_array_type + .long 625 # DW_AT_type + .byte 18 # Abbrev [18] 0x237d:0x6 DW_TAG_subrange_type + .long 632 # DW_AT_type + .byte 20 # DW_AT_count + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2384:0x1c DW_TAG_subprogram + .long .Linfo_string154 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 756 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2390:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x2395:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 9 # Abbrev [9] 0x239a:0x5 DW_TAG_formal_parameter + .long 9137 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x23a0:0x5 DW_TAG_pointer_type + .long 9125 # DW_AT_type + .byte 19 # Abbrev [19] 0x23a5:0x7 DW_TAG_base_type + .long .Linfo_string155 # DW_AT_name + .byte 5 # DW_AT_encoding + .byte 4 # DW_AT_byte_size + .byte 77 # Abbrev [77] 0x23ac:0x5 DW_TAG_restrict_type + .long 9120 # DW_AT_type + .byte 77 # Abbrev [77] 0x23b1:0x5 DW_TAG_restrict_type + .long 8617 # DW_AT_type + .byte 74 # Abbrev [74] 0x23b6:0x17 DW_TAG_subprogram + .long .Linfo_string156 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 741 # DW_AT_decl_line + .long 8570 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x23c2:0x5 DW_TAG_formal_parameter + .long 9125 # DW_AT_type + .byte 9 # Abbrev [9] 0x23c7:0x5 DW_TAG_formal_parameter + .long 8617 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x23cd:0x17 DW_TAG_subprogram + .long .Linfo_string157 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 763 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x23d9:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x23de:0x5 DW_TAG_formal_parameter + .long 9137 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x23e4:0x5 DW_TAG_restrict_type + .long 9193 # DW_AT_type + .byte 21 # Abbrev [21] 0x23e9:0x5 DW_TAG_pointer_type + .long 9198 # DW_AT_type + .byte 3 # Abbrev [3] 0x23ee:0x5 DW_TAG_const_type + .long 9125 # DW_AT_type + .byte 74 # Abbrev [74] 0x23f3:0x17 DW_TAG_subprogram + .long .Linfo_string158 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 573 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x23ff:0x5 DW_TAG_formal_parameter + .long 8617 # DW_AT_type + .byte 9 # Abbrev [9] 0x2404:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x240a:0x18 DW_TAG_subprogram + .long .Linfo_string159 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 580 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2416:0x5 DW_TAG_formal_parameter + .long 9137 # DW_AT_type + .byte 9 # Abbrev [9] 0x241b:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 78 # Abbrev [78] 0x2420:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2422:0x18 DW_TAG_subprogram + .long .Linfo_string160 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 621 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x242e:0x5 DW_TAG_formal_parameter + .long 9137 # DW_AT_type + .byte 9 # Abbrev [9] 0x2433:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 78 # Abbrev [78] 0x2438:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x243a:0x12 DW_TAG_subprogram + .long .Linfo_string161 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 728 # DW_AT_decl_line + .long 8570 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2446:0x5 DW_TAG_formal_parameter + .long 8617 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 79 # Abbrev [79] 0x244c:0xc DW_TAG_subprogram + .long .Linfo_string162 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 734 # DW_AT_decl_line + .long 8570 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 74 # Abbrev [74] 0x2458:0x1c DW_TAG_subprogram + .long .Linfo_string163 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 329 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2464:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2469:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x246e:0x5 DW_TAG_formal_parameter + .long 9337 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x2474:0x5 DW_TAG_restrict_type + .long 689 # DW_AT_type + .byte 77 # Abbrev [77] 0x2479:0x5 DW_TAG_restrict_type + .long 9342 # DW_AT_type + .byte 21 # Abbrev [21] 0x247e:0x5 DW_TAG_pointer_type + .long 8488 # DW_AT_type + .byte 74 # Abbrev [74] 0x2483:0x21 DW_TAG_subprogram + .long .Linfo_string164 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 296 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x248f:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x2494:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2499:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x249e:0x5 DW_TAG_formal_parameter + .long 9337 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x24a4:0x12 DW_TAG_subprogram + .long .Linfo_string165 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 292 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x24b0:0x5 DW_TAG_formal_parameter + .long 9398 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x24b6:0x5 DW_TAG_pointer_type + .long 9403 # DW_AT_type + .byte 3 # Abbrev [3] 0x24bb:0x5 DW_TAG_const_type + .long 8488 # DW_AT_type + .byte 74 # Abbrev [74] 0x24c0:0x21 DW_TAG_subprogram + .long .Linfo_string166 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 337 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x24cc:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x24d1:0x5 DW_TAG_formal_parameter + .long 9441 # DW_AT_type + .byte 9 # Abbrev [9] 0x24d6:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x24db:0x5 DW_TAG_formal_parameter + .long 9337 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x24e1:0x5 DW_TAG_restrict_type + .long 9446 # DW_AT_type + .byte 21 # Abbrev [21] 0x24e6:0x5 DW_TAG_pointer_type + .long 689 # DW_AT_type + .byte 74 # Abbrev [74] 0x24eb:0x17 DW_TAG_subprogram + .long .Linfo_string167 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 742 # DW_AT_decl_line + .long 8570 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x24f7:0x5 DW_TAG_formal_parameter + .long 9125 # DW_AT_type + .byte 9 # Abbrev [9] 0x24fc:0x5 DW_TAG_formal_parameter + .long 8617 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2502:0x12 DW_TAG_subprogram + .long .Linfo_string168 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 748 # DW_AT_decl_line + .long 8570 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x250e:0x5 DW_TAG_formal_parameter + .long 9125 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2514:0x1d DW_TAG_subprogram + .long .Linfo_string169 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 590 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2520:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x2525:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x252a:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 78 # Abbrev [78] 0x252f:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2531:0x18 DW_TAG_subprogram + .long .Linfo_string170 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 631 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x253d:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2542:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 78 # Abbrev [78] 0x2547:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2549:0x17 DW_TAG_subprogram + .long .Linfo_string171 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 771 # DW_AT_decl_line + .long 8570 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2555:0x5 DW_TAG_formal_parameter + .long 8570 # DW_AT_type + .byte 9 # Abbrev [9] 0x255a:0x5 DW_TAG_formal_parameter + .long 8617 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2560:0x1c DW_TAG_subprogram + .long .Linfo_string172 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 598 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x256c:0x5 DW_TAG_formal_parameter + .long 9137 # DW_AT_type + .byte 9 # Abbrev [9] 0x2571:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2576:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x257c:0x5 DW_TAG_pointer_type + .long 9601 # DW_AT_type + .byte 80 # Abbrev [80] 0x2581:0x30 DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .long .Linfo_string177 # DW_AT_name + .byte 24 # DW_AT_byte_size + .byte 81 # Abbrev [81] 0x2588:0xa DW_TAG_member + .long .Linfo_string173 # DW_AT_name + .long 8279 # DW_AT_type + .byte 0 # DW_AT_data_member_location + .byte 81 # Abbrev [81] 0x2592:0xa DW_TAG_member + .long .Linfo_string174 # DW_AT_name + .long 8279 # DW_AT_type + .byte 4 # DW_AT_data_member_location + .byte 81 # Abbrev [81] 0x259c:0xa DW_TAG_member + .long .Linfo_string175 # DW_AT_name + .long 8429 # DW_AT_type + .byte 8 # DW_AT_data_member_location + .byte 81 # Abbrev [81] 0x25a6:0xa DW_TAG_member + .long .Linfo_string176 # DW_AT_name + .long 8429 # DW_AT_type + .byte 16 # DW_AT_data_member_location + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x25b1:0x1c DW_TAG_subprogram + .long .Linfo_string178 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 673 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x25bd:0x5 DW_TAG_formal_parameter + .long 9137 # DW_AT_type + .byte 9 # Abbrev [9] 0x25c2:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x25c7:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x25cd:0x21 DW_TAG_subprogram + .long .Linfo_string179 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 611 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x25d9:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x25de:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x25e3:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x25e8:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x25ee:0x1c DW_TAG_subprogram + .long .Linfo_string180 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 685 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x25fa:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x25ff:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2604:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x260a:0x17 DW_TAG_subprogram + .long .Linfo_string181 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 606 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2616:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x261b:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2621:0x17 DW_TAG_subprogram + .long .Linfo_string182 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 681 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x262d:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2632:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2638:0x1c DW_TAG_subprogram + .long .Linfo_string183 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 301 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2644:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 9 # Abbrev [9] 0x2649:0x5 DW_TAG_formal_parameter + .long 9125 # DW_AT_type + .byte 9 # Abbrev [9] 0x264e:0x5 DW_TAG_formal_parameter + .long 9337 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x2654:0x5 DW_TAG_restrict_type + .long 9014 # DW_AT_type + .byte 82 # Abbrev [82] 0x2659:0x16 DW_TAG_subprogram + .long .Linfo_string184 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 97 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2664:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x2669:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x266f:0x16 DW_TAG_subprogram + .long .Linfo_string185 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 106 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x267a:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x267f:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2685:0x16 DW_TAG_subprogram + .long .Linfo_string186 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 131 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2690:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x2695:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x269b:0x16 DW_TAG_subprogram + .long .Linfo_string187 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 87 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x26a6:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x26ab:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x26b1:0x16 DW_TAG_subprogram + .long .Linfo_string188 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 187 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x26bc:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x26c1:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x26c7:0x21 DW_TAG_subprogram + .long .Linfo_string189 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 835 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x26d3:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x26d8:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x26dd:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x26e2:0x5 DW_TAG_formal_parameter + .long 9960 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x26e8:0x5 DW_TAG_restrict_type + .long 9965 # DW_AT_type + .byte 21 # Abbrev [21] 0x26ed:0x5 DW_TAG_pointer_type + .long 9970 # DW_AT_type + .byte 3 # Abbrev [3] 0x26f2:0x5 DW_TAG_const_type + .long 9975 # DW_AT_type + .byte 75 # Abbrev [75] 0x26f7:0x5 DW_TAG_structure_type + .long .Linfo_string190 # DW_AT_name + # DW_AT_declaration + .byte 82 # Abbrev [82] 0x26fc:0x11 DW_TAG_subprogram + .long .Linfo_string191 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 222 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2707:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x270d:0x1b DW_TAG_subprogram + .long .Linfo_string192 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 101 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2718:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x271d:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2722:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2728:0x1b DW_TAG_subprogram + .long .Linfo_string193 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 109 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2733:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x2738:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x273d:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2743:0x1b DW_TAG_subprogram + .long .Linfo_string194 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 92 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x274e:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x2753:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2758:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x275e:0x21 DW_TAG_subprogram + .long .Linfo_string195 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 343 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x276a:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 9 # Abbrev [9] 0x276f:0x5 DW_TAG_formal_parameter + .long 10111 # DW_AT_type + .byte 9 # Abbrev [9] 0x2774:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x2779:0x5 DW_TAG_formal_parameter + .long 9337 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x277f:0x5 DW_TAG_restrict_type + .long 10116 # DW_AT_type + .byte 21 # Abbrev [21] 0x2784:0x5 DW_TAG_pointer_type + .long 9193 # DW_AT_type + .byte 82 # Abbrev [82] 0x2789:0x16 DW_TAG_subprogram + .long .Linfo_string196 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 191 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2794:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x2799:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x279f:0x17 DW_TAG_subprogram + .long .Linfo_string197 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 377 # DW_AT_decl_line + .long 10166 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x27ab:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x27b0:0x5 DW_TAG_formal_parameter + .long 10173 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 19 # Abbrev [19] 0x27b6:0x7 DW_TAG_base_type + .long .Linfo_string198 # DW_AT_name + .byte 4 # DW_AT_encoding + .byte 8 # DW_AT_byte_size + .byte 77 # Abbrev [77] 0x27bd:0x5 DW_TAG_restrict_type + .long 10178 # DW_AT_type + .byte 21 # Abbrev [21] 0x27c2:0x5 DW_TAG_pointer_type + .long 9120 # DW_AT_type + .byte 74 # Abbrev [74] 0x27c7:0x17 DW_TAG_subprogram + .long .Linfo_string199 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 382 # DW_AT_decl_line + .long 10206 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x27d3:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x27d8:0x5 DW_TAG_formal_parameter + .long 10173 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 19 # Abbrev [19] 0x27de:0x7 DW_TAG_base_type + .long .Linfo_string200 # DW_AT_name + .byte 4 # DW_AT_encoding + .byte 4 # DW_AT_byte_size + .byte 82 # Abbrev [82] 0x27e5:0x1b DW_TAG_subprogram + .long .Linfo_string201 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 217 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x27f0:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x27f5:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x27fa:0x5 DW_TAG_formal_parameter + .long 10173 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2800:0x1c DW_TAG_subprogram + .long .Linfo_string202 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 428 # DW_AT_decl_line + .long 8071 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x280c:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2811:0x5 DW_TAG_formal_parameter + .long 10173 # DW_AT_type + .byte 9 # Abbrev [9] 0x2816:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x281c:0x1c DW_TAG_subprogram + .long .Linfo_string203 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 433 # DW_AT_decl_line + .long 677 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2828:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x282d:0x5 DW_TAG_formal_parameter + .long 10173 # DW_AT_type + .byte 9 # Abbrev [9] 0x2832:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2838:0x1b DW_TAG_subprogram + .long .Linfo_string204 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 135 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2843:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x2848:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x284d:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2853:0x12 DW_TAG_subprogram + .long .Linfo_string205 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 324 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x285f:0x5 DW_TAG_formal_parameter + .long 8570 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2865:0x1c DW_TAG_subprogram + .long .Linfo_string206 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 258 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2871:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x2876:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x287b:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2881:0x1c DW_TAG_subprogram + .long .Linfo_string207 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 262 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x288d:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x2892:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2897:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x289d:0x1c DW_TAG_subprogram + .long .Linfo_string208 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 267 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x28a9:0x5 DW_TAG_formal_parameter + .long 9120 # DW_AT_type + .byte 9 # Abbrev [9] 0x28ae:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x28b3:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x28b9:0x1c DW_TAG_subprogram + .long .Linfo_string209 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 271 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x28c5:0x5 DW_TAG_formal_parameter + .long 9120 # DW_AT_type + .byte 9 # Abbrev [9] 0x28ca:0x5 DW_TAG_formal_parameter + .long 9125 # DW_AT_type + .byte 9 # Abbrev [9] 0x28cf:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x28d5:0x13 DW_TAG_subprogram + .long .Linfo_string210 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 587 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x28e1:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 78 # Abbrev [78] 0x28e6:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x28e8:0x13 DW_TAG_subprogram + .long .Linfo_string211 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 628 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x28f4:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 78 # Abbrev [78] 0x28f9:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x28fb:0x16 DW_TAG_subprogram + .long .Linfo_string212 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 164 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2906:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x290b:0x5 DW_TAG_formal_parameter + .long 9125 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2911:0x16 DW_TAG_subprogram + .long .Linfo_string213 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 201 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x291c:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x2921:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2927:0x16 DW_TAG_subprogram + .long .Linfo_string214 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 174 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2932:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x2937:0x5 DW_TAG_formal_parameter + .long 9125 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x293d:0x16 DW_TAG_subprogram + .long .Linfo_string215 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 212 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2948:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x294d:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2953:0x1b DW_TAG_subprogram + .long .Linfo_string216 # DW_AT_name + .byte 22 # DW_AT_decl_file + .byte 253 # DW_AT_decl_line + .long 9120 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x295e:0x5 DW_TAG_formal_parameter + .long 9193 # DW_AT_type + .byte 9 # Abbrev [9] 0x2963:0x5 DW_TAG_formal_parameter + .long 9125 # DW_AT_type + .byte 9 # Abbrev [9] 0x2968:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 4 # Abbrev [4] 0x296e:0xa7 DW_TAG_namespace + .long .Linfo_string217 # DW_AT_name + .byte 51 # Abbrev [51] 0x2973:0x7 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .byte 248 # DW_AT_decl_line + .long 10773 # DW_AT_import + .byte 58 # Abbrev [58] 0x297a:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 257 # DW_AT_decl_line + .long 10803 # DW_AT_import + .byte 58 # Abbrev [58] 0x2982:0x8 DW_TAG_imported_declaration + .byte 20 # DW_AT_decl_file + .short 258 # DW_AT_decl_line + .long 10838 # DW_AT_import + .byte 51 # Abbrev [51] 0x298a:0x7 DW_TAG_imported_declaration + .byte 25 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .long 4888 # DW_AT_import + .byte 51 # Abbrev [51] 0x2991:0x7 DW_TAG_imported_declaration + .byte 25 # DW_AT_decl_file + .byte 45 # DW_AT_decl_line + .long 4899 # DW_AT_import + .byte 51 # Abbrev [51] 0x2998:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 200 # DW_AT_decl_line + .long 11904 # DW_AT_import + .byte 51 # Abbrev [51] 0x299f:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 206 # DW_AT_decl_line + .long 11945 # DW_AT_import + .byte 51 # Abbrev [51] 0x29a6:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 210 # DW_AT_decl_line + .long 11959 # DW_AT_import + .byte 51 # Abbrev [51] 0x29ad:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 216 # DW_AT_decl_line + .long 11977 # DW_AT_import + .byte 51 # Abbrev [51] 0x29b4:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 227 # DW_AT_decl_line + .long 12000 # DW_AT_import + .byte 51 # Abbrev [51] 0x29bb:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 228 # DW_AT_decl_line + .long 12018 # DW_AT_import + .byte 51 # Abbrev [51] 0x29c2:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 229 # DW_AT_decl_line + .long 12045 # DW_AT_import + .byte 51 # Abbrev [51] 0x29c9:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 231 # DW_AT_decl_line + .long 12072 # DW_AT_import + .byte 51 # Abbrev [51] 0x29d0:0x7 DW_TAG_imported_declaration + .byte 32 # DW_AT_decl_file + .byte 232 # DW_AT_decl_line + .long 12094 # DW_AT_import + .byte 26 # Abbrev [26] 0x29d7:0x1a DW_TAG_subprogram + .long .Linfo_string287 # DW_AT_linkage_name + .long .Linfo_string257 # DW_AT_name + .byte 32 # DW_AT_decl_file + .byte 213 # DW_AT_decl_line + .long 11904 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x29e6:0x5 DW_TAG_formal_parameter + .long 10831 # DW_AT_type + .byte 9 # Abbrev [9] 0x29eb:0x5 DW_TAG_formal_parameter + .long 10831 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 51 # Abbrev [51] 0x29f1:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 175 # DW_AT_decl_line + .long 13042 # DW_AT_import + .byte 51 # Abbrev [51] 0x29f8:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 176 # DW_AT_decl_line + .long 13071 # DW_AT_import + .byte 51 # Abbrev [51] 0x29ff:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 177 # DW_AT_decl_line + .long 13099 # DW_AT_import + .byte 51 # Abbrev [51] 0x2a06:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 178 # DW_AT_decl_line + .long 13122 # DW_AT_import + .byte 51 # Abbrev [51] 0x2a0d:0x7 DW_TAG_imported_declaration + .byte 36 # DW_AT_decl_file + .byte 179 # DW_AT_decl_line + .long 13155 # DW_AT_import + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2a15:0x17 DW_TAG_subprogram + .long .Linfo_string218 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 384 # DW_AT_decl_line + .long 10796 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2a21:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2a26:0x5 DW_TAG_formal_parameter + .long 10173 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 19 # Abbrev [19] 0x2a2c:0x7 DW_TAG_base_type + .long .Linfo_string219 # DW_AT_name + .byte 4 # DW_AT_encoding + .byte 16 # DW_AT_byte_size + .byte 74 # Abbrev [74] 0x2a33:0x1c DW_TAG_subprogram + .long .Linfo_string220 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 441 # DW_AT_decl_line + .long 10831 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2a3f:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2a44:0x5 DW_TAG_formal_parameter + .long 10173 # DW_AT_type + .byte 9 # Abbrev [9] 0x2a49:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 19 # Abbrev [19] 0x2a4f:0x7 DW_TAG_base_type + .long .Linfo_string221 # DW_AT_name + .byte 5 # DW_AT_encoding + .byte 8 # DW_AT_byte_size + .byte 74 # Abbrev [74] 0x2a56:0x1c DW_TAG_subprogram + .long .Linfo_string222 # DW_AT_name + .byte 22 # DW_AT_decl_file + .short 448 # DW_AT_decl_line + .long 10866 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2a62:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2a67:0x5 DW_TAG_formal_parameter + .long 10173 # DW_AT_type + .byte 9 # Abbrev [9] 0x2a6c:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 19 # Abbrev [19] 0x2a72:0x7 DW_TAG_base_type + .long .Linfo_string223 # DW_AT_name + .byte 7 # DW_AT_encoding + .byte 8 # DW_AT_byte_size + .byte 75 # Abbrev [75] 0x2a79:0x5 DW_TAG_structure_type + .long .Linfo_string225 # DW_AT_name + # DW_AT_declaration + .byte 82 # Abbrev [82] 0x2a7e:0x16 DW_TAG_subprogram + .long .Linfo_string226 # DW_AT_name + .byte 27 # DW_AT_decl_file + .byte 122 # DW_AT_decl_line + .long 9014 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2a89:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 9 # Abbrev [9] 0x2a8e:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 83 # Abbrev [83] 0x2a94:0xb DW_TAG_subprogram + .long .Linfo_string227 # DW_AT_name + .byte 27 # DW_AT_decl_file + .byte 125 # DW_AT_decl_line + .long 10911 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 21 # Abbrev [21] 0x2a9f:0x5 DW_TAG_pointer_type + .long 10873 # DW_AT_type + .byte 82 # Abbrev [82] 0x2aa4:0x11 DW_TAG_subprogram + .long .Linfo_string228 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 108 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2aaf:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2ab5:0x11 DW_TAG_subprogram + .long .Linfo_string229 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 109 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2ac0:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2ac6:0x11 DW_TAG_subprogram + .long .Linfo_string230 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 110 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2ad1:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2ad7:0x11 DW_TAG_subprogram + .long .Linfo_string231 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 111 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2ae2:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2ae8:0x11 DW_TAG_subprogram + .long .Linfo_string232 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 113 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2af3:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2af9:0x11 DW_TAG_subprogram + .long .Linfo_string233 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 112 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b04:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2b0a:0x11 DW_TAG_subprogram + .long .Linfo_string234 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 114 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b15:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2b1b:0x11 DW_TAG_subprogram + .long .Linfo_string235 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 115 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b26:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2b2c:0x11 DW_TAG_subprogram + .long .Linfo_string236 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 116 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b37:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2b3d:0x11 DW_TAG_subprogram + .long .Linfo_string237 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 117 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b48:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2b4e:0x11 DW_TAG_subprogram + .long .Linfo_string238 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 118 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b59:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2b5f:0x11 DW_TAG_subprogram + .long .Linfo_string239 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 122 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b6a:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2b70:0x11 DW_TAG_subprogram + .long .Linfo_string240 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 125 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b7b:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2b81:0x11 DW_TAG_subprogram + .long .Linfo_string241 # DW_AT_name + .byte 28 # DW_AT_decl_file + .byte 130 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b8c:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2b92:0x12 DW_TAG_subprogram + .long .Linfo_string242 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 837 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2b9e:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x2ba4:0xb DW_TAG_typedef + .long 11183 # DW_AT_type + .long .Linfo_string243 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 62 # DW_AT_decl_line + .byte 67 # Abbrev [67] 0x2baf:0x1 DW_TAG_structure_type + # DW_AT_declaration + .byte 23 # Abbrev [23] 0x2bb0:0xb DW_TAG_typedef + .long 11195 # DW_AT_type + .long .Linfo_string246 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 70 # DW_AT_decl_line + .byte 72 # Abbrev [72] 0x2bbb:0x1e DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .byte 16 # DW_AT_byte_size + .byte 30 # DW_AT_decl_file + .byte 66 # DW_AT_decl_line + .byte 6 # Abbrev [6] 0x2bc0:0xc DW_TAG_member + .long .Linfo_string244 # DW_AT_name + .long 8071 # DW_AT_type + .byte 30 # DW_AT_decl_file + .byte 68 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x2bcc:0xc DW_TAG_member + .long .Linfo_string245 # DW_AT_name + .long 8071 # DW_AT_type + .byte 30 # DW_AT_decl_file + .byte 69 # DW_AT_decl_line + .byte 8 # DW_AT_data_member_location + .byte 0 # End Of Children Mark + .byte 84 # Abbrev [84] 0x2bd9:0x8 DW_TAG_subprogram + .long .Linfo_string247 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 588 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + # DW_AT_noreturn + .byte 74 # Abbrev [74] 0x2be1:0x17 DW_TAG_subprogram + .long .Linfo_string248 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 583 # DW_AT_decl_line + .long 8429 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2bed:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x2bf2:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2bf8:0x12 DW_TAG_subprogram + .long .Linfo_string249 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 592 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2c04:0x5 DW_TAG_formal_parameter + .long 11274 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x2c0a:0x5 DW_TAG_pointer_type + .long 11279 # DW_AT_type + .byte 85 # Abbrev [85] 0x2c0f:0x1 DW_TAG_subroutine_type + .byte 74 # Abbrev [74] 0x2c10:0x12 DW_TAG_subprogram + .long .Linfo_string250 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 597 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2c1c:0x5 DW_TAG_formal_parameter + .long 11274 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2c22:0x11 DW_TAG_subprogram + .long .Linfo_string251 # DW_AT_name + .byte 33 # DW_AT_decl_file + .byte 25 # DW_AT_decl_line + .long 10166 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2c2d:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2c33:0x12 DW_TAG_subprogram + .long .Linfo_string252 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 361 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2c3f:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2c45:0x12 DW_TAG_subprogram + .long .Linfo_string253 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 366 # DW_AT_decl_line + .long 8071 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2c51:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2c57:0x25 DW_TAG_subprogram + .long .Linfo_string254 # DW_AT_name + .byte 34 # DW_AT_decl_file + .byte 20 # DW_AT_decl_line + .long 8429 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2c62:0x5 DW_TAG_formal_parameter + .long 11388 # DW_AT_type + .byte 9 # Abbrev [9] 0x2c67:0x5 DW_TAG_formal_parameter + .long 11388 # DW_AT_type + .byte 9 # Abbrev [9] 0x2c6c:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x2c71:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x2c76:0x5 DW_TAG_formal_parameter + .long 11394 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x2c7c:0x5 DW_TAG_pointer_type + .long 11393 # DW_AT_type + .byte 86 # Abbrev [86] 0x2c81:0x1 DW_TAG_const_type + .byte 65 # Abbrev [65] 0x2c82:0xc DW_TAG_typedef + .long 11406 # DW_AT_type + .long .Linfo_string255 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 805 # DW_AT_decl_line + .byte 21 # Abbrev [21] 0x2c8e:0x5 DW_TAG_pointer_type + .long 11411 # DW_AT_type + .byte 87 # Abbrev [87] 0x2c93:0x10 DW_TAG_subroutine_type + .long 8042 # DW_AT_type + .byte 9 # Abbrev [9] 0x2c98:0x5 DW_TAG_formal_parameter + .long 11388 # DW_AT_type + .byte 9 # Abbrev [9] 0x2c9d:0x5 DW_TAG_formal_parameter + .long 11388 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2ca3:0x17 DW_TAG_subprogram + .long .Linfo_string256 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 541 # DW_AT_decl_line + .long 8429 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2caf:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x2cb4:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2cba:0x17 DW_TAG_subprogram + .long .Linfo_string257 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 849 # DW_AT_decl_line + .long 11172 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2cc6:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 9 # Abbrev [9] 0x2ccb:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 88 # Abbrev [88] 0x2cd1:0xe DW_TAG_subprogram + .long .Linfo_string258 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 614 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + # DW_AT_noreturn + .byte 9 # Abbrev [9] 0x2cd9:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 89 # Abbrev [89] 0x2cdf:0xe DW_TAG_subprogram + .long .Linfo_string259 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 563 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2ce7:0x5 DW_TAG_formal_parameter + .long 8429 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2ced:0x12 DW_TAG_subprogram + .long .Linfo_string260 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 631 # DW_AT_decl_line + .long 9014 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2cf9:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2cff:0x12 DW_TAG_subprogram + .long .Linfo_string261 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 838 # DW_AT_decl_line + .long 8071 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2d0b:0x5 DW_TAG_formal_parameter + .long 8071 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2d11:0x17 DW_TAG_subprogram + .long .Linfo_string262 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 851 # DW_AT_decl_line + .long 11184 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2d1d:0x5 DW_TAG_formal_parameter + .long 8071 # DW_AT_type + .byte 9 # Abbrev [9] 0x2d22:0x5 DW_TAG_formal_parameter + .long 8071 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2d28:0x12 DW_TAG_subprogram + .long .Linfo_string263 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 539 # DW_AT_decl_line + .long 8429 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2d34:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2d3a:0x17 DW_TAG_subprogram + .long .Linfo_string264 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 919 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2d46:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x2d4b:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2d51:0x1c DW_TAG_subprogram + .long .Linfo_string265 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 930 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2d5d:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x2d62:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2d67:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2d6d:0x1c DW_TAG_subprogram + .long .Linfo_string266 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 922 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2d79:0x5 DW_TAG_formal_parameter + .long 9132 # DW_AT_type + .byte 9 # Abbrev [9] 0x2d7e:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2d83:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 89 # Abbrev [89] 0x2d89:0x1d DW_TAG_subprogram + .long .Linfo_string267 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 827 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2d91:0x5 DW_TAG_formal_parameter + .long 8429 # DW_AT_type + .byte 9 # Abbrev [9] 0x2d96:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x2d9b:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x2da0:0x5 DW_TAG_formal_parameter + .long 11394 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 88 # Abbrev [88] 0x2da6:0xe DW_TAG_subprogram + .long .Linfo_string268 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 620 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + # DW_AT_noreturn + .byte 9 # Abbrev [9] 0x2dae:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 79 # Abbrev [79] 0x2db4:0xc DW_TAG_subprogram + .long .Linfo_string269 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 453 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 74 # Abbrev [74] 0x2dc0:0x17 DW_TAG_subprogram + .long .Linfo_string270 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 549 # DW_AT_decl_line + .long 8429 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2dcc:0x5 DW_TAG_formal_parameter + .long 8429 # DW_AT_type + .byte 9 # Abbrev [9] 0x2dd1:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 89 # Abbrev [89] 0x2dd7:0xe DW_TAG_subprogram + .long .Linfo_string271 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 455 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2ddf:0x5 DW_TAG_formal_parameter + .long 8279 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2de5:0x16 DW_TAG_subprogram + .long .Linfo_string272 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 117 # DW_AT_decl_line + .long 10166 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2df0:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2df5:0x5 DW_TAG_formal_parameter + .long 11771 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x2dfb:0x5 DW_TAG_restrict_type + .long 11776 # DW_AT_type + .byte 21 # Abbrev [21] 0x2e00:0x5 DW_TAG_pointer_type + .long 9014 # DW_AT_type + .byte 82 # Abbrev [82] 0x2e05:0x1b DW_TAG_subprogram + .long .Linfo_string273 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 176 # DW_AT_decl_line + .long 8071 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2e10:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2e15:0x5 DW_TAG_formal_parameter + .long 11771 # DW_AT_type + .byte 9 # Abbrev [9] 0x2e1a:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2e20:0x1b DW_TAG_subprogram + .long .Linfo_string274 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 180 # DW_AT_decl_line + .long 677 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2e2b:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2e30:0x5 DW_TAG_formal_parameter + .long 11771 # DW_AT_type + .byte 9 # Abbrev [9] 0x2e35:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2e3b:0x12 DW_TAG_subprogram + .long .Linfo_string275 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 781 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2e47:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2e4d:0x1c DW_TAG_subprogram + .long .Linfo_string276 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 933 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2e59:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 9 # Abbrev [9] 0x2e5e:0x5 DW_TAG_formal_parameter + .long 9188 # DW_AT_type + .byte 9 # Abbrev [9] 0x2e63:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2e69:0x17 DW_TAG_subprogram + .long .Linfo_string277 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 926 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2e75:0x5 DW_TAG_formal_parameter + .long 9014 # DW_AT_type + .byte 9 # Abbrev [9] 0x2e7a:0x5 DW_TAG_formal_parameter + .long 9125 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x2e80:0xb DW_TAG_typedef + .long 11915 # DW_AT_type + .long .Linfo_string278 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 80 # DW_AT_decl_line + .byte 72 # Abbrev [72] 0x2e8b:0x1e DW_TAG_structure_type + .byte 5 # DW_AT_calling_convention + .byte 16 # DW_AT_byte_size + .byte 30 # DW_AT_decl_file + .byte 76 # DW_AT_decl_line + .byte 6 # Abbrev [6] 0x2e90:0xc DW_TAG_member + .long .Linfo_string244 # DW_AT_name + .long 10831 # DW_AT_type + .byte 30 # DW_AT_decl_file + .byte 78 # DW_AT_decl_line + .byte 0 # DW_AT_data_member_location + .byte 6 # Abbrev [6] 0x2e9c:0xc DW_TAG_member + .long .Linfo_string245 # DW_AT_name + .long 10831 # DW_AT_type + .byte 30 # DW_AT_decl_file + .byte 79 # DW_AT_decl_line + .byte 8 # DW_AT_data_member_location + .byte 0 # End Of Children Mark + .byte 88 # Abbrev [88] 0x2ea9:0xe DW_TAG_subprogram + .long .Linfo_string279 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 626 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + # DW_AT_noreturn + .byte 9 # Abbrev [9] 0x2eb1:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2eb7:0x12 DW_TAG_subprogram + .long .Linfo_string280 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 841 # DW_AT_decl_line + .long 10831 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2ec3:0x5 DW_TAG_formal_parameter + .long 10831 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2ec9:0x17 DW_TAG_subprogram + .long .Linfo_string281 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 855 # DW_AT_decl_line + .long 11904 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2ed5:0x5 DW_TAG_formal_parameter + .long 10831 # DW_AT_type + .byte 9 # Abbrev [9] 0x2eda:0x5 DW_TAG_formal_parameter + .long 10831 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2ee0:0x12 DW_TAG_subprogram + .long .Linfo_string282 # DW_AT_name + .byte 30 # DW_AT_decl_file + .short 373 # DW_AT_decl_line + .long 10831 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2eec:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2ef2:0x1b DW_TAG_subprogram + .long .Linfo_string283 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 200 # DW_AT_decl_line + .long 10831 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2efd:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2f02:0x5 DW_TAG_formal_parameter + .long 11771 # DW_AT_type + .byte 9 # Abbrev [9] 0x2f07:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2f0d:0x1b DW_TAG_subprogram + .long .Linfo_string284 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 205 # DW_AT_decl_line + .long 10866 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2f18:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2f1d:0x5 DW_TAG_formal_parameter + .long 11771 # DW_AT_type + .byte 9 # Abbrev [9] 0x2f22:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2f28:0x16 DW_TAG_subprogram + .long .Linfo_string285 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 123 # DW_AT_decl_line + .long 10206 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2f33:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2f38:0x5 DW_TAG_formal_parameter + .long 11771 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2f3e:0x16 DW_TAG_subprogram + .long .Linfo_string286 # DW_AT_name + .byte 30 # DW_AT_decl_file + .byte 126 # DW_AT_decl_line + .long 10796 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2f49:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x2f4e:0x5 DW_TAG_formal_parameter + .long 11771 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 23 # Abbrev [23] 0x2f54:0xb DW_TAG_typedef + .long 8633 # DW_AT_type + .long .Linfo_string288 # DW_AT_name + .byte 35 # DW_AT_decl_file + .byte 7 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x2f5f:0xb DW_TAG_typedef + .long 12138 # DW_AT_type + .long .Linfo_string290 # DW_AT_name + .byte 38 # DW_AT_decl_file + .byte 78 # DW_AT_decl_line + .byte 23 # Abbrev [23] 0x2f6a:0xb DW_TAG_typedef + .long 12149 # DW_AT_type + .long .Linfo_string289 # DW_AT_name + .byte 37 # DW_AT_decl_file + .byte 30 # DW_AT_decl_line + .byte 67 # Abbrev [67] 0x2f75:0x1 DW_TAG_structure_type + # DW_AT_declaration + .byte 89 # Abbrev [89] 0x2f76:0xe DW_TAG_subprogram + .long .Linfo_string291 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 757 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2f7e:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x2f84:0x5 DW_TAG_pointer_type + .long 12116 # DW_AT_type + .byte 82 # Abbrev [82] 0x2f89:0x11 DW_TAG_subprogram + .long .Linfo_string292 # DW_AT_name + .byte 38 # DW_AT_decl_file + .byte 199 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2f94:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2f9a:0x12 DW_TAG_subprogram + .long .Linfo_string293 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 759 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2fa6:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2fac:0x12 DW_TAG_subprogram + .long .Linfo_string294 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 761 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2fb8:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x2fbe:0x11 DW_TAG_subprogram + .long .Linfo_string295 # DW_AT_name + .byte 38 # DW_AT_decl_file + .byte 204 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2fc9:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2fcf:0x12 DW_TAG_subprogram + .long .Linfo_string296 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 477 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2fdb:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x2fe1:0x17 DW_TAG_subprogram + .long .Linfo_string297 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 731 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x2fed:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 9 # Abbrev [9] 0x2ff2:0x5 DW_TAG_formal_parameter + .long 12285 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x2ff8:0x5 DW_TAG_restrict_type + .long 12164 # DW_AT_type + .byte 77 # Abbrev [77] 0x2ffd:0x5 DW_TAG_restrict_type + .long 12290 # DW_AT_type + .byte 21 # Abbrev [21] 0x3002:0x5 DW_TAG_pointer_type + .long 12127 # DW_AT_type + .byte 74 # Abbrev [74] 0x3007:0x1c DW_TAG_subprogram + .long .Linfo_string298 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 564 # DW_AT_decl_line + .long 9014 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3013:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 9 # Abbrev [9] 0x3018:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 9 # Abbrev [9] 0x301d:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x3023:0x16 DW_TAG_subprogram + .long .Linfo_string299 # DW_AT_name + .byte 38 # DW_AT_decl_file + .byte 232 # DW_AT_decl_line + .long 12164 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x302e:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x3033:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3039:0x18 DW_TAG_subprogram + .long .Linfo_string300 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 312 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3045:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 9 # Abbrev [9] 0x304a:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 78 # Abbrev [78] 0x304f:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3051:0x17 DW_TAG_subprogram + .long .Linfo_string301 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 517 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x305d:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 9 # Abbrev [9] 0x3062:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3068:0x17 DW_TAG_subprogram + .long .Linfo_string302 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 626 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3074:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x3079:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x307f:0x21 DW_TAG_subprogram + .long .Linfo_string303 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 646 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x308b:0x5 DW_TAG_formal_parameter + .long 12448 # DW_AT_type + .byte 9 # Abbrev [9] 0x3090:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x3095:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x309a:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x30a0:0x5 DW_TAG_restrict_type + .long 8429 # DW_AT_type + .byte 82 # Abbrev [82] 0x30a5:0x1b DW_TAG_subprogram + .long .Linfo_string304 # DW_AT_name + .byte 38 # DW_AT_decl_file + .byte 238 # DW_AT_decl_line + .long 12164 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x30b0:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x30b5:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x30ba:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x30c0:0x18 DW_TAG_subprogram + .long .Linfo_string305 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 377 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x30cc:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 9 # Abbrev [9] 0x30d1:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 78 # Abbrev [78] 0x30d6:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x30d8:0x1c DW_TAG_subprogram + .long .Linfo_string306 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 684 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x30e4:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 9 # Abbrev [9] 0x30e9:0x5 DW_TAG_formal_parameter + .long 8071 # DW_AT_type + .byte 9 # Abbrev [9] 0x30ee:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x30f4:0x17 DW_TAG_subprogram + .long .Linfo_string307 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 736 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3100:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 9 # Abbrev [9] 0x3105:0x5 DW_TAG_formal_parameter + .long 12555 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x310b:0x5 DW_TAG_pointer_type + .long 12560 # DW_AT_type + .byte 3 # Abbrev [3] 0x3110:0x5 DW_TAG_const_type + .long 12127 # DW_AT_type + .byte 74 # Abbrev [74] 0x3115:0x12 DW_TAG_subprogram + .long .Linfo_string308 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 689 # DW_AT_decl_line + .long 8071 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3121:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3127:0x21 DW_TAG_subprogram + .long .Linfo_string309 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 652 # DW_AT_decl_line + .long 666 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3133:0x5 DW_TAG_formal_parameter + .long 12616 # DW_AT_type + .byte 9 # Abbrev [9] 0x3138:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x313d:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x3142:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 77 # Abbrev [77] 0x3148:0x5 DW_TAG_restrict_type + .long 11388 # DW_AT_type + .byte 74 # Abbrev [74] 0x314d:0x12 DW_TAG_subprogram + .long .Linfo_string310 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 478 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3159:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 83 # Abbrev [83] 0x315f:0xb DW_TAG_subprogram + .long .Linfo_string311 # DW_AT_name + .byte 39 # DW_AT_decl_file + .byte 44 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 89 # Abbrev [89] 0x316a:0xe DW_TAG_subprogram + .long .Linfo_string312 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 775 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3172:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3178:0x13 DW_TAG_subprogram + .long .Linfo_string313 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 318 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3184:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 78 # Abbrev [78] 0x3189:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x318b:0x17 DW_TAG_subprogram + .long .Linfo_string314 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 518 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3197:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 9 # Abbrev [9] 0x319c:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x31a2:0x11 DW_TAG_subprogram + .long .Linfo_string315 # DW_AT_name + .byte 39 # DW_AT_decl_file + .byte 79 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x31ad:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x31b3:0x12 DW_TAG_subprogram + .long .Linfo_string316 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 632 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x31bf:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x31c5:0x11 DW_TAG_subprogram + .long .Linfo_string317 # DW_AT_name + .byte 38 # DW_AT_decl_file + .byte 144 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x31d0:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x31d6:0x16 DW_TAG_subprogram + .long .Linfo_string318 # DW_AT_name + .byte 38 # DW_AT_decl_file + .byte 146 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x31e1:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 9 # Abbrev [9] 0x31e6:0x5 DW_TAG_formal_parameter + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 89 # Abbrev [89] 0x31ec:0xe DW_TAG_subprogram + .long .Linfo_string319 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 694 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x31f4:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x31fa:0x13 DW_TAG_subprogram + .long .Linfo_string320 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 383 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3206:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 78 # Abbrev [78] 0x320b:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 89 # Abbrev [89] 0x320d:0x13 DW_TAG_subprogram + .long .Linfo_string321 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 290 # DW_AT_decl_line + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3215:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 9 # Abbrev [9] 0x321a:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3220:0x21 DW_TAG_subprogram + .long .Linfo_string322 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 294 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x322c:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 9 # Abbrev [9] 0x3231:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 9 # Abbrev [9] 0x3236:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 9 # Abbrev [9] 0x323b:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3241:0x18 DW_TAG_subprogram + .long .Linfo_string323 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 320 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x324d:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 9 # Abbrev [9] 0x3252:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 78 # Abbrev [78] 0x3257:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3259:0x18 DW_TAG_subprogram + .long .Linfo_string324 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 385 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3265:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x326a:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 78 # Abbrev [78] 0x326f:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 83 # Abbrev [83] 0x3271:0xb DW_TAG_subprogram + .long .Linfo_string325 # DW_AT_name + .byte 38 # DW_AT_decl_file + .byte 159 # DW_AT_decl_line + .long 12164 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 82 # Abbrev [82] 0x327c:0x11 DW_TAG_subprogram + .long .Linfo_string326 # DW_AT_name + .byte 38 # DW_AT_decl_file + .byte 173 # DW_AT_decl_line + .long 9014 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3287:0x5 DW_TAG_formal_parameter + .long 9014 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x328d:0x17 DW_TAG_subprogram + .long .Linfo_string327 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 639 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3299:0x5 DW_TAG_formal_parameter + .long 8042 # DW_AT_type + .byte 9 # Abbrev [9] 0x329e:0x5 DW_TAG_formal_parameter + .long 12164 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x32a4:0x1c DW_TAG_subprogram + .long .Linfo_string328 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 327 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x32b0:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 9 # Abbrev [9] 0x32b5:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x32ba:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 82 # Abbrev [82] 0x32c0:0x16 DW_TAG_subprogram + .long .Linfo_string329 # DW_AT_name + .byte 39 # DW_AT_decl_file + .byte 36 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x32cb:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x32d0:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x32d6:0x1c DW_TAG_subprogram + .long .Linfo_string330 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 335 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x32e2:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 9 # Abbrev [9] 0x32e7:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x32ec:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x32f2:0x1d DW_TAG_subprogram + .long .Linfo_string331 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 340 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x32fe:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 9 # Abbrev [9] 0x3303:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x3308:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 78 # Abbrev [78] 0x330d:0x1 DW_TAG_unspecified_parameters + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x330f:0x1c DW_TAG_subprogram + .long .Linfo_string332 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 420 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x331b:0x5 DW_TAG_formal_parameter + .long 12280 # DW_AT_type + .byte 9 # Abbrev [9] 0x3320:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x3325:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x332b:0x17 DW_TAG_subprogram + .long .Linfo_string333 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 428 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x3337:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x333c:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3342:0x21 DW_TAG_subprogram + .long .Linfo_string334 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 344 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x334e:0x5 DW_TAG_formal_parameter + .long 9812 # DW_AT_type + .byte 9 # Abbrev [9] 0x3353:0x5 DW_TAG_formal_parameter + .long 666 # DW_AT_type + .byte 9 # Abbrev [9] 0x3358:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x335d:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 74 # Abbrev [74] 0x3363:0x1c DW_TAG_subprogram + .long .Linfo_string335 # DW_AT_name + .byte 38 # DW_AT_decl_file + .short 432 # DW_AT_decl_line + .long 8042 # DW_AT_type + # DW_AT_declaration + # DW_AT_external + .byte 9 # Abbrev [9] 0x336f:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x3374:0x5 DW_TAG_formal_parameter + .long 9332 # DW_AT_type + .byte 9 # Abbrev [9] 0x3379:0x5 DW_TAG_formal_parameter + .long 9596 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x337f:0x5 DW_TAG_pointer_type + .long 930 # DW_AT_type + .byte 22 # Abbrev [22] 0x3384:0x5 DW_TAG_reference_type + .long 930 # DW_AT_type + .byte 21 # Abbrev [21] 0x3389:0x5 DW_TAG_pointer_type + .long 13198 # DW_AT_type + .byte 3 # Abbrev [3] 0x338e:0x5 DW_TAG_const_type + .long 930 # DW_AT_type + .byte 3 # Abbrev [3] 0x3393:0x5 DW_TAG_const_type + .long 13208 # DW_AT_type + .byte 23 # Abbrev [23] 0x3398:0xb DW_TAG_typedef + .long 4888 # DW_AT_type + .long .Linfo_string357 # DW_AT_name + .byte 41 # DW_AT_decl_file + .byte 86 # DW_AT_decl_line + .byte 21 # Abbrev [21] 0x33a3:0x5 DW_TAG_pointer_type + .long 5659 # DW_AT_type + .byte 22 # Abbrev [22] 0x33a8:0x5 DW_TAG_reference_type + .long 13229 # DW_AT_type + .byte 3 # Abbrev [3] 0x33ad:0x5 DW_TAG_const_type + .long 5659 # DW_AT_type + .byte 22 # Abbrev [22] 0x33b2:0x5 DW_TAG_reference_type + .long 5659 # DW_AT_type + .byte 21 # Abbrev [21] 0x33b7:0x5 DW_TAG_pointer_type + .long 13229 # DW_AT_type + .byte 22 # Abbrev [22] 0x33bc:0x5 DW_TAG_reference_type + .long 661 # DW_AT_type + .byte 22 # Abbrev [22] 0x33c1:0x5 DW_TAG_reference_type + .long 7558 # DW_AT_type + .byte 22 # Abbrev [22] 0x33c6:0x5 DW_TAG_reference_type + .long 13259 # DW_AT_type + .byte 3 # Abbrev [3] 0x33cb:0x5 DW_TAG_const_type + .long 7558 # DW_AT_type + .byte 21 # Abbrev [21] 0x33d0:0x5 DW_TAG_pointer_type + .long 13259 # DW_AT_type + .byte 21 # Abbrev [21] 0x33d5:0x5 DW_TAG_pointer_type + .long 7558 # DW_AT_type + .byte 22 # Abbrev [22] 0x33da:0x5 DW_TAG_reference_type + .long 13279 # DW_AT_type + .byte 3 # Abbrev [3] 0x33df:0x5 DW_TAG_const_type + .long 7828 # DW_AT_type + .byte 90 # Abbrev [90] 0x33e4:0x18 DW_TAG_subprogram + .long .Linfo_string480 # DW_AT_linkage_name + .long 975 # DW_AT_specification + .byte 1 # DW_AT_inline + .long 13298 # DW_AT_object_pointer + .byte 91 # Abbrev [91] 0x33f2:0x9 DW_TAG_formal_parameter + .long .Linfo_string481 # DW_AT_name + .long 13308 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x33fc:0x5 DW_TAG_pointer_type + .long 930 # DW_AT_type + .byte 21 # Abbrev [21] 0x3401:0x5 DW_TAG_pointer_type + .long 1211 # DW_AT_type + .byte 21 # Abbrev [21] 0x3406:0x5 DW_TAG_pointer_type + .long 1159 # DW_AT_type + .byte 90 # Abbrev [90] 0x340b:0x18 DW_TAG_subprogram + .long .Linfo_string487 # DW_AT_linkage_name + .long 1186 # DW_AT_specification + .byte 1 # DW_AT_inline + .long 13337 # DW_AT_object_pointer + .byte 91 # Abbrev [91] 0x3419:0x9 DW_TAG_formal_parameter + .long .Linfo_string481 # DW_AT_name + .long 13347 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x3423:0x5 DW_TAG_pointer_type + .long 1159 # DW_AT_type + .byte 21 # Abbrev [21] 0x3428:0x5 DW_TAG_pointer_type + .long 1239 # DW_AT_type + .byte 22 # Abbrev [22] 0x342d:0x5 DW_TAG_reference_type + .long 1239 # DW_AT_type + .byte 21 # Abbrev [21] 0x3432:0x5 DW_TAG_pointer_type + .long 13367 # DW_AT_type + .byte 3 # Abbrev [3] 0x3437:0x5 DW_TAG_const_type + .long 1239 # DW_AT_type + .byte 90 # Abbrev [90] 0x343c:0x18 DW_TAG_subprogram + .long .Linfo_string504 # DW_AT_linkage_name + .long 1260 # DW_AT_specification + .byte 1 # DW_AT_inline + .long 13386 # DW_AT_object_pointer + .byte 91 # Abbrev [91] 0x344a:0x9 DW_TAG_formal_parameter + .long .Linfo_string481 # DW_AT_name + .long 13396 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x3454:0x5 DW_TAG_pointer_type + .long 1239 # DW_AT_type + .byte 3 # Abbrev [3] 0x3459:0x5 DW_TAG_const_type + .long 689 # DW_AT_type + .byte 92 # Abbrev [92] 0x345e:0x26 DW_TAG_subprogram + .long 772 # DW_AT_specification + .byte 1 # DW_AT_inline + .byte 11 # Abbrev [11] 0x3464:0x9 DW_TAG_template_type_parameter + .long 689 # DW_AT_type + .long .Linfo_string478 # DW_AT_name + .byte 33 # Abbrev [33] 0x346d:0xb DW_TAG_formal_parameter + .long .Linfo_string16 # DW_AT_name + .byte 5 # DW_AT_decl_file + .byte 36 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 33 # Abbrev [33] 0x3478:0xb DW_TAG_formal_parameter + .long .Linfo_string18 # DW_AT_name + .byte 5 # DW_AT_decl_file + .byte 36 # DW_AT_decl_line + .long 689 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 92 # Abbrev [92] 0x3484:0x12 DW_TAG_subprogram + .long 807 # DW_AT_specification + .byte 1 # DW_AT_inline + .byte 33 # Abbrev [33] 0x348a:0xb DW_TAG_formal_parameter + .long .Linfo_string514 # DW_AT_name + .byte 5 # DW_AT_decl_file + .byte 51 # DW_AT_decl_line + .long 7937 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 32 # Abbrev [32] 0x3496:0x1c DW_TAG_subprogram + .long .Linfo_string515 # DW_AT_linkage_name + .long .Linfo_string512 # DW_AT_name + .byte 3 # DW_AT_decl_file + .byte 5 # DW_AT_decl_line + .long 1239 # DW_AT_type + # DW_AT_external + .byte 1 # DW_AT_inline + .byte 33 # Abbrev [33] 0x34a6:0xb DW_TAG_formal_parameter + .long .Linfo_string514 # DW_AT_name + .byte 3 # DW_AT_decl_file + .byte 5 # DW_AT_decl_line + .long 7937 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 93 # Abbrev [93] 0x34b2:0x175 DW_TAG_subprogram + .quad .Lfunc_begin0 # DW_AT_low_pc + .long .Lfunc_end0-.Lfunc_begin0 # DW_AT_high_pc + .byte 1 # DW_AT_frame_base + .byte 87 + .long .Linfo_string573 # DW_AT_linkage_name + .long .Linfo_string574 # DW_AT_name + .byte 3 # DW_AT_decl_file + .byte 9 # DW_AT_decl_line + # DW_AT_external + .byte 49 # Abbrev [49] 0x34cb:0x15b DW_TAG_inlined_subroutine + .long 13462 # DW_AT_abstract_origin + .long .Ldebug_ranges0 # DW_AT_ranges + .byte 3 # DW_AT_call_file + .byte 10 # DW_AT_call_line + .byte 47 # Abbrev [47] 0x34d6:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc0 # DW_AT_location + .long 13478 # DW_AT_abstract_origin + .byte 49 # Abbrev [49] 0x34df:0x146 DW_TAG_inlined_subroutine + .long 13444 # DW_AT_abstract_origin + .long .Ldebug_ranges1 # DW_AT_ranges + .byte 3 # DW_AT_call_file + .byte 6 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x34ea:0x5 DW_TAG_formal_parameter + .long 13450 # DW_AT_abstract_origin + .byte 49 # Abbrev [49] 0x34ef:0x135 DW_TAG_inlined_subroutine + .long 13406 # DW_AT_abstract_origin + .long .Ldebug_ranges2 # DW_AT_ranges + .byte 5 # DW_AT_call_file + .byte 52 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x34fa:0x5 DW_TAG_formal_parameter + .long 13421 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0x34ff:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc2 # DW_AT_location + .long 13432 # DW_AT_abstract_origin + .byte 49 # Abbrev [49] 0x3508:0x11b DW_TAG_inlined_subroutine + .long 1501 # DW_AT_abstract_origin + .long .Ldebug_ranges3 # DW_AT_ranges + .byte 5 # DW_AT_call_file + .byte 37 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x3513:0x5 DW_TAG_formal_parameter + .long 1544 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x3518:0x5 DW_TAG_formal_parameter + .long 1555 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0x351d:0x4b DW_TAG_inlined_subroutine + .long 13372 # DW_AT_abstract_origin + .quad .Ltmp3 # DW_AT_low_pc + .long .Ltmp4-.Ltmp3 # DW_AT_high_pc + .byte 40 # DW_AT_call_file + .byte 15 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x3530:0x5 DW_TAG_formal_parameter + .long 13386 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0x3535:0x32 DW_TAG_inlined_subroutine + .long 13323 # DW_AT_abstract_origin + .quad .Ltmp3 # DW_AT_low_pc + .long .Ltmp4-.Ltmp3 # DW_AT_high_pc + .byte 4 # DW_AT_call_file + .byte 147 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x3548:0x5 DW_TAG_formal_parameter + .long 13337 # DW_AT_abstract_origin + .byte 46 # Abbrev [46] 0x354d:0x19 DW_TAG_inlined_subroutine + .long 13284 # DW_AT_abstract_origin + .quad .Ltmp3 # DW_AT_low_pc + .long .Ltmp4-.Ltmp3 # DW_AT_high_pc + .byte 4 # DW_AT_call_file + .byte 82 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x3560:0x5 DW_TAG_formal_parameter + .long 13298 # DW_AT_abstract_origin + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 49 # Abbrev [49] 0x3568:0xba DW_TAG_inlined_subroutine + .long 1893 # DW_AT_abstract_origin + .long .Ldebug_ranges4 # DW_AT_ranges + .byte 40 # DW_AT_call_file + .byte 15 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x3573:0x5 DW_TAG_formal_parameter + .long 1962 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x3578:0x5 DW_TAG_formal_parameter + .long 1973 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x357d:0x5 DW_TAG_formal_parameter + .long 1984 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x3582:0x5 DW_TAG_formal_parameter + .long 1995 # DW_AT_abstract_origin + .byte 49 # Abbrev [49] 0x3587:0x9a DW_TAG_inlined_subroutine + .long 1757 # DW_AT_abstract_origin + .long .Ldebug_ranges5 # DW_AT_ranges + .byte 40 # DW_AT_call_file + .byte 45 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x3592:0x5 DW_TAG_formal_parameter + .long 1841 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x3597:0x5 DW_TAG_formal_parameter + .long 1852 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x359c:0x5 DW_TAG_formal_parameter + .long 1863 # DW_AT_abstract_origin + .byte 49 # Abbrev [49] 0x35a1:0x7f DW_TAG_inlined_subroutine + .long 1578 # DW_AT_abstract_origin + .long .Ldebug_ranges6 # DW_AT_ranges + .byte 40 # DW_AT_call_file + .byte 144 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x35ac:0x5 DW_TAG_formal_parameter + .long 1657 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x35b1:0x5 DW_TAG_formal_parameter + .long 1668 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x35b6:0x5 DW_TAG_formal_parameter + .long 1679 # DW_AT_abstract_origin + .byte 49 # Abbrev [49] 0x35bb:0x64 DW_TAG_inlined_subroutine + .long 2374 # DW_AT_abstract_origin + .long .Ldebug_ranges7 # DW_AT_ranges + .byte 40 # DW_AT_call_file + .byte 67 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x35c6:0x5 DW_TAG_formal_parameter + .long 2452 # DW_AT_abstract_origin + .byte 47 # Abbrev [47] 0x35cb:0x9 DW_TAG_formal_parameter + .long .Ldebug_loc1 # DW_AT_location + .long 2463 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x35d4:0x5 DW_TAG_formal_parameter + .long 2474 # DW_AT_abstract_origin + .byte 49 # Abbrev [49] 0x35d9:0x45 DW_TAG_inlined_subroutine + .long 2241 # DW_AT_abstract_origin + .long .Ldebug_ranges8 # DW_AT_ranges + .byte 40 # DW_AT_call_file + .byte 146 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x35e4:0x5 DW_TAG_formal_parameter + .long 2317 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x35e9:0x5 DW_TAG_formal_parameter + .long 2329 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x35ee:0x5 DW_TAG_formal_parameter + .long 2341 # DW_AT_abstract_origin + .byte 94 # Abbrev [94] 0x35f3:0x2a DW_TAG_inlined_subroutine + .long 2023 # DW_AT_abstract_origin + .quad .Ltmp6 # DW_AT_low_pc + .long .Ltmp11-.Ltmp6 # DW_AT_high_pc + .byte 40 # DW_AT_call_file + .short 298 # DW_AT_call_line + .byte 50 # Abbrev [50] 0x3607:0x5 DW_TAG_formal_parameter + .long 2118 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x360c:0x5 DW_TAG_formal_parameter + .long 2129 # DW_AT_abstract_origin + .byte 50 # Abbrev [50] 0x3611:0x5 DW_TAG_formal_parameter + .long 2140 # DW_AT_abstract_origin + .byte 95 # Abbrev [95] 0x3616:0x6 DW_TAG_variable + .byte 0 # DW_AT_const_value + .long 2173 # DW_AT_abstract_origin + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .byte 96 # Abbrev [96] 0x3627:0x14 DW_TAG_subprogram + .long 1091 # DW_AT_specification + .byte 1 # DW_AT_inline + .long 13873 # DW_AT_object_pointer + .byte 91 # Abbrev [91] 0x3631:0x9 DW_TAG_formal_parameter + .long .Linfo_string481 # DW_AT_name + .long 13883 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x363b:0x5 DW_TAG_pointer_type + .long 13198 # DW_AT_type + .byte 96 # Abbrev [96] 0x3640:0x14 DW_TAG_subprogram + .long 1371 # DW_AT_specification + .byte 1 # DW_AT_inline + .long 13898 # DW_AT_object_pointer + .byte 91 # Abbrev [91] 0x364a:0x9 DW_TAG_formal_parameter + .long .Linfo_string481 # DW_AT_name + .long 13908 # DW_AT_type + # DW_AT_artificial + .byte 0 # End Of Children Mark + .byte 21 # Abbrev [21] 0x3654:0x5 DW_TAG_pointer_type + .long 13367 # DW_AT_type + .byte 90 # Abbrev [90] 0x3659:0x1f DW_TAG_subprogram + .long .Linfo_string572 # DW_AT_linkage_name + .long 1273 # DW_AT_specification + .byte 1 # DW_AT_inline + .long 13927 # DW_AT_object_pointer + .byte 91 # Abbrev [91] 0x3667:0x9 DW_TAG_formal_parameter + .long .Linfo_string481 # DW_AT_name + .long 13396 # DW_AT_type + # DW_AT_artificial + .byte 35 # Abbrev [35] 0x3670:0x7 DW_TAG_formal_parameter + .byte 4 # DW_AT_decl_file + .byte 150 # DW_AT_decl_line + .long 714 # DW_AT_type + .byte 0 # End Of Children Mark + .byte 0 # End Of Children Mark + .section .debug_ranges,"",@progbits +.Ldebug_ranges0: + .quad .Ltmp3 + .quad .Ltmp11 + .quad .Ltmp12 + .quad .Ltmp13 + .quad 0 + .quad 0 +.Ldebug_ranges1: + .quad .Ltmp3 + .quad .Ltmp11 + .quad .Ltmp12 + .quad .Ltmp13 + .quad 0 + .quad 0 +.Ldebug_ranges2: + .quad .Ltmp3 + .quad .Ltmp11 + .quad .Ltmp12 + .quad .Ltmp13 + .quad 0 + .quad 0 +.Ldebug_ranges3: + .quad .Ltmp3 + .quad .Ltmp11 + .quad .Ltmp12 + .quad .Ltmp13 + .quad 0 + .quad 0 +.Ldebug_ranges4: + .quad .Ltmp4 + .quad .Ltmp11 + .quad .Ltmp12 + .quad .Ltmp13 + .quad 0 + .quad 0 +.Ldebug_ranges5: + .quad .Ltmp4 + .quad .Ltmp11 + .quad .Ltmp12 + .quad .Ltmp13 + .quad 0 + .quad 0 +.Ldebug_ranges6: + .quad .Ltmp4 + .quad .Ltmp11 + .quad .Ltmp12 + .quad .Ltmp13 + .quad 0 + .quad 0 +.Ldebug_ranges7: + .quad .Ltmp6 + .quad .Ltmp11 + .quad .Ltmp12 + .quad .Ltmp13 + .quad 0 + .quad 0 +.Ldebug_ranges8: + .quad .Ltmp6 + .quad .Ltmp11 + .quad .Ltmp12 + .quad .Ltmp13 + .quad 0 + .quad 0 +.Ldebug_ranges9: + .quad .Ltmp29 + .quad .Ltmp33 + .quad .Ltmp34 + .quad .Ltmp35 + .quad 0 + .quad 0 +.Ldebug_ranges10: + .quad .Lfunc_begin0 + .quad .Lfunc_end0 + .quad .Lfunc_begin2 + .quad .Lfunc_end2 + .quad 0 + .quad 0 + .section .debug_macinfo,"",@progbits + .byte 0 # End Of Macro List Mark + + .ident "clang version 8.0.0 (trunk 344434)" + .section ".note.GNU-stack","",@progbits + .addrsig + .addrsig_sym __gxx_personality_v0 + .section .debug_line,"",@progbits +.Lline_table_start0: diff --git a/test/cases/bug-1229.asm.directives.labels.comments.json b/test/cases/bug-1229.asm.directives.labels.comments.json new file mode 100644 index 0000000000000000000000000000000000000000..9255c53cea1b0390387f44686bb9d9bb1a0387f9 --- /dev/null +++ b/test/cases/bug-1229.asm.directives.labels.comments.json @@ -0,0 +1,669 @@ +[ + { + "text": "_Z6myfuncv: # @_Z6myfuncv", + "source": null + }, + { + "text": " sub rsp, 88", + "source": { + "file": null, + "line": 9 + } + }, + { + "text": " mov byte ptr [rsp + 32], 0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp\"", + "line": 18 + } + }, + { + "text": " mov qword ptr [rsp + 24], 0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp\"", + "line": 18 + } + }, + { + "text": " mov qword ptr [rsp + 40], offset .L.str", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov rax, qword ptr [rsp + 24]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov qword ptr [rsp + 48], rax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov al, byte ptr [rsp + 32]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov byte ptr [rsp + 56], al", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov eax, dword ptr [rsp + 33]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov dword ptr [rsp + 57], eax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " movzx eax, word ptr [rsp + 37]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov word ptr [rsp + 61], ax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov al, byte ptr [rsp + 39]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov byte ptr [rsp + 63], al", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov rax, qword ptr [rsp + 56]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " mov qword ptr [rsp + 16], rax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " movups xmm0, xmmword ptr [rsp + 40]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " movups xmmword ptr [rsp], xmm0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " lea rdi, [rsp + 64]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " xor esi, esi", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " mov edx, offset .L.str", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " mov ecx, offset .L.str+1", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " mov r8d, offset .L.str+5", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " call _ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " add rsp, 88", + "source": { + "file": null, + "line": 11 + } + }, + { + "text": " ret", + "source": { + "file": null, + "line": 11 + } + }, + { + "text": " mov rdi, rax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 298 + } + }, + { + "text": " call __clang_call_terminate", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 298 + } + }, + { + "text": "__clang_call_terminate: # @__clang_call_terminate", + "source": null + }, + { + "text": " push rax", + "source": null + }, + { + "text": " call __cxa_begin_catch", + "source": null + }, + { + "text": " call _ZSt9terminatev", + "source": null + }, + { + "text": "_ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE: # @_ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE", + "source": null + }, + { + "text": " push rbx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 235 + } + }, + { + "text": " sub rsp, 80", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 235 + } + }, + { + "text": " mov rbx, rdi", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 235 + } + }, + { + "text": " mov rdi, qword ptr [rsp + 96]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 241 + } + }, + { + "text": " movups xmm0, xmmword ptr [rsp + 104]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " movaps xmmword ptr [rsp + 64], xmm0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " cmp r8, rcx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 65 + } + }, + { + "text": " je .LBB2_3", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 65 + } + }, + { + "text": " add rcx, 1", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 67 + } + }, + { + "text": " mov al, byte ptr [rsp + 79]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 57 + } + }, + { + "text": " mov byte ptr [rsp + 38], al", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 57 + } + }, + { + "text": " movzx eax, word ptr [rsp + 77]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 57 + } + }, + { + "text": " mov word ptr [rsp + 36], ax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 57 + } + }, + { + "text": " mov eax, dword ptr [rsp + 73]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 57 + } + }, + { + "text": " mov dword ptr [rsp + 32], eax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 57 + } + }, + { + "text": " add rsi, 1", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov qword ptr [rsp + 40], rdi", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov qword ptr [rsp + 48], rcx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov byte ptr [rsp + 56], 0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov eax, dword ptr [rsp + 32]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov dword ptr [rsp + 57], eax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " movzx eax, word ptr [rsp + 36]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov word ptr [rsp + 61], ax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov al, byte ptr [rsp + 38]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov byte ptr [rsp + 63], al", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov rax, qword ptr [rsp + 56]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov qword ptr [rsp + 16], rax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " movups xmm0, xmmword ptr [rsp + 40]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " movups xmmword ptr [rsp], xmm0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov rdi, rbx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " call _ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " cmp byte ptr [rbx + 16], 0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp\"", + "line": 54 + } + }, + { + "text": " je .LBB2_2", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 246 + } + }, + { + "text": " mov rax, rbx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": " add rsp, 80", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": " pop rbx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": " ret", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": ".LBB2_3:", + "source": null + }, + { + "text": " lea rax, [rsp + 96]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 0 + } + }, + { + "text": " mov rax, qword ptr [rax + 16]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 251 + } + }, + { + "text": " mov qword ptr [rbx], rdi", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 38 + } + }, + { + "text": " mov qword ptr [rbx + 8], r8", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 38 + } + }, + { + "text": " mov byte ptr [rbx + 16], 1", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 39 + } + }, + { + "text": " mov rcx, rax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 39 + } + }, + { + "text": " shr rcx, 8", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 39 + } + }, + { + "text": " mov rdx, rax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 39 + } + }, + { + "text": " shr rdx, 56", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 39 + } + }, + { + "text": " mov byte ptr [rbx + 23], dl", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 39 + } + }, + { + "text": " shr rax, 40", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 39 + } + }, + { + "text": " mov word ptr [rbx + 21], ax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 39 + } + }, + { + "text": " mov dword ptr [rbx + 17], ecx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 39 + } + }, + { + "text": " mov rax, rbx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": " add rsp, 80", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": " pop rbx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": " ret", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": ".LBB2_2:", + "source": null + }, + { + "text": " xorps xmm0, xmm0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp\"", + "line": 18 + } + }, + { + "text": " movups xmmword ptr [rbx], xmm0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp\"", + "line": 18 + } + }, + { + "text": " mov byte ptr [rbx + 16], 0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp\"", + "line": 18 + } + }, + { + "text": " mov rax, rbx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": " add rsp, 80", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": " pop rbx", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": " ret", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 252 + } + }, + { + "text": ".L.str:", + "source": null + }, + { + "text": " .asciz \"hello\"", + "source": null + }, + { + "text": "", + "source": null + } +] \ No newline at end of file diff --git a/test/cases/bug-1229.asm.directives.labels.comments.library.json b/test/cases/bug-1229.asm.directives.labels.comments.library.json new file mode 100644 index 0000000000000000000000000000000000000000..8b6197881ab0f8c2ea722aeccf683f66e139ed7f --- /dev/null +++ b/test/cases/bug-1229.asm.directives.labels.comments.library.json @@ -0,0 +1,230 @@ +[ + { + "text": "_Z6myfuncv: # @_Z6myfuncv", + "source": null + }, + { + "text": " sub rsp, 88", + "source": { + "file": null, + "line": 9 + } + }, + { + "text": " mov byte ptr [rsp + 32], 0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp\"", + "line": 18 + } + }, + { + "text": " mov qword ptr [rsp + 24], 0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/return_type.hpp\"", + "line": 18 + } + }, + { + "text": " mov qword ptr [rsp + 40], offset .L.str", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov rax, qword ptr [rsp + 24]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov qword ptr [rsp + 48], rax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov al, byte ptr [rsp + 32]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov byte ptr [rsp + 56], al", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov eax, dword ptr [rsp + 33]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov dword ptr [rsp + 57], eax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " movzx eax, word ptr [rsp + 37]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov word ptr [rsp + 61], ax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov al, byte ptr [rsp + 39]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov byte ptr [rsp + 63], al", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 64 + } + }, + { + "text": " mov rax, qword ptr [rsp + 56]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " mov qword ptr [rsp + 16], rax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " movups xmm0, xmmword ptr [rsp + 40]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " movups xmmword ptr [rsp], xmm0", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " lea rdi, [rsp + 64]", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " xor esi, esi", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " mov edx, offset .L.str", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " mov ecx, offset .L.str+1", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " mov r8d, offset .L.str+5", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " call _ZN4ctre18evaluate_recursiveINS_13regex_resultsIPKcJEEES3_S3_Lm0ELm0EJNS_3anyEEJNS_10assert_endENS_8end_markENS_6acceptEEEET_mT0_SA_T1_S9_N4ctll4listIJNS_6repeatIXT2_EXT3_EJDpT4_EEEDpT5_EEE", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 267 + } + }, + { + "text": " add rsp, 88", + "source": { + "file": null, + "line": 11 + } + }, + { + "text": " ret", + "source": { + "file": null, + "line": 11 + } + }, + { + "text": " mov rdi, rax", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 298 + } + }, + { + "text": " call __clang_call_terminate", + "source": { + "file": "/tmp/compiler-explorer-compiler1181120-2080-yfo6a1.y1o4e/ \"/opt/compiler-explorer/libs/ctre/master/include/ctre/evaluation.hpp\"", + "line": 298 + } + }, + { + "text": "__clang_call_terminate: # @__clang_call_terminate", + "source": null + }, + { + "text": " push rax", + "source": null + }, + { + "text": " call __cxa_begin_catch", + "source": null + }, + { + "text": " call _ZSt9terminatev", + "source": null + }, + { + "text": ".L.str:", + "source": null + }, + { + "text": " .asciz \"hello\"", + "source": null + }, + { + "text": "", + "source": null + } +] \ No newline at end of file diff --git a/test/cases/bug-1229.cpp b/test/cases/bug-1229.cpp new file mode 100644 index 0000000000000000000000000000000000000000..ec5bc61eb9b7746a011290b984e52db4fbc3a55b --- /dev/null +++ b/test/cases/bug-1229.cpp @@ -0,0 +1,12 @@ +#include <ctre.hpp> + +static constexpr auto pattern = ctll::basic_fixed_string{ "h.*" }; + +constexpr auto match(std::string_view sv) noexcept { + return ctre::re<pattern>().match(sv); +} + +void myfunc() { + match("hello"); +} + diff --git a/test/cases/bug-192.asm.directives.labels.comments.json b/test/cases/bug-192.asm.directives.labels.comments.json index 5c3113e2fe556fb51c87117e2723dd63ddb8af15..56882ea78900d3fb5eea6e5f5f4652bb643e7231 100644 --- a/test/cases/bug-192.asm.directives.labels.comments.json +++ b/test/cases/bug-192.asm.directives.labels.comments.json @@ -73,10 +73,6 @@ "text": "guard variable for asdf<float>:", "source": null }, - { - "text": "", - "source": null - }, { "text": "", "source": null diff --git a/test/cases/bug-348.asm.directives.labels.comments.json b/test/cases/bug-348.asm.directives.labels.comments.json index 0a4239e1df5de234c4ff33836283da962e22d5db..399a64136e84317ab8f28bd5b038092b38d2490c 100644 --- a/test/cases/bug-348.asm.directives.labels.comments.json +++ b/test/cases/bug-348.asm.directives.labels.comments.json @@ -1,8 +1,4 @@ [ - { - "text": "", - "source": null - }, { "text": "square(int):", "source": null diff --git a/test/cases/bug-725_rust.asm.directives.labels b/test/cases/bug-725_rust.asm.directives.labels index e1a2e6bdeee13b3a1a7b40eda8cbccb93111d62d..71c1489b207ecbdb030a7bcc5243d888837d73ea 100644 --- a/test/cases/bug-725_rust.asm.directives.labels +++ b/test/cases/bug-725_rust.asm.directives.labels @@ -6,4 +6,3 @@ _ZN95_$LT$example..Bla$LT$$u27$a$GT$$u20$as$u20$core..convert..Into$LT$alloc..st popq %rbx retq - diff --git a/test/cases/cfg-clang.split.json b/test/cases/cfg-clang.split.json new file mode 100644 index 0000000000000000000000000000000000000000..0298e01dc67e39b35d5299d1b9f6f131824fb943 --- /dev/null +++ b/test/cases/cfg-clang.split.json @@ -0,0 +1,190 @@ +{ + "asm": [ + { + "text": "remove_space(char const*, char*, unsigned long): # @remove_space(char const*, char*, unsigned long)", + "source": null + }, + { + "text": " testq %rdx, %rdx", + "source": null + }, + { + "text": " je .LBB0_6", + "source": null + }, + { + "text": " xorl %eax, %eax", + "source": null + }, + { + "text": ".LBB0_2: # =>This Inner Loop Header: Depth=1", + "source": null + }, + { + "text": " movzbl (%rdi,%rax), %ecx", + "source": null + }, + { + "text": " cmpb $97, %cl", + "source": null + }, + { + "text": " je .LBB0_5", + "source": null + }, + { + "text": " cmpb $122, %cl", + "source": null + }, + { + "text": " je .LBB0_5", + "source": null + }, + { + "text": " movb %cl, (%rsi)", + "source": null + }, + { + "text": " addq $1, %rsi", + "source": null + }, + { + "text": ".LBB0_5: # in Loop: Header=BB0_2 Depth=1", + "source": null + }, + { + "text": " addq $1, %rax", + "source": null + }, + { + "text": " cmpq %rax, %rdx", + "source": null + }, + { + "text": " jne .LBB0_2", + "source": null + }, + { + "text": ".LBB0_6:", + "source": null + }, + { + "text": " movq %rsi, %rax", + "source": null + }, + { + "text": " retq", + "source": null + } + ], + "cfg": { + "remove_space(char const*, char*, unsigned long):": { + "nodes": [ + { + "id": "remove_space(char const*, char*, unsigned long):", + "label": "remove_space(char const*, char*, unsigned long):\n testq %rdx, %rdx\n je .LBB0_6", + "color": "#99ccff", + "shape": "box" + }, + { + "id": "remove_space(char const*, char*, unsigned long):@3", + "label": "remove_space(char const*, char*, unsigned long):@3\n xorl %eax, %eax", + "color": "#99ccff", + "shape": "box" + }, + { + "color": "#99ccff", + "id": ".LBB0_2:", + "label": ".LBB0_2:\n movzbl (%rdi,%rax), %ecx\n cmpb $97, %cl\n je .LBB0_5", + "shape": "box" + }, + { + "color": "#99ccff", + "id": ".LBB0_2:@8", + "label": ".LBB0_2:@8\n cmpb $122, %cl\n je .LBB0_5", + "shape": "box" + }, + { + "color": "#99ccff", + "id": ".LBB0_2:@10", + "label": ".LBB0_2:@10\n movb %cl, (%rsi)\n addq $1, %rsi", + "shape": "box" + }, + { + "color": "#99ccff", + "id": ".LBB0_5:", + "label": ".LBB0_5:\n addq $1, %rax\n cmpq %rax, %rdx\n jne .LBB0_2", + "shape": "box" + }, + { + "color": "#99ccff", + "id": ".LBB0_6:", + "label": ".LBB0_6:\n movq %rsi, %rax\n retq", + "shape": "box" + } + ], + "edges": [ + { + "arrows": "to", + "color": "green", + "from": "remove_space(char const*, char*, unsigned long):", + "to": ".LBB0_6:" + }, + { + "arrows": "to", + "color": "red", + "from": "remove_space(char const*, char*, unsigned long):", + "to": "remove_space(char const*, char*, unsigned long):@3" + }, + { + "arrows": "to", + "color": "grey", + "from": "remove_space(char const*, char*, unsigned long):@3", + "to": ".LBB0_2:" + }, + { + "arrows": "to", + "color": "green", + "from": ".LBB0_2:", + "to": ".LBB0_5:" + }, + { + "arrows": "to", + "color": "red", + "from": ".LBB0_2:", + "to": ".LBB0_2:@8" + }, + { + "arrows": "to", + "color": "green", + "from": ".LBB0_2:@8", + "to": ".LBB0_5:" + }, + { + "arrows": "to", + "color": "red", + "from": ".LBB0_2:@8", + "to": ".LBB0_2:@10" + }, + { + "arrows": "to", + "color": "grey", + "from": ".LBB0_2:@10", + "to": ".LBB0_5:" + }, + { + "arrows": "to", + "color": "green", + "from": ".LBB0_5:", + "to": ".LBB0_2:" + }, + { + "arrows": "to", + "color": "red", + "from": ".LBB0_5:", + "to": ".LBB0_6:" + } + ] + } + } +} diff --git a/test/cases/cfg-clang.symbol-filter.json b/test/cases/cfg-clang.symbol-filter.json new file mode 100644 index 0000000000000000000000000000000000000000..ab7f3acd7c9c0228b32e00a54ea3c80bd40f91ab --- /dev/null +++ b/test/cases/cfg-clang.symbol-filter.json @@ -0,0 +1,141 @@ +{ + "asm": [ + { + "text": "foo(int, int):", + "source": null + }, + { + "text": " retq", + "source": null + }, + { + "text": " .data", + "source": null + }, + { + "text": "foo2:", + "source": null + }, + { + "text": " .long 23 ", + "source": null + }, + { + "text": "foo22:", + "source": null + }, + { + "text": " .long 24 ", + "source": null + }, + { + "text": " .section \".text.foo3(int,int)\",\"ax\",@progbits", + "source": null + }, + { + "text": "foo3(int, int):", + "source": null + }, + { + "text": " retq", + "source": null + }, + { + "text": " .section .data", + "source": null + }, + { + "text": "foo4:", + "source": null + }, + { + "text": " .long 23 ", + "source": null + }, + { + "text": " .text", + "source": null + }, + { + "text": "foo5(int, int):", + "source": null + }, + { + "text": " retq", + "source": null + }, + { + "text": "foo6::<impl something for rust>::foo:", + "source": null + }, + { + "text": " retq", + "source": null + }, + { + "text": "type metadata accessor for [Swift.Int]:", + "source": null + }, + { + "text": " retq", + "source": null + } + ], + "cfg": { + "foo(int, int):": { + "nodes": [ + { + "id": "foo(int, int):", + "label": "foo(int, int):\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + }, + "foo3(int, int):": { + "nodes": [ + { + "id": "foo3(int, int):", + "label": "foo3(int, int):\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + }, + "foo5(int, int):": { + "nodes": [ + { + "id": "foo5(int, int):", + "label": "foo5(int, int):\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + }, + "foo6::<impl something for rust>::foo:": { + "nodes": [ + { + "id": "foo6::<impl something for rust>::foo:", + "label": "foo6::<impl something for rust>::foo:\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + }, + "type metadata accessor for [Swift.Int]:": { + "nodes": [ + { + "id": "type metadata accessor for [Swift.Int]:", + "label": "type metadata accessor for [Swift.Int]:\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + } + } +} diff --git a/test/cases/cfg-gcc.symbol-filter.json b/test/cases/cfg-gcc.symbol-filter.json new file mode 100644 index 0000000000000000000000000000000000000000..108f6794d24ade333415de5424df2fc3e1f4afde --- /dev/null +++ b/test/cases/cfg-gcc.symbol-filter.json @@ -0,0 +1,141 @@ +{ + "asm": [ + { + "text": "foo(int, int):", + "source": null + }, + { + "text": " retq", + "source": null + }, + { + "text": " .data", + "source": null + }, + { + "text": "foo2:", + "source": null + }, + { + "text": " .long 23 ", + "source": null + }, + { + "text": "foo22:", + "source": null + }, + { + "text": " .long 24 ", + "source": null + }, + { + "text": " .section .text.foo3(int,int),\"ax\",@progbits", + "source": null + }, + { + "text": "foo3(int, int):", + "source": null + }, + { + "text": " retq", + "source": null + }, + { + "text": " .section .data", + "source": null + }, + { + "text": "foo4:", + "source": null + }, + { + "text": " .long 23 ", + "source": null + }, + { + "text": " .text", + "source": null + }, + { + "text": "foo5(int, int):", + "source": null + }, + { + "text": " retq", + "source": null + }, + { + "text": "foo6::<impl something for rust>::foo:", + "source": null + }, + { + "text": " retq", + "source": null + }, + { + "text": "type metadata accessor for [Swift.Int]:", + "source": null + }, + { + "text": " retq", + "source": null + } + ], + "cfg": { + "foo(int, int):": { + "nodes": [ + { + "id": "foo(int, int):", + "label": "foo(int, int):\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + }, + "foo3(int, int):": { + "nodes": [ + { + "id": "foo3(int, int):", + "label": "foo3(int, int):\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + }, + "foo5(int, int):": { + "nodes": [ + { + "id": "foo5(int, int):", + "label": "foo5(int, int):\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + }, + "foo6::<impl something for rust>::foo:": { + "nodes": [ + { + "id": "foo6::<impl something for rust>::foo:", + "label": "foo6::<impl something for rust>::foo:\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + }, + "type metadata accessor for [Swift.Int]:": { + "nodes": [ + { + "id": "type metadata accessor for [Swift.Int]:", + "label": "type metadata accessor for [Swift.Int]:\n retq", + "color": "#99ccff", + "shape": "box" + } + ], + "edges": [] + } + } +} diff --git a/test/cases/clang-on-mac.asm.directives.labels.comments.json b/test/cases/clang-on-mac.asm.directives.labels.comments.json index 832c232190114404599009c0b9879b28e08fdb1c..9d065ee0acb461db00cd0b0f3310819b5b6f036a 100644 --- a/test/cases/clang-on-mac.asm.directives.labels.comments.json +++ b/test/cases/clang-on-mac.asm.directives.labels.comments.json @@ -38,10 +38,6 @@ "line": 2 } }, - { - "text": "", - "source": null - }, { "text": "", "source": null diff --git a/test/cases/gcc-x86-vector.asm.directives.labels.comments.library.json b/test/cases/gcc-x86-vector.asm.directives.labels.comments.library.json new file mode 100644 index 0000000000000000000000000000000000000000..4829754ee1b8a01b080b9a32b8ac175234e65394 --- /dev/null +++ b/test/cases/gcc-x86-vector.asm.directives.labels.comments.library.json @@ -0,0 +1,66 @@ +[ + { + "text": "_Z3sumRKSt6vectorIiSaIiEE:", + "source": null + }, + { + "text": " movl $0, %ecx", + "source": { + "file": null, + "line": 5 + } + }, + { + "text": " movl $0, %eax", + "source": { + "file": null, + "line": 4 + } + }, + { + "text": " cmpq %rdx, %rcx", + "source": { + "file": null, + "line": 6 + } + }, + { + "text": " jnb .L1", + "source": { + "file": null, + "line": 6 + } + }, + { + "text": " addl (%rsi,%rcx,4), %eax", + "source": { + "file": null, + "line": 8 + } + }, + { + "text": " addq $1, %rcx", + "source": { + "file": null, + "line": 5 + } + }, + { + "text": " jmp .L3", + "source": { + "file": null, + "line": 5 + } + }, + { + "text": ".L1:", + "source": null + }, + { + "text": " rep ret", + "source": { + "file": null, + "line": 10 + } + } +] \ No newline at end of file diff --git a/test/cases/kalray-hellow.asm.directives b/test/cases/kalray-hellow.asm.directives index 5fb951e5ef990ae824b589f533d32296dbbae21b..bd054580ca892d5eb3217344fd0ea613a3a46e73 100644 --- a/test/cases/kalray-hellow.asm.directives +++ b/test/cases/kalray-hellow.asm.directives @@ -1,4 +1,3 @@ - .LC0: .string "%s , %s , %lld , %d , %lld\n" diff --git a/test/cases/kalray-hellow.asm.directives.labels b/test/cases/kalray-hellow.asm.directives.labels index 00536229a020053335ada84cce886e21db4fa20d..35d3bf7eba60ceba4d55023ce364a6e3ad08a3c8 100644 --- a/test/cases/kalray-hellow.asm.directives.labels +++ b/test/cases/kalray-hellow.asm.directives.labels @@ -1,4 +1,3 @@ - .LC0: .string "%s , %s , %lld , %d , %lld\n" diff --git a/test/cases/nvcc-example.asm.directives.labels.comments.json b/test/cases/nvcc-example.asm.directives.labels.comments.json index 87b2cb64a8902996a7e912bc03c30da60731749f..3eec618f299377403e8f4ec4f9d2cb2b86107018 100644 --- a/test/cases/nvcc-example.asm.directives.labels.comments.json +++ b/test/cases/nvcc-example.asm.directives.labels.comments.json @@ -1,16 +1,4 @@ [ - { - "text": "", - "source": null - }, - { - "text": "", - "source": null - }, - { - "text": "", - "source": null - }, { "text": ".visible .entry _Z6vecAddPfS_S_i(", "source": null @@ -43,10 +31,6 @@ "text": "", "source": null }, - { - "text": "", - "source": null - }, { "text": " ld.param.u64 %rd1, [_Z6vecAddPfS_S_i_param_0];", "source": null @@ -98,6 +82,13 @@ "line": 12 } }, + { + "text": " @%p1 bra BB0_2;", + "source": { + "file": "/tmp/moo.cu", + "line": 12 + } + }, { "text": "", "source": null diff --git a/test/cases/nvcc-example.asm.directives.labels.comments.library.json b/test/cases/nvcc-example.asm.directives.labels.comments.library.json new file mode 100644 index 0000000000000000000000000000000000000000..3eec618f299377403e8f4ec4f9d2cb2b86107018 --- /dev/null +++ b/test/cases/nvcc-example.asm.directives.labels.comments.library.json @@ -0,0 +1,192 @@ +[ + { + "text": ".visible .entry _Z6vecAddPfS_S_i(", + "source": null + }, + { + "text": " .param .u64 _Z6vecAddPfS_S_i_param_0,", + "source": null + }, + { + "text": " .param .u64 _Z6vecAddPfS_S_i_param_1,", + "source": null + }, + { + "text": " .param .u64 _Z6vecAddPfS_S_i_param_2,", + "source": null + }, + { + "text": " .param .u32 _Z6vecAddPfS_S_i_param_3", + "source": null + }, + { + "text": ")", + "source": null + }, + { + "text": "{", + "source": null + }, + { + "text": "", + "source": null + }, + { + "text": " ld.param.u64 %rd1, [_Z6vecAddPfS_S_i_param_0];", + "source": null + }, + { + "text": " ld.param.u64 %rd2, [_Z6vecAddPfS_S_i_param_1];", + "source": null + }, + { + "text": " ld.param.u64 %rd3, [_Z6vecAddPfS_S_i_param_2];", + "source": null + }, + { + "text": " ld.param.u32 %r2, [_Z6vecAddPfS_S_i_param_3];", + "source": null + }, + { + "text": " mov.u32 %r3, %ctaid.x;", + "source": { + "file": "/tmp/moo.cu", + "line": 9 + } + }, + { + "text": " mov.u32 %r4, %ntid.x;", + "source": { + "file": "/tmp/moo.cu", + "line": 9 + } + }, + { + "text": " mov.u32 %r5, %tid.x;", + "source": { + "file": "/tmp/moo.cu", + "line": 9 + } + }, + { + "text": " mad.lo.s32 %r1, %r4, %r3, %r5;", + "source": { + "file": "/tmp/moo.cu", + "line": 9 + } + }, + { + "text": " setp.ge.s32 %p1, %r1, %r2;", + "source": { + "file": "/tmp/moo.cu", + "line": 12 + } + }, + { + "text": " @%p1 bra BB0_2;", + "source": { + "file": "/tmp/moo.cu", + "line": 12 + } + }, + { + "text": "", + "source": null + }, + { + "text": " cvta.to.global.u64 %rd4, %rd1;", + "source": { + "file": "/tmp/moo.cu", + "line": 9 + } + }, + { + "text": " mul.wide.s32 %rd5, %r1, 4;", + "source": { + "file": "/tmp/moo.cu", + "line": 13 + } + }, + { + "text": " add.s64 %rd6, %rd4, %rd5;", + "source": { + "file": "/tmp/moo.cu", + "line": 13 + } + }, + { + "text": " cvta.to.global.u64 %rd7, %rd2;", + "source": { + "file": "/tmp/moo.cu", + "line": 9 + } + }, + { + "text": " add.s64 %rd8, %rd7, %rd5;", + "source": { + "file": "/tmp/moo.cu", + "line": 13 + } + }, + { + "text": " ld.global.f32 %f1, [%rd8];", + "source": { + "file": "/tmp/moo.cu", + "line": 13 + } + }, + { + "text": " ld.global.f32 %f2, [%rd6];", + "source": { + "file": "/tmp/moo.cu", + "line": 13 + } + }, + { + "text": " add.f32 %f3, %f2, %f1;", + "source": { + "file": "/tmp/moo.cu", + "line": 13 + } + }, + { + "text": " cvta.to.global.u64 %rd9, %rd3;", + "source": { + "file": "/tmp/moo.cu", + "line": 9 + } + }, + { + "text": " add.s64 %rd10, %rd9, %rd5;", + "source": { + "file": "/tmp/moo.cu", + "line": 13 + } + }, + { + "text": " st.global.f32 [%rd10], %f3;", + "source": { + "file": "/tmp/moo.cu", + "line": 13 + } + }, + { + "text": "", + "source": null + }, + { + "text": " ret;", + "source": { + "file": "/tmp/moo.cu", + "line": 14 + } + }, + { + "text": "}", + "source": null + }, + { + "text": "", + "source": null + } +] \ No newline at end of file diff --git a/test/cfg-tests.js b/test/cfg-tests.js index 49c721aea93e92c27da0ea44e0623701b24668ea..785e5554ae37f721a06929e2a2a451d6e785c9e5 100644 --- a/test/cfg-tests.js +++ b/test/cfg-tests.js @@ -38,7 +38,7 @@ function common(cases, filterArg, cfgArg) { const file = fs.readFileSync(filename, 'utf-8'); if (file) { const contents = JSON.parse(file); - assert.deepEqual(cfg.generateStructure(cfgArg, contents.asm), contents.cfg, `${filename}`); + assert.deepEqual(cfg.generateStructure('', cfgArg, contents.asm), contents.cfg, `${filename}`); } }); } diff --git a/test/compilers/argument-parsers-tests.js b/test/compilers/argument-parsers-tests.js index 4f9cb0c42a2150e92d40ec27108d63b6e6b1881a..61c39f57ac3fe0a66ca7e35234d01e9ede098327 100644 --- a/test/compilers/argument-parsers-tests.js +++ b/test/compilers/argument-parsers-tests.js @@ -27,6 +27,7 @@ const chai = require('chai'), CompilationEnvironment = require('../../lib/compilation-env'), chaiAsPromised = require("chai-as-promised"), parsers = require('../../lib/compilers/argument-parsers'), + CompilerArguments = require('../../lib/compiler-arguments'), properties = require('../../lib/properties'); chai.use(chaiAsPromised); const should = chai.should(); @@ -42,6 +43,7 @@ function makeCompiler(stdout, stderr, code) { const env = new CompilationEnvironment(compilerProps); const compiler = new FakeCompiler({lang: languages['c++'].id, remote: true}, env); compiler.exec = () => Promise.resolve({code: code, stdout: stdout || "", stderr: stderr || ""}); + compiler.possibleArguments = new CompilerArguments("g82"); return compiler; } @@ -54,17 +56,17 @@ describe('option parser', () => { return parsers.Base.getOptions(makeCompiler()).should.eventually.deep.equals({}); }); it('should parse single-dash options', () => { - return parsers.Base.getOptions(makeCompiler("-foo\n")).should.eventually.deep.equals({'-foo': true}); + return parsers.Base.getOptions(makeCompiler("-foo\n")).should.eventually.deep.equals({'-foo': {"description": "", "timesused": 0}}); }); it('should parse double-dash options', () => { - return parsers.Base.getOptions(makeCompiler("--foo\n")).should.eventually.deep.equals({'--foo': true}); + return parsers.Base.getOptions(makeCompiler("--foo\n")).should.eventually.deep.equals({'--foo': {"description": "", "timesused": 0}}); }); it('should parse stderr options', () => { - return parsers.Base.getOptions(makeCompiler("", "--bar=monkey\n")).should.eventually.deep.equals({'--bar': true}); + return parsers.Base.getOptions(makeCompiler("", "--bar=monkey\n")).should.eventually.deep.equals({'--bar=monkey': {"description": "", "timesused": 0}}); }); it('handles non-option text', () => { return parsers.Base.getOptions(makeCompiler("-foo=123\nthis is a fish\n-badger=123")).should.eventually.deep.equals( - {'-foo': true, '-badger': true}); + {'-foo=123': {"description": "this is a fish", "timesused": 0}, '-badger=123': {"description": "", "timesused": 0}}); }); it('should ignore if errors occur', () => { return parsers.Base.getOptions(makeCompiler("--foo\n", "--bar\n", 1)).should.eventually.deep.equals({}); @@ -109,13 +111,67 @@ describe('clang parser', () => { }); }); it('should handle options', () => { - return parsers.Clang.parse(makeCompiler("-fsave-optimization-record\n-fcolor-diagnostics")) + return parsers.Clang.parse(makeCompiler("-fno-crash-diagnostics\n-fsave-optimization-record\n-fcolor-diagnostics")) .should.eventually.satisfy(result => { return Promise.all([ result.compiler.supportsOptOutput.should.equals(true), result.compiler.optArg.should.equals('-fsave-optimization-record'), - result.compiler.options.should.equals('-fcolor-diagnostics') + + result.compiler.options.should.include("-fcolor-diagnostics"), + result.compiler.options.should.include("-fno-crash-diagnostics"), + result.compiler.options.should.not.include("-fsave-optimization-record"), + ]); + }); + }); +}); + +describe('popular compiler arguments', () => { + let compiler = makeCompiler("-fsave-optimization-record\n-x\n-g\n-fcolor-diagnostics\n-O<number> optimization level\n-std=<c++11,c++14,c++17z>") + + it('should return 5 arguments', () => { + return parsers.Clang.parse(compiler).then(compiler => { + return compiler.should.satisfy(compiler => { + return Promise.all([ + compiler.possibleArguments.getPopularArguments().should.deep.equal({ + "-O<number>": {description: "optimization level", timesused: 0}, + "-fcolor-diagnostics": {"description": "", "timesused": 0}, + "-fsave-optimization-record": {"description": "", "timesused": 0}, + "-g": {"description": "", "timesused": 0}, + "-x": {"description": "", "timesused": 0} + }) + ]); + }); + }) + }); + + it('should return arguments except the ones excluded', () => { + return parsers.Clang.parse(compiler).then(compiler => { + return compiler.should.satisfy(compiler => { + return Promise.all([ + compiler.possibleArguments.getPopularArguments(["-O3", "--hello"]).should.deep.equal({ + "-fcolor-diagnostics": {"description": "", "timesused": 0}, + "-fsave-optimization-record": {"description": "", "timesused": 0}, + "-g": {"description": "", "timesused": 0}, + "-x": {"description": "", "timesused": 0}, + "-std=<c++11,c++14,c++17z>": {"description": "", "timesused": 0} + }) + ]); + }); + }) + }); + + it('should be able to exclude special params with assignments', () => { + return parsers.Clang.parse(compiler).then(compiler => { + return compiler.should.satisfy(compiler => { + return Promise.all([ + compiler.possibleArguments.getPopularArguments(["-std=c++14", "-g", "--hello"]).should.deep.equal({ + "-O<number>": {description: "optimization level", timesused: 0}, + "-fcolor-diagnostics": {"description": "", "timesused": 0}, + "-fsave-optimization-record": {"description": "", "timesused": 0}, + "-x": {"description": "", "timesused": 0} + }) ]); }); + }) }); }); diff --git a/test/filter-tests.js b/test/filter-tests.js index f2e8d8e4185d5b42e3c6099e96dd1ee8f4aa096d..7133ea32288ff9017fefa224382a6d7361aea017 100755 --- a/test/filter-tests.js +++ b/test/filter-tests.js @@ -109,9 +109,10 @@ function testFilter(filename, suffix, filters) { // bless("cases/bug-995.asm", "cases/bug-995.directives.labels.comments.json", {directives: true, labels: true, commentOnly: true}); // bless("cases/arm-jump-table.asm", "cases/arm-jump-table.asm.directives.labels.comments.json", {directives: true, labels: true, commentOnly: true}); // bless("cases/bug-1179.asm", "cases/bug-1179.asm.directives.labels.comments.json", {directives: true, labels: true, commentOnly: true}); +// bless("cases/6502-square.asm", "cases/6502-square.asm.directives.labels.comments.json", {directives: true, labels: true, commentOnly: true}); // describe('A test', function() { // it('should work', function(){ -// console.log(processAsm(__dirname + '/cases/bug-1179.asm', {directives: true, labels: true, commentOnly: true})); +// console.log(processAsm(__dirname + '/cases/6502-square.asm', {directives: true, labels: true, commentOnly: true})); // }); // }); @@ -144,4 +145,16 @@ describe('Filter test cases', function () { {directives: true, commentOnly: true}); }); }); + describe('Directives and library code', function () { + cases.forEach(function (x) { + testFilter(x, ".directives.library", + {directives: true, libraryCode: true}); + }); + }); + describe('Directives, labels, comments and library code', function () { + cases.forEach(function (x) { + testFilter(x, ".directives.labels.comments.library", + {directives: true, labels: true, commentOnly: true, libraryCode: true}); + }); + }); }); diff --git a/test/golang-tests.js b/test/golang-tests.js index 68853ed93a018b6b8c00cdbf314b3e3c3e279778..a124e0860e9e5023fd765857c5ec3a2071a8fcaa 100644 --- a/test/golang-tests.js +++ b/test/golang-tests.js @@ -33,7 +33,7 @@ chai.use(chaiAsPromised); chai.should(); const languages = { - go: {id: 'go'} + go: { id: 'go' } }; const compilerProps = new properties.CompilerProps(languages, properties.fakeProps({})); @@ -59,10 +59,12 @@ function testGoAsm(basefilename) { }; return compiler.postProcess(result).then((output) => { - const expectedOutput = utils.splitLines(fs.readFileSync(basefilename + ".output.asm").toString()).join("\n"); + const expectedOutput = utils.splitLines(fs.readFileSync(basefilename + ".output.asm").toString()); + + utils.splitLines(output.asm).should.deep.equal(expectedOutput); return output.should.deep.equal({ - asm: expectedOutput, + asm: expectedOutput.join("\n"), stdout: [] }); }); @@ -72,4 +74,7 @@ describe('GO asm tests', () => { it('Handles unknown line number correctly', () => { return testGoAsm("test/golang/bug-901"); }); + it('Rewrites PC jumps to labels', () => { + return testGoAsm("test/golang/labels"); + }) }); diff --git a/test/golang/bug-901.output.asm b/test/golang/bug-901.output.asm index fe72714d2b3c534144736896ba7e0ddef3de40b9..2a001ebb30b0fb68052fca655ae7671f3087a198 100644 --- a/test/golang/bug-901.output.asm +++ b/test/golang/bug-901.output.asm @@ -5,8 +5,10 @@ funcdata $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) xorl AX, AX .loc 1 4 0 - jmp 7 + jmp Fun_pc7 +Fun_pc4: incq AX +Fun_pc7: cmpq AX, $10 - jlt 4 + jlt Fun_pc4 ret \ No newline at end of file diff --git a/test/golang/labels.asm b/test/golang/labels.asm new file mode 100644 index 0000000000000000000000000000000000000000..387a2489e43f3924ccd3f1d88cafd5084a034683 --- /dev/null +++ b/test/golang/labels.asm @@ -0,0 +1,304 @@ +# command-line-arguments +"".Closures STEXT size=82 args=0x0 locals=0x18 + 0x0000 00000 (labels.go:5) TEXT "".Closures(SB), $24-0 + 0x0000 00000 (labels.go:5) MOVQ (TLS), CX + 0x0009 00009 (labels.go:5) CMPQ SP, 16(CX) + 0x000d 00013 (labels.go:5) JLS 75 + 0x000f 00015 (labels.go:5) SUBQ $24, SP + 0x0013 00019 (labels.go:5) MOVQ BP, 16(SP) + 0x0018 00024 (labels.go:5) LEAQ 16(SP), BP + 0x001d 00029 (labels.go:5) FUNCDATA $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:5) FUNCDATA $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:5) FUNCDATA $3, gclocals·9fb7f0986f647f17cb53dda1484e0f7a(SB) + 0x001d 00029 (labels.go:6) PCDATA $2, $0 + 0x001d 00029 (labels.go:6) PCDATA $0, $0 + 0x001d 00029 (labels.go:6) CMPQ "".N(SB), $1 + 0x0025 00037 (labels.go:6) JNE 49 + 0x0027 00039 (<unknown line number>) PCDATA $2, $-2 + 0x0027 00039 (<unknown line number>) PCDATA $0, $-2 + 0x0027 00039 (<unknown line number>) MOVQ 16(SP), BP + 0x002c 00044 (<unknown line number>) ADDQ $24, SP + 0x0030 00048 (<unknown line number>) RET + 0x0031 00049 (labels.go:7) PCDATA $2, $0 + 0x0031 00049 (labels.go:7) PCDATA $0, $0 + 0x0031 00049 (labels.go:7) MOVL $0, (SP) + 0x0038 00056 (labels.go:7) PCDATA $2, $1 + 0x0038 00056 (labels.go:7) LEAQ "".Closures.func1·f(SB), AX + 0x003f 00063 (labels.go:7) PCDATA $2, $0 + 0x003f 00063 (labels.go:7) MOVQ AX, 8(SP) + 0x0044 00068 (labels.go:7) CALL runtime.newproc(SB) + 0x0049 00073 (labels.go:7) JMP 39 + 0x004b 00075 (labels.go:7) NOP + 0x004b 00075 (labels.go:5) PCDATA $0, $-1 + 0x004b 00075 (labels.go:5) PCDATA $2, $-1 + 0x004b 00075 (labels.go:5) CALL runtime.morestack_noctxt(SB) + 0x0050 00080 (labels.go:5) JMP 0 + 0x0000 64 48 8b 0c 25 00 00 00 00 48 3b 61 10 76 3c 48 dH..%....H;a.v<H + 0x0010 83 ec 18 48 89 6c 24 10 48 8d 6c 24 10 48 83 3d ...H.l$.H.l$.H.= + 0x0020 00 00 00 00 01 75 0a 48 8b 6c 24 10 48 83 c4 18 .....u.H.l$.H... + 0x0030 c3 c7 04 24 00 00 00 00 48 8d 05 00 00 00 00 48 ...$....H......H + 0x0040 89 44 24 08 e8 00 00 00 00 eb dc e8 00 00 00 00 .D$............. + 0x0050 eb ae .. + rel 5+4 t=16 TLS+0 + rel 32+4 t=15 "".N+-1 + rel 59+4 t=15 "".Closures.func1·f+0 + rel 69+4 t=8 runtime.newproc+0 + rel 76+4 t=8 runtime.morestack_noctxt+0 +"".Closures_func1_1 STEXT size=81 args=0x0 locals=0x10 + 0x0000 00000 (labels.go:21) TEXT "".Closures_func1_1(SB), $16-0 + 0x0000 00000 (labels.go:21) MOVQ (TLS), CX + 0x0009 00009 (labels.go:21) CMPQ SP, 16(CX) + 0x000d 00013 (labels.go:21) JLS 74 + 0x000f 00015 (labels.go:21) SUBQ $16, SP + 0x0013 00019 (labels.go:21) MOVQ BP, 8(SP) + 0x0018 00024 (labels.go:21) LEAQ 8(SP), BP + 0x001d 00029 (labels.go:21) FUNCDATA $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:21) FUNCDATA $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:21) FUNCDATA $3, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:22) PCDATA $2, $0 + 0x001d 00029 (labels.go:22) PCDATA $0, $0 + 0x001d 00029 (labels.go:22) CMPQ "".N(SB), $1 + 0x0025 00037 (labels.go:22) JNE 49 + 0x0027 00039 (<unknown line number>) PCDATA $2, $-2 + 0x0027 00039 (<unknown line number>) PCDATA $0, $-2 + 0x0027 00039 (<unknown line number>) MOVQ 8(SP), BP + 0x002c 00044 (<unknown line number>) ADDQ $16, SP + 0x0030 00048 (<unknown line number>) RET + 0x0031 00049 (labels.go:23) PCDATA $2, $0 + 0x0031 00049 (labels.go:23) PCDATA $0, $0 + 0x0031 00049 (labels.go:23) CALL runtime.printlock(SB) + 0x0036 00054 (labels.go:23) MOVQ $1, (SP) + 0x003e 00062 (labels.go:23) CALL runtime.printint(SB) + 0x0043 00067 (labels.go:23) CALL runtime.printunlock(SB) + 0x0048 00072 (labels.go:23) JMP 39 + 0x004a 00074 (labels.go:23) NOP + 0x004a 00074 (labels.go:21) PCDATA $0, $-1 + 0x004a 00074 (labels.go:21) PCDATA $2, $-1 + 0x004a 00074 (labels.go:21) CALL runtime.morestack_noctxt(SB) + 0x004f 00079 (labels.go:21) JMP 0 + 0x0000 64 48 8b 0c 25 00 00 00 00 48 3b 61 10 76 3b 48 dH..%....H;a.v;H + 0x0010 83 ec 10 48 89 6c 24 08 48 8d 6c 24 08 48 83 3d ...H.l$.H.l$.H.= + 0x0020 00 00 00 00 01 75 0a 48 8b 6c 24 08 48 83 c4 10 .....u.H.l$.H... + 0x0030 c3 e8 00 00 00 00 48 c7 04 24 01 00 00 00 e8 00 ......H..$...... + 0x0040 00 00 00 e8 00 00 00 00 eb dd e8 00 00 00 00 eb ................ + 0x0050 af . + rel 5+4 t=16 TLS+0 + rel 32+4 t=15 "".N+-1 + rel 50+4 t=8 runtime.printlock+0 + rel 63+4 t=8 runtime.printint+0 + rel 68+4 t=8 runtime.printunlock+0 + rel 75+4 t=8 runtime.morestack_noctxt+0 +"".αβ STEXT size=81 args=0x0 locals=0x10 + 0x0000 00000 (labels.go:27) TEXT "".αβ(SB), $16-0 + 0x0000 00000 (labels.go:27) MOVQ (TLS), CX + 0x0009 00009 (labels.go:27) CMPQ SP, 16(CX) + 0x000d 00013 (labels.go:27) JLS 74 + 0x000f 00015 (labels.go:27) SUBQ $16, SP + 0x0013 00019 (labels.go:27) MOVQ BP, 8(SP) + 0x0018 00024 (labels.go:27) LEAQ 8(SP), BP + 0x001d 00029 (labels.go:27) FUNCDATA $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:27) FUNCDATA $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:27) FUNCDATA $3, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:28) PCDATA $2, $0 + 0x001d 00029 (labels.go:28) PCDATA $0, $0 + 0x001d 00029 (labels.go:28) CMPQ "".N(SB), $1 + 0x0025 00037 (labels.go:28) JNE 49 + 0x0027 00039 (<unknown line number>) PCDATA $2, $-2 + 0x0027 00039 (<unknown line number>) PCDATA $0, $-2 + 0x0027 00039 (<unknown line number>) MOVQ 8(SP), BP + 0x002c 00044 (<unknown line number>) ADDQ $16, SP + 0x0030 00048 (<unknown line number>) RET + 0x0031 00049 (labels.go:29) PCDATA $2, $0 + 0x0031 00049 (labels.go:29) PCDATA $0, $0 + 0x0031 00049 (labels.go:29) CALL runtime.printlock(SB) + 0x0036 00054 (labels.go:29) MOVQ $1, (SP) + 0x003e 00062 (labels.go:29) CALL runtime.printint(SB) + 0x0043 00067 (labels.go:29) CALL runtime.printunlock(SB) + 0x0048 00072 (labels.go:29) JMP 39 + 0x004a 00074 (labels.go:29) NOP + 0x004a 00074 (labels.go:27) PCDATA $0, $-1 + 0x004a 00074 (labels.go:27) PCDATA $2, $-1 + 0x004a 00074 (labels.go:27) CALL runtime.morestack_noctxt(SB) + 0x004f 00079 (labels.go:27) JMP 0 + 0x0000 64 48 8b 0c 25 00 00 00 00 48 3b 61 10 76 3b 48 dH..%....H;a.v;H + 0x0010 83 ec 10 48 89 6c 24 08 48 8d 6c 24 08 48 83 3d ...H.l$.H.l$.H.= + 0x0020 00 00 00 00 01 75 0a 48 8b 6c 24 08 48 83 c4 10 .....u.H.l$.H... + 0x0030 c3 e8 00 00 00 00 48 c7 04 24 01 00 00 00 e8 00 ......H..$...... + 0x0040 00 00 00 e8 00 00 00 00 eb dd e8 00 00 00 00 eb ................ + 0x0050 af . + rel 5+4 t=16 TLS+0 + rel 32+4 t=15 "".N+-1 + rel 50+4 t=8 runtime.printlock+0 + rel 63+4 t=8 runtime.printint+0 + rel 68+4 t=8 runtime.printunlock+0 + rel 75+4 t=8 runtime.morestack_noctxt+0 +"".Closures.func1.1 STEXT size=81 args=0x0 locals=0x10 + 0x0000 00000 (labels.go:8) TEXT "".Closures.func1.1(SB), $16-0 + 0x0000 00000 (labels.go:8) MOVQ (TLS), CX + 0x0009 00009 (labels.go:8) CMPQ SP, 16(CX) + 0x000d 00013 (labels.go:8) JLS 74 + 0x000f 00015 (labels.go:8) SUBQ $16, SP + 0x0013 00019 (labels.go:8) MOVQ BP, 8(SP) + 0x0018 00024 (labels.go:8) LEAQ 8(SP), BP + 0x001d 00029 (labels.go:8) FUNCDATA $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:8) FUNCDATA $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:8) FUNCDATA $3, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:9) PCDATA $2, $0 + 0x001d 00029 (labels.go:9) PCDATA $0, $0 + 0x001d 00029 (labels.go:9) CMPQ "".N(SB), $4 + 0x0025 00037 (labels.go:9) JNE 49 + 0x0027 00039 (<unknown line number>) PCDATA $2, $-2 + 0x0027 00039 (<unknown line number>) PCDATA $0, $-2 + 0x0027 00039 (<unknown line number>) MOVQ 8(SP), BP + 0x002c 00044 (<unknown line number>) ADDQ $16, SP + 0x0030 00048 (<unknown line number>) RET + 0x0031 00049 (labels.go:10) PCDATA $2, $0 + 0x0031 00049 (labels.go:10) PCDATA $0, $0 + 0x0031 00049 (labels.go:10) CALL runtime.printlock(SB) + 0x0036 00054 (labels.go:10) MOVQ $1, (SP) + 0x003e 00062 (labels.go:10) CALL runtime.printint(SB) + 0x0043 00067 (labels.go:10) CALL runtime.printunlock(SB) + 0x0048 00072 (labels.go:10) JMP 39 + 0x004a 00074 (labels.go:10) NOP + 0x004a 00074 (labels.go:8) PCDATA $0, $-1 + 0x004a 00074 (labels.go:8) PCDATA $2, $-1 + 0x004a 00074 (labels.go:8) CALL runtime.morestack_noctxt(SB) + 0x004f 00079 (labels.go:8) JMP 0 + 0x0000 64 48 8b 0c 25 00 00 00 00 48 3b 61 10 76 3b 48 dH..%....H;a.v;H + 0x0010 83 ec 10 48 89 6c 24 08 48 8d 6c 24 08 48 83 3d ...H.l$.H.l$.H.= + 0x0020 00 00 00 00 04 75 0a 48 8b 6c 24 08 48 83 c4 10 .....u.H.l$.H... + 0x0030 c3 e8 00 00 00 00 48 c7 04 24 01 00 00 00 e8 00 ......H..$...... + 0x0040 00 00 00 e8 00 00 00 00 eb dd e8 00 00 00 00 eb ................ + 0x0050 af . + rel 5+4 t=16 TLS+0 + rel 32+4 t=15 "".N+-1 + rel 50+4 t=8 runtime.printlock+0 + rel 63+4 t=8 runtime.printint+0 + rel 68+4 t=8 runtime.printunlock+0 + rel 75+4 t=8 runtime.morestack_noctxt+0 +"".Closures.func1 STEXT size=90 args=0x0 locals=0x10 + 0x0000 00000 (labels.go:7) TEXT "".Closures.func1(SB), $16-0 + 0x0000 00000 (labels.go:7) MOVQ (TLS), CX + 0x0009 00009 (labels.go:7) CMPQ SP, 16(CX) + 0x000d 00013 (labels.go:7) JLS 83 + 0x000f 00015 (labels.go:7) SUBQ $16, SP + 0x0013 00019 (labels.go:7) MOVQ BP, 8(SP) + 0x0018 00024 (labels.go:7) LEAQ 8(SP), BP + 0x001d 00029 (labels.go:7) FUNCDATA $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:7) FUNCDATA $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:7) FUNCDATA $3, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + 0x001d 00029 (labels.go:14) PCDATA $2, $0 + 0x001d 00029 (labels.go:14) PCDATA $0, $0 + 0x001d 00029 (labels.go:14) MOVQ "".N(SB), AX + 0x0024 00036 (labels.go:14) CMPQ AX, $3 + 0x0028 00040 (labels.go:14) JEQ 48 + 0x002a 00042 (labels.go:15) CMPQ AX, $4 + 0x002e 00046 (labels.go:15) JNE 58 + 0x0030 00048 (<unknown line number>) PCDATA $2, $-2 + 0x0030 00048 (<unknown line number>) PCDATA $0, $-2 + 0x0030 00048 (<unknown line number>) MOVQ 8(SP), BP + 0x0035 00053 (<unknown line number>) ADDQ $16, SP + 0x0039 00057 (<unknown line number>) RET + 0x003a 00058 (labels.go:15) PCDATA $2, $0 + 0x003a 00058 (labels.go:15) PCDATA $0, $0 + 0x003a 00058 (labels.go:15) CALL runtime.printlock(SB) + 0x003f 00063 (labels.go:15) MOVQ $1, (SP) + 0x0047 00071 (labels.go:15) CALL runtime.printint(SB) + 0x004c 00076 (labels.go:15) CALL runtime.printunlock(SB) + 0x0051 00081 (labels.go:15) JMP 48 + 0x0053 00083 (labels.go:15) NOP + 0x0053 00083 (labels.go:7) PCDATA $0, $-1 + 0x0053 00083 (labels.go:7) PCDATA $2, $-1 + 0x0053 00083 (labels.go:7) CALL runtime.morestack_noctxt(SB) + 0x0058 00088 (labels.go:7) JMP 0 + 0x0000 64 48 8b 0c 25 00 00 00 00 48 3b 61 10 76 44 48 dH..%....H;a.vDH + 0x0010 83 ec 10 48 89 6c 24 08 48 8d 6c 24 08 48 8b 05 ...H.l$.H.l$.H.. + 0x0020 00 00 00 00 48 83 f8 03 74 06 48 83 f8 04 75 0a ....H...t.H...u. + 0x0030 48 8b 6c 24 08 48 83 c4 10 c3 e8 00 00 00 00 48 H.l$.H.........H + 0x0040 c7 04 24 01 00 00 00 e8 00 00 00 00 e8 00 00 00 ..$............. + 0x0050 00 eb dd e8 00 00 00 00 eb a6 .......... + rel 5+4 t=16 TLS+0 + rel 32+4 t=15 "".N+0 + rel 59+4 t=8 runtime.printlock+0 + rel 72+4 t=8 runtime.printint+0 + rel 77+4 t=8 runtime.printunlock+0 + rel 84+4 t=8 runtime.morestack_noctxt+0 +go.info."".Closures.func1.1$abstract SDWARFINFO dupok size=44 + 0x0000 03 63 6f 6d 6d 61 6e 64 2d 6c 69 6e 65 2d 61 72 .command-line-ar + 0x0010 67 75 6d 65 6e 74 73 2e 43 6c 6f 73 75 72 65 73 guments.Closures + 0x0020 2e 66 75 6e 63 31 2e 31 00 01 01 00 .func1.1.... +go.loc."".Closures SDWARFLOC size=0 +go.info."".Closures SDWARFINFO size=37 + 0x0000 02 22 22 2e 43 6c 6f 73 75 72 65 73 00 00 00 00 ."".Closures.... + 0x0010 00 00 00 00 00 00 00 00 00 00 00 00 00 01 9c 00 ................ + 0x0020 00 00 00 01 00 ..... + rel 13+8 t=1 "".Closures+0 + rel 21+8 t=1 "".Closures+82 + rel 31+4 t=29 gofile..labels.go+0 +go.range."".Closures SDWARFRANGE size=0 +go.isstmt."".Closures SDWARFMISC size=0 + 0x0000 04 0f 04 0e 03 08 01 0c 02 07 01 13 02 07 00 ............... +go.loc."".Closures_func1_1 SDWARFLOC size=0 +go.info."".Closures_func1_1 SDWARFINFO size=45 + 0x0000 02 22 22 2e 43 6c 6f 73 75 72 65 73 5f 66 75 6e ."".Closures_fun + 0x0010 63 31 5f 31 00 00 00 00 00 00 00 00 00 00 00 00 c1_1............ + 0x0020 00 00 00 00 00 01 9c 00 00 00 00 01 00 ............. + rel 21+8 t=1 "".Closures_func1_1+0 + rel 29+8 t=1 "".Closures_func1_1+81 + rel 39+4 t=29 gofile..labels.go+0 +go.range."".Closures_func1_1 SDWARFRANGE size=0 +go.isstmt."".Closures_func1_1 SDWARFMISC size=0 + 0x0000 04 0f 04 0e 03 08 01 0c 02 05 01 14 02 07 00 ............... +go.loc."".αβ SDWARFLOC size=0 +go.info."".αβ SDWARFINFO size=33 + 0x0000 02 22 22 2e ce b1 ce b2 00 00 00 00 00 00 00 00 .""............. + 0x0010 00 00 00 00 00 00 00 00 00 01 9c 00 00 00 00 01 ................ + 0x0020 00 . + rel 9+8 t=1 "".αβ+0 + rel 17+8 t=1 "".αβ+81 + rel 27+4 t=29 gofile..labels.go+0 +go.range."".αβ SDWARFRANGE size=0 +go.isstmt."".αβ SDWARFMISC size=0 + 0x0000 04 0f 04 0e 03 08 01 0c 02 05 01 14 02 07 00 ............... +go.loc."".Closures.func1.1 SDWARFLOC size=0 +go.info."".Closures.func1.1 SDWARFINFO size=24 + 0x0000 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ + 0x0010 00 00 00 00 00 01 9c 00 ........ + rel 1+4 t=28 go.info."".Closures.func1.1$abstract+0 + rel 5+8 t=1 "".Closures.func1.1+0 + rel 13+8 t=1 "".Closures.func1.1+81 +go.range."".Closures.func1.1 SDWARFRANGE size=0 +go.isstmt."".Closures.func1.1 SDWARFMISC size=0 + 0x0000 04 0f 04 0e 03 08 01 0c 02 05 01 14 02 07 00 ............... +go.loc."".Closures.func1 SDWARFLOC size=0 +go.info."".Closures.func1 SDWARFINFO size=58 + 0x0000 02 22 22 2e 43 6c 6f 73 75 72 65 73 2e 66 75 6e ."".Closures.fun + 0x0010 63 31 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c1.............. + 0x0020 00 00 00 01 9c 00 00 00 00 01 06 00 00 00 00 00 ................ + 0x0030 00 00 00 00 00 00 00 0f 00 00 .......... + rel 19+8 t=1 "".Closures.func1+0 + rel 27+8 t=1 "".Closures.func1+90 + rel 37+4 t=29 gofile..labels.go+0 + rel 43+4 t=28 go.info."".Closures.func1.1$abstract+0 + rel 47+4 t=28 go.range."".Closures.func1+0 + rel 51+4 t=29 gofile..labels.go+0 +go.range."".Closures.func1 SDWARFRANGE size=64 + 0x0000 ff ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 ................ + 0x0010 2a 00 00 00 00 00 00 00 30 00 00 00 00 00 00 00 *.......0....... + 0x0020 3a 00 00 00 00 00 00 00 53 00 00 00 00 00 00 00 :.......S....... + 0x0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ + rel 8+8 t=1 "".Closures.func1+0 +go.isstmt."".Closures.func1 SDWARFMISC size=0 + 0x0000 04 0f 04 0e 03 07 01 06 02 04 01 0c 02 05 01 14 ................ + 0x0010 02 07 00 ... +"".N SNOPTRBSS size=8 +"".Closures.func1·f SRODATA dupok size=8 + 0x0000 00 00 00 00 00 00 00 00 ........ + rel 0+8 t=1 "".Closures.func1+0 +"".Closures.func1.1·f SRODATA dupok size=8 + 0x0000 00 00 00 00 00 00 00 00 ........ + rel 0+8 t=1 "".Closures.func1.1+0 +gclocals·33cdeccccebe80329f1fdbee7f5874cb SRODATA dupok size=8 + 0x0000 01 00 00 00 00 00 00 00 ........ +gclocals·9fb7f0986f647f17cb53dda1484e0f7a SRODATA dupok size=10 + 0x0000 02 00 00 00 01 00 00 00 00 01 .......... diff --git a/test/golang/labels.go b/test/golang/labels.go new file mode 100644 index 0000000000000000000000000000000000000000..9d9b848cebeffc31eedc30850ec5a6c585baf214 --- /dev/null +++ b/test/golang/labels.go @@ -0,0 +1,31 @@ +package labels + +var N int + +func Closures() { + if N != 1 { + go func() { + myFunc := func() { + if N != 4 { + print(1) + } + } + + if N != 3 { + myFunc() + } + }() + } +} + +func Closures_func1_1() { + if N != 1 { + print(1) + } +} + +func αβ() { + if N != 1 { + print(1) + } +} diff --git a/test/golang/labels.output.asm b/test/golang/labels.output.asm new file mode 100644 index 0000000000000000000000000000000000000000..d92d436e1a8beb566473bf918ce108707e1eacee --- /dev/null +++ b/test/golang/labels.output.asm @@ -0,0 +1,201 @@ +Closures_pc0: + .file 1 "labels.go" + .loc 1 5 0 + text "".Closures(SB), $24-0 + movq (TLS), CX + cmpq SP, 16(CX) + jls Closures_pc75 + subq $24, SP + movq BP, 16(SP) + leaq 16(SP), BP + funcdata $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $3, gclocals·9fb7f0986f647f17cb53dda1484e0f7a(SB) + .loc 1 6 0 + pcdata $2, $0 + pcdata $0, $0 + cmpq "".N(SB), $1 + jne Closures_pc49 +Closures_pc39: + pcdata $2, $-2 + pcdata $0, $-2 + movq 16(SP), BP + addq $24, SP + ret +Closures_pc49: + .loc 1 7 0 + pcdata $2, $0 + pcdata $0, $0 + movl $0, (SP) + pcdata $2, $1 + leaq "".Closures.func1·f(SB), AX + pcdata $2, $0 + movq AX, 8(SP) + call runtime.newproc(SB) + jmp Closures_pc39 +Closures_pc75: + nop + .loc 1 5 0 + pcdata $0, $-1 + pcdata $2, $-1 + call runtime.morestack_noctxt(SB) + jmp Closures_pc0 +Closures_func1_1_pc0: + .loc 1 21 0 + text "".Closures_func1_1(SB), $16-0 + movq (TLS), CX + cmpq SP, 16(CX) + jls Closures_func1_1_pc74 + subq $16, SP + movq BP, 8(SP) + leaq 8(SP), BP + funcdata $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $3, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + .loc 1 22 0 + pcdata $2, $0 + pcdata $0, $0 + cmpq "".N(SB), $1 + jne Closures_func1_1_pc49 +Closures_func1_1_pc39: + pcdata $2, $-2 + pcdata $0, $-2 + movq 8(SP), BP + addq $16, SP + ret +Closures_func1_1_pc49: + .loc 1 23 0 + pcdata $2, $0 + pcdata $0, $0 + call runtime.printlock(SB) + movq $1, (SP) + call runtime.printint(SB) + call runtime.printunlock(SB) + jmp Closures_func1_1_pc39 +Closures_func1_1_pc74: + nop + .loc 1 21 0 + pcdata $0, $-1 + pcdata $2, $-1 + call runtime.morestack_noctxt(SB) + jmp Closures_func1_1_pc0 +αβ_pc0: + .loc 1 27 0 + text "".αβ(SB), $16-0 + movq (TLS), CX + cmpq SP, 16(CX) + jls αβ_pc74 + subq $16, SP + movq BP, 8(SP) + leaq 8(SP), BP + funcdata $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $3, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + .loc 1 28 0 + pcdata $2, $0 + pcdata $0, $0 + cmpq "".N(SB), $1 + jne αβ_pc49 +αβ_pc39: + pcdata $2, $-2 + pcdata $0, $-2 + movq 8(SP), BP + addq $16, SP + ret +αβ_pc49: + .loc 1 29 0 + pcdata $2, $0 + pcdata $0, $0 + call runtime.printlock(SB) + movq $1, (SP) + call runtime.printint(SB) + call runtime.printunlock(SB) + jmp αβ_pc39 +αβ_pc74: + nop + .loc 1 27 0 + pcdata $0, $-1 + pcdata $2, $-1 + call runtime.morestack_noctxt(SB) + jmp αβ_pc0 +Closures_func1_1_pc0_1: + .loc 1 8 0 + text "".Closures.func1.1(SB), $16-0 + movq (TLS), CX + cmpq SP, 16(CX) + jls Closures_func1_1_pc74_1 + subq $16, SP + movq BP, 8(SP) + leaq 8(SP), BP + funcdata $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $3, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + .loc 1 9 0 + pcdata $2, $0 + pcdata $0, $0 + cmpq "".N(SB), $4 + jne Closures_func1_1_pc49_1 +Closures_func1_1_pc39_1: + pcdata $2, $-2 + pcdata $0, $-2 + movq 8(SP), BP + addq $16, SP + ret +Closures_func1_1_pc49_1: + .loc 1 10 0 + pcdata $2, $0 + pcdata $0, $0 + call runtime.printlock(SB) + movq $1, (SP) + call runtime.printint(SB) + call runtime.printunlock(SB) + jmp Closures_func1_1_pc39_1 +Closures_func1_1_pc74_1: + nop + .loc 1 8 0 + pcdata $0, $-1 + pcdata $2, $-1 + call runtime.morestack_noctxt(SB) + jmp Closures_func1_1_pc0_1 +Closures_func1_pc0: + .loc 1 7 0 + text "".Closures.func1(SB), $16-0 + movq (TLS), CX + cmpq SP, 16(CX) + jls Closures_func1_pc83 + subq $16, SP + movq BP, 8(SP) + leaq 8(SP), BP + funcdata $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + funcdata $3, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB) + .loc 1 14 0 + pcdata $2, $0 + pcdata $0, $0 + movq "".N(SB), AX + cmpq AX, $3 + jeq Closures_func1_pc48 + .loc 1 15 0 + cmpq AX, $4 + jne Closures_func1_pc58 +Closures_func1_pc48: + pcdata $2, $-2 + pcdata $0, $-2 + movq 8(SP), BP + addq $16, SP + ret +Closures_func1_pc58: + pcdata $2, $0 + pcdata $0, $0 + call runtime.printlock(SB) + movq $1, (SP) + call runtime.printint(SB) + call runtime.printunlock(SB) + jmp Closures_func1_pc48 +Closures_func1_pc83: + nop + .loc 1 7 0 + pcdata $0, $-1 + pcdata $2, $-1 + call runtime.morestack_noctxt(SB) + jmp Closures_func1_pc0 diff --git a/test/google-tests.js b/test/google-tests.js index 0fa30d07ca2ac0406023bc14e50b9714d84e5a99..6af52e1713f69dce7f31d24d5046272681852c39 100644 --- a/test/google-tests.js +++ b/test/google-tests.js @@ -34,9 +34,10 @@ const googleApiUrl = 'https://www.googleapis.com'; const shortUrlEndpoint = '/urlshortener/v1/url'; describe('Google short URL resolver tests', () => { - const resolver = new google.ShortLinkResolver('GoogleApiKey'); - - it('Resolves simple URLs', () => { + const resolver = new google.ShortLinkResolver(); + // I'll add them in due time, I promise :) + // This ones are for the older revision pre goo.gl shutdown + /*it('Resolves simple URLs', () => { const resultObj = {longUrl: "http://long.url/", shortUrl: "badger"}; nock(googleApiUrl) .get(shortUrlEndpoint) @@ -85,5 +86,5 @@ describe('Google short URL resolver tests', () => { return resolver .resolve('https://goo.gl/broken') .should.be.rejectedWith("Something went wrong"); - }); + });*/ }); diff --git a/test/handlers/api-tests.js b/test/handlers/api-tests.js index 4a154130ed3f31cf5caebcadee98b4b1d93cd4f1..7c547e62bf0586d6fa54b27d4f454febfab1fa0f 100644 --- a/test/handlers/api-tests.js +++ b/test/handlers/api-tests.js @@ -55,14 +55,22 @@ describe('API handling', () => { const apiHandler = new ApiHandler({ handle: res => { res.end("compile"); + }, + handlePopularArguments: res => { + res.end("ok"); } }, (key, def) => { switch (key) { - case "formatters": return "formatt:badformatt"; - case "formatter.formatt.exe": return "echo"; - case "formatter.formatt.version": return "Release"; - case "formatter.formatt.name": return "FormatT"; - default: return def; + case "formatters": + return "formatt:badformatt"; + case "formatter.formatt.exe": + return "echo"; + case "formatter.formatt.version": + return "Release"; + case "formatter.formatt.name": + return "FormatT"; + default: + return def; } }); app.use('/api', apiHandler.handle); @@ -71,16 +79,16 @@ describe('API handling', () => { name: "GCC 9.0.0", lang: "c++" }, - { - id: "fpc302", - name: "FPC 3.0.2", - lang: "pascal" - }, - { - id: "clangtrunk", - name: "Clang trunk", - lang: "c++" - }]; + { + id: "fpc302", + name: "FPC 3.0.2", + lang: "pascal" + }, + { + id: "clangtrunk", + name: "Clang trunk", + lang: "c++" + }]; apiHandler.setCompilers(compilers); apiHandler.setLanguages(languages); @@ -190,23 +198,20 @@ describe('API handling', () => { }) .catch(err => { throw err; - }) + }); }); it('should not go through with invalid tools', () => { return chai.request(app) .post('/api/format/invalid') .set('Accept', 'application/json') .then(res => { - // Not expected to go here - res.should.equal(null); - }) - .catch(err => { - err.response.should.have.status(422); - err.response.should.be.json; - err.response.body.should.deep.equals({exit: 2, answer: "Tool not supported"}); - }) + res.should.have.status(422); + res.should.be.json; + res.body.should.deep.equals({exit: 2, answer: "Tool not supported"}); + }); }); - xit('should not go through with invalid base styles', () => { + /* + it('should not go through with invalid base styles', () => { return chai.request(app) .post('/api/format/formatt') .set('Accept', 'application/json') @@ -216,13 +221,10 @@ describe('API handling', () => { source: "" }) .then(res => { - // Not expected to go here - res.should.equal(null); - }) - .catch(err => { - err.response.should.have.status(422); - err.response.should.be.json; - err.response.body.should.deep.equals({exit: 3, answer: "Base style not supported"}); + res.should.have.status(422); + res.should.be.json; + res.body.should.deep.equals({exit: 3, answer: "Base style not supported"}); }); }); + */ }); diff --git a/test/handlers/compile-tests.js b/test/handlers/compile-tests.js index e4d6dac11ae01525540ea2c74a83ae4d9989124d..42abe68df84d87e7c678d33ed05e6991e165cdab 100644 --- a/test/handlers/compile-tests.js +++ b/test/handlers/compile-tests.js @@ -22,6 +22,8 @@ // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. +require('../../lib/handlers/compile').SetTestMode(); + const chai = require('chai'), CompilationEnvironment = require('../../lib/compilation-env'), CompileHandler = require('../../lib/handlers/compile').Handler, @@ -49,10 +51,8 @@ describe('Compiler tests', () => { it('throws for unknown compilers', () => { return chai.request(app) .post('/NOT_A_COMPILER/compile') - .then(() => { - throw "Shouldn't succeeed"; - }, (e) => { - e.should.have.status(404); + .then((res) => { + res.should.have.status(404); }); }); diff --git a/test/lang-tests.js b/test/lang-tests.js index 5dfcf04ab9c87239f29cc97a50836acae74475c7..9c2026a81fe27c2adcd66a30e7b57205e6f62cdb 100644 --- a/test/lang-tests.js +++ b/test/lang-tests.js @@ -38,10 +38,8 @@ describe('Language definitions tests', () => { it('Has examples & are initialized', () => { Object.keys(languages).forEach(languageKey => { const lang = languages[languageKey]; - fs.stat(path.join('examples', lang.id, 'default' + lang.extensions[0]), (err, fd) => { - should.equal(err, null); - should.equal(fd, lang.example); - }); + const example = fs.readFileSync(path.join('examples', lang.id, 'default' + lang.extensions[0]), 'utf-8'); + should.equal(example, lang.example); }); }); }); diff --git a/test/llvm-ir-parser-tests.js b/test/llvm-ir-parser-tests.js new file mode 100644 index 0000000000000000000000000000000000000000..de1b4f41178a811749a6aceb3b857dfcb1c3ad61 --- /dev/null +++ b/test/llvm-ir-parser-tests.js @@ -0,0 +1,187 @@ +// Copyright (c) 2018, Adrian Bibby Walther +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. + +const chai = require('chai'); +const chaiAsPromised = require("chai-as-promised"); +const LlvmIrParser = require("../lib/llvm-ir"); +const properties = require('../lib/properties'); + +chai.use(chaiAsPromised); +chai.should(); +const expect = chai.expect; + +const languages = { + 'c++': {id: 'c++'} +}; + +let compilerProps = new properties.CompilerProps(languages, properties.fakeProps({})); +compilerProps = compilerProps.get.bind(compilerProps); + +describe('llvm-ir parseMetaNode', function () { + const llvmIrParser = new LlvmIrParser(compilerProps); + + it('should parse DILocation node', function () { + llvmIrParser.parseMetaNode('!60 = !DILocation(line: 9, column: 15, scope: !58)').should.deep.equal({ + metaType: 'Location', + metaId: '!60', + line: '9', + column: '15', + scope: '!58', + }); + }); + + it('should parse distinct DILexicalBlock', function () { + llvmIrParser.parseMetaNode('!50 = distinct !DILexicalBlock(scope: !44, file: !1, line: 8, column: 5)').should.deep.equal({ + metaType: 'LexicalBlock', + metaId: '!50', + scope: '!44', + file: '!1', + line: '8', + column: '5' + }); + }); + + it('should parse all value types', function () { + llvmIrParser.parseMetaNode('!44 = distinct !DISubprogram(name: "func<int, int>", ' + + 'scope: !1, line: 7, isLocal: false, isDefinition: true, flags: ' + + 'DIFlagPrototyped, ceEmpty: "", ceTest: "a:b\\"c,d")').should.deep.equal({ + metaType: 'Subprogram', + metaId: '!44', + name: 'func<int, int>', + line: '7', + scope: '!1', + isLocal: 'false', + isDefinition: 'true', + flags: 'DIFlagPrototyped', + ceTest: 'a:b\\"c,d', + ceEmpty: '' + }); + }); + + it('should parse distinct DILexicalBlock', function () { + llvmIrParser.parseMetaNode('!1 = !DIFile(filename: "/tmp/example.cpp", directory: "/home/compiler-explorer")').should.deep.equal({ + metaType: 'File', + metaId: '!1', + filename: '/tmp/example.cpp', + directory: '/home/compiler-explorer' + }); + }); +}); + +describe('llvm-ir getSourceLineNumber', function () { + const llvmIrParser = new LlvmIrParser(compilerProps); + const debugInfo = { + '!10': { line: 10 }, + '!20': { line: 20, scope: '!10' }, + '!11': { scope: '!10' }, + '!12': { line: 0, scope: '!10' }, + '!14': { }, + '!15': { scope: '!14' }, + '!16': { scope: '!42' } + } + + it('should return a line number', function () { + expect(llvmIrParser.getSourceLineNumber(debugInfo, '!10')).to.equal(10); + expect(llvmIrParser.getSourceLineNumber(debugInfo, '!20')).to.equal(20); + }); + + it('should return the line number of its parent scope', function () { + expect(llvmIrParser.getSourceLineNumber(debugInfo, '!11')).to.equal(10); + expect(llvmIrParser.getSourceLineNumber(debugInfo, '!12')).to.equal(10); + }); + + it('should return null on non-existend node', function () { + expect(llvmIrParser.getSourceLineNumber(debugInfo, '!16')).to.equal(null); + }); + + it('should return null if no higher scope has a line', function () { + expect(llvmIrParser.getSourceLineNumber(debugInfo, '!14')).to.equal(null); + expect(llvmIrParser.getSourceLineNumber(debugInfo, '!15')).to.equal(null); + }); +}); + +describe('llvm-ir getFileName', function () { + const llvmIrParser = new LlvmIrParser(compilerProps); + const debugInfo = { + '!10': { filename: "/test.cpp" }, + '!20': { filename: "/example.cpp" }, + '!11': { file: '!10' }, + '!21': { file: '!20' }, + '!12': { scope: '!11' }, + '!13': { scope: '!12' } + } + + it('should return a filename', function () { + expect(llvmIrParser.getFileName(debugInfo, '!10')).to.equal("/test.cpp"); + expect(llvmIrParser.getFileName(debugInfo, '!11')).to.equal("/test.cpp"); + }); + + it('should return the filename of its parent scope', function () { + expect(llvmIrParser.getFileName(debugInfo, '!12')).to.equal("/test.cpp"); + expect(llvmIrParser.getFileName(debugInfo, '!13')).to.equal("/test.cpp"); + }); + + it('should return null on non-existend node', function () { + expect(llvmIrParser.getFileName(debugInfo, '!42')).to.equal(null); + }); + + it('should not return source filename', function () { + expect(llvmIrParser.getFileName(debugInfo, '!20')).to.equal(null); + expect(llvmIrParser.getFileName(debugInfo, '!21')).to.equal(null); + }); +}); + +describe('llvm-ir isLineLlvmDirective', function () { + const llvmIrParser = new LlvmIrParser(compilerProps); + const directives = [ + 'source_filename = "/tmp/compiler-explorer/example.cpp"', + '!llvm.dbg.cu = !{!0}', + '!2 = !{}', + '!5 = !{i32 1, !"wchar_size", i32 4}', + '!77 = !DILocalVariable(name: "x", arg: 1, scope: !76, file: !1, line: 14, type: !10)', + '!140 = distinct !DISubprogram(name: "maxArray", linkageName: "_Z9maxArr3ayPdS_", scope: !1, ' + + 'file: !1, line: 28, type: !8, isLocal: false, isDefinition: true, scopeLine: 28)', + '!150 = distinct !DILexicalBlock(scope: !146, file: !1, line: 29, column: 5)', + '!156 = !DILocation(line: 30, column: 15, scope: !154)', + '!169 = distinct !{!169, !152, !170}' + ]; + const nonDirectives = [ + ' %33 = load i32, i32* %5, align 4, !dbg !167', + ' %25 = getelementptr inbounds double, double* %22, i64 %24, !dbg !129', + 'define void @_Z9maxAr1rayPdS_(double*, double*) #0 !dbg !76 {', + ' call void @llvm.dbg.declare(metadata double** %3, metadata !12, metadata !DIExpression()), !dbg !13' + ]; + + it('should recognize directives', function () { + directives.forEach(directive => { + llvmIrParser.isLineLlvmDirective(directive).should.be.true; + }); + }); + + it('should recognize non-directives', function () { + nonDirectives.forEach(directive => { + llvmIrParser.isLineLlvmDirective(directive).should.be.false; + }); + }); +}); diff --git a/test/packager-tests.js b/test/packager-tests.js new file mode 100644 index 0000000000000000000000000000000000000000..9c9ac4e3cae34ad39b0d37ad23aa60870f41cc26 --- /dev/null +++ b/test/packager-tests.js @@ -0,0 +1,89 @@ +// Copyright (c) 2019, Compiler Explorer Team +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +"use strict"; + +const + chai = require('chai'), + chaiAsPromised = require('chai-as-promised'), + Packager = require('../lib/packager').Packager, + path = require('path'), + fs = require('fs-extra'), + temp = require('temp'); + +chai.use(chaiAsPromised); +chai.should(); + +function newTempDir() { + return new Promise((resolve, reject) => { + temp.mkdir({prefix: 'compiler-explorer-compiler', dir: process.env.tmpDir}, (err, dirPath) => { + if (err) + reject(`Unable to open temp file: ${err}`); + else + resolve(dirPath); + }); + }); +} + +function writeTestFile(filepath) { + return fs.writeFile(filepath, "#!/bin/sh\n\necho Hello, world!\n\n"); +} + +describe('Packager', function () { + it('should be able to package 1 file', function () { + const pack = new Packager(); + return newTempDir().then((dirPath) => { + const executablePath = path.join(dirPath, "hello.txt"); + writeTestFile(executablePath).then(() => { + const targzPath = path.join(dirPath, "package.tgz"); + + return pack.package(executablePath, targzPath).then(() => { + return fs.existsSync(targzPath).should.equal(true); + }).catch(err => { + throw err; + }); + }); + }); + }); + + it('should be able to unpack', function () { + const pack = new Packager(); + return newTempDir().then((dirPath) => { + const executablePath = path.join(dirPath, "hello.txt"); + return writeTestFile(executablePath).then(() => { + const targzPath = path.join(dirPath, "package.tgz"); + + return pack.package(executablePath, targzPath).then(() => { + return newTempDir().then((unpackPath) => { + + const pack2 = new Packager(); + return pack2.unpack(targzPath, unpackPath).then(() => { + const unpackedFilepath = path.join(unpackPath, "hello.txt"); + return fs.existsSync(unpackedFilepath).should.equal(true); + }); + }); + }); + }); + }); + }); +}); diff --git a/test/storage/storage-tests.js b/test/storage/storage-tests.js index e81b5f6af094139c45be82baa0373d15c7973819..f17db35b67bfe6d64b9f4cfc8353be691060d277 100644 --- a/test/storage/storage-tests.js +++ b/test/storage/storage-tests.js @@ -23,17 +23,45 @@ // POSSIBILITY OF SUCH DAMAGE. const chai = require('chai'), + sinon = require('sinon'), {StorageBase} = require('../../lib/storage/storage'); -chai.should(); +const should = chai.should(); describe('Hash tests', () => { + afterEach(() => sinon.restore()); it('should never generate invalid characters', () => { for (let i = 0; i < 256; ++i) { - const buf = new Buffer([i]); + const buf = Buffer.of(i); const as64 = StorageBase.safe64Encoded(buf); as64.should.not.contain("/"); as64.should.not.contain("+"); } }); + const badResult = 'R0Rapeabcdefghio1327698asdhjkJJklQp'; // An unfortunate hash, see https://github.com/mattgodbolt/compiler-explorer/issues/1297 + it('should detect profanities in hashes', () => { + StorageBase.isCleanText("I am the very model of a major general").should.be.true; + StorageBase.isCleanText(badResult).should.be.false; + }); + it('should avoid profanities in hashes', () => { + const testCase = {some: "test"}; + const goodResult = 'B0B0Mon1efjwCXKJ_2340-3sjfwe'; + const callback = sinon.stub() + .onFirstCall().returns(badResult) + .onSecondCall().returns(badResult) // force nonce to update a couple of times + .returns(goodResult); + sinon.replace(StorageBase, 'safe64Encoded', callback); + const {config, configHash} = StorageBase.getSafeHash(testCase); + configHash.should.not.equal(badResult); + configHash.should.equal(goodResult); + const asObj = JSON.parse(config); + should.exist(asObj.nonce); + asObj.nonce.should.equal(2); + }); + it('should not modify ok hashes', () => { + const testCase = {some: "test"}; + const {config, configHash} = StorageBase.getSafeHash(testCase); + const asObj = JSON.parse(config); + should.not.exist(asObj.nonce); + }); }); diff --git a/test/utils-tests.js b/test/utils-tests.js index 7a0f5dafe0b58ec22dc8db300d363a3450fbb02f..9138d8ebe843ea357c3e45e81cd8197a46db5660 100644 --- a/test/utils-tests.js +++ b/test/utils-tests.js @@ -187,6 +187,16 @@ describe('Pads right', () => { }); }); +describe('Trim right', () => { + it('works', () => { + utils.trimRight(' ').should.equal(''); + utils.trimRight('').should.equal(''); + utils.trimRight(' ab ').should.equal(' ab'); + utils.trimRight(' a b ').should.equal(' a b'); + utils.trimRight('a ').should.equal('a'); + }); +}); + describe('Anonymizes all kind of IPs', () => { it('Ignores localhost', () => { utils.anonymizeIp('localhost').should.equal('localhost'); @@ -225,10 +235,12 @@ describe('Hash interface', () => { utils.getHash('sugar', version).should.equal('afa3c89d0f6a61de6805314c9bd7c52d020425a3a3c7bbdfa7c0daec594e5ef1'); }); it('correctly hashes objects', () => { - utils.getHash({toppings: [ - {name: 'raspberries', optional: false}, - {name: 'ground cinnamon', optional: true} - ]}).should.equal('e205d63abd5db363086621fdc62c4c23a51b733bac5855985a8b56642d570491'); + utils.getHash({ + toppings: [ + {name: 'raspberries', optional: false}, + {name: 'ground cinnamon', optional: true} + ] + }).should.equal('e205d63abd5db363086621fdc62c4c23a51b733bac5855985a8b56642d570491'); }); }); @@ -251,7 +263,31 @@ describe('GoldenLayout utils', () => { {compiler: 'gsnapshot'}, {compiler: 'rv32clang'} ] - }) + }); }); - }) + }); +}); + +describe('squashes horizontal whitespace', () => { + it('handles empty input', () => { + utils.squashHorizontalWhitespace('').should.equals(''); + utils.squashHorizontalWhitespace(' ').should.equals(''); + utils.squashHorizontalWhitespace(' ').should.equals(''); + }); + it('handles leading spaces', () => { + utils.squashHorizontalWhitespace(' abc').should.equals(' abc'); + utils.squashHorizontalWhitespace(' abc').should.equals(' abc'); + utils.squashHorizontalWhitespace(' abc').should.equals(' abc'); + }); + it('handles interline spaces', () => { + utils.squashHorizontalWhitespace('abc abc').should.equals('abc abc'); + utils.squashHorizontalWhitespace('abc abc').should.equals('abc abc'); + utils.squashHorizontalWhitespace('abc abc').should.equals('abc abc'); + }); + it('handles leading and interline spaces', () => { + utils.squashHorizontalWhitespace(' abc abc').should.equals(' abc abc'); + utils.squashHorizontalWhitespace(' abc abc').should.equals(' abc abc'); + utils.squashHorizontalWhitespace(' abc abc').should.equals(' abc abc'); + utils.squashHorizontalWhitespace(' abc abc').should.equals(' abc abc'); + }); }); diff --git a/views/head.pug b/views/head.pug index c3f05f868af9e293de5e645059a3c26511f71d9d..2aa2823a9cf909c651ad28ac60c91e87801dcd34 100644 --- a/views/head.pug +++ b/views/head.pug @@ -15,7 +15,7 @@ else meta(name="description" content="Compiler Explorer is an interactive online compiler which shows the assembly output of compiled C++, Rust, Go (and many more) code.") meta(property="og:title" content="Compiler Explorer") meta(name="twitter:card" content="summary") -meta(name="twitter:site" content="@mattgodbolt") +meta(name="twitter:site" content="@CompileExplore") meta(property="og:image" content="https://github.com/mattgodbolt/compiler-explorer-image/blob/master/logo/favicon.png?raw=true") meta(property="og:image:secure_url" content="https://github.com/mattgodbolt/compiler-explorer-image/blob/master/logo/favicon.png?raw=true") meta(property="og:image:type" content="image/png") @@ -33,5 +33,5 @@ style#theme // short links), it's possible to do XSS attacks, by leaving <script> tags in the source etc, which can be // interpreted by the browser. script window.compilerExplorerOptions = JSON.parse(decodeURIComponent("!{encodeURIComponent(compilerExplorerOptions)}")) -script window.httpRoot = '#{httpRoot}'; +script window.httpRoot = '#{httpRoot}'; window.httpRootDir = '#{httpRootDir}'; script(src=require("main.js")) diff --git a/views/index.pug b/views/index.pug index b6ce5c250867c25cbc5f81afa9f0caed185a78b6..79066a43dc6daf9b75783caf91eff39f62e66238 100644 --- a/views/index.pug +++ b/views/index.pug @@ -18,7 +18,7 @@ html(lang="en") .collapse.navbar-collapse#navbarContent ul.navbar-nav.navbar-left.mr-auto li.nav-item.dropdown - a.nav-link.dropdown-toggle#addDropdown(href="javascript:;" role="button" data-toggle="dropdown" aria-haspopup="true" aria-expanded="false") Add... + a.nav-link.dropdown-toggle#addDropdown(href="javascript:;" role="button" data-toggle="dropdown" aria-haspopup="true" aria-expanded="false") Add... div.dropdown-menu(aria-labelledby="moreDropdown") a.dropdown-item#add-editor(href="javascript:;" title="Click or drag to desired destination") span.fa.fa-code @@ -33,7 +33,7 @@ html(lang="en") div.dropdown-divider a.dropdown-item#ui-brokenlink(href="javascript:;") Reset UI layout a.dropdown-item#ui-reset(href="javascript:;") Reset code and UI layout - a.dropdown-item#ui-duplicate(href="javascript:;") Open new tab + a.dropdown-item#ui-duplicate(href="javascript:;") Open new tab ul#motd.navbar-nav.navbar-center.mr-auto.community-advert.d-none span.content | Thanks for using Compiler Explorer @@ -56,7 +56,7 @@ html(lang="en") a.dropdown-item(href="https://groups.google.com/forum/#!forum/compiler-explorer-discussion" title="Join Compiler Explorer Public Google Group" target="_blank" rel="noopener") img(height="20" width="20" src=require("Google-Groups-20px.png")) | Mailing list - a.dropdown-item(href="https://github.com/mattgodbolt/compiler-explorer/wiki/Installed-libraries" target="_blank" rel="noopener") Installed libraries + a.dropdown-item(href="https://godbolt.org/admin/libraries.html" target="_blank" rel="noopener") Installed libraries a.dropdown-item(href="https://github.com/mattgodbolt/compiler-explorer/wiki" target="_blank" rel="noopener") Wiki a.dropdown-item(href="https://github.com/mattgodbolt/compiler-explorer/issues" target="_blank" rel="noopener") Report an issue a.dropdown-item#thanks-to(href="javascript:;") Thanks to... @@ -64,6 +64,7 @@ html(lang="en") a.dropdown-item(href="mailto:matt@godbolt.org" target="_blank" rel="noopener noreferrer") Contact the author a.dropdown-item(href="https://xania.org/MattGodbolt" rel="author" target="_blank") About the author a.dropdown-item#changes(href="javascript:;") Changelog + a.dropdown-item#version-tree(href="javascript:;" target="_blank") Version tree if sharingEnabled a.dropdown-item#socialshare if policies.cookies.enabled || policies.privacy.enabled diff --git a/views/monaco.pug b/views/monaco.pug index f34fb471d670323f6949739b78ebce404f214687..fdbdb57a27555b6290b0e87ac76a0d09638e423c 100644 --- a/views/monaco.pug +++ b/views/monaco.pug @@ -1 +1 @@ -script(src="vs/loader.js") +script(src=httpRootDir + "vs/loader.js") diff --git a/views/popups.pug b/views/popups.pug index 0371ac7076261b31ee6bb53d3f22ba86eb07605a..67e81ee4399d4223410cd849b5bbd1dd6c0d38d6 100644 --- a/views/popups.pug +++ b/views/popups.pug @@ -100,6 +100,10 @@ .card-title h4 Editor .form-group(role="group") + div + label + | Desired Font Family in editors + input.editorsFFont(type="text" style="width:100%") .checkbox label input.autoCloseBrackets(type="checkbox") @@ -139,6 +143,7 @@ kbd Ctrl | + kbd S + | (Save editor to file) .checkbox label input.wordWrap(type="checkbox") diff --git a/views/templates.pug b/views/templates.pug index 5f61b558f890fb72304380c14f2dc18aced8a3b5..632047adcc121c984e20b828597499a86f3587cd 100644 --- a/views/templates.pug +++ b/views/templates.pug @@ -9,8 +9,9 @@ button.btn.btn-outline-secondary.btn-sm.dropdown-toggle(data-toggle="dropdown" type="button" aria-haspopup="true" aria-expanded="false") span.current Short ul.dropdown-menu.sources - button.dropdown-item.btn.btn-light.btn-sm(data-bind="Short") - | Short + if storageSolution !== "null" + button.dropdown-item.btn.btn-light.btn-sm(data-bind="Short") + | Short button.dropdown-item.btn.btn-light.btn-sm(data-bind="Full") | Full button.dropdown-item.btn.btn-light.btn-sm(data-bind="Embed") @@ -45,6 +46,9 @@ button.dropdown-item.btn.btn-sm.btn-light.add-editor(title="Add a new source editor view" aria-label="New source editor") span.fa.fa-code | Source editor + a.btn.btn-light.open-in-cppinsights(href="https://cppinsights.io/" target="_blank" title="Open in Cppinsights" arial-label="Open in Cppinsights") + img(height="16" width="16" src=require("cppinsights16.png")) + span.hideable CppInsights .btn-group.btn-group-sm.ml-auto(role="group" aria-label="Editor language") select.change-language(title="Change this editor's (and associated panels) language" disabled=embedded && readOnly) .monaco-placeholder @@ -58,6 +62,10 @@ button.input-group-text.prepend-options(data-trigger="click" style="cursor: pointer;" role="button" title="All compilation options") span.btn.btn-light.btn-sm.status-icon input.options.form-control(type="text" placeholder="Compiler options..." size="256" autocomplete="off" autocorrect="off" autocapitalize="off" spellcheck="false") + .input-group-append.populararguments(title="Popular arguments") + button.btn.btn-outline-secondary.dropdown-toggle.dropdown-toggle-split(type="button" data-toggle="dropdown" aria-haspopup="true" aria-expanded="false") + span.sr-only Popular arguments + div.dropdown-menu.dropdown-menu-right include font-size .btn-group.btn-group-sm.filters(role="group" aria-label="Compiler filters") .button-checkbox @@ -72,6 +80,10 @@ button.btn.btn-light.btn-sm.active.nonbinary(type="button" title="Filter unused labels from the output" data-bind="labels" aria-pressed="true") span .LX0: input.d-none(type="checkbox" checked=true) + .button-checkbox + button.btn.btn-light.btn-sm.active.nonbinary(title="Filter functions from other libraries from the output" data-bind="libraryCode" aria-pressed="true") + span lib.f: + input.d-none(type="checkbox") .button-checkbox button.btn.btn-light.btn-sm.active.nonbinary(type="button" title="Filter all assembler directives from the output" data-bind="directives" aria-pressed="true") span .text @@ -110,6 +122,9 @@ button.dropdown-item.btn.btn-light.btn-sm.view-ast(title="Show AST output") span.fas.fa-leaf | AST output + button.dropdown-item.btn.btn-light.btn-sm.view-ir(title="Show IR output") + span.fas.fa-align-center + | IR output button.dropdown-item.btn.btn-light.btn-sm.view-gccdump(title="Show Tree/RTL dump (GCC only)") span.fas.fa-tree | GCC Tree/RTL output @@ -150,8 +165,7 @@ | 0 | ) span.short-compiler-name - a.full-compiler-name(tabindex="0" data-trigger="focus" style="cursor: pointer;" role="button" title="Full compiler version") - span.btn.btn-light.btn-sm.fas.fa-info + button.btn.btn-light.btn-sm.fas.fa-info.full-compiler-name(data-trigger="click" style="cursor: pointer;" role="button" title="Full compiler version") span.compile-time(title="Compilation time (Result size)") #compiler-output @@ -203,6 +217,11 @@ include font-size.pug .monaco-placeholder + #ir + .top-bar.btn-toolbar.bg-light(role="toolbar") + include font-size.pug + .monaco-placeholder + #gccdump .top-bar.btn-toolbar.bg-light(role="toolbar") include font-size diff --git a/yarn.lock b/yarn.lock index d574cfe0143fbde49896a281aea1041aff2b60b3..de5d4a9893efdbffeb4684fe09afc35fe243aefe 100644 --- a/yarn.lock +++ b/yarn.lock @@ -2,9 +2,143 @@ # yarn lockfile v1 -"@fortawesome/fontawesome-free@^5.3.1": - version "5.3.1" - resolved "https://registry.yarnpkg.com/@fortawesome/fontawesome-free/-/fontawesome-free-5.3.1.tgz#5466b8f31c1f493a96754c1426c25796d0633dd9" +"@babel/code-frame@^7.0.0": + version "7.0.0" + resolved "https://registry.yarnpkg.com/@babel/code-frame/-/code-frame-7.0.0.tgz#06e2ab19bdb535385559aabb5ba59729482800f8" + integrity sha512-OfC2uemaknXr87bdLUkWog7nYuliM9Ij5HUcajsVcMCpQrcLmtxRbVFTIqmcSkSeYRBFBRxs2FiUqFJDLdiebA== + dependencies: + "@babel/highlight" "^7.0.0" + +"@babel/highlight@^7.0.0": + version "7.0.0" + resolved "https://registry.yarnpkg.com/@babel/highlight/-/highlight-7.0.0.tgz#f710c38c8d458e6dd9a201afb637fcb781ce99e4" + integrity sha512-UFMC4ZeFC48Tpvj7C8UgLvtkaUuovQX+5xNWrsIoMG8o2z+XFKjKaN9iVmS84dPwVN00W4wPmqvYoZF3EGAsfw== + dependencies: + chalk "^2.0.0" + esutils "^2.0.2" + js-tokens "^4.0.0" + +"@fortawesome/fontawesome-free@5.8.1": + version "5.8.1" + resolved "https://registry.yarnpkg.com/@fortawesome/fontawesome-free/-/fontawesome-free-5.8.1.tgz#cbafbfe8894c4e3e3c3a9da6774e249ac1f2da8b" + integrity sha512-GJtx6e55qLEOy2gPOsok2lohjpdWNGrYGtQx0FFT/++K4SYx+Z8LlPHdQBaFzKEwH5IbBB4fNgb//uyZjgYXoA== + +"@sentry/browser@4.4.1": + version "4.4.1" + resolved "https://registry.yarnpkg.com/@sentry/browser/-/browser-4.4.1.tgz#3473ca9e61926c2e896abe84bddfb2651004fb5a" + dependencies: + "@sentry/core" "4.4.1" + "@sentry/types" "4.4.1" + "@sentry/utils" "4.4.1" + tslib "^1.9.3" + +"@sentry/core@4.4.1": + version "4.4.1" + resolved "https://registry.yarnpkg.com/@sentry/core/-/core-4.4.1.tgz#8836813d9d309059913b464cee6d23da09cc4056" + dependencies: + "@sentry/hub" "4.4.1" + "@sentry/minimal" "4.4.1" + "@sentry/types" "4.4.1" + "@sentry/utils" "4.4.1" + tslib "^1.9.3" + +"@sentry/hub@4.4.1": + version "4.4.1" + resolved "https://registry.yarnpkg.com/@sentry/hub/-/hub-4.4.1.tgz#3f82405131bf10ef9e751e2760d63bfff809fa4a" + dependencies: + "@sentry/types" "4.4.1" + "@sentry/utils" "4.4.1" + tslib "^1.9.3" + +"@sentry/minimal@4.4.1": + version "4.4.1" + resolved "https://registry.yarnpkg.com/@sentry/minimal/-/minimal-4.4.1.tgz#332e97395a20a01e398ae6614a8fb857f2566c31" + dependencies: + "@sentry/hub" "4.4.1" + "@sentry/types" "4.4.1" + tslib "^1.9.3" + +"@sentry/node@4.4.1": + version "4.4.1" + resolved "https://registry.yarnpkg.com/@sentry/node/-/node-4.4.1.tgz#20cb65307015c8916ad3b3556694adde94104c74" + dependencies: + "@sentry/core" "4.4.1" + "@sentry/hub" "4.4.1" + "@sentry/types" "4.4.1" + "@sentry/utils" "4.4.1" + "@types/stack-trace" "0.0.29" + cookie "0.3.1" + https-proxy-agent "^2.2.1" + lsmod "1.0.0" + stack-trace "0.0.10" + tslib "^1.9.3" + +"@sentry/types@4.4.1": + version "4.4.1" + resolved "https://registry.yarnpkg.com/@sentry/types/-/types-4.4.1.tgz#d19f9b0450a543aa11b136681ea19612e3cc1611" + +"@sentry/utils@4.4.1": + version "4.4.1" + resolved "https://registry.yarnpkg.com/@sentry/utils/-/utils-4.4.1.tgz#cf80fe596d43dc04f51cb780e0cf70017a8c1eb1" + dependencies: + "@sentry/types" "4.4.1" + tslib "^1.9.3" + +"@sinonjs/commons@^1", "@sinonjs/commons@^1.0.2", "@sinonjs/commons@^1.3.1": + version "1.4.0" + resolved "https://registry.yarnpkg.com/@sinonjs/commons/-/commons-1.4.0.tgz#7b3ec2d96af481d7a0321252e7b1c94724ec5a78" + integrity sha512-9jHK3YF/8HtJ9wCAbG+j8cD0i0+ATS9A7gXFqS36TblLPNy6rEEc+SB0imo91eCboGaBYGV/MT1/br/J+EE7Tw== + dependencies: + type-detect "4.0.8" + +"@sinonjs/formatio@^3.1.0", "@sinonjs/formatio@^3.2.1": + version "3.2.1" + resolved "https://registry.yarnpkg.com/@sinonjs/formatio/-/formatio-3.2.1.tgz#52310f2f9bcbc67bdac18c94ad4901b95fde267e" + integrity sha512-tsHvOB24rvyvV2+zKMmPkZ7dXX6LSLKZ7aOtXY6Edklp0uRcgGpOsQTTGTcWViFyx4uhWc6GV8QdnALbIbIdeQ== + dependencies: + "@sinonjs/commons" "^1" + "@sinonjs/samsam" "^3.1.0" + +"@sinonjs/samsam@^3.1.0", "@sinonjs/samsam@^3.2.0": + version "3.3.0" + resolved "https://registry.yarnpkg.com/@sinonjs/samsam/-/samsam-3.3.0.tgz#9557ea89cd39dbc94ffbd093c8085281cac87416" + integrity sha512-beHeJM/RRAaLLsMJhsCvHK31rIqZuobfPLa/80yGH5hnD8PV1hyh9xJBJNFfNmO7yWqm+zomijHsXpI6iTQJfQ== + dependencies: + "@sinonjs/commons" "^1.0.2" + array-from "^2.1.1" + lodash "^4.17.11" + +"@sinonjs/text-encoding@^0.7.1": + version "0.7.1" + resolved "https://registry.yarnpkg.com/@sinonjs/text-encoding/-/text-encoding-0.7.1.tgz#8da5c6530915653f3a1f38fd5f101d8c3f8079c5" + integrity sha512-+iTbntw2IZPb/anVDbypzfQa+ay64MW0Zo8aJ8gZPWMMK6/OubMVb6lUPMagqjOPnmtauXnFCACVl3O7ogjeqQ== + +"@types/chai@4": + version "4.1.7" + resolved "https://registry.yarnpkg.com/@types/chai/-/chai-4.1.7.tgz#1b8e33b61a8c09cbe1f85133071baa0dbf9fa71a" + integrity sha512-2Y8uPt0/jwjhQ6EiluT0XCri1Dbplr0ZxfFXUz+ye13gaqE8u5gL5ppao1JrUYr9cIip5S6MvQzBS7Kke7U9VA== + +"@types/cookiejar@*": + version "2.1.1" + resolved "https://registry.yarnpkg.com/@types/cookiejar/-/cookiejar-2.1.1.tgz#90b68446364baf9efd8e8349bb36bd3852b75b80" + integrity sha512-aRnpPa7ysx3aNW60hTiCtLHlQaIFsXFCgQlpakNgDNVFzbtusSY8PwjAQgRWfSk0ekNoBjO51eQRB6upA9uuyw== + +"@types/node@*": + version "10.12.18" + resolved "https://registry.yarnpkg.com/@types/node/-/node-10.12.18.tgz#1d3ca764718915584fcd9f6344621b7672665c67" + integrity sha512-fh+pAqt4xRzPfqA6eh3Z2y6fyZavRIumvjhaCL753+TVkGKGhpPeyrJG2JftD0T9q4GF00KjefsQ+PQNDdWQaQ== + +"@types/stack-trace@0.0.29": + version "0.0.29" + resolved "https://registry.yarnpkg.com/@types/stack-trace/-/stack-trace-0.0.29.tgz#eb7a7c60098edb35630ed900742a5ecb20cfcb4d" + +"@types/superagent@^3.8.3": + version "3.8.6" + resolved "https://registry.yarnpkg.com/@types/superagent/-/superagent-3.8.6.tgz#3676d8920d8979ea4ca57513f27995064f92dc43" + integrity sha512-YQjdsk27MLb6uyXjjywGyYeuqavwV3CirHt6btBz00HkKJyowdB8gjjB1zIZxrOybDRqO8FLjTZeEtmtC2hqxA== + dependencies: + "@types/cookiejar" "*" + "@types/node" "*" abbrev@1: version "1.1.1" @@ -33,13 +167,12 @@ acorn-globals@^3.0.0: dependencies: acorn "^4.0.4" -acorn-jsx@^3.0.0: - version "3.0.1" - resolved "https://registry.yarnpkg.com/acorn-jsx/-/acorn-jsx-3.0.1.tgz#afdf9488fb1ecefc8348f6fb22f464e32a58b36b" - dependencies: - acorn "^3.0.4" +acorn-jsx@^5.0.0: + version "5.0.1" + resolved "https://registry.yarnpkg.com/acorn-jsx/-/acorn-jsx-5.0.1.tgz#32a064fd925429216a09b141102bfdd185fae40e" + integrity sha512-HJ7CfNHrfJLlNTzIEUTj43LNWGkqpRLxm3YjAlcD0ACydk9XynzYsCBHxut+iqt+1aBXkx9UP/w/ZqMr13XIzg== -acorn@^3.0.4, acorn@^3.1.0, acorn@~3.3.0: +acorn@^3.1.0, acorn@~3.3.0: version "3.3.0" resolved "https://registry.yarnpkg.com/acorn/-/acorn-3.3.0.tgz#45e37fb39e8da3f25baee3ff5369e2bb5f22017a" @@ -51,14 +184,31 @@ acorn@^5.0.0: version "5.3.0" resolved "https://registry.yarnpkg.com/acorn/-/acorn-5.3.0.tgz#7446d39459c54fb49a80e6ee6478149b940ec822" -acorn@^5.4.0: - version "5.4.1" - resolved "https://registry.yarnpkg.com/acorn/-/acorn-5.4.1.tgz#fdc58d9d17f4a4e98d102ded826a9b9759125102" +acorn@^6.0.7: + version "6.1.1" + resolved "https://registry.yarnpkg.com/acorn/-/acorn-6.1.1.tgz#7d25ae05bb8ad1f9b699108e1094ecd7884adc1f" + integrity sha512-jPTiwtOxaHNaAPg/dmrJ/beuzLRnXtB0kQPQ8JpotKJgTB6rX6c8mlf315941pyjBSaPg8NHXS9fhP4u17DpGA== + +agent-base@^4.1.0: + version "4.2.1" + resolved "https://registry.yarnpkg.com/agent-base/-/agent-base-4.2.1.tgz#d89e5999f797875674c07d87f260fc41e83e8ca9" + dependencies: + es6-promisify "^5.0.0" + +ajv-errors@^1.0.0: + version "1.0.1" + resolved "https://registry.yarnpkg.com/ajv-errors/-/ajv-errors-1.0.1.tgz#f35986aceb91afadec4102fbd85014950cefa64d" + integrity sha512-DCRfO/4nQ+89p/RK43i8Ezd41EqdGIU4ld7nGF8OQ14oc/we5rEntLCUa7+jrn3nn83BosfwZA0wb4pon2o8iQ== ajv-keywords@^2.0.0, ajv-keywords@^2.1.0: version "2.1.1" resolved "https://registry.yarnpkg.com/ajv-keywords/-/ajv-keywords-2.1.1.tgz#617997fc5f60576894c435f940d819e135b80762" +ajv-keywords@^3.1.0: + version "3.2.0" + resolved "https://registry.yarnpkg.com/ajv-keywords/-/ajv-keywords-3.2.0.tgz#e86b819c602cf8821ad637413698f1dec021847a" + integrity sha1-6GuBnGAs+IIa1jdBNpjx3sAhhHo= + ajv@^4.9.1: version "4.11.8" resolved "https://registry.yarnpkg.com/ajv/-/ajv-4.11.8.tgz#82ffb02b29e662ae53bdc20af15947706739c536" @@ -66,7 +216,7 @@ ajv@^4.9.1: co "^4.6.0" json-stable-stringify "^1.0.1" -ajv@^5.0.0, ajv@^5.1.5, ajv@^5.2.3, ajv@^5.3.0: +ajv@^5.0.0, ajv@^5.1.5: version "5.5.2" resolved "https://registry.yarnpkg.com/ajv/-/ajv-5.5.2.tgz#73b5eeca3fab653e3d3f9422b341ad42205dc965" dependencies: @@ -75,6 +225,26 @@ ajv@^5.0.0, ajv@^5.1.5, ajv@^5.2.3, ajv@^5.3.0: fast-json-stable-stringify "^2.0.0" json-schema-traverse "^0.3.0" +ajv@^6.1.0: + version "6.7.0" + resolved "https://registry.yarnpkg.com/ajv/-/ajv-6.7.0.tgz#e3ce7bb372d6577bb1839f1dfdfcbf5ad2948d96" + integrity sha512-RZXPviBTtfmtka9n9sy1N5M5b82CbxWIR6HIis4s3WQTXDJamc/0gpCWNGz6EWdWp4DOfjzJfhz/AS9zVPjjWg== + dependencies: + fast-deep-equal "^2.0.1" + fast-json-stable-stringify "^2.0.0" + json-schema-traverse "^0.4.1" + uri-js "^4.2.2" + +ajv@^6.9.1: + version "6.10.0" + resolved "https://registry.yarnpkg.com/ajv/-/ajv-6.10.0.tgz#90d0d54439da587cd7e843bfb7045f50bd22bdf1" + integrity sha512-nffhOpkymDECQyR0mnsUtoCE8RlX38G0rYP+wgLWFyZuUyuuojSSvi/+euOiQBIn63whYwYVIIH1TvE3tu4OEg== + dependencies: + fast-deep-equal "^2.0.1" + fast-json-stable-stringify "^2.0.0" + json-schema-traverse "^0.4.1" + uri-js "^4.2.2" + align-text@^0.1.1, align-text@^0.1.3: version "0.1.4" resolved "https://registry.yarnpkg.com/align-text/-/align-text-0.1.4.tgz#0cd90a561093f35d0a99256c22b7069433fad117" @@ -83,17 +253,14 @@ align-text@^0.1.1, align-text@^0.1.3: longest "^1.0.1" repeat-string "^1.5.2" -alphanum-sort@^1.0.1, alphanum-sort@^1.0.2: - version "1.0.2" - resolved "https://registry.yarnpkg.com/alphanum-sort/-/alphanum-sort-1.0.2.tgz#97a1119649b211ad33691d9f9f486a8ec9fbe0a3" - amdefine@>=0.0.4: version "1.0.1" resolved "https://registry.yarnpkg.com/amdefine/-/amdefine-1.0.1.tgz#4a5282ac164729e93619bcfd3ad151f817ce91f5" -ansi-escapes@^3.0.0: - version "3.0.0" - resolved "https://registry.yarnpkg.com/ansi-escapes/-/ansi-escapes-3.0.0.tgz#ec3e8b4e9f8064fc02c3ac9b65f1c275bda8ef92" +ansi-escapes@^3.2.0: + version "3.2.0" + resolved "https://registry.yarnpkg.com/ansi-escapes/-/ansi-escapes-3.2.0.tgz#8780b98ff9dbf5638152d1f1fe5c1d7b4442976b" + integrity sha512-cBhpre4ma+U0T1oM5fXg7Dy1Jw7zzwv7lt/GoCpr+hDQJoYnKVPLL4dCvSEFMmQurOQvSrwT7SL/DAlhBI97RQ== ansi-html@0.0.7: version "0.0.7" @@ -107,16 +274,24 @@ ansi-regex@^3.0.0: version "3.0.0" resolved "https://registry.yarnpkg.com/ansi-regex/-/ansi-regex-3.0.0.tgz#ed0317c322064f79466c02966bddb605ab37d998" -ansi-styles@^2.2.1: - version "2.2.1" - resolved "https://registry.yarnpkg.com/ansi-styles/-/ansi-styles-2.2.1.tgz#b432dd3358b634cf75e1e4664368240533c1ddbe" +ansi-regex@^4.1.0: + version "4.1.0" + resolved "https://registry.yarnpkg.com/ansi-regex/-/ansi-regex-4.1.0.tgz#8b9f8f08cf1acb843756a839ca8c7e3168c51997" + integrity sha512-1apePfXM1UOSqw0o9IiFAovVz9M5S1Dg+4TrDwfMewQ6p/rmMueb7tWZjQ1rx4Loy1ArBggoqGpfqqdI4rondg== -ansi-styles@^3.1.0, ansi-styles@^3.2.0: +ansi-styles@^3.2.0: version "3.2.0" resolved "https://registry.yarnpkg.com/ansi-styles/-/ansi-styles-3.2.0.tgz#c159b8d5be0f9e5a6f346dab94f16ce022161b88" dependencies: color-convert "^1.9.0" +ansi-styles@^3.2.1: + version "3.2.1" + resolved "https://registry.yarnpkg.com/ansi-styles/-/ansi-styles-3.2.1.tgz#41fbb20243e50b12be0f04b8dedbf07520ce841d" + integrity sha512-VT0ZI6kZRdTh8YyJw3SMbYm/u+NqfsAxEpWO0Pf9sq8/e94WxxOpPKx9FR1FlyCtOVDNOQ+8ntlqFxiRc+r5qA== + dependencies: + color-convert "^1.9.0" + ansicolors@~0.2.1: version "0.2.1" resolved "https://registry.yarnpkg.com/ansicolors/-/ansicolors-0.2.1.tgz#be089599097b74a5c9c4a84a0cdbcdb62bd87aef" @@ -190,6 +365,11 @@ array-flatten@^2.1.0: version "2.1.1" resolved "https://registry.yarnpkg.com/array-flatten/-/array-flatten-2.1.1.tgz#426bb9da84090c1838d812c8150af20a8331e296" +array-from@^2.1.1: + version "2.1.1" + resolved "https://registry.yarnpkg.com/array-from/-/array-from-2.1.1.tgz#cfe9d8c26628b9dc5aecc62a9f5d8f1f352c1195" + integrity sha1-z+nYwmYoudxa7MYqn12PHzUsEZU= + array-includes@^3.0.3: version "3.0.3" resolved "https://registry.yarnpkg.com/array-includes/-/array-includes-3.0.3.tgz#184b48f62d92d7452bb31b323165c7f8bd02266d" @@ -223,7 +403,7 @@ array-unique@^0.3.2: version "0.3.2" resolved "https://registry.yarnpkg.com/array-unique/-/array-unique-0.3.2.tgz#a894b75d4bc4f6cd679ef3244a9fd8f46ae2d428" -arrify@^1.0.0, arrify@^1.0.1: +arrify@^1.0.1: version "1.0.1" resolved "https://registry.yarnpkg.com/arrify/-/arrify-1.0.1.tgz#898508da2226f380df904728456849c1501a4b0d" @@ -269,6 +449,11 @@ ast-types@0.9.6: version "0.9.6" resolved "https://registry.yarnpkg.com/ast-types/-/ast-types-0.9.6.tgz#102c9e9e9005d3e7e3829bf0c4fa24ee862ee9b9" +astral-regex@^1.0.0: + version "1.0.0" + resolved "https://registry.yarnpkg.com/astral-regex/-/astral-regex-1.0.0.tgz#6c8c3fb827dd43ee3918f27b82782ab7658a6fd9" + integrity sha512-+Ryf6g3BKoRc7jfp7ad8tM4TtMiaWvbF/1/sQcZPkkS7ag3D5nMBCe2UfOTONtAkaG0tO0ij3C5Lwmf1EiyjHg== + async-each@^1.0.0: version "1.0.1" resolved "https://registry.yarnpkg.com/async-each/-/async-each-1.0.1.tgz#19d386a1d9edc6e7c1c85d388aedbcc56d33602d" @@ -295,17 +480,6 @@ atob@^2.0.0: version "2.0.3" resolved "https://registry.yarnpkg.com/atob/-/atob-2.0.3.tgz#19c7a760473774468f20b2d2d03372ad7d4cbf5d" -autoprefixer@^6.3.1: - version "6.7.7" - resolved "https://registry.yarnpkg.com/autoprefixer/-/autoprefixer-6.7.7.tgz#1dbd1c835658e35ce3f9984099db00585c782014" - dependencies: - browserslist "^1.7.6" - caniuse-db "^1.0.30000634" - normalize-range "^0.1.2" - num2fraction "^1.2.2" - postcss "^5.2.16" - postcss-value-parser "^3.2.3" - aws-sdk-mock@^1.7.0: version "1.7.0" resolved "https://registry.yarnpkg.com/aws-sdk-mock/-/aws-sdk-mock-1.7.0.tgz#7698b3ba82f493f71ff060ae2123cd0806ad8676" @@ -336,18 +510,6 @@ aws4@^1.2.1: version "1.6.0" resolved "https://registry.yarnpkg.com/aws4/-/aws4-1.6.0.tgz#83ef5ca860b2b32e4a0deedee8c771b9db57471e" -babel-code-frame@^6.22.0, babel-code-frame@^6.26.0: - version "6.26.0" - resolved "https://registry.yarnpkg.com/babel-code-frame/-/babel-code-frame-6.26.0.tgz#63fd43f7dc1e3bb7ce35947db8fe369a3f58c74b" - dependencies: - chalk "^1.1.3" - esutils "^2.0.2" - js-tokens "^3.0.2" - -balanced-match@^0.4.2: - version "0.4.2" - resolved "https://registry.yarnpkg.com/balanced-match/-/balanced-match-0.4.2.tgz#cb3f3e3c732dc0f01ee70b403f302e61d7709838" - balanced-match@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/balanced-match/-/balanced-match-1.0.0.tgz#89b4d199ab2bee49de164ea02b89ce462d71b767" @@ -384,18 +546,32 @@ bcrypt-pbkdf@^1.0.0: dependencies: tweetnacl "^0.14.3" -big-integer@^1.6.25: - version "1.6.26" - resolved "https://registry.yarnpkg.com/big-integer/-/big-integer-1.6.26.tgz#3af1672fa62daf2d5ecafacf6e5aa0d25e02c1c8" +big-integer@1.6.43: + version "1.6.43" + resolved "https://registry.yarnpkg.com/big-integer/-/big-integer-1.6.43.tgz#8ac15bf13e93e509500859061233e19d8d0d99d1" + integrity sha512-9dULc9jsKmXl0Aeunug8wbF+58n+hQoFjqClN7WeZwGLh0XJUWyJJ9Ee+Ep+Ql/J9fRsTVaeThp8MhiCCrY0Jg== big.js@^3.1.3: version "3.2.0" resolved "https://registry.yarnpkg.com/big.js/-/big.js-3.2.0.tgz#a5fc298b81b9e0dca2e458824784b65c52ba588e" +big.js@^5.2.2: + version "5.2.2" + resolved "https://registry.yarnpkg.com/big.js/-/big.js-5.2.2.tgz#65f0af382f578bcdc742bd9c281e9cb2d7768328" + integrity sha512-vyL2OymJxmarO8gxMr0mhChsO9QGwhynfuu4+MHTAW6czfq9humCB7rKpUjDd9YUiDPU4mzpyupFSvOClAwbmQ== + binary-extensions@^1.0.0: version "1.11.0" resolved "https://registry.yarnpkg.com/binary-extensions/-/binary-extensions-1.11.0.tgz#46aa1751fb6a2f93ee5e689bb1087d4b14c6c205" +bl@^1.0.0: + version "1.2.2" + resolved "https://registry.yarnpkg.com/bl/-/bl-1.2.2.tgz#a160911717103c07410cef63ef51b397c025af9c" + integrity sha512-e8tQYnZodmebYDWGH7KMRvtzKXaJHx3BbilrgZCfvyLUYdKpK1t5PSPmpkny/SgiTSCnjfLW7v5rlONXVFkQEA== + dependencies: + readable-stream "^2.3.5" + safe-buffer "^5.1.1" + block-stream@*: version "0.0.9" resolved "https://registry.yarnpkg.com/block-stream/-/block-stream-0.0.9.tgz#13ebfe778a03205cfe03751481ebb4b3300c126a" @@ -442,13 +618,15 @@ boom@2.x.x: dependencies: hoek "2.x.x" -bootstrap-slider@^9.9.0: - version "9.10.0" - resolved "https://registry.yarnpkg.com/bootstrap-slider/-/bootstrap-slider-9.10.0.tgz#1103d6bc00cfbfa8cfc9a2599ab518c55643da3f" +bootstrap-slider@10.6.1: + version "10.6.1" + resolved "https://registry.yarnpkg.com/bootstrap-slider/-/bootstrap-slider-10.6.1.tgz#d9e4b1c327fa4eafc34a52ec01fc4e58b5266889" + integrity sha512-lA6SwGr33YcKHtpt0lYjwspc4RCgM2bdrFdHU1U77Lal6gZGjVF/Ii9/Mff0b1dyZ4RvSAzaOlSsuY1d5wCtdA== -bootstrap@^4.1.3: +bootstrap@4.1.3: version "4.1.3" resolved "https://registry.yarnpkg.com/bootstrap/-/bootstrap-4.1.3.tgz#0eb371af2c8448e8c210411d0cb824a6409a12be" + integrity sha512-rDFIzgXcof0jDyjNosjv4Sno77X4KuPeFxG2XZZv1/Kc8DRVGVADdoQyyOVDwPqL36DDmtCQbrpMCqvpPLJQ0w== brace-expansion@^1.1.7: version "1.1.8" @@ -485,9 +663,10 @@ brorand@^1.0.1: version "1.1.0" resolved "https://registry.yarnpkg.com/brorand/-/brorand-1.1.0.tgz#12c25efe40a45e3c323eb8675a0a0ce57b22371f" -browser-stdout@1.3.0: - version "1.3.0" - resolved "https://registry.yarnpkg.com/browser-stdout/-/browser-stdout-1.3.0.tgz#f351d32969d32fa5d7a5567154263d928ae3bd1f" +browser-stdout@1.3.1: + version "1.3.1" + resolved "https://registry.yarnpkg.com/browser-stdout/-/browser-stdout-1.3.1.tgz#baa559ee14ced73452229bad7326467c61fabd60" + integrity sha512-qhAVI1+Av2X7qelOfAIYwXONood6XlZE/fXaBSmW/T5SzLAmCgzi+eiWE7fUvbHaeNBQH13UftjpXxsfLkMpgw== browserify-aes@^1.0.0, browserify-aes@^1.0.4: version "1.1.1" @@ -541,12 +720,23 @@ browserify-zlib@^0.2.0: dependencies: pako "~1.0.5" -browserslist@^1.3.6, browserslist@^1.5.2, browserslist@^1.7.6: - version "1.7.7" - resolved "https://registry.yarnpkg.com/browserslist/-/browserslist-1.7.7.tgz#0bd76704258be829b2398bb50e4b62d1a166b0b9" +buffer-alloc-unsafe@^1.1.0: + version "1.1.0" + resolved "https://registry.yarnpkg.com/buffer-alloc-unsafe/-/buffer-alloc-unsafe-1.1.0.tgz#bd7dc26ae2972d0eda253be061dba992349c19f0" + integrity sha512-TEM2iMIEQdJ2yjPJoSIsldnleVaAk1oW3DBVUykyOLsEsFmEc9kn+SFFPz+gl54KQNxlDnAwCXosOS9Okx2xAg== + +buffer-alloc@^1.2.0: + version "1.2.0" + resolved "https://registry.yarnpkg.com/buffer-alloc/-/buffer-alloc-1.2.0.tgz#890dd90d923a873e08e10e5fd51a57e5b7cce0ec" + integrity sha512-CFsHQgjtW1UChdXgbyJGtnm+O/uLQeZdtbDo8mfUgYXCHSM1wgrVxXm6bSyrUuErEb+4sYVGCzASBRot7zyrow== dependencies: - caniuse-db "^1.0.30000639" - electron-to-chromium "^1.2.7" + buffer-alloc-unsafe "^1.1.0" + buffer-fill "^1.0.0" + +buffer-fill@^1.0.0: + version "1.0.0" + resolved "https://registry.yarnpkg.com/buffer-fill/-/buffer-fill-1.0.0.tgz#f8f78b76789888ef39f205cd637f68e702122b2c" + integrity sha1-+PeLdniYiO858gXNY39o5wISKyw= buffer-indexof@^1.0.0: version "1.1.1" @@ -608,15 +798,10 @@ cache-base@^1.0.1: union-value "^1.0.0" unset-value "^1.0.0" -caller-path@^0.1.0: - version "0.1.0" - resolved "https://registry.yarnpkg.com/caller-path/-/caller-path-0.1.0.tgz#94085ef63581ecd3daa92444a8fe94e82577751f" - dependencies: - callsites "^0.2.0" - -callsites@^0.2.0: - version "0.2.0" - resolved "https://registry.yarnpkg.com/callsites/-/callsites-0.2.0.tgz#afab96262910a7f33c19a5775825c69f34e350ca" +callsites@^3.0.0: + version "3.1.0" + resolved "https://registry.yarnpkg.com/callsites/-/callsites-3.1.0.tgz#b3630abd8943432f54b3f0519238e33cd7df2f73" + integrity sha512-P8BjAsXvZS+VIDUI11hHCQEv74YT67YUi5JJFNWIqL235sBmjX4+qx9Muvls5ivyNENctx46xQLQ3aTuE7ssaQ== camel-case@3.0.x: version "3.0.0" @@ -648,19 +833,6 @@ camelcase@^4.1.0: version "4.1.0" resolved "https://registry.yarnpkg.com/camelcase/-/camelcase-4.1.0.tgz#d545635be1e33c542649c69173e5de6acfae34dd" -caniuse-api@^1.5.2: - version "1.6.1" - resolved "https://registry.yarnpkg.com/caniuse-api/-/caniuse-api-1.6.1.tgz#b534e7c734c4f81ec5fbe8aca2ad24354b962c6c" - dependencies: - browserslist "^1.3.6" - caniuse-db "^1.0.30000529" - lodash.memoize "^4.1.2" - lodash.uniq "^4.5.0" - -caniuse-db@^1.0.30000529, caniuse-db@^1.0.30000634, caniuse-db@^1.0.30000639: - version "1.0.30000794" - resolved "https://registry.yarnpkg.com/caniuse-db/-/caniuse-db-1.0.30000794.tgz#bbe71104fa277ce4b362387d54905e8b88e52f35" - cardinal@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/cardinal/-/cardinal-1.0.0.tgz#50e21c1b0aa37729f9377def196b5a9cec932ee9" @@ -685,15 +857,18 @@ chai-as-promised@^7.1.1: dependencies: check-error "^1.0.2" -chai-http@^3.0.0: - version "3.0.0" - resolved "https://registry.yarnpkg.com/chai-http/-/chai-http-3.0.0.tgz#5460d8036e1f1a12b0b5b5cbd529e6dc1d31eb4b" +chai-http@^4.2.1: + version "4.2.1" + resolved "https://registry.yarnpkg.com/chai-http/-/chai-http-4.2.1.tgz#d4db6ae491e46b7d5029b2c103b6af45cd5ae290" + integrity sha512-S2Ezy5uSVuOYleeXppfUKtTU/xbHCZyKkwjheNJ/76SGFTUPDpDkkpVdPNgC3sAO1Ap5J5LJ+/rXdLG8EGhCDA== dependencies: - cookiejar "2.0.x" - is-ip "1.0.0" + "@types/chai" "4" + "@types/superagent" "^3.8.3" + cookiejar "^2.1.1" + is-ip "^2.0.0" methods "^1.1.2" - qs "^6.2.0" - superagent "^2.0.0" + qs "^6.5.1" + superagent "^3.7.0" chai@3.5.x, "chai@>=1.9.2 <4.0.0": version "3.5.0" @@ -703,16 +878,6 @@ chai@3.5.x, "chai@>=1.9.2 <4.0.0": deep-eql "^0.1.3" type-detect "^1.0.0" -chalk@^1.1.3: - version "1.1.3" - resolved "https://registry.yarnpkg.com/chalk/-/chalk-1.1.3.tgz#a8115c55e4a702fe4d150abd3872822a7e09fc98" - dependencies: - ansi-styles "^2.2.1" - escape-string-regexp "^1.0.2" - has-ansi "^2.0.0" - strip-ansi "^3.0.0" - supports-color "^2.0.0" - chalk@^2.0.0, chalk@^2.1.0: version "2.3.1" resolved "https://registry.yarnpkg.com/chalk/-/chalk-2.3.1.tgz#523fe2678aec7b04e8041909292fe8b17059b796" @@ -721,13 +886,14 @@ chalk@^2.0.0, chalk@^2.1.0: escape-string-regexp "^1.0.5" supports-color "^5.2.0" -chalk@^2.3.0: - version "2.3.0" - resolved "https://registry.yarnpkg.com/chalk/-/chalk-2.3.0.tgz#b5ea48efc9c1793dccc9b4767c93914d3f2d52ba" +chalk@^2.4.2: + version "2.4.2" + resolved "https://registry.yarnpkg.com/chalk/-/chalk-2.4.2.tgz#cd42541677a54333cf541a49108c1432b44c9424" + integrity sha512-Mti+f9lpJNcwF4tWV8/OrTTtF1gZi+f8FqlyAdouralcFWFQWF2+NgCHShjkCb+IFBLq9buZwE1xckQU4peSuQ== dependencies: - ansi-styles "^3.1.0" + ansi-styles "^3.2.1" escape-string-regexp "^1.0.5" - supports-color "^4.0.0" + supports-color "^5.3.0" character-parser@^2.1.1: version "2.2.0" @@ -735,9 +901,10 @@ character-parser@^2.1.1: dependencies: is-regex "^1.0.3" -chardet@^0.4.0: - version "0.4.2" - resolved "https://registry.yarnpkg.com/chardet/-/chardet-0.4.2.tgz#b5473b33dc97c424e5d98dc87d55d4d8a29c8bf2" +chardet@^0.7.0: + version "0.7.0" + resolved "https://registry.yarnpkg.com/chardet/-/chardet-0.7.0.tgz#90094849f0937f2eedc2425d0d28a9e5f0cbad9e" + integrity sha512-mT8iDcrh03qDGRRmoA2hmBJnxpllMR+0/0qlzjqZES6NdiWDcZkCNAk4rPFZ9Q85r27unkiNNg8ZOiwZXBHwcA== check-error@^1.0.2: version "1.0.2" @@ -786,16 +953,6 @@ cipher-base@^1.0.0, cipher-base@^1.0.1, cipher-base@^1.0.3: inherits "^2.0.1" safe-buffer "^5.0.1" -circular-json@^0.3.1: - version "0.3.3" - resolved "https://registry.yarnpkg.com/circular-json/-/circular-json-0.3.3.tgz#815c99ea84f6809529d2f45791bdf82711352d66" - -clap@^1.0.9: - version "1.2.3" - resolved "https://registry.yarnpkg.com/clap/-/clap-1.2.3.tgz#4f36745b32008492557f46412d66d50cb99bce51" - dependencies: - chalk "^1.1.3" - class-utils@^0.3.5: version "0.3.6" resolved "https://registry.yarnpkg.com/class-utils/-/class-utils-0.3.6.tgz#f93369ae8b9a7ce02fd41faad0ca83033190c463" @@ -811,12 +968,12 @@ clean-css@4.1.x: dependencies: source-map "0.5.x" -clean-css@^3.3.0: - version "3.4.28" - resolved "https://registry.yarnpkg.com/clean-css/-/clean-css-3.4.28.tgz#bf1945e82fc808f55695e6ddeaec01400efd03ff" +clean-css@^4.1.11: + version "4.2.1" + resolved "https://registry.yarnpkg.com/clean-css/-/clean-css-4.2.1.tgz#2d411ef76b8569b6d0c84068dabe85b0aa5e5c17" + integrity sha512-4ZxI6dy4lrY6FHzfiy1aEOXgu4LIsW2MhwG0VBKdcoGoH/XLFgaHSdLTGr4O8Be6A8r3MOphEiI8Gc1n0ecf3g== dependencies: - commander "2.8.x" - source-map "0.4.x" + source-map "~0.6.0" cli-cursor@^2.1.0: version "2.1.0" @@ -852,20 +1009,10 @@ cliui@^3.2.0: strip-ansi "^3.0.1" wrap-ansi "^2.0.0" -clone@^1.0.2: - version "1.0.3" - resolved "https://registry.yarnpkg.com/clone/-/clone-1.0.3.tgz#298d7e2231660f40c003c2ed3140decf3f53085f" - co@^4.6.0: version "4.6.0" resolved "https://registry.yarnpkg.com/co/-/co-4.6.0.tgz#6ea6bdf3d853ae54ccb8e47bfa0bf3f9031fb184" -coa@~1.0.1: - version "1.0.4" - resolved "https://registry.yarnpkg.com/coa/-/coa-1.0.4.tgz#a9ef153660d6a86a8bdec0289a5c684d217432fd" - dependencies: - q "^1.1.2" - code-point-at@^1.0.0: version "1.1.0" resolved "https://registry.yarnpkg.com/code-point-at/-/code-point-at-1.1.0.tgz#0d070b4d043a5bea33a2f1a40e2edb3d9a4ccf77" @@ -885,67 +1032,41 @@ collection-visit@^1.0.0: map-visit "^1.0.0" object-visit "^1.0.0" -color-convert@^1.3.0, color-convert@^1.9.0: +color-convert@^1.9.0: version "1.9.1" resolved "https://registry.yarnpkg.com/color-convert/-/color-convert-1.9.1.tgz#c1261107aeb2f294ebffec9ed9ecad529a6097ed" dependencies: color-name "^1.1.1" -color-name@^1.0.0, color-name@^1.1.1: +color-name@^1.1.1: version "1.1.3" resolved "https://registry.yarnpkg.com/color-name/-/color-name-1.1.3.tgz#a7d0558bd89c42f795dd42328f740831ca53bc25" -color-string@^0.3.0: - version "0.3.0" - resolved "https://registry.yarnpkg.com/color-string/-/color-string-0.3.0.tgz#27d46fb67025c5c2fa25993bfbf579e47841b991" - dependencies: - color-name "^1.0.0" - -color@^0.11.0: - version "0.11.4" - resolved "https://registry.yarnpkg.com/color/-/color-0.11.4.tgz#6d7b5c74fb65e841cd48792ad1ed5e07b904d764" - dependencies: - clone "^1.0.2" - color-convert "^1.3.0" - color-string "^0.3.0" - -colormin@^1.0.5: - version "1.1.2" - resolved "https://registry.yarnpkg.com/colormin/-/colormin-1.1.2.tgz#ea2f7420a72b96881a38aae59ec124a6f7298133" - dependencies: - color "^0.11.0" - css-color-names "0.0.4" - has "^1.0.1" - colors@1.0.x: version "1.0.3" resolved "https://registry.yarnpkg.com/colors/-/colors-1.0.3.tgz#0433f44d809680fdeb60ed260f1b0c262e82a40b" -colors@~1.1.2: - version "1.1.2" - resolved "https://registry.yarnpkg.com/colors/-/colors-1.1.2.tgz#168a4701756b6a7f51a12ce0c97bfa28c084ed63" - combined-stream@^1.0.5, combined-stream@~1.0.5: version "1.0.5" resolved "https://registry.yarnpkg.com/combined-stream/-/combined-stream-1.0.5.tgz#938370a57b4a51dea2c77c15d5c5fdf895164009" dependencies: delayed-stream "~1.0.0" +combined-stream@^1.0.6: + version "1.0.7" + resolved "https://registry.yarnpkg.com/combined-stream/-/combined-stream-1.0.7.tgz#2d1d24317afb8abe95d6d2c0b07b57813539d828" + integrity sha512-brWl9y6vOB1xYPZcpZde3N9zDByXTosAeMDo4p1wzo6UMOX4vumB+TP1RZ76sfE6Md68Q0NJSrE/gbezd4Ul+w== + dependencies: + delayed-stream "~1.0.0" + commander@2.12.x: version "2.12.2" resolved "https://registry.yarnpkg.com/commander/-/commander-2.12.2.tgz#0f5946c427ed9ec0d91a46bb9def53e54650e555" -commander@2.8.x: - version "2.8.1" - resolved "https://registry.yarnpkg.com/commander/-/commander-2.8.1.tgz#06be367febfda0c330aa1e2a072d3dc9762425d4" - dependencies: - graceful-readlink ">= 1.0.0" - -commander@2.9.0: - version "2.9.0" - resolved "https://registry.yarnpkg.com/commander/-/commander-2.9.0.tgz#9c99094176e12240cb22d6c5146098400fe0f7d4" - dependencies: - graceful-readlink ">= 1.0.0" +commander@2.15.1: + version "2.15.1" + resolved "https://registry.yarnpkg.com/commander/-/commander-2.15.1.tgz#df46e867d0fc2aec66a34662b406a9ccafff5b0f" + integrity sha512-VlfT9F3V0v+jr4yxPc5gg9s62/fIVWsd2Bk2iD435um1NlGMYdVCq+MjcXnhYq2icNOizHr1kK+5TI6H0Hy0ag== commander@~2.13.0: version "2.13.0" @@ -988,7 +1109,7 @@ concat-map@0.0.1: version "0.0.1" resolved "https://registry.yarnpkg.com/concat-map/-/concat-map-0.0.1.tgz#d8a96bd77fd68df7793a73036a3ba0d5405d477b" -concat-stream@^1.5.0, concat-stream@^1.6.0: +concat-stream@^1.5.0: version "1.6.0" resolved "https://registry.yarnpkg.com/concat-stream/-/concat-stream-1.6.0.tgz#0aac662fd52be78964d5532f694784e70110acf7" dependencies: @@ -1037,13 +1158,10 @@ cookie@0.3.1: version "0.3.1" resolved "https://registry.yarnpkg.com/cookie/-/cookie-0.3.1.tgz#e7e0a1f9ef43b4c8ba925c5c5a96e806d16873bb" -cookiejar@2.0.x: - version "2.0.6" - resolved "https://registry.yarnpkg.com/cookiejar/-/cookiejar-2.0.6.tgz#0abf356ad00d1c5a219d88d44518046dd026acfe" - -cookiejar@^2.0.6: - version "2.1.1" - resolved "https://registry.yarnpkg.com/cookiejar/-/cookiejar-2.1.1.tgz#41ad57b1b555951ec171412a81942b1e8200d34a" +cookiejar@^2.1.0, cookiejar@^2.1.1: + version "2.1.2" + resolved "https://registry.yarnpkg.com/cookiejar/-/cookiejar-2.1.2.tgz#dd8a235530752f988f9a0844f3fc589e3111125c" + integrity sha512-Mw+adcfzPxcPeI+0WlvRrr/3lGVO0bD75SxX6811cxSh1Wbxx7xZBGK1eVtDf6si8rg2lhnUjsVLMFMfbRIuwA== copy-concurrently@^1.0.0: version "1.0.5" @@ -1121,6 +1239,17 @@ cross-spawn@^5.0.1, cross-spawn@^5.1.0: shebang-command "^1.2.0" which "^1.2.9" +cross-spawn@^6.0.5: + version "6.0.5" + resolved "https://registry.yarnpkg.com/cross-spawn/-/cross-spawn-6.0.5.tgz#4a5ec7c64dfae22c3a14124dbacdee846d80cbc4" + integrity sha512-eTVLrBSt7fjbDygz805pMnstIs2VTBNkRm0qxZd+M7A5XDdxVRWO5MxGBXZhjY4cqLYLdtrGqRf8mBPmzwSpWQ== + dependencies: + nice-try "^1.0.4" + path-key "^2.0.1" + semver "^5.5.0" + shebang-command "^1.2.0" + which "^1.2.9" + cryptiles@2.x.x: version "2.0.5" resolved "https://registry.yarnpkg.com/cryptiles/-/cryptiles-2.0.5.tgz#3bdfecdc608147c1c67202fa291e7dca59eaa3b8" @@ -1143,28 +1272,21 @@ crypto-browserify@^3.11.0: randombytes "^2.0.0" randomfill "^1.0.3" -css-color-names@0.0.4: - version "0.0.4" - resolved "https://registry.yarnpkg.com/css-color-names/-/css-color-names-0.0.4.tgz#808adc2e79cf84738069b646cb20ec27beb629e0" - -css-loader@^0.28.7: - version "0.28.9" - resolved "https://registry.yarnpkg.com/css-loader/-/css-loader-0.28.9.tgz#68064b85f4e271d7ce4c48a58300928e535d1c95" - dependencies: - babel-code-frame "^6.26.0" - css-selector-tokenizer "^0.7.0" - cssnano "^3.10.0" - icss-utils "^2.1.0" - loader-utils "^1.0.2" - lodash.camelcase "^4.3.0" - object-assign "^4.1.1" - postcss "^5.0.6" - postcss-modules-extract-imports "^1.2.0" - postcss-modules-local-by-default "^1.2.0" - postcss-modules-scope "^1.1.0" - postcss-modules-values "^1.3.0" +css-loader@^2.1.0: + version "2.1.0" + resolved "https://registry.yarnpkg.com/css-loader/-/css-loader-2.1.0.tgz#42952ac22bca5d076978638e9813abce49b8f0cc" + integrity sha512-MoOu+CStsGrSt5K2OeZ89q3Snf+IkxRfAIt9aAKg4piioTrhtP1iEFPu+OVn3Ohz24FO6L+rw9UJxBILiSBw5Q== + dependencies: + icss-utils "^4.0.0" + loader-utils "^1.2.1" + lodash "^4.17.11" + postcss "^7.0.6" + postcss-modules-extract-imports "^2.0.0" + postcss-modules-local-by-default "^2.0.3" + postcss-modules-scope "^2.0.0" + postcss-modules-values "^2.0.0" postcss-value-parser "^3.3.0" - source-list-map "^2.0.0" + schema-utils "^1.0.0" css-selector-tokenizer@^0.7.0: version "0.7.0" @@ -1178,50 +1300,6 @@ cssesc@^0.1.0: version "0.1.0" resolved "https://registry.yarnpkg.com/cssesc/-/cssesc-0.1.0.tgz#c814903e45623371a0477b40109aaafbeeaddbb4" -cssnano@^3.10.0: - version "3.10.0" - resolved "https://registry.yarnpkg.com/cssnano/-/cssnano-3.10.0.tgz#4f38f6cea2b9b17fa01490f23f1dc68ea65c1c38" - dependencies: - autoprefixer "^6.3.1" - decamelize "^1.1.2" - defined "^1.0.0" - has "^1.0.1" - object-assign "^4.0.1" - postcss "^5.0.14" - postcss-calc "^5.2.0" - postcss-colormin "^2.1.8" - postcss-convert-values "^2.3.4" - postcss-discard-comments "^2.0.4" - postcss-discard-duplicates "^2.0.1" - postcss-discard-empty "^2.0.1" - postcss-discard-overridden "^0.1.1" - postcss-discard-unused "^2.2.1" - postcss-filter-plugins "^2.0.0" - postcss-merge-idents "^2.1.5" - postcss-merge-longhand "^2.0.1" - postcss-merge-rules "^2.0.3" - postcss-minify-font-values "^1.0.2" - postcss-minify-gradients "^1.0.1" - postcss-minify-params "^1.0.4" - postcss-minify-selectors "^2.0.4" - postcss-normalize-charset "^1.1.0" - postcss-normalize-url "^3.0.7" - postcss-ordered-values "^2.1.0" - postcss-reduce-idents "^2.2.2" - postcss-reduce-initial "^1.0.0" - postcss-reduce-transforms "^1.0.3" - postcss-svgo "^2.1.1" - postcss-unique-selectors "^2.0.2" - postcss-value-parser "^3.2.3" - postcss-zindex "^2.0.1" - -csso@~2.3.1: - version "2.3.2" - resolved "https://registry.yarnpkg.com/csso/-/csso-2.3.2.tgz#ddd52c587033f49e94b71fc55569f252e8ff5f85" - dependencies: - clap "^1.0.9" - source-map "^0.5.3" - csv-parse@^2.0.0: version "2.0.0" resolved "https://registry.yarnpkg.com/csv-parse/-/csv-parse-2.0.0.tgz#4ea22c973233987f07688c601a2d460234ff56d1" @@ -1256,24 +1334,25 @@ date-now@^0.1.4: version "0.1.4" resolved "https://registry.yarnpkg.com/date-now/-/date-now-0.1.4.tgz#eaf439fd4d4848ad74e5cc7dbef200672b9e345b" -debug@2.6.8: - version "2.6.8" - resolved "https://registry.yarnpkg.com/debug/-/debug-2.6.8.tgz#e731531ca2ede27d188222427da17821d68ff4fc" - dependencies: - ms "2.0.0" - debug@2.6.9, debug@^2.2.0, debug@^2.3.3, debug@^2.6.6, debug@^2.6.8: version "2.6.9" resolved "https://registry.yarnpkg.com/debug/-/debug-2.6.9.tgz#5d128515df134ff327e90a4c93f4e077a536341f" dependencies: ms "2.0.0" -debug@^3.1.0: +debug@3.1.0, debug@^3.1.0: version "3.1.0" resolved "https://registry.yarnpkg.com/debug/-/debug-3.1.0.tgz#5bb5a0672628b64149566ba16819e61518c67261" dependencies: ms "2.0.0" +debug@^4.0.1: + version "4.1.1" + resolved "https://registry.yarnpkg.com/debug/-/debug-4.1.1.tgz#3b72260255109c6b589cee050f1d516139664791" + integrity sha512-pYAIzeRo8J6KPEaJ0VWOh5Pzkbw/RetuzehGM7QRRX5he4fPHx2rdKMB256ehJCkX+XRQm16eZLqLNS8RSZXZw== + dependencies: + ms "^2.1.1" + decamelize@^1.0.0, decamelize@^1.1.1, decamelize@^1.1.2: version "1.2.0" resolved "https://registry.yarnpkg.com/decamelize/-/decamelize-1.2.0.tgz#f6534d15148269b20352e7bee26f501f9a191290" @@ -1319,22 +1398,6 @@ define-property@^1.0.0: dependencies: is-descriptor "^1.0.0" -defined@^1.0.0: - version "1.0.0" - resolved "https://registry.yarnpkg.com/defined/-/defined-1.0.0.tgz#c98d9bcef75674188e110969151199e39b1fa693" - -del@^2.0.2: - version "2.2.2" - resolved "https://registry.yarnpkg.com/del/-/del-2.2.2.tgz#c12c981d067846c84bcaf862cff930d907ffd1a8" - dependencies: - globby "^5.0.0" - is-path-cwd "^1.0.0" - is-path-in-cwd "^1.0.0" - object-assign "^4.0.1" - pify "^2.0.0" - pinkie-promise "^2.0.0" - rimraf "^2.2.8" - del@^3.0.0: version "3.0.0" resolved "https://registry.yarnpkg.com/del/-/del-3.0.0.tgz#53ecf699ffcbcb39637691ab13baf160819766e5" @@ -1366,7 +1429,7 @@ depd@1.1.1: version "1.1.1" resolved "https://registry.yarnpkg.com/depd/-/depd-1.1.1.tgz#5783b4e1c459f06fa5ca27f991f3d06e7a310359" -depd@~1.1.1: +depd@~1.1.1, depd@~1.1.2: version "1.1.2" resolved "https://registry.yarnpkg.com/depd/-/depd-1.1.2.tgz#9bcd52e14c097763e749b274c4346ed2e560b5a9" @@ -1389,9 +1452,10 @@ detect-node@^2.0.3: version "2.0.3" resolved "https://registry.yarnpkg.com/detect-node/-/detect-node-2.0.3.tgz#a2033c09cc8e158d37748fbde7507832bd6ce127" -diff@3.2.0: - version "3.2.0" - resolved "https://registry.yarnpkg.com/diff/-/diff-3.2.0.tgz#c9ce393a4b7cbd0b058a725c93df299027868ff9" +diff@3.5.0, diff@^3.5.0: + version "3.5.0" + resolved "https://registry.yarnpkg.com/diff/-/diff-3.5.0.tgz#800c0dd1e0a8bfbc95835c202ad220fe317e5a12" + integrity sha512-A46qtFgd+g7pDZinpnwiRJtxbC1hpgf0uzP3iG89scHk0AUC7A1TGxf5OiiOUv/JMZR8GOt8hL900hV0bOy5xA== diffie-hellman@^5.0.0: version "5.0.2" @@ -1425,9 +1489,10 @@ dns-txt@^2.0.2: dependencies: buffer-indexof "^1.0.0" -doctrine@^2.1.0: - version "2.1.0" - resolved "https://registry.yarnpkg.com/doctrine/-/doctrine-2.1.0.tgz#5cd01fc101621b42c4cd7f5d1a66243716d3f39d" +doctrine@^3.0.0: + version "3.0.0" + resolved "https://registry.yarnpkg.com/doctrine/-/doctrine-3.0.0.tgz#addebead72a6574db783639dc87a121773973961" + integrity sha512-yS+Q5i3hBf7GBkd4KG8a7eBNNWNGLTaEwwYWUijIYM7zrlYDM0BFXHjjPWlWZ1Rg7UaddZeIDmi9jF3HmqiQ2w== dependencies: esutils "^2.0.2" @@ -1458,10 +1523,6 @@ ee-first@1.1.1: version "1.1.1" resolved "https://registry.yarnpkg.com/ee-first/-/ee-first-1.1.1.tgz#590c61156b0ae2f4f0255732a158b266bc56b21d" -electron-to-chromium@^1.2.7: - version "1.3.31" - resolved "https://registry.yarnpkg.com/electron-to-chromium/-/electron-to-chromium-1.3.31.tgz#00d832cba9fe2358652b0c48a8816c8e3a037e9f" - elliptic@^6.0.0: version "6.4.0" resolved "https://registry.yarnpkg.com/elliptic/-/elliptic-6.4.0.tgz#cac9af8762c85836187003c8dfe193e5e2eae5df" @@ -1478,6 +1539,11 @@ emitter-component@^1.1.1: version "1.1.1" resolved "https://registry.yarnpkg.com/emitter-component/-/emitter-component-1.1.1.tgz#065e2dbed6959bf470679edabeaf7981d1003ab6" +emoji-regex@^7.0.1: + version "7.0.3" + resolved "https://registry.yarnpkg.com/emoji-regex/-/emoji-regex-7.0.3.tgz#933a04052860c85e83c122479c4748a8e4c72156" + integrity sha512-CwBLREIQ7LvYFB0WyRvwhq5N5qPhc6PMjD6bYggFlI5YyDgl+0vxq5VHbMOFqLg7hfWzmu8T5Z1QofhmTIhItA== + emojis-list@^2.0.0: version "2.1.0" resolved "https://registry.yarnpkg.com/emojis-list/-/emojis-list-2.1.0.tgz#4daa4d9db00f9819880c79fa457ae5b09a1fd389" @@ -1557,9 +1623,20 @@ es6-map@^0.1.3: es6-symbol "~3.1.1" event-emitter "~0.3.5" -es6-promise@^4.1.1: - version "4.2.4" - resolved "https://registry.yarnpkg.com/es6-promise/-/es6-promise-4.2.4.tgz#dc4221c2b16518760bd8c39a52d8f356fc00ed29" +es6-promise@4.2.6: + version "4.2.6" + resolved "https://registry.yarnpkg.com/es6-promise/-/es6-promise-4.2.6.tgz#b685edd8258886365ea62b57d30de28fadcd974f" + integrity sha512-aRVgGdnmW2OiySVPUC9e6m+plolMAJKjZnQlCwNSuK5yQ0JN61DZSO1X1Ufd1foqWRAlig0rhduTCHe7sVtK5Q== + +es6-promise@^4.0.3: + version "4.2.5" + resolved "https://registry.yarnpkg.com/es6-promise/-/es6-promise-4.2.5.tgz#da6d0d5692efb461e082c14817fe2427d8f5d054" + +es6-promisify@^5.0.0: + version "5.0.0" + resolved "http://registry.npmjs.org/es6-promisify/-/es6-promisify-5.0.0.tgz#5109d62f3e56ea967c4b63505aef08291c8a5203" + dependencies: + es6-promise "^4.0.3" es6-set@~0.1.5: version "0.1.5" @@ -1598,7 +1675,7 @@ escape-html@~1.0.3: version "1.0.3" resolved "https://registry.yarnpkg.com/escape-html/-/escape-html-1.0.3.tgz#0258eae4d3d0c0974de1c169188ef0051d1d1988" -escape-string-regexp@1.0.5, escape-string-regexp@^1.0.2, escape-string-regexp@^1.0.5: +escape-string-regexp@1.0.5, escape-string-regexp@^1.0.5: version "1.0.5" resolved "https://registry.yarnpkg.com/escape-string-regexp/-/escape-string-regexp-1.0.5.tgz#1b61c0562190a8dff6ae3bb2cf0200ca130b86d4" @@ -1622,67 +1699,75 @@ escope@^3.6.0: esrecurse "^4.1.0" estraverse "^4.1.1" -eslint-scope@^3.7.1: - version "3.7.1" - resolved "https://registry.yarnpkg.com/eslint-scope/-/eslint-scope-3.7.1.tgz#3d63c3edfda02e06e01a452ad88caacc7cdcb6e8" +eslint-scope@^4.0.3: + version "4.0.3" + resolved "https://registry.yarnpkg.com/eslint-scope/-/eslint-scope-4.0.3.tgz#ca03833310f6889a3264781aa82e63eb9cfe7848" + integrity sha512-p7VutNr1O/QrxysMo3E45FjYDTeXBy0iTltPFNSqKAIfjDSXC+4dj+qfyuD8bfAXrW/y6lW3O76VaYNPKfpKrg== dependencies: esrecurse "^4.1.0" estraverse "^4.1.1" +eslint-utils@^1.3.1: + version "1.3.1" + resolved "https://registry.yarnpkg.com/eslint-utils/-/eslint-utils-1.3.1.tgz#9a851ba89ee7c460346f97cf8939c7298827e512" + integrity sha512-Z7YjnIldX+2XMcjr7ZkgEsOj/bREONV60qYeB/bjMAqqqZ4zxKyWX+BOUkdmRmA9riiIPVvo5x86m5elviOk0Q== + eslint-visitor-keys@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/eslint-visitor-keys/-/eslint-visitor-keys-1.0.0.tgz#3f3180fb2e291017716acb4c9d6d5b5c34a6a81d" -eslint@^4.17.0: - version "4.17.0" - resolved "https://registry.yarnpkg.com/eslint/-/eslint-4.17.0.tgz#dc24bb51ede48df629be7031c71d9dc0ee4f3ddf" +eslint@5.16.0: + version "5.16.0" + resolved "https://registry.yarnpkg.com/eslint/-/eslint-5.16.0.tgz#a1e3ac1aae4a3fbd8296fcf8f7ab7314cbb6abea" + integrity sha512-S3Rz11i7c8AA5JPv7xAH+dOyq/Cu/VXHiHXBPOU1k/JAM5dXqQPt3qcrhpHSorXmrpu2g0gkIBVXAqCpzfoZIg== dependencies: - ajv "^5.3.0" - babel-code-frame "^6.22.0" + "@babel/code-frame" "^7.0.0" + ajv "^6.9.1" chalk "^2.1.0" - concat-stream "^1.6.0" - cross-spawn "^5.1.0" - debug "^3.1.0" - doctrine "^2.1.0" - eslint-scope "^3.7.1" + cross-spawn "^6.0.5" + debug "^4.0.1" + doctrine "^3.0.0" + eslint-scope "^4.0.3" + eslint-utils "^1.3.1" eslint-visitor-keys "^1.0.0" - espree "^3.5.2" - esquery "^1.0.0" + espree "^5.0.1" + esquery "^1.0.1" esutils "^2.0.2" - file-entry-cache "^2.0.0" + file-entry-cache "^5.0.1" functional-red-black-tree "^1.0.1" glob "^7.1.2" - globals "^11.0.1" - ignore "^3.3.3" + globals "^11.7.0" + ignore "^4.0.6" + import-fresh "^3.0.0" imurmurhash "^0.1.4" - inquirer "^3.0.6" - is-resolvable "^1.0.0" - js-yaml "^3.9.1" + inquirer "^6.2.2" + js-yaml "^3.13.0" json-stable-stringify-without-jsonify "^1.0.1" levn "^0.3.0" - lodash "^4.17.4" - minimatch "^3.0.2" + lodash "^4.17.11" + minimatch "^3.0.4" mkdirp "^0.5.1" natural-compare "^1.4.0" optionator "^0.8.2" path-is-inside "^1.0.2" - pluralize "^7.0.0" progress "^2.0.0" - require-uncached "^1.0.3" - semver "^5.3.0" + regexpp "^2.0.1" + semver "^5.5.1" strip-ansi "^4.0.0" - strip-json-comments "~2.0.1" - table "^4.0.1" - text-table "~0.2.0" + strip-json-comments "^2.0.1" + table "^5.2.3" + text-table "^0.2.0" -espree@^3.5.2: - version "3.5.3" - resolved "https://registry.yarnpkg.com/espree/-/espree-3.5.3.tgz#931e0af64e7fbbed26b050a29daad1fc64799fa6" +espree@^5.0.1: + version "5.0.1" + resolved "https://registry.yarnpkg.com/espree/-/espree-5.0.1.tgz#5d6526fa4fc7f0788a5cf75b15f30323e2f81f7a" + integrity sha512-qWAZcWh4XE/RwzLJejfcofscgMc9CamR6Tn1+XRXNzrvUSSbiAjGOI/fggztjIi7y9VLPqnICMIPiGyr8JaZ0A== dependencies: - acorn "^5.4.0" - acorn-jsx "^3.0.0" + acorn "^6.0.7" + acorn-jsx "^5.0.0" + eslint-visitor-keys "^1.0.0" -esprima@2.7.x, esprima@^2.6.0, esprima@^2.7.1: +esprima@2.7.x, esprima@^2.7.1: version "2.7.3" resolved "https://registry.yarnpkg.com/esprima/-/esprima-2.7.3.tgz#96e3b70d5779f6ad49cd032673d1c312767ba581" @@ -1698,9 +1783,10 @@ esprima@~3.1.0: version "3.1.3" resolved "https://registry.yarnpkg.com/esprima/-/esprima-3.1.3.tgz#fdca51cee6133895e3c88d535ce49dbff62a4633" -esquery@^1.0.0: - version "1.0.0" - resolved "https://registry.yarnpkg.com/esquery/-/esquery-1.0.0.tgz#cfba8b57d7fba93f17298a8a006a04cda13d80fa" +esquery@^1.0.1: + version "1.0.1" + resolved "https://registry.yarnpkg.com/esquery/-/esquery-1.0.1.tgz#406c51658b1f5991a5f9b62b1dc25b00e3e5c708" + integrity sha512-SmiyZ5zIWH9VM+SRUReLS5Q8a7GxtRdxEBVZpm98rJM7Sb+A9DVCndXfkeFUd3byderg+EbDkfnevfCwynWaNA== dependencies: estraverse "^4.0.0" @@ -1843,12 +1929,13 @@ extend@^3.0.0, extend@~3.0.0: version "3.0.1" resolved "https://registry.yarnpkg.com/extend/-/extend-3.0.1.tgz#a755ea7bc1adfcc5a31ce7e762dbaadc5e636444" -external-editor@^2.0.4: - version "2.1.0" - resolved "https://registry.yarnpkg.com/external-editor/-/external-editor-2.1.0.tgz#3d026a21b7f95b5726387d4200ac160d372c3b48" +external-editor@^3.0.3: + version "3.0.3" + resolved "https://registry.yarnpkg.com/external-editor/-/external-editor-3.0.3.tgz#5866db29a97826dbe4bf3afd24070ead9ea43a27" + integrity sha512-bn71H9+qWoOQKyZDo25mOMVpSmXROAsTJVVVYzrrtol3d4y+AsKjf4Iwl2Q+IuT0kFSQ1qo166UuIwqYq7mGnA== dependencies: - chardet "^0.4.0" - iconv-lite "^0.4.17" + chardet "^0.7.0" + iconv-lite "^0.4.24" tmp "^0.0.33" extglob@^0.3.1: @@ -1895,6 +1982,11 @@ fast-deep-equal@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/fast-deep-equal/-/fast-deep-equal-1.0.0.tgz#96256a3bc975595eb36d82e9929d060d893439ff" +fast-deep-equal@^2.0.1: + version "2.0.1" + resolved "https://registry.yarnpkg.com/fast-deep-equal/-/fast-deep-equal-2.0.1.tgz#7b05218ddf9667bf7f370bf7fdb2cb15fdd0aa49" + integrity sha1-ewUhjd+WZ79/Nwv3/bLLFf3Qqkk= + fast-json-stable-stringify@^2.0.0: version "2.0.0" resolved "https://registry.yarnpkg.com/fast-json-stable-stringify/-/fast-json-stable-stringify-2.0.0.tgz#d5142c0caee6b1189f87d3a76111064f86c8bbf2" @@ -1925,12 +2017,12 @@ figures@^2.0.0: dependencies: escape-string-regexp "^1.0.5" -file-entry-cache@^2.0.0: - version "2.0.0" - resolved "https://registry.yarnpkg.com/file-entry-cache/-/file-entry-cache-2.0.0.tgz#c392990c3e684783d838b8c84a45d8a048458361" +file-entry-cache@^5.0.1: + version "5.0.1" + resolved "https://registry.yarnpkg.com/file-entry-cache/-/file-entry-cache-5.0.1.tgz#ca0f6efa6dd3d561333fb14515065c2fafdf439c" + integrity sha512-bCg29ictuBaKUwwArK4ouCaqDgLZcysCFLmM/Yn/FDoqndh/9vNuQfXRDvTuXKLxfD/JtZQGKFT8MGcJBK644g== dependencies: - flat-cache "^1.2.1" - object-assign "^4.0.1" + flat-cache "^2.0.1" file-loader@^1.1.5: version "1.1.6" @@ -1999,18 +2091,19 @@ find-up@^2.0.0, find-up@^2.1.0: dependencies: locate-path "^2.0.0" -flat-cache@^1.2.1: - version "1.3.0" - resolved "https://registry.yarnpkg.com/flat-cache/-/flat-cache-1.3.0.tgz#d3030b32b38154f4e3b7e9c709f490f7ef97c481" +flat-cache@^2.0.1: + version "2.0.1" + resolved "https://registry.yarnpkg.com/flat-cache/-/flat-cache-2.0.1.tgz#5d296d6f04bda44a4630a301413bdbc2ec085ec0" + integrity sha512-LoQe6yDuUMDzQAEH8sgmh4Md6oZnc/7PjtwjNFSzveXqSHt6ka9fPBuso7IGf9Rz4uqnSnWiFH2B/zj24a5ReA== dependencies: - circular-json "^0.3.1" - del "^2.0.2" - graceful-fs "^4.1.2" - write "^0.2.1" + flatted "^2.0.0" + rimraf "2.6.3" + write "1.0.3" -flatten@^1.0.2: - version "1.0.2" - resolved "https://registry.yarnpkg.com/flatten/-/flatten-1.0.2.tgz#dae46a9d78fbe25292258cc1e780a41d95c03782" +flatted@^2.0.0: + version "2.0.0" + resolved "https://registry.yarnpkg.com/flatted/-/flatted-2.0.0.tgz#55122b6536ea496b4b44893ee2608141d10d9916" + integrity sha512-R+H8IZclI8AAkSBRQJLVOsxwAoHd6WC40b4QTNWIjzAa6BXOBfQcM587MXDTVPeYaopFNWHUFLx7eNmHDSxMWg== flush-write-stream@^1.0.0: version "1.0.2" @@ -2037,13 +2130,14 @@ forever-agent@~0.6.1: version "0.6.1" resolved "https://registry.yarnpkg.com/forever-agent/-/forever-agent-0.6.1.tgz#fbc71f0c41adeb37f96c577ad1ed42d8fdacca91" -form-data@1.0.0-rc4: - version "1.0.0-rc4" - resolved "https://registry.yarnpkg.com/form-data/-/form-data-1.0.0-rc4.tgz#05ac6bc22227b43e4461f488161554699d4f8b5e" +form-data@^2.3.1: + version "2.3.3" + resolved "https://registry.yarnpkg.com/form-data/-/form-data-2.3.3.tgz#dcce52c05f644f298c6a7ab936bd724ceffbf3a6" + integrity sha512-1lLKB2Mu3aGP1Q/2eCOx0fNbRMe7XdwktwOruhfqqd0rIJWwN4Dh+E3hrPSlDCXnSR7UtZ1N38rVXm+6+MEhJQ== dependencies: - async "^1.5.2" - combined-stream "^1.0.5" - mime-types "^2.1.10" + asynckit "^0.4.0" + combined-stream "^1.0.6" + mime-types "^2.1.12" form-data@~2.1.1: version "2.1.4" @@ -2059,9 +2153,10 @@ formatio@1.1.1: dependencies: samsam "~1.1" -formidable@^1.0.17: - version "1.1.1" - resolved "https://registry.yarnpkg.com/formidable/-/formidable-1.1.1.tgz#96b8886f7c3c3508b932d6bd70c4d3a88f35f1a9" +formidable@^1.2.0: + version "1.2.1" + resolved "https://registry.yarnpkg.com/formidable/-/formidable-1.2.1.tgz#70fb7ca0290ee6ff961090415f4b3df3d2082659" + integrity sha512-Fs9VRguL0gqGHkXS5GQiMCr1VhZBxz0JnJs4JmMp/2jL18Fmbzvv7vOFRU+U8TBkHEE/CX1qDXzJplVULgsLeg== forwarded@~0.1.2: version "0.1.2" @@ -2084,6 +2179,20 @@ from2@^2.1.0: inherits "^2.0.1" readable-stream "^2.0.0" +fs-constants@^1.0.0: + version "1.0.0" + resolved "https://registry.yarnpkg.com/fs-constants/-/fs-constants-1.0.0.tgz#6be0de9be998ce16af8afc24497b9ee9b7ccd9ad" + integrity sha512-y6OAwoSIf7FyjMIv94u+b5rdheZEjzR63GTyZJm5qh4Bi+2YgwLCcI/fPFZkL5PSixOt6ZNKm+w+Hfp/Bciwow== + +fs-extra@7.0.1: + version "7.0.1" + resolved "https://registry.yarnpkg.com/fs-extra/-/fs-extra-7.0.1.tgz#4f189c44aa123b895f722804f55ea23eadc348e9" + integrity sha512-YJDaCJZEnBmcbw13fvdAM9AwNOJwOzrE4pqMqBq5nFiEqXUqHwlK4B+3pUw6JNvfSPtX05xFHtYy/1ni01eGCw== + dependencies: + graceful-fs "^4.1.2" + jsonfile "^4.0.0" + universalify "^0.1.0" + fs-extra@^0.30.0: version "0.30.0" resolved "https://registry.yarnpkg.com/fs-extra/-/fs-extra-0.30.0.tgz#f233ffcc08d4da7d432daa449776989db1df93f0" @@ -2094,14 +2203,6 @@ fs-extra@^0.30.0: path-is-absolute "^1.0.0" rimraf "^2.2.8" -fs-extra@^7.0.0: - version "7.0.0" - resolved "https://registry.yarnpkg.com/fs-extra/-/fs-extra-7.0.0.tgz#8cc3f47ce07ef7b3593a11b9fb245f7e34c041d6" - dependencies: - graceful-fs "^4.1.2" - jsonfile "^4.0.0" - universalify "^0.1.0" - fs-write-stream-atomic@^1.0.8: version "1.0.10" resolved "https://registry.yarnpkg.com/fs-write-stream-atomic/-/fs-write-stream-atomic-1.0.10.tgz#b47df53493ef911df75731e70a9ded0189db40c9" @@ -2202,14 +2303,14 @@ glob-parent@^3.1.0: is-glob "^3.1.0" path-dirname "^1.0.0" -glob@7.1.1: - version "7.1.1" - resolved "https://registry.yarnpkg.com/glob/-/glob-7.1.1.tgz#805211df04faaf1c63a3600306cdf5ade50b2ec8" +glob@7.1.2, glob@^7.0.3, glob@^7.0.5, glob@^7.1.2: + version "7.1.2" + resolved "https://registry.yarnpkg.com/glob/-/glob-7.1.2.tgz#c19c9df9a028702d678612384a6552404c636d15" dependencies: fs.realpath "^1.0.0" inflight "^1.0.4" inherits "2" - minimatch "^3.0.2" + minimatch "^3.0.4" once "^1.3.0" path-is-absolute "^1.0.0" @@ -2223,9 +2324,10 @@ glob@^5.0.15: once "^1.3.0" path-is-absolute "^1.0.0" -glob@^7.0.3, glob@^7.0.5, glob@^7.1.2: - version "7.1.2" - resolved "https://registry.yarnpkg.com/glob/-/glob-7.1.2.tgz#c19c9df9a028702d678612384a6552404c636d15" +glob@^7.1.3: + version "7.1.3" + resolved "https://registry.yarnpkg.com/glob/-/glob-7.1.3.tgz#3960832d3f1574108342dafd3a67b332c0969df1" + integrity sha512-vcfuiIxogLV4DlGBHIUOwI0IbrJ8HWPc4MU7HzviGeNho/UJDfi6B5p3sHeWIQ0KGIU0Jpxi5ZHxemQfLkkAwQ== dependencies: fs.realpath "^1.0.0" inflight "^1.0.4" @@ -2234,20 +2336,10 @@ glob@^7.0.3, glob@^7.0.5, glob@^7.1.2: once "^1.3.0" path-is-absolute "^1.0.0" -globals@^11.0.1: - version "11.3.0" - resolved "https://registry.yarnpkg.com/globals/-/globals-11.3.0.tgz#e04fdb7b9796d8adac9c8f64c14837b2313378b0" - -globby@^5.0.0: - version "5.0.0" - resolved "https://registry.yarnpkg.com/globby/-/globby-5.0.0.tgz#ebd84667ca0dbb330b99bcfc68eac2bc54370e0d" - dependencies: - array-union "^1.0.1" - arrify "^1.0.0" - glob "^7.0.3" - object-assign "^4.0.1" - pify "^2.0.0" - pinkie-promise "^2.0.0" +globals@^11.7.0: + version "11.11.0" + resolved "https://registry.yarnpkg.com/globals/-/globals-11.11.0.tgz#dcf93757fa2de5486fbeed7118538adf789e9c2e" + integrity sha512-WHq43gS+6ufNOEqlrDBxVEbb8ntfXrfAUU2ZOpCxrBdGKW3gyv8mCxAfIBD0DroPKGrJ2eSsXsLtY9MPntsyTw== globby@^6.1.0: version "6.1.0" @@ -2286,13 +2378,10 @@ graceful-fs@^4.1.11, graceful-fs@^4.1.2, graceful-fs@^4.1.6, graceful-fs@^4.1.9: version "4.1.11" resolved "https://registry.yarnpkg.com/graceful-fs/-/graceful-fs-4.1.11.tgz#0e8bdfe4d1ddb8854d64e04ea7c00e2a026e5658" -"graceful-readlink@>= 1.0.0": - version "1.0.1" - resolved "https://registry.yarnpkg.com/graceful-readlink/-/graceful-readlink-1.0.1.tgz#4cafad76bc62f02fa039b2f94e9a3dd3a391a725" - -growl@1.9.2: - version "1.9.2" - resolved "https://registry.yarnpkg.com/growl/-/growl-1.9.2.tgz#0ea7743715db8d8de2c5ede1775e1b45ac85c02f" +growl@1.10.5: + version "1.10.5" + resolved "https://registry.yarnpkg.com/growl/-/growl-1.10.5.tgz#f2735dc2283674fa67478b10181059355c369e5e" + integrity sha512-qBr4OuELkhPenW6goKVXiv47US3clb3/IbuWF9KNKEijAy9oeHxU9IgzjvJhHkUzhaj7rOUD7+YGWqUjLp5oSA== hammerjs@^2.0.6, hammerjs@^2.0.8: version "2.0.8" @@ -2323,12 +2412,6 @@ har-validator@~4.2.1: ajv "^4.9.1" har-schema "^1.0.5" -has-ansi@^2.0.0: - version "2.0.0" - resolved "https://registry.yarnpkg.com/has-ansi/-/has-ansi-2.0.0.tgz#34f5049ce1ecdf2b0649af3ef24e45ed35416d91" - dependencies: - ansi-regex "^2.0.0" - has-flag@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/has-flag/-/has-flag-1.0.0.tgz#9d9e793165ce017a00f00418c43f942a7b1d11fa" @@ -2436,10 +2519,6 @@ hpack.js@^2.1.6: readable-stream "^2.0.1" wbuf "^1.1.0" -html-comment-regex@^1.1.0: - version "1.1.1" - resolved "https://registry.yarnpkg.com/html-comment-regex/-/html-comment-regex-1.1.1.tgz#668b93776eaae55ebde8f3ad464b307a4963625e" - html-entities@^1.2.0: version "1.2.1" resolved "https://registry.yarnpkg.com/html-entities/-/html-entities-1.2.1.tgz#0df29351f0721163515dfb9e5543e5f6eed5162f" @@ -2512,23 +2591,38 @@ https-browserify@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/https-browserify/-/https-browserify-1.0.0.tgz#ec06c10e0a34c0f2faf199f7fd7fc78fffd03c73" +https-proxy-agent@^2.2.1: + version "2.2.1" + resolved "https://registry.yarnpkg.com/https-proxy-agent/-/https-proxy-agent-2.2.1.tgz#51552970fa04d723e04c56d04178c3f92592bbc0" + dependencies: + agent-base "^4.1.0" + debug "^3.1.0" + humanize@^0.0.9: version "0.0.9" resolved "https://registry.yarnpkg.com/humanize/-/humanize-0.0.9.tgz#1994ffaecdfe9c441ed2bdac7452b7bb4c9e41a4" -iconv-lite@0.4.19, iconv-lite@^0.4.17: +iconv-lite@0.4.19: version "0.4.19" resolved "https://registry.yarnpkg.com/iconv-lite/-/iconv-lite-0.4.19.tgz#f7468f60135f5e5dad3399c0a81be9a1603a082b" +iconv-lite@^0.4.24: + version "0.4.24" + resolved "https://registry.yarnpkg.com/iconv-lite/-/iconv-lite-0.4.24.tgz#2022b4b25fbddc21d2f524974a474aafe733908b" + integrity sha512-v3MXnZAcvnywkTUEZomIActle7RXXeedOR31wwl7VlyoXO4Qi9arvSenNQWne1TcRwhCL1HwLI21bEqdpj8/rA== + dependencies: + safer-buffer ">= 2.1.2 < 3" + icss-replace-symbols@^1.1.0: version "1.1.0" resolved "https://registry.yarnpkg.com/icss-replace-symbols/-/icss-replace-symbols-1.1.0.tgz#06ea6f83679a7749e386cfe1fe812ae5db223ded" -icss-utils@^2.1.0: - version "2.1.0" - resolved "https://registry.yarnpkg.com/icss-utils/-/icss-utils-2.1.0.tgz#83f0a0ec378bf3246178b6c2ad9136f135b1c962" +icss-utils@^4.0.0: + version "4.0.0" + resolved "https://registry.yarnpkg.com/icss-utils/-/icss-utils-4.0.0.tgz#d52cf4bcdcfa1c45c2dbefb4ffdf6b00ef608098" + integrity sha512-bA/xGiwWM17qjllIs9X/y0EjsB7e0AV08F3OL8UPsoNkNRibIuu8f1eKTnQ8QO1DteKKTxTUAn+IEWUToIwGOA== dependencies: - postcss "^6.0.1" + postcss "^7.0.5" ieee754@^1.1.4: version "1.1.8" @@ -2538,10 +2632,23 @@ iferr@^0.1.5: version "0.1.5" resolved "https://registry.yarnpkg.com/iferr/-/iferr-0.1.5.tgz#c60eed69e6d8fdb6b3104a1fcbca1c192dc5b501" -ignore@^3.3.3, ignore@^3.3.5: +ignore@^3.3.5: version "3.3.7" resolved "https://registry.yarnpkg.com/ignore/-/ignore-3.3.7.tgz#612289bfb3c220e186a58118618d5be8c1bab021" +ignore@^4.0.6: + version "4.0.6" + resolved "https://registry.yarnpkg.com/ignore/-/ignore-4.0.6.tgz#750e3db5862087b4737ebac8207ffd1ef27b25fc" + integrity sha512-cyFDKrqc/YdcWFniJhzI42+AzS+gNwmUzOSFcRCQYwySuBBBy/KjuxWLZ/FHEH6Moq1NizMOBWyTcv8O4OZIMg== + +import-fresh@^3.0.0: + version "3.0.0" + resolved "https://registry.yarnpkg.com/import-fresh/-/import-fresh-3.0.0.tgz#a3d897f420cab0e671236897f75bc14b4885c390" + integrity sha512-pOnA9tfM3Uwics+SaBLCNyZZZbK+4PTu0OPZtLlMIrv17EdBoC15S9Kn8ckJ9TZTyKb3ywNE5y1yeDxxGA7nTQ== + dependencies: + parent-module "^1.0.0" + resolve-from "^4.0.0" + import-local@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/import-local/-/import-local-1.0.0.tgz#5e4ffdc03f4fe6c009c6729beb29631c2f8227bc" @@ -2559,10 +2666,6 @@ indent-string@^2.1.0: dependencies: repeating "^2.0.0" -indexes-of@^1.0.1: - version "1.0.1" - resolved "https://registry.yarnpkg.com/indexes-of/-/indexes-of-1.0.1.tgz#f30f716c8e2bd346c7b67d3df3915566a7c05607" - indexof@0.0.1: version "0.0.1" resolved "https://registry.yarnpkg.com/indexof/-/indexof-0.0.1.tgz#82dc336d232b9062179d05ab3293a66059fd435d" @@ -2586,23 +2689,23 @@ ini@~1.3.0: version "1.3.5" resolved "https://registry.yarnpkg.com/ini/-/ini-1.3.5.tgz#eee25f56db1c9ec6085e0c22778083f596abf927" -inquirer@^3.0.6: - version "3.3.0" - resolved "https://registry.yarnpkg.com/inquirer/-/inquirer-3.3.0.tgz#9dd2f2ad765dcab1ff0443b491442a20ba227dc9" +inquirer@^6.2.2: + version "6.2.2" + resolved "https://registry.yarnpkg.com/inquirer/-/inquirer-6.2.2.tgz#46941176f65c9eb20804627149b743a218f25406" + integrity sha512-Z2rREiXA6cHRR9KBOarR3WuLlFzlIfAEIiB45ll5SSadMg7WqOh1MKEjjndfuH5ewXdixWCxqnVfGOQzPeiztA== dependencies: - ansi-escapes "^3.0.0" - chalk "^2.0.0" + ansi-escapes "^3.2.0" + chalk "^2.4.2" cli-cursor "^2.1.0" cli-width "^2.0.0" - external-editor "^2.0.4" + external-editor "^3.0.3" figures "^2.0.0" - lodash "^4.3.0" + lodash "^4.17.11" mute-stream "0.0.7" run-async "^2.2.0" - rx-lite "^4.0.8" - rx-lite-aggregates "^4.0.8" + rxjs "^6.4.0" string-width "^2.1.0" - strip-ansi "^4.0.0" + strip-ansi "^5.0.0" through "^2.3.6" internal-ip@1.2.0: @@ -2619,9 +2722,10 @@ invert-kv@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/invert-kv/-/invert-kv-1.0.0.tgz#104a8e4aaca6d3d8cd157a8ef8bfab2d7a3ffdb6" -ip-regex@^1.0.0: - version "1.0.3" - resolved "https://registry.yarnpkg.com/ip-regex/-/ip-regex-1.0.3.tgz#dc589076f659f419c222039a33316f1c7387effd" +ip-regex@^2.0.0: + version "2.1.0" + resolved "https://registry.yarnpkg.com/ip-regex/-/ip-regex-2.1.0.tgz#fa78bf5d2e6913c911ce9f819ee5146bb6d844e9" + integrity sha1-+ni/XS5pE8kRzp+BnuUUa7bYROk= ip@^1.1.0, ip@^1.1.5: version "1.1.5" @@ -2631,10 +2735,6 @@ ipaddr.js@1.5.2: version "1.5.2" resolved "https://registry.yarnpkg.com/ipaddr.js/-/ipaddr.js-1.5.2.tgz#d4b505bde9946987ccf0fc58d9010ff9607e3fa0" -is-absolute-url@^2.0.0: - version "2.1.0" - resolved "https://registry.yarnpkg.com/is-absolute-url/-/is-absolute-url-2.1.0.tgz#50530dfb84fcc9aa7dbe7852e83a37b93b9f2aa6" - is-accessor-descriptor@^0.1.6: version "0.1.6" resolved "https://registry.yarnpkg.com/is-accessor-descriptor/-/is-accessor-descriptor-0.1.6.tgz#a9e12cb3ae8d876727eeef3843f8a0897b5c98d6" @@ -2779,11 +2879,12 @@ is-glob@^4.0.0: dependencies: is-extglob "^2.1.1" -is-ip@1.0.0: - version "1.0.0" - resolved "https://registry.yarnpkg.com/is-ip/-/is-ip-1.0.0.tgz#2bb6959f797ccd6f9fdc812758bcbc87c4c59074" +is-ip@^2.0.0: + version "2.0.0" + resolved "https://registry.yarnpkg.com/is-ip/-/is-ip-2.0.0.tgz#68eea07e8a0a0a94c2d080dd674c731ab2a461ab" + integrity sha1-aO6gfooKCpTC0IDdZ0xzGrKkYas= dependencies: - ip-regex "^1.0.0" + ip-regex "^2.0.0" is-number@^2.1.0: version "2.1.0" @@ -2819,10 +2920,6 @@ is-path-inside@^1.0.0: dependencies: path-is-inside "^1.0.1" -is-plain-obj@^1.0.0: - version "1.1.0" - resolved "https://registry.yarnpkg.com/is-plain-obj/-/is-plain-obj-1.1.0.tgz#71a50c8429dfca773c92a390a4a03b39fcd51d3e" - is-plain-object@^2.0.1, is-plain-object@^2.0.3, is-plain-object@^2.0.4: version "2.0.4" resolved "https://registry.yarnpkg.com/is-plain-object/-/is-plain-object-2.0.4.tgz#2c163b3fafb1b606d9d17928f05c2a1c38e07677" @@ -2847,20 +2944,10 @@ is-regex@^1.0.3, is-regex@^1.0.4: dependencies: has "^1.0.1" -is-resolvable@^1.0.0: - version "1.1.0" - resolved "https://registry.yarnpkg.com/is-resolvable/-/is-resolvable-1.1.0.tgz#fb18f87ce1feb925169c9a407c19318a3206ed88" - is-stream@^1.1.0: version "1.1.0" resolved "https://registry.yarnpkg.com/is-stream/-/is-stream-1.1.0.tgz#12d4a3dd4e68e0b79ceb8dbc84173ae80d91ca44" -is-svg@^2.0.0: - version "2.1.0" - resolved "https://registry.yarnpkg.com/is-svg/-/is-svg-2.1.0.tgz#cf61090da0d9efbcab8722deba6f032208dbb0e9" - dependencies: - html-comment-regex "^1.1.0" - is-symbol@^1.0.1: version "1.0.1" resolved "https://registry.yarnpkg.com/is-symbol/-/is-symbol-1.0.1.tgz#3cc59f00025194b6ab2e38dbae6689256b660572" @@ -2881,6 +2968,11 @@ is-wsl@^1.1.0: version "1.1.0" resolved "https://registry.yarnpkg.com/is-wsl/-/is-wsl-1.1.0.tgz#1f16e4aa22b04d1336b66188a66af3c600c3a66d" +isarray@0.0.1: + version "0.0.1" + resolved "https://registry.yarnpkg.com/isarray/-/isarray-0.0.1.tgz#8a18acfca9a8f4177e09abfc6038939b05d1eedf" + integrity sha1-ihis/Kmo9Bd+Cav8YDiTmwXR7t8= + isarray@1.0.0, isarray@^1.0.0, isarray@~1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/isarray/-/isarray-1.0.0.tgz#bb935d48582cba168c06834957a54a3e07124f11" @@ -2930,10 +3022,6 @@ jquery@*, jquery@^3.3.1: version "3.3.1" resolved "https://registry.yarnpkg.com/jquery/-/jquery-3.3.1.tgz#958ce29e81c9790f31be7792df5d4d95fc57fbca" -js-base64@^2.1.9: - version "2.4.2" - resolved "https://registry.yarnpkg.com/js-base64/-/js-base64-2.4.2.tgz#1896da010ef8862f385d8887648e9b6dc4a7a2e9" - js-cookie@^2.2.0: version "2.2.0" resolved "https://registry.yarnpkg.com/js-cookie/-/js-cookie-2.2.0.tgz#1b2c279a6eece380a12168b92485265b35b1effb" @@ -2942,23 +3030,25 @@ js-stringify@^1.0.1: version "1.0.2" resolved "https://registry.yarnpkg.com/js-stringify/-/js-stringify-1.0.2.tgz#1736fddfd9724f28a3682adc6230ae7e4e9679db" -js-tokens@^3.0.2: - version "3.0.2" - resolved "https://registry.yarnpkg.com/js-tokens/-/js-tokens-3.0.2.tgz#9866df395102130e38f7f996bceb65443209c25b" +js-tokens@^4.0.0: + version "4.0.0" + resolved "https://registry.yarnpkg.com/js-tokens/-/js-tokens-4.0.0.tgz#19203fb59991df98e3a287050d4647cdeaf32499" + integrity sha512-RdJUflcE3cUzKiMqQgsCu06FPu9UdIJO0beYbPhHN4k6apgJtifcoCtT9bcxOpYBtpD2kCM6Sbzg4CausW/PKQ== -js-yaml@3.x, js-yaml@^3.9.1: +js-yaml@3.x: version "3.10.0" resolved "https://registry.yarnpkg.com/js-yaml/-/js-yaml-3.10.0.tgz#2e78441646bd4682e963f22b6e92823c309c62dc" dependencies: argparse "^1.0.7" esprima "^4.0.0" -js-yaml@~3.7.0: - version "3.7.0" - resolved "https://registry.yarnpkg.com/js-yaml/-/js-yaml-3.7.0.tgz#5c967ddd837a9bfdca5f2de84253abe8a1c03b80" +js-yaml@^3.13.0: + version "3.13.1" + resolved "https://registry.yarnpkg.com/js-yaml/-/js-yaml-3.13.1.tgz#aff151b30bfdfa8e49e05da22e7415e9dfa37847" + integrity sha512-YfbcO7jXDdyj0DGxYVSlSeQNHbD7XPWvrVWeVUujrQEoZzWJIRrCPoyk6kL6IAjAG2IolMK4T0hNUe0HOUs5Jw== dependencies: argparse "^1.0.7" - esprima "^2.6.0" + esprima "^4.0.0" jsbn@~0.1.0: version "0.1.1" @@ -2976,6 +3066,11 @@ json-schema-traverse@^0.3.0: version "0.3.1" resolved "https://registry.yarnpkg.com/json-schema-traverse/-/json-schema-traverse-0.3.1.tgz#349a6d44c53a51de89b40805c5d5e59b417d3340" +json-schema-traverse@^0.4.1: + version "0.4.1" + resolved "https://registry.yarnpkg.com/json-schema-traverse/-/json-schema-traverse-0.4.1.tgz#69f6a87d9513ab8bb8fe63bdb0979c448e684660" + integrity sha512-xbbCH5dCYU5T8LcEhhuh7HJ88HXuW3qsI3Y0zOZFKfZEHcpWiHU/Jxzk629Brsab/mMiHQti9wMP+845RPe3Vg== + json-schema@0.2.3: version "0.2.3" resolved "https://registry.yarnpkg.com/json-schema/-/json-schema-0.2.3.tgz#b480c892e59a2f05954ce727bd3f2a4e882f9e13" @@ -2994,7 +3089,7 @@ json-stringify-safe@^5.0.1, json-stringify-safe@~5.0.1: version "5.0.1" resolved "https://registry.yarnpkg.com/json-stringify-safe/-/json-stringify-safe-5.0.1.tgz#1296a2d58fd45f19a0f6ce01d65701e2c735b6eb" -json3@3.3.2, json3@^3.3.2: +json3@^3.3.2: version "3.3.2" resolved "https://registry.yarnpkg.com/json3/-/json3-3.3.2.tgz#3c0434743df93e2f5c42aee7b19bcb483575f4e1" @@ -3002,6 +3097,13 @@ json5@^0.5.0, json5@^0.5.1: version "0.5.1" resolved "https://registry.yarnpkg.com/json5/-/json5-0.5.1.tgz#1eade7acc012034ad84e2396767ead9fa5495821" +json5@^1.0.1: + version "1.0.1" + resolved "https://registry.yarnpkg.com/json5/-/json5-1.0.1.tgz#779fb0018604fa854eacbf6252180d83543e3dbe" + integrity sha512-aKS4WQjPenRxiQsC93MNfjx+nbF4PAdYzmd/1JIj8HYzqfbu86beTuNgXDzPknWk0n0uARlyewZo4s++ES36Ow== + dependencies: + minimist "^1.2.0" + jsonfile@^2.1.0: version "2.4.0" resolved "https://registry.yarnpkg.com/jsonfile/-/jsonfile-2.4.0.tgz#3736a2b428b87bbda0cc83b53fa3d633a35c2ae8" @@ -3034,6 +3136,11 @@ jstransformer@1.0.0: is-promise "^2.0.0" promise "^7.0.1" +just-extend@^4.0.2: + version "4.0.2" + resolved "https://registry.yarnpkg.com/just-extend/-/just-extend-4.0.2.tgz#f3f47f7dfca0f989c55410a7ebc8854b07108afc" + integrity sha512-FrLwOgm+iXrPV+5zDU6Jqu4gCRXbWEQg2O3SKONsWE4w7AXFRkryS53bpWdaL9cNol+AmR3AEYz6kn+o0fCPnw== + keycharm@^0.2.0: version "0.2.0" resolved "https://registry.yarnpkg.com/keycharm/-/keycharm-0.2.0.tgz#fa6ea2e43b90a68028843d27f2075d35a8c3e6f9" @@ -3131,6 +3238,15 @@ loader-utils@^1.0.2, loader-utils@^1.1.0: emojis-list "^2.0.0" json5 "^0.5.0" +loader-utils@^1.2.1: + version "1.2.3" + resolved "https://registry.yarnpkg.com/loader-utils/-/loader-utils-1.2.3.tgz#1ff5dc6911c9f0a062531a4c04b609406108c2c7" + integrity sha512-fkpz8ejdnEMG3s37wGL07iSBDg99O9D5yflE9RGNH3hRdx9SOwYfnGYdZOUIZitN8E+E2vkq3MUMYMvPYl5ZZA== + dependencies: + big.js "^5.2.2" + emojis-list "^2.0.0" + json5 "^1.0.1" + locate-path@^2.0.0: version "2.0.0" resolved "https://registry.yarnpkg.com/locate-path/-/locate-path-2.0.0.tgz#2b568b265eec944c6d9c0de9c3dbbbca0354cd8e" @@ -3138,72 +3254,14 @@ locate-path@^2.0.0: p-locate "^2.0.0" path-exists "^3.0.0" -lodash._baseassign@^3.0.0: - version "3.2.0" - resolved "https://registry.yarnpkg.com/lodash._baseassign/-/lodash._baseassign-3.2.0.tgz#8c38a099500f215ad09e59f1722fd0c52bfe0a4e" - dependencies: - lodash._basecopy "^3.0.0" - lodash.keys "^3.0.0" - -lodash._basecopy@^3.0.0: - version "3.0.1" - resolved "https://registry.yarnpkg.com/lodash._basecopy/-/lodash._basecopy-3.0.1.tgz#8da0e6a876cf344c0ad8a54882111dd3c5c7ca36" - -lodash._basecreate@^3.0.0: - version "3.0.3" - resolved "https://registry.yarnpkg.com/lodash._basecreate/-/lodash._basecreate-3.0.3.tgz#1bc661614daa7fc311b7d03bf16806a0213cf821" - -lodash._getnative@^3.0.0: - version "3.9.1" - resolved "https://registry.yarnpkg.com/lodash._getnative/-/lodash._getnative-3.9.1.tgz#570bc7dede46d61cdcde687d65d3eecbaa3aaff5" - -lodash._isiterateecall@^3.0.0: - version "3.0.9" - resolved "https://registry.yarnpkg.com/lodash._isiterateecall/-/lodash._isiterateecall-3.0.9.tgz#5203ad7ba425fae842460e696db9cf3e6aac057c" - -lodash.camelcase@^4.3.0: - version "4.3.0" - resolved "https://registry.yarnpkg.com/lodash.camelcase/-/lodash.camelcase-4.3.0.tgz#b28aa6288a2b9fc651035c7711f65ab6190331a6" - -lodash.create@3.1.1: - version "3.1.1" - resolved "https://registry.yarnpkg.com/lodash.create/-/lodash.create-3.1.1.tgz#d7f2849f0dbda7e04682bb8cd72ab022461debe7" - dependencies: - lodash._baseassign "^3.0.0" - lodash._basecreate "^3.0.0" - lodash._isiterateecall "^3.0.0" - -lodash.isarguments@^3.0.0: - version "3.1.0" - resolved "https://registry.yarnpkg.com/lodash.isarguments/-/lodash.isarguments-3.1.0.tgz#2f573d85c6a24289ff00663b491c1d338ff3458a" - -lodash.isarray@^3.0.0: - version "3.0.4" - resolved "https://registry.yarnpkg.com/lodash.isarray/-/lodash.isarray-3.0.4.tgz#79e4eb88c36a8122af86f844aa9bcd851b5fbb55" - -lodash.keys@^3.0.0: - version "3.1.2" - resolved "https://registry.yarnpkg.com/lodash.keys/-/lodash.keys-3.1.2.tgz#4dbc0472b156be50a0b286855d1bd0b0c656098a" - dependencies: - lodash._getnative "^3.0.0" - lodash.isarguments "^3.0.0" - lodash.isarray "^3.0.0" - -lodash.memoize@^4.1.2: - version "4.1.2" - resolved "https://registry.yarnpkg.com/lodash.memoize/-/lodash.memoize-4.1.2.tgz#bcc6c49a42a2840ed997f323eada5ecd182e0bfe" - -lodash.uniq@^4.5.0: - version "4.5.0" - resolved "https://registry.yarnpkg.com/lodash.uniq/-/lodash.uniq-4.5.0.tgz#d0225373aeb652adc1bc82e4945339a842754773" - "lodash@>=3.5 <5", lodash@^4.0.0, lodash@^4.14.0, lodash@^4.17.2, lodash@^4.3.0, lodash@~4.17.2: version "4.17.4" resolved "https://registry.yarnpkg.com/lodash/-/lodash-4.17.4.tgz#78203a4d1c328ae1d86dca6460e369b57f4055ae" -lodash@^4.17.4: - version "4.17.5" - resolved "https://registry.yarnpkg.com/lodash/-/lodash-4.17.5.tgz#99a92d65c0272debe8c96b6057bc8fbfa3bed511" +lodash@^4.17.11: + version "4.17.11" + resolved "https://registry.yarnpkg.com/lodash/-/lodash-4.17.11.tgz#b39ea6229ef607ecd89e2c8df12536891cac9b8d" + integrity sha512-cQKh8igo5QUhZ7lg38DYWAxMvjSAKG0A8wGSVimP07SIUEK2UO+arSRKbRZWtelMtN5V0Hkwh5ryOto/SshYIg== loglevel@^1.4.1: version "1.6.1" @@ -3213,6 +3271,16 @@ lolex@1.3.2: version "1.3.2" resolved "https://registry.yarnpkg.com/lolex/-/lolex-1.3.2.tgz#7c3da62ffcb30f0f5a80a2566ca24e45d8a01f31" +lolex@^2.3.2: + version "2.7.5" + resolved "https://registry.yarnpkg.com/lolex/-/lolex-2.7.5.tgz#113001d56bfc7e02d56e36291cc5c413d1aa0733" + integrity sha512-l9x0+1offnKKIzYVjyXU2SiwhXDLekRzKyhnbyldPHvC7BvLPVpdNUNR2KeMAiCN2D/kLNttZgQD5WjSxuBx3Q== + +lolex@^3.1.0: + version "3.1.0" + resolved "https://registry.yarnpkg.com/lolex/-/lolex-3.1.0.tgz#1a7feb2fefd75b3e3a7f79f0e110d9476e294434" + integrity sha512-zFo5MgCJ0rZ7gQg69S4pqBsLURbFw11X68C18OcJjJQbqaXm2NoTrGl1IMM3TIz0/BnN1tIs2tzmmqvCsOMMjw== + longest@^1.0.1: version "1.0.1" resolved "https://registry.yarnpkg.com/longest/-/longest-1.0.1.tgz#30a0b2da38f73770e8294a0d22e6625ed77d0097" @@ -3250,10 +3318,6 @@ lz-string@^1.4.4: version "1.4.4" resolved "https://registry.yarnpkg.com/lz-string/-/lz-string-1.4.4.tgz#c0d8eaf36059f705796e1e344811cf4c498d3a26" -macaddress@^0.2.8: - version "0.2.8" - resolved "https://registry.yarnpkg.com/macaddress/-/macaddress-0.2.8.tgz#5904dc537c39ec6dbefeae902327135fa8511f12" - make-dir@^1.0.0: version "1.1.0" resolved "https://registry.yarnpkg.com/make-dir/-/make-dir-1.1.0.tgz#19b4369fe48c116f53c2af95ad102c0e39e85d51" @@ -3274,10 +3338,6 @@ map-visit@^1.0.0: dependencies: object-visit "^1.0.0" -math-expression-evaluator@^1.2.14: - version "1.2.17" - resolved "https://registry.yarnpkg.com/math-expression-evaluator/-/math-expression-evaluator-1.2.17.tgz#de819fdbcd84dccd8fae59c6aeb79615b9d266ac" - md5.js@^1.3.4: version "1.3.4" resolved "https://registry.yarnpkg.com/md5.js/-/md5.js-1.3.4.tgz#e9bdbde94a20a5ac18b04340fc5764d5b09d901d" @@ -3380,7 +3440,7 @@ mime-db@~1.30.0: version "1.30.0" resolved "https://registry.yarnpkg.com/mime-db/-/mime-db-1.30.0.tgz#74c643da2dd9d6a45399963465b26d5ca7d71f01" -mime-types@^2.1.10, mime-types@^2.1.12, mime-types@~2.1.15, mime-types@~2.1.16, mime-types@~2.1.17, mime-types@~2.1.7: +mime-types@^2.1.12, mime-types@~2.1.15, mime-types@~2.1.16, mime-types@~2.1.17, mime-types@~2.1.7: version "2.1.17" resolved "https://registry.yarnpkg.com/mime-types/-/mime-types-2.1.17.tgz#09d7a393f03e995a79f8af857b70a9e0ab16557a" dependencies: @@ -3390,7 +3450,7 @@ mime@1.4.1: version "1.4.1" resolved "https://registry.yarnpkg.com/mime/-/mime-1.4.1.tgz#121f9ebc49e3766f311a76e1fa1c8003c4b03aa6" -mime@^1.3.4, mime@^1.4.1, mime@^1.5.0: +mime@^1.4.1, mime@^1.5.0: version "1.6.0" resolved "https://registry.yarnpkg.com/mime/-/mime-1.6.0.tgz#32cd9e5c64553bd58d19a568af452acff04981b1" @@ -3406,7 +3466,7 @@ minimalistic-crypto-utils@^1.0.0, minimalistic-crypto-utils@^1.0.1: version "1.0.1" resolved "https://registry.yarnpkg.com/minimalistic-crypto-utils/-/minimalistic-crypto-utils-1.0.1.tgz#f6c00c1c0b082246e5c4d99dfb8c7c083b2b582a" -"minimatch@2 || 3", minimatch@^3.0.0, minimatch@^3.0.2, minimatch@^3.0.4: +"minimatch@2 || 3", minimatch@3.0.4, minimatch@^3.0.0, minimatch@^3.0.2, minimatch@^3.0.4: version "3.0.4" resolved "https://registry.yarnpkg.com/minimatch/-/minimatch-3.0.4.tgz#5166e286457f03306064be5497e8dbb0c3d32083" dependencies: @@ -3446,28 +3506,28 @@ mixin-deep@^1.2.0: for-in "^1.0.2" is-extendable "^1.0.1" -mkdirp@0.5.1, mkdirp@0.5.x, "mkdirp@>=0.5 0", mkdirp@^0.5.0, mkdirp@^0.5.1, mkdirp@~0.5.0, mkdirp@~0.5.1: +mkdirp@0.5.1, mkdirp@0.5.x, "mkdirp@>=0.5 0", mkdirp@^0.5.0, mkdirp@^0.5.1, mkdirp@~0.5.0: version "0.5.1" resolved "https://registry.yarnpkg.com/mkdirp/-/mkdirp-0.5.1.tgz#30057438eac6cf7f8c4767f38648d6697d75c903" dependencies: minimist "0.0.8" -mocha@^3.3.0: - version "3.5.3" - resolved "https://registry.yarnpkg.com/mocha/-/mocha-3.5.3.tgz#1e0480fe36d2da5858d1eb6acc38418b26eaa20d" +mocha@^5.2.0: + version "5.2.0" + resolved "https://registry.yarnpkg.com/mocha/-/mocha-5.2.0.tgz#6d8ae508f59167f940f2b5b3c4a612ae50c90ae6" + integrity sha512-2IUgKDhc3J7Uug+FxMXuqIyYzH7gJjXECKe/w43IGgQHTSj3InJi+yAA7T24L9bQMRKiUEHxEX37G5JpVUGLcQ== dependencies: - browser-stdout "1.3.0" - commander "2.9.0" - debug "2.6.8" - diff "3.2.0" + browser-stdout "1.3.1" + commander "2.15.1" + debug "3.1.0" + diff "3.5.0" escape-string-regexp "1.0.5" - glob "7.1.1" - growl "1.9.2" + glob "7.1.2" + growl "1.10.5" he "1.1.1" - json3 "3.3.2" - lodash.create "3.1.1" + minimatch "3.0.4" mkdirp "0.5.1" - supports-color "3.1.2" + supports-color "5.4.0" moment@^2.18.1: version "2.20.1" @@ -3477,13 +3537,13 @@ monaco-editor@0.10.1: version "0.10.1" resolved "https://registry.yarnpkg.com/monaco-editor/-/monaco-editor-0.10.1.tgz#8c96c4f15b6b5258bf92cbde93cad8a7e3007e14" -morgan@^1.9.0: - version "1.9.0" - resolved "https://registry.yarnpkg.com/morgan/-/morgan-1.9.0.tgz#d01fa6c65859b76fcf31b3cb53a3821a311d8051" +morgan@^1.9.1: + version "1.9.1" + resolved "https://registry.yarnpkg.com/morgan/-/morgan-1.9.1.tgz#0a8d16734a1d9afbc824b99df87e738e58e2da59" dependencies: basic-auth "~2.0.0" debug "2.6.9" - depd "~1.1.1" + depd "~1.1.2" on-finished "~2.3.0" on-headers "~1.0.1" @@ -3502,6 +3562,11 @@ ms@2.0.0: version "2.0.0" resolved "https://registry.yarnpkg.com/ms/-/ms-2.0.0.tgz#5608aeadfc00be6c2901df5f9861788de0d597c8" +ms@^2.1.1: + version "2.1.1" + resolved "https://registry.yarnpkg.com/ms/-/ms-2.1.1.tgz#30a5864eb3ebb0a66f2ebe6d727af06a09d86e0a" + integrity sha512-tgp+dl5cGk28utYktBsrFqA7HKgrhgPsg6Z/EfhWI4gl1Hwq8B/GmY/0oXZ6nF8hDVesS/FpnYaD/kOWhYQvyg== + multicast-dns-service-types@^1.1.0: version "1.1.0" resolved "https://registry.yarnpkg.com/multicast-dns-service-types/-/multicast-dns-service-types-1.1.0.tgz#899f11d9686e5e05cb91b35d5f0e63b773cfc901" @@ -3551,6 +3616,22 @@ negotiator@0.6.1: version "0.6.1" resolved "https://registry.yarnpkg.com/negotiator/-/negotiator-0.6.1.tgz#2b327184e8992101177b28563fb5e7102acd0ca9" +nice-try@^1.0.4: + version "1.0.5" + resolved "https://registry.yarnpkg.com/nice-try/-/nice-try-1.0.5.tgz#a3378a7696ce7d223e88fc9b764bd7ef1089e366" + integrity sha512-1nh45deeb5olNY7eX82BkPO7SSxR5SSYJiPTrTdFUVYwAl8CKMA5N9PjTYkHiRjisVcxcQ1HXdLhx2qxxJzLNQ== + +nise@^1.4.10: + version "1.4.10" + resolved "https://registry.yarnpkg.com/nise/-/nise-1.4.10.tgz#ae46a09a26436fae91a38a60919356ae6db143b6" + integrity sha512-sa0RRbj53dovjc7wombHmVli9ZihXbXCQ2uH3TNm03DyvOSIQbxg+pbqDKrk2oxMK1rtLGVlKxcB9rrc6X5YjA== + dependencies: + "@sinonjs/formatio" "^3.1.0" + "@sinonjs/text-encoding" "^0.7.1" + just-extend "^4.0.2" + lolex "^2.3.2" + path-to-regexp "^1.7.0" + no-case@^2.2.0: version "2.3.2" resolved "https://registry.yarnpkg.com/no-case/-/no-case-2.3.2.tgz#60b813396be39b3f1288a4c1ed5d1e7d28b464ac" @@ -3619,6 +3700,13 @@ node-pre-gyp@^0.6.39: tar "^2.2.1" tar-pack "^3.4.0" +node-targz@^0.2.0: + version "0.2.0" + resolved "https://registry.yarnpkg.com/node-targz/-/node-targz-0.2.0.tgz#bc3aec7adde843eb3364a68d55f8a8b498a3ed76" + integrity sha1-vDrset3oQ+szZKaNVfiotJij7XY= + dependencies: + tar-fs "^1.14.0" + nopt@3.0.x, nopt@3.x: version "3.0.6" resolved "https://registry.yarnpkg.com/nopt/-/nopt-3.0.6.tgz#c6465dbf08abcd4db359317f79ac68a646b28ff9" @@ -3647,19 +3735,6 @@ normalize-path@^2.0.0, normalize-path@^2.0.1, normalize-path@^2.1.1: dependencies: remove-trailing-separator "^1.0.1" -normalize-range@^0.1.2: - version "0.1.2" - resolved "https://registry.yarnpkg.com/normalize-range/-/normalize-range-0.1.2.tgz#2d10c06bdfd312ea9777695a4d28439456b75942" - -normalize-url@^1.4.0: - version "1.9.1" - resolved "https://registry.yarnpkg.com/normalize-url/-/normalize-url-1.9.1.tgz#2cc0d66b31ea23036458436e3620d85954c66c3c" - dependencies: - object-assign "^4.0.1" - prepend-http "^1.0.0" - query-string "^4.1.0" - sort-keys "^1.0.0" - npm-run-path@^2.0.0: version "2.0.2" resolved "https://registry.yarnpkg.com/npm-run-path/-/npm-run-path-2.0.2.tgz#35a9232dfa35d7067b4cb2ddf2357b1871536c5f" @@ -3675,10 +3750,6 @@ npmlog@^4.0.2: gauge "~2.7.3" set-blocking "~2.0.0" -num2fraction@^1.2.2: - version "1.2.2" - resolved "https://registry.yarnpkg.com/num2fraction/-/num2fraction-1.2.2.tgz#6f682b6a027a4e9ddfa4564cd2589d1d4e669ede" - number-is-nan@^1.0.0: version "1.0.1" resolved "https://registry.yarnpkg.com/number-is-nan/-/number-is-nan-1.0.1.tgz#097b602b53422a522c1afb8790318336941a011d" @@ -3853,6 +3924,13 @@ param-case@2.1.x: dependencies: no-case "^2.2.0" +parent-module@^1.0.0: + version "1.0.1" + resolved "https://registry.yarnpkg.com/parent-module/-/parent-module-1.0.1.tgz#691d2709e78c79fae3a156622452d00762caaaa2" + integrity sha512-GQ2EWRpQV8/o+Aw8YqtfZZPfNRWZYkbidE9k5rpl/hC3vtHHBfGm2Ifi6qWV+coDGkrUKZAxE3Lot5kcsRlh+g== + dependencies: + callsites "^3.0.0" + parse-asn1@^5.0.0: version "5.1.0" resolved "https://registry.yarnpkg.com/parse-asn1/-/parse-asn1-5.1.0.tgz#37c4f9b7ed3ab65c74817b5f2480937fbf97c712" @@ -3912,7 +3990,7 @@ path-is-inside@^1.0.1, path-is-inside@^1.0.2: version "1.0.2" resolved "https://registry.yarnpkg.com/path-is-inside/-/path-is-inside-1.0.2.tgz#365417dede44430d1c11af61027facf074bdfc53" -path-key@^2.0.0: +path-key@^2.0.0, path-key@^2.0.1: version "2.0.1" resolved "https://registry.yarnpkg.com/path-key/-/path-key-2.0.1.tgz#411cadb574c5a140d3a4b1910d40d80cc9f40b40" @@ -3924,6 +4002,13 @@ path-to-regexp@0.1.7: version "0.1.7" resolved "https://registry.yarnpkg.com/path-to-regexp/-/path-to-regexp-0.1.7.tgz#df604178005f522f15eb4490e7247a1bfaa67f8c" +path-to-regexp@^1.7.0: + version "1.7.0" + resolved "https://registry.yarnpkg.com/path-to-regexp/-/path-to-regexp-1.7.0.tgz#59fde0f435badacba103a84e9d3bc64e96b9937d" + integrity sha1-Wf3g9DW62suhA6hOnTvGTpa5k30= + dependencies: + isarray "0.0.1" + path-type@^1.0.0: version "1.1.0" resolved "https://registry.yarnpkg.com/path-type/-/path-type-1.1.0.tgz#59c44f7ee491da704da415da5a4070ba4f8fe441" @@ -3982,10 +4067,6 @@ pkg-dir@^2.0.0: dependencies: find-up "^2.1.0" -pluralize@^7.0.0: - version "7.0.0" - resolved "https://registry.yarnpkg.com/pluralize/-/pluralize-7.0.0.tgz#298b89df8b93b0221dbf421ad2b1b1ea23fc6777" - popper.js@^1.14.4: version "1.14.4" resolved "https://registry.yarnpkg.com/popper.js/-/popper.js-1.14.4.tgz#8eec1d8ff02a5a3a152dd43414a15c7b79fd69b6" @@ -4002,260 +4083,60 @@ posix-character-classes@^0.1.0: version "0.1.1" resolved "https://registry.yarnpkg.com/posix-character-classes/-/posix-character-classes-0.1.1.tgz#01eac0fe3b5af71a2a6c02feabb8c1fef7e00eab" -postcss-calc@^5.2.0: - version "5.3.1" - resolved "https://registry.yarnpkg.com/postcss-calc/-/postcss-calc-5.3.1.tgz#77bae7ca928ad85716e2fda42f261bf7c1d65b5e" - dependencies: - postcss "^5.0.2" - postcss-message-helpers "^2.0.0" - reduce-css-calc "^1.2.6" - -postcss-colormin@^2.1.8: - version "2.2.2" - resolved "https://registry.yarnpkg.com/postcss-colormin/-/postcss-colormin-2.2.2.tgz#6631417d5f0e909a3d7ec26b24c8a8d1e4f96e4b" - dependencies: - colormin "^1.0.5" - postcss "^5.0.13" - postcss-value-parser "^3.2.3" - -postcss-convert-values@^2.3.4: - version "2.6.1" - resolved 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+postcss-value-parser@^3.3.0: version "3.3.0" resolved "https://registry.yarnpkg.com/postcss-value-parser/-/postcss-value-parser-3.3.0.tgz#87f38f9f18f774a4ab4c8a232f5c5ce8872a9d15" -postcss-zindex@^2.0.1: - version "2.2.0" - resolved "https://registry.yarnpkg.com/postcss-zindex/-/postcss-zindex-2.2.0.tgz#d2109ddc055b91af67fc4cb3b025946639d2af22" - dependencies: - has "^1.0.1" - postcss "^5.0.4" - uniqs "^2.0.0" - -postcss@^5.0.10, postcss@^5.0.11, postcss@^5.0.12, postcss@^5.0.13, postcss@^5.0.14, postcss@^5.0.16, postcss@^5.0.2, postcss@^5.0.4, postcss@^5.0.5, postcss@^5.0.6, postcss@^5.0.8, postcss@^5.2.16: - version "5.2.18" - resolved "https://registry.yarnpkg.com/postcss/-/postcss-5.2.18.tgz#badfa1497d46244f6390f58b319830d9107853c5" - dependencies: - chalk "^1.1.3" - js-base64 "^2.1.9" - source-map "^0.5.6" - supports-color "^3.2.3" +postcss-value-parser@^3.3.1: + version "3.3.1" + resolved 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"https://registry.yarnpkg.com/prepend-http/-/prepend-http-1.0.4.tgz#d4f4562b0ce3696e41ac52d0e002e57a635dc6dc" - preserve@^0.2.0: version "0.2.0" resolved "https://registry.yarnpkg.com/preserve/-/preserve-0.2.0.tgz#815ed1f6ebc65926f865b310c0713bcb3315ce4b" @@ -4268,10 +4149,20 @@ process-nextick-args@~1.0.6: version "1.0.7" resolved "https://registry.yarnpkg.com/process-nextick-args/-/process-nextick-args-1.0.7.tgz#150e20b756590ad3f91093f25a4f2ad8bff30ba3" +process-nextick-args@~2.0.0: + version "2.0.0" + resolved "https://registry.yarnpkg.com/process-nextick-args/-/process-nextick-args-2.0.0.tgz#a37d732f4271b4ab1ad070d35508e8290788ffaa" + integrity sha512-MtEC1TqN0EU5nephaJ4rAtThHtC86dNN9qCuEhtshvpVBkAW5ZO7BASN9REnF9eoXGcRub+pFuKEpOHE+HbEMw== + process@^0.11.10: version "0.11.10" resolved "https://registry.yarnpkg.com/process/-/process-0.11.10.tgz#7332300e840161bda3e69a1d1d91a7d4bc16f182" +profanities@2.10.2: + version "2.10.2" + resolved "https://registry.yarnpkg.com/profanities/-/profanities-2.10.2.tgz#2f50aedfb0bcc8532120de1690a714715dbf929f" + integrity sha512-1hKfmQjjcFdave/J6mAQAHeZpfnd85VQwZd7aHOVb3w/KljBWliIaB61FwUqt5gVz3hqRVnV0MUR1Tsj4ch8/Q== + progress@^2.0.0: version "2.0.0" resolved "https://registry.yarnpkg.com/progress/-/progress-2.0.0.tgz#8a1be366bf8fc23db2bd23f10c6fe920b4389d1f" @@ -4350,11 +4241,12 @@ pug-error@^1.3.2: version "1.3.2" resolved "https://registry.yarnpkg.com/pug-error/-/pug-error-1.3.2.tgz#53ae7d9d29bb03cf564493a026109f54c47f5f26" -pug-filters@^3.0.1: - version "3.0.1" - resolved "https://registry.yarnpkg.com/pug-filters/-/pug-filters-3.0.1.tgz#163ef73bfbb1f1544d032b2b40f45130eb52dccb" +pug-filters@^3.1.0: + version "3.1.0" + resolved "https://registry.yarnpkg.com/pug-filters/-/pug-filters-3.1.0.tgz#27165555bc04c236e4aa2b0366246dfa021b626e" + integrity sha1-JxZVVbwEwjbkqisDZiRt+gIbYm4= dependencies: - clean-css "^3.3.0" + clean-css "^4.1.11" constantinople "^3.0.1" jstransformer "1.0.0" pug-error "^1.3.2" @@ -4405,12 +4297,13 @@ pug-walk@^1.1.7: version "1.1.7" resolved "https://registry.yarnpkg.com/pug-walk/-/pug-walk-1.1.7.tgz#c00d5c5128bac5806bec15d2b7e7cdabe42531f3" -pug@^2.0.1: - version "2.0.1" - resolved "https://registry.yarnpkg.com/pug/-/pug-2.0.1.tgz#27c151612b53d729abe8e8285aac6bc89345b5d0" +pug@2.0.3: + version "2.0.3" + resolved "https://registry.yarnpkg.com/pug/-/pug-2.0.3.tgz#71cba82537c95a5eab7ed04696e4221f53aa878e" + integrity sha1-ccuoJTfJWl6rftBGluQiH1Oqh44= dependencies: pug-code-gen "^2.0.1" - pug-filters "^3.0.1" + pug-filters "^3.1.0" pug-lexer "^4.0.0" pug-linker "^3.0.5" pug-load "^2.0.11" @@ -4448,11 +4341,12 @@ punycode@^1.2.4, punycode@^1.4.1: version "1.4.1" resolved "https://registry.yarnpkg.com/punycode/-/punycode-1.4.1.tgz#c0d5a63b2718800ad8e1eb0fa5269c84dd41845e" -q@^1.1.2: - version "1.5.1" - resolved "https://registry.yarnpkg.com/q/-/q-1.5.1.tgz#7e32f75b41381291d04611f1bf14109ac00651d7" +punycode@^2.1.0: + version "2.1.1" + resolved "https://registry.yarnpkg.com/punycode/-/punycode-2.1.1.tgz#b58b010ac40c22c5657616c8d2c2c02c7bf479ec" + integrity sha512-XRsRjdf+j5ml+y/6GKHPZbrF/8p2Yga0JPtdqTIY2Xe5ohJPD9saDJJLPvp9+NSBprVvevdXZybnj2cv8OEd0A== -qs@6.5.1, qs@^6.1.0, qs@^6.2.0, qs@^6.5.1: +qs@6.5.1, qs@^6.5.1: version "6.5.1" resolved "https://registry.yarnpkg.com/qs/-/qs-6.5.1.tgz#349cdf6eef89ec45c12d7d5eb3fc0c870343a6d8" @@ -4460,13 +4354,6 @@ qs@~6.4.0: version "6.4.0" resolved "https://registry.yarnpkg.com/qs/-/qs-6.4.0.tgz#13e26d28ad6b0ffaa91312cd3bf708ed351e7233" -query-string@^4.1.0: - version "4.3.4" - resolved "https://registry.yarnpkg.com/query-string/-/query-string-4.3.4.tgz#bbb693b9ca915c232515b228b1a02b609043dbeb" - dependencies: - object-assign "^4.1.0" - strict-uri-encode "^1.0.0" - querystring-es3@^0.2.0: version "0.2.1" resolved "https://registry.yarnpkg.com/querystring-es3/-/querystring-es3-0.2.1.tgz#9ec61f79049875707d69414596fd907a4d711e73" @@ -4511,20 +4398,6 @@ range-parser@^1.0.3, range-parser@~1.2.0: version "1.2.0" resolved "https://registry.yarnpkg.com/range-parser/-/range-parser-1.2.0.tgz#f49be6b487894ddc40dcc94a322f611092e00d5e" -raven-js@^3.19.1: - version "3.22.1" - resolved "https://registry.yarnpkg.com/raven-js/-/raven-js-3.22.1.tgz#1117f00dfefaa427ef6e1a7d50bbb1fb998a24da" - -raven@^2.2.1: - version "2.3.0" - resolved "https://registry.yarnpkg.com/raven/-/raven-2.3.0.tgz#96f15346bdaa433b3b6d47130804506155833d69" - dependencies: - cookie "0.3.1" - lsmod "1.0.0" - stack-trace "0.0.9" - timed-out "4.0.1" - uuid "3.0.0" - raw-body@2.3.2: version "2.3.2" resolved "https://registry.yarnpkg.com/raw-body/-/raw-body-2.3.2.tgz#bcd60c77d3eb93cde0050295c3f379389bc88f89" @@ -4573,7 +4446,7 @@ read-pkg@^2.0.0: normalize-package-data "^2.3.2" path-type "^2.0.0" -"readable-stream@1 || 2", readable-stream@^2.0.0, readable-stream@^2.0.1, readable-stream@^2.0.2, readable-stream@^2.0.4, readable-stream@^2.0.5, readable-stream@^2.0.6, readable-stream@^2.1.4, readable-stream@^2.1.5, readable-stream@^2.2.2, readable-stream@^2.2.9, readable-stream@^2.3.3: +"readable-stream@1 || 2", readable-stream@^2.0.0, readable-stream@^2.0.1, readable-stream@^2.0.2, readable-stream@^2.0.4, readable-stream@^2.0.6, readable-stream@^2.1.4, readable-stream@^2.1.5, readable-stream@^2.2.2, readable-stream@^2.2.9, readable-stream@^2.3.3: version "2.3.3" resolved "https://registry.yarnpkg.com/readable-stream/-/readable-stream-2.3.3.tgz#368f2512d79f9d46fdfc71349ae7878bbc1eb95c" dependencies: @@ -4585,6 +4458,19 @@ read-pkg@^2.0.0: string_decoder "~1.0.3" util-deprecate "~1.0.1" +readable-stream@^2.3.0, readable-stream@^2.3.5: + version "2.3.6" + resolved "https://registry.yarnpkg.com/readable-stream/-/readable-stream-2.3.6.tgz#b11c27d88b8ff1fbe070643cf94b0c79ae1b0aaf" + integrity sha512-tQtKA9WIAhBF3+VLAseyMqZeBjW0AHJoxOtYqSUZNJxauErmLbVm2FW1y+J/YA9dUrAC39ITejlZWhVIwawkKw== + dependencies: + core-util-is "~1.0.0" + inherits "~2.0.3" + isarray "~1.0.0" + process-nextick-args "~2.0.0" + safe-buffer "~5.1.1" + string_decoder "~1.1.1" + util-deprecate "~1.0.1" + readdirp@^2.0.0: version "2.1.0" resolved "https://registry.yarnpkg.com/readdirp/-/readdirp-2.1.0.tgz#4ed0ad060df3073300c48440373f72d1cc642d78" @@ -4616,20 +4502,6 @@ redeyed@~1.0.0: dependencies: esprima "~3.0.0" -reduce-css-calc@^1.2.6: - version "1.3.0" - resolved "https://registry.yarnpkg.com/reduce-css-calc/-/reduce-css-calc-1.3.0.tgz#747c914e049614a4c9cfbba629871ad1d2927716" - dependencies: - balanced-match "^0.4.2" - math-expression-evaluator "^1.2.14" - reduce-function-call "^1.0.1" - -reduce-function-call@^1.0.1: - version "1.0.2" - resolved "https://registry.yarnpkg.com/reduce-function-call/-/reduce-function-call-1.0.2.tgz#5a200bf92e0e37751752fe45b0ab330fd4b6be99" - dependencies: - balanced-match "^0.4.2" - regenerate@^1.2.1: version "1.3.3" resolved "https://registry.yarnpkg.com/regenerate/-/regenerate-1.3.3.tgz#0c336d3980553d755c39b586ae3b20aa49c82b7f" @@ -4646,6 +4518,11 @@ regex-not@^1.0.0: dependencies: extend-shallow "^2.0.1" +regexpp@^2.0.1: + version "2.0.1" + resolved "https://registry.yarnpkg.com/regexpp/-/regexpp-2.0.1.tgz#8d19d31cf632482b589049f8281f93dbcba4d07f" + integrity sha512-lv0M6+TkDVniA3aD1Eg0DVpfU/booSu7Eev3TDO/mZKHBfVjgCGTV4t4buppESEYDtkArYFOxTJWv6S5C+iaNw== + regexpu-core@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/regexpu-core/-/regexpu-core-1.0.0.tgz#86a763f58ee4d7c2f6b102e4764050de7ed90c6b" @@ -4721,16 +4598,10 @@ require-main-filename@^1.0.1: version "1.0.1" resolved "https://registry.yarnpkg.com/require-main-filename/-/require-main-filename-1.0.1.tgz#97f717b69d48784f5f526a6c5aa8ffdda055a4d1" -require-uncached@^1.0.3: - version "1.0.3" - resolved "https://registry.yarnpkg.com/require-uncached/-/require-uncached-1.0.3.tgz#4e0d56d6c9662fd31e43011c4b95aa49955421d3" - dependencies: - caller-path "^0.1.0" - resolve-from "^1.0.0" - -requirejs@*: - version "2.3.5" - resolved "https://registry.yarnpkg.com/requirejs/-/requirejs-2.3.5.tgz#617b9acbbcb336540ef4914d790323a8d4b861b0" +requirejs@2.3.6: + version "2.3.6" + resolved "https://registry.yarnpkg.com/requirejs/-/requirejs-2.3.6.tgz#e5093d9601c2829251258c0b9445d4d19fa9e7c9" + integrity sha512-ipEzlWQe6RK3jkzikgCupiTbTvm4S0/CAU5GlgptkN5SO6F3u0UD0K18wy6ErDqiCyP4J4YYe1HuAShvsxePLg== requires-port@1.0.x, requires-port@1.x.x, requires-port@~1.0.0: version "1.0.0" @@ -4742,14 +4613,15 @@ resolve-cwd@^2.0.0: dependencies: resolve-from "^3.0.0" -resolve-from@^1.0.0: - version "1.0.1" - resolved "https://registry.yarnpkg.com/resolve-from/-/resolve-from-1.0.1.tgz#26cbfe935d1aeeeabb29bc3fe5aeb01e93d44226" - resolve-from@^3.0.0: version "3.0.0" resolved "https://registry.yarnpkg.com/resolve-from/-/resolve-from-3.0.0.tgz#b22c7af7d9d6881bc8b6e653335eebcb0a188748" +resolve-from@^4.0.0: + version "4.0.0" + resolved "https://registry.yarnpkg.com/resolve-from/-/resolve-from-4.0.0.tgz#4abcd852ad32dd7baabfe9b40e00a36db5f392e6" + integrity sha512-pb/MYmXstAkysRFx8piNI1tGFNQIFA3vkE3Gq4EuA1dF6gHp/+vgZqsCGJapvy8N3Q+4o7FwvquPJcnZ7RYy4g== + resolve-url@^0.2.1: version "0.2.1" resolved "https://registry.yarnpkg.com/resolve-url/-/resolve-url-0.2.1.tgz#2c637fe77c893afd2a663fe21aa9080068e2052a" @@ -4783,6 +4655,13 @@ rimraf@2, rimraf@^2.2.8, rimraf@^2.5.1, rimraf@^2.5.4, rimraf@^2.6.1: dependencies: glob "^7.0.5" +rimraf@2.6.3: + version "2.6.3" + resolved "https://registry.yarnpkg.com/rimraf/-/rimraf-2.6.3.tgz#b2d104fe0d8fb27cf9e0a1cda8262dd3833c6cab" + integrity sha512-mwqeW5XsA2qAejG46gYdENaxXjx9onRNCfn7L0duuP4hCuTIi/QO7PDK07KJfp1d+izWPrzEJDcSqBa0OZQriA== + dependencies: + glob "^7.1.3" + rimraf@~2.2.6: version "2.2.8" resolved "https://registry.yarnpkg.com/rimraf/-/rimraf-2.2.8.tgz#e439be2aaee327321952730f99a8929e4fc50582" @@ -4806,20 +4685,22 @@ run-queue@^1.0.0, run-queue@^1.0.3: dependencies: aproba "^1.1.1" -rx-lite-aggregates@^4.0.8: - version "4.0.8" - resolved "https://registry.yarnpkg.com/rx-lite-aggregates/-/rx-lite-aggregates-4.0.8.tgz#753b87a89a11c95467c4ac1626c4efc4e05c67be" +rxjs@^6.4.0: + version "6.4.0" + resolved "https://registry.yarnpkg.com/rxjs/-/rxjs-6.4.0.tgz#f3bb0fe7bda7fb69deac0c16f17b50b0b8790504" + integrity sha512-Z9Yfa11F6B9Sg/BK9MnqnQ+aQYicPLtilXBp2yUtDt2JRCE0h26d33EnfO3ZxoNxG0T92OUucP3Ct7cpfkdFfw== dependencies: - rx-lite "*" - -rx-lite@*, rx-lite@^4.0.8: - version "4.0.8" - resolved "https://registry.yarnpkg.com/rx-lite/-/rx-lite-4.0.8.tgz#0b1e11af8bc44836f04a6407e92da42467b79444" + tslib "^1.9.0" safe-buffer@5.1.1, safe-buffer@^5.0.1, safe-buffer@^5.1.0, safe-buffer@^5.1.1, safe-buffer@~5.1.0, safe-buffer@~5.1.1: version "5.1.1" resolved "https://registry.yarnpkg.com/safe-buffer/-/safe-buffer-5.1.1.tgz#893312af69b2123def71f57889001671eeb2c853" +"safer-buffer@>= 2.1.2 < 3": + version "2.1.2" + resolved "https://registry.yarnpkg.com/safer-buffer/-/safer-buffer-2.1.2.tgz#44fa161b0187b9549dd84bb91802f9bd8385cd6a" + integrity sha512-YZo3K82SD7Riyi0E1EQPojLz7kpepnSQI9IyPbHHg1XXXevb5dJI7tpyN2ADxGcQbHG7vcyRHk0cbwqcQriUtg== + samsam@1.1.2: version "1.1.2" resolved "https://registry.yarnpkg.com/samsam/-/samsam-1.1.2.tgz#bec11fdc83a9fda063401210e40176c3024d1567" @@ -4832,7 +4713,7 @@ sax@1.2.1: version "1.2.1" resolved "https://registry.yarnpkg.com/sax/-/sax-1.2.1.tgz#7b8e656190b228e81a66aea748480d828cd2d37a" -sax@>=0.6.0, sax@~1.2.1: +sax@>=0.6.0: version "1.2.4" resolved "https://registry.yarnpkg.com/sax/-/sax-1.2.4.tgz#2816234e2378bddc4e5354fab5caa895df7100d9" @@ -4849,6 +4730,15 @@ schema-utils@^0.4.2: ajv "^5.0.0" ajv-keywords "^2.1.0" +schema-utils@^1.0.0: + version "1.0.0" + resolved "https://registry.yarnpkg.com/schema-utils/-/schema-utils-1.0.0.tgz#0b79a93204d7b600d4b2850d1f66c2a34951c770" + integrity sha512-i27Mic4KovM/lnGsy8whRCHhc7VicJajAjTrYg11K9zfZXnYIt4k5F+kZkwjnrhKzLic/HLU4j11mjsz2G/75g== + dependencies: + ajv "^6.1.0" + ajv-errors "^1.0.0" + ajv-keywords "^3.1.0" + select-hose@^2.0.0: version "2.0.0" resolved "https://registry.yarnpkg.com/select-hose/-/select-hose-2.0.0.tgz#625d8658f865af43ec962bfc376a37359a4994ca" @@ -4874,6 +4764,11 @@ selfsigned@^1.9.1: version "5.5.0" resolved "https://registry.yarnpkg.com/semver/-/semver-5.5.0.tgz#dc4bbc7a6ca9d916dee5d43516f0092b58f7b8ab" +semver@^5.5.1: + version "5.7.0" + resolved "https://registry.yarnpkg.com/semver/-/semver-5.7.0.tgz#790a7cf6fea5459bac96110b29b60412dc8ff96b" + integrity sha512-Ya52jSX2u7QKghxeoFGpLwCtGlt7j0oY9DYb5apt9nPlJ42ID+ulTXESnt/qAQcoSERyZ5sl3LDIOw0nAn/5DA== + send@0.16.1: version "0.16.1" resolved "https://registry.yarnpkg.com/send/-/send-0.16.1.tgz#a70e1ca21d1382c11d0d9f6231deb281080d7ab3" @@ -5020,14 +4915,30 @@ sinon@^1.17.3: samsam "1.1.2" util ">=0.10.3 <1" +sinon@^7.2.7: + version "7.2.7" + resolved "https://registry.yarnpkg.com/sinon/-/sinon-7.2.7.tgz#ee90f83ce87d9a6bac42cf32a3103d8c8b1bfb68" + integrity sha512-rlrre9F80pIQr3M36gOdoCEWzFAMDgHYD8+tocqOw+Zw9OZ8F84a80Ds69eZfcjnzDqqG88ulFld0oin/6rG/g== + dependencies: + "@sinonjs/commons" "^1.3.1" + "@sinonjs/formatio" "^3.2.1" + "@sinonjs/samsam" "^3.2.0" + diff "^3.5.0" + lolex "^3.1.0" + nise "^1.4.10" + supports-color "^5.5.0" + slash@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/slash/-/slash-1.0.0.tgz#c41f2f6c39fc16d1cd17ad4b5d896114ae470d55" -slice-ansi@1.0.0: - version "1.0.0" - resolved "https://registry.yarnpkg.com/slice-ansi/-/slice-ansi-1.0.0.tgz#044f1a49d8842ff307aad6b505ed178bd950134d" +slice-ansi@^2.1.0: + version "2.1.0" + resolved "https://registry.yarnpkg.com/slice-ansi/-/slice-ansi-2.1.0.tgz#cacd7693461a637a5788d92a7dd4fba068e81636" + integrity sha512-Qu+VC3EwYLldKa1fCxuuvULvSJOKEgk9pi8dZeCVK7TqBfUNTH4sFkk4joj8afVSfAYgJoSOetjx9QWOJ5mYoQ== dependencies: + ansi-styles "^3.2.0" + astral-regex "^1.0.0" is-fullwidth-code-point "^2.0.0" snapdragon-node@^2.0.1: @@ -5081,12 +4992,6 @@ sockjs@0.3.19: faye-websocket "^0.10.0" uuid "^3.0.1" -sort-keys@^1.0.0: - version "1.1.2" - resolved "https://registry.yarnpkg.com/sort-keys/-/sort-keys-1.1.2.tgz#441b6d4d346798f1b4e49e8920adfba0e543f9ad" - dependencies: - is-plain-obj "^1.0.0" - source-list-map@^2.0.0: version "2.0.0" resolved "https://registry.yarnpkg.com/source-list-map/-/source-list-map-2.0.0.tgz#aaa47403f7b245a92fbc97ea08f250d6087ed085" @@ -5105,17 +5010,17 @@ source-map-url@^0.4.0: version "0.4.0" resolved "https://registry.yarnpkg.com/source-map-url/-/source-map-url-0.4.0.tgz#3e935d7ddd73631b97659956d55128e87b5084a3" -source-map@0.4.x, source-map@^0.4.4: +source-map@0.5.x, source-map@^0.5.3, source-map@^0.5.6, source-map@~0.5.0, source-map@~0.5.1: + version "0.5.7" + resolved "https://registry.yarnpkg.com/source-map/-/source-map-0.5.7.tgz#8a039d2d1021d22d1ea14c80d8ea468ba2ef3fcc" + +source-map@^0.4.4: version "0.4.4" resolved "https://registry.yarnpkg.com/source-map/-/source-map-0.4.4.tgz#eba4f5da9c0dc999de68032d8b4f76173652036b" dependencies: amdefine ">=0.0.4" -source-map@0.5.x, source-map@^0.5.3, source-map@^0.5.6, source-map@~0.5.0, source-map@~0.5.1: - version "0.5.7" - resolved "https://registry.yarnpkg.com/source-map/-/source-map-0.5.7.tgz#8a039d2d1021d22d1ea14c80d8ea468ba2ef3fcc" - -source-map@^0.6.1, source-map@~0.6.1: +source-map@^0.6.1, source-map@~0.6.0, source-map@~0.6.1: version "0.6.1" resolved "https://registry.yarnpkg.com/source-map/-/source-map-0.6.1.tgz#74722af32e9614e9c287a8d0bbde48b5e2f1a263" @@ -5192,11 +5097,7 @@ ssri@^5.0.0: dependencies: safe-buffer "^5.1.0" -stack-trace@0.0.9: - version "0.0.9" - resolved "https://registry.yarnpkg.com/stack-trace/-/stack-trace-0.0.9.tgz#a8f6eaeca90674c333e7c43953f275b451510695" - -stack-trace@0.0.x: +stack-trace@0.0.10, stack-trace@0.0.x: version "0.0.10" resolved "https://registry.yarnpkg.com/stack-trace/-/stack-trace-0.0.10.tgz#547c70b347e8d32b4e108ea1a2a159e5fdde19c0" @@ -5243,10 +5144,6 @@ stream-shift@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/stream-shift/-/stream-shift-1.0.0.tgz#d5c752825e5367e786f78e18e445ea223a155952" -strict-uri-encode@^1.0.0: - version "1.1.0" - resolved "https://registry.yarnpkg.com/strict-uri-encode/-/strict-uri-encode-1.1.0.tgz#279b225df1d582b1f54e65addd4352e18faa0713" - string-width@^1.0.1, string-width@^1.0.2: version "1.0.2" resolved "https://registry.yarnpkg.com/string-width/-/string-width-1.0.2.tgz#118bdf5b8cdc51a2a7e70d211e07e2b0b9b107d3" @@ -5255,19 +5152,35 @@ string-width@^1.0.1, string-width@^1.0.2: is-fullwidth-code-point "^1.0.0" strip-ansi "^3.0.0" -string-width@^2.0.0, string-width@^2.1.0, string-width@^2.1.1: +string-width@^2.0.0, string-width@^2.1.0: version "2.1.1" resolved "https://registry.yarnpkg.com/string-width/-/string-width-2.1.1.tgz#ab93f27a8dc13d28cac815c462143a6d9012ae9e" dependencies: is-fullwidth-code-point "^2.0.0" strip-ansi "^4.0.0" +string-width@^3.0.0: + version "3.1.0" + resolved "https://registry.yarnpkg.com/string-width/-/string-width-3.1.0.tgz#22767be21b62af1081574306f69ac51b62203961" + integrity sha512-vafcv6KjVZKSgz06oM/H6GDBrAtz8vdhQakGjFIvNrHA6y3HCF1CInLy+QLq8dTJPQ1b+KDUqDFctkdRW44e1w== + dependencies: + emoji-regex "^7.0.1" + is-fullwidth-code-point "^2.0.0" + strip-ansi "^5.1.0" + string_decoder@^1.0.0, string_decoder@~1.0.3: version "1.0.3" resolved "https://registry.yarnpkg.com/string_decoder/-/string_decoder-1.0.3.tgz#0fc67d7c141825de94282dd536bec6b9bce860ab" dependencies: safe-buffer "~5.1.0" +string_decoder@~1.1.1: + version "1.1.1" + resolved "https://registry.yarnpkg.com/string_decoder/-/string_decoder-1.1.1.tgz#9cf1611ba62685d7030ae9e4ba34149c3af03fc8" + integrity sha512-n/ShnvDi6FHbbVfviro+WojiFzv+s8MPMHBczVePfUpDJLwoLT0ht1l4YwBCbi8pJAveEEdnkHyPyTP/mzRfwg== + dependencies: + safe-buffer "~5.1.0" + stringstream@~0.0.4: version "0.0.5" resolved "https://registry.yarnpkg.com/stringstream/-/stringstream-0.0.5.tgz#4e484cd4de5a0bbbee18e46307710a8a81621878" @@ -5284,6 +5197,13 @@ strip-ansi@^4.0.0: dependencies: ansi-regex "^3.0.0" +strip-ansi@^5.0.0, strip-ansi@^5.1.0: + version "5.2.0" + resolved "https://registry.yarnpkg.com/strip-ansi/-/strip-ansi-5.2.0.tgz#8c9a536feb6afc962bdfa5b104a5091c1ad9c0ae" + integrity sha512-DuRs1gKbBqsMKIZlrffwlug8MHkcnpjs5VPmL1PAh+mA30U0DTotfDZ0d2UUsXpPmPmMMJ6W773MaA3J+lbiWA== + dependencies: + ansi-regex "^4.1.0" + strip-bom@^2.0.0: version "2.0.0" resolved "https://registry.yarnpkg.com/strip-bom/-/strip-bom-2.0.0.tgz#6219a85616520491f35788bdbf1447a99c7e6b0e" @@ -5304,7 +5224,7 @@ strip-indent@^1.0.1: dependencies: get-stdin "^4.0.1" -strip-json-comments@~2.0.1: +strip-json-comments@^2.0.1, strip-json-comments@~2.0.1: version "2.0.1" resolved "https://registry.yarnpkg.com/strip-json-comments/-/strip-json-comments-2.0.1.tgz#3c531942e908c2697c0ec344858c286c7ca0a60a" @@ -5315,42 +5235,40 @@ style-loader@^0.19.0: loader-utils "^1.0.2" schema-utils "^0.3.0" -superagent@^2.0.0: - version "2.3.0" - resolved "https://registry.yarnpkg.com/superagent/-/superagent-2.3.0.tgz#703529a0714e57e123959ddefbce193b2e50d115" +superagent@^3.7.0: + version "3.8.3" + resolved "https://registry.yarnpkg.com/superagent/-/superagent-3.8.3.tgz#460ea0dbdb7d5b11bc4f78deba565f86a178e128" + integrity sha512-GLQtLMCoEIK4eDv6OGtkOoSMt3D+oq0y3dsxMuYuDvaNUvuT8eFBuLmfR0iYYzHC1e8hpzC6ZsxbuP6DIalMFA== dependencies: component-emitter "^1.2.0" - cookiejar "^2.0.6" - debug "^2.2.0" + cookiejar "^2.1.0" + debug "^3.1.0" extend "^3.0.0" - form-data "1.0.0-rc4" - formidable "^1.0.17" + form-data "^2.3.1" + formidable "^1.2.0" methods "^1.1.1" - mime "^1.3.4" - qs "^6.1.0" - readable-stream "^2.0.5" + mime "^1.4.1" + qs "^6.5.1" + readable-stream "^2.3.5" supervisor@*: version "0.12.0" resolved "https://registry.yarnpkg.com/supervisor/-/supervisor-0.12.0.tgz#de7e6337015b291851c10f3538c4a7f04917ecc1" -supports-color@3.1.2: - version "3.1.2" - resolved "https://registry.yarnpkg.com/supports-color/-/supports-color-3.1.2.tgz#72a262894d9d408b956ca05ff37b2ed8a6e2a2d5" +supports-color@5.4.0: + version "5.4.0" + resolved "https://registry.yarnpkg.com/supports-color/-/supports-color-5.4.0.tgz#1c6b337402c2137605efe19f10fec390f6faab54" + integrity sha512-zjaXglF5nnWpsq470jSv6P9DwPvgLkuapYmfDm3JWOm0vkNTVF2tI4UrN2r6jH1qM/uc/WtxYY1hYoA2dOKj5w== dependencies: - has-flag "^1.0.0" - -supports-color@^2.0.0: - version "2.0.0" - resolved "https://registry.yarnpkg.com/supports-color/-/supports-color-2.0.0.tgz#535d045ce6b6363fa40117084629995e9df324c7" + has-flag "^3.0.0" -supports-color@^3.1.0, supports-color@^3.2.3: +supports-color@^3.1.0: version "3.2.3" resolved "https://registry.yarnpkg.com/supports-color/-/supports-color-3.2.3.tgz#65ac0504b3954171d8a64946b2ae3cbb8a5f54f6" dependencies: has-flag "^1.0.0" -supports-color@^4.0.0, supports-color@^4.2.1: +supports-color@^4.2.1: version "4.5.0" resolved "https://registry.yarnpkg.com/supports-color/-/supports-color-4.5.0.tgz#be7a0de484dec5c5cddf8b3d59125044912f635b" dependencies: @@ -5368,37 +5286,48 @@ supports-color@^5.2.0: dependencies: has-flag "^3.0.0" -svgo@^0.7.0: - version "0.7.2" - resolved "https://registry.yarnpkg.com/svgo/-/svgo-0.7.2.tgz#9f5772413952135c6fefbf40afe6a4faa88b4bb5" +supports-color@^5.3.0, supports-color@^5.5.0: + version "5.5.0" + resolved "https://registry.yarnpkg.com/supports-color/-/supports-color-5.5.0.tgz#e2e69a44ac8772f78a1ec0b35b689df6530efc8f" + integrity sha512-QjVjwdXIt408MIiAqCX4oUKsgU2EqAGzs2Ppkm4aQYbjm+ZEWEcW4SfFNTr4uMNZma0ey4f5lgLrkB0aX0QMow== + dependencies: + has-flag "^3.0.0" + +supports-color@^6.1.0: + version "6.1.0" + resolved "https://registry.yarnpkg.com/supports-color/-/supports-color-6.1.0.tgz#0764abc69c63d5ac842dd4867e8d025e880df8f3" + integrity sha512-qe1jfm1Mg7Nq/NSh6XE24gPXROEVsWHxC1LIx//XNlD9iw7YZQGjZNjYN7xGaEG6iKdA8EtNFW6R0gjnVXp+wQ== dependencies: - coa "~1.0.1" - colors "~1.1.2" - csso "~2.3.1" - js-yaml "~3.7.0" - mkdirp "~0.5.1" - sax "~1.2.1" - whet.extend "~0.9.9" + has-flag "^3.0.0" systemd-socket@0.0.0: version "0.0.0" resolved "https://registry.yarnpkg.com/systemd-socket/-/systemd-socket-0.0.0.tgz#a36b828433cf831a0878e29ee33a0d1d8fc7565b" -table@^4.0.1: - version "4.0.2" - resolved "https://registry.yarnpkg.com/table/-/table-4.0.2.tgz#a33447375391e766ad34d3486e6e2aedc84d2e36" +table@^5.2.3: + version "5.2.3" + resolved "https://registry.yarnpkg.com/table/-/table-5.2.3.tgz#cde0cc6eb06751c009efab27e8c820ca5b67b7f2" + integrity sha512-N2RsDAMvDLvYwFcwbPyF3VmVSSkuF+G1e+8inhBLtHpvwXGw4QRPEZhihQNeEN0i1up6/f6ObCJXNdlRG3YVyQ== dependencies: - ajv "^5.2.3" - ajv-keywords "^2.1.0" - chalk "^2.1.0" - lodash "^4.17.4" - slice-ansi "1.0.0" - string-width "^2.1.1" + ajv "^6.9.1" + lodash "^4.17.11" + slice-ansi "^2.1.0" + string-width "^3.0.0" tapable@^0.2.7: version "0.2.8" resolved "https://registry.yarnpkg.com/tapable/-/tapable-0.2.8.tgz#99372a5c999bf2df160afc0d74bed4f47948cd22" +tar-fs@^1.14.0: + version "1.16.3" + resolved "https://registry.yarnpkg.com/tar-fs/-/tar-fs-1.16.3.tgz#966a628841da2c4010406a82167cbd5e0c72d509" + integrity sha512-NvCeXpYx7OsmOh8zIOP/ebG55zZmxLE0etfWRbWok+q2Qo8x/vOR/IJT1taADXPe+jsiu9axDb3X4B+iIgNlKw== + dependencies: + chownr "^1.0.1" + mkdirp "^0.5.1" + pump "^1.0.0" + tar-stream "^1.1.2" + tar-pack@^3.4.0: version "3.4.1" resolved "https://registry.yarnpkg.com/tar-pack/-/tar-pack-3.4.1.tgz#e1dbc03a9b9d3ba07e896ad027317eb679a10a1f" @@ -5412,6 +5341,19 @@ tar-pack@^3.4.0: tar "^2.2.1" uid-number "^0.0.6" +tar-stream@^1.1.2: + version "1.6.2" + resolved "https://registry.yarnpkg.com/tar-stream/-/tar-stream-1.6.2.tgz#8ea55dab37972253d9a9af90fdcd559ae435c555" + integrity sha512-rzS0heiNf8Xn7/mpdSVVSMAWAoy9bfb1WOTYC78Z0UQKeKa/CWS8FOq0lKGNa8DWKAn9gxjCvMLYc5PGXYlK2A== + dependencies: + bl "^1.0.0" + buffer-alloc "^1.2.0" + end-of-stream "^1.0.0" + fs-constants "^1.0.0" + readable-stream "^2.3.0" + to-buffer "^1.1.1" + xtend "^4.0.0" + tar@^2.2.1: version "2.2.1" resolved "https://registry.yarnpkg.com/tar/-/tar-2.2.1.tgz#8e4d2a256c0e2185c6b18ad694aec968b83cb1d1" @@ -5427,9 +5369,10 @@ temp@0.8.x: os-tmpdir "^1.0.0" rimraf "~2.2.6" -text-table@~0.2.0: +text-table@^0.2.0: version "0.2.0" resolved "https://registry.yarnpkg.com/text-table/-/text-table-0.2.0.tgz#7f5ee823ae805207c00af2df4a84ec3fcfa570b4" + integrity sha1-f17oI66AUgfACvLfSoTsP8+lcLQ= through2@^2.0.0: version "2.0.3" @@ -5450,10 +5393,6 @@ time-stamp@^2.0.0: version "2.0.0" resolved "https://registry.yarnpkg.com/time-stamp/-/time-stamp-2.0.0.tgz#95c6a44530e15ba8d6f4a3ecb8c3a3fac46da357" -timed-out@4.0.1: - version "4.0.1" - resolved "https://registry.yarnpkg.com/timed-out/-/timed-out-4.0.1.tgz#f32eacac5a175bea25d7fab565ab3ed8741ef56f" - timers-browserify@^2.0.4: version "2.0.5" resolved "https://registry.yarnpkg.com/timers-browserify/-/timers-browserify-2.0.5.tgz#04878fb12a155a159c9d1e59faa1f77bf4ecc44c" @@ -5474,6 +5413,11 @@ to-arraybuffer@^1.0.0: version "1.0.1" resolved "https://registry.yarnpkg.com/to-arraybuffer/-/to-arraybuffer-1.0.1.tgz#7d229b1fcc637e466ca081180836a7aabff83f43" +to-buffer@^1.1.1: + version "1.1.1" + resolved "https://registry.yarnpkg.com/to-buffer/-/to-buffer-1.1.1.tgz#493bd48f62d7c43fcded313a03dcadb2e1213a80" + integrity sha512-lx9B5iv7msuFYE3dytT+KE5tap+rNYw+K4jVkb9R/asAb+pbBSM17jtunHplhBe6RRJdZx3Pn2Jph24O32mOVg== + to-object-path@^0.3.0: version "0.3.0" resolved "https://registry.yarnpkg.com/to-object-path/-/to-object-path-0.3.0.tgz#297588b7b0e7e0ac08e04e672f85c1f4999e17af" @@ -5517,6 +5461,10 @@ trim-newlines@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/trim-newlines/-/trim-newlines-1.0.0.tgz#5887966bb582a4503a41eb524f7d35011815a613" +tslib@^1.9.0, tslib@^1.9.3: + version "1.9.3" + resolved "https://registry.yarnpkg.com/tslib/-/tslib-1.9.3.tgz#d7e4dd79245d85428c4d7e4822a79917954ca286" + tty-browserify@0.0.0: version "0.0.0" resolved "https://registry.yarnpkg.com/tty-browserify/-/tty-browserify-0.0.0.tgz#a157ba402da24e9bf957f9aa69d524eed42901a6" @@ -5541,6 +5489,11 @@ type-detect@0.1.1: version "0.1.1" resolved "https://registry.yarnpkg.com/type-detect/-/type-detect-0.1.1.tgz#0ba5ec2a885640e470ea4e8505971900dac58822" +type-detect@4.0.8: + version "4.0.8" + resolved "https://registry.yarnpkg.com/type-detect/-/type-detect-4.0.8.tgz#7646fb5f18871cfbb7749e69bd39a6388eb7450c" + integrity sha512-0fr/mIH1dlO+x7TlcMy+bIDqKPsw/70tVyeHW787goQjhmqaZe10uwLujubK9q9Lg6Fiho1KUKDYz0Z7k7g5/g== + type-detect@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/type-detect/-/type-detect-1.0.0.tgz#762217cc06db258ec48908a1298e8b95121e8ea2" @@ -5628,20 +5581,6 @@ union-value@^1.0.0: is-extendable "^0.1.1" set-value "^0.4.3" -uniq@^1.0.1: - version "1.0.1" - resolved "https://registry.yarnpkg.com/uniq/-/uniq-1.0.1.tgz#b31c5ae8254844a3a8281541ce2b04b865a734ff" - -uniqid@^4.0.0: - version "4.1.1" - resolved "https://registry.yarnpkg.com/uniqid/-/uniqid-4.1.1.tgz#89220ddf6b751ae52b5f72484863528596bb84c1" - dependencies: - macaddress "^0.2.8" - -uniqs@^2.0.0: - version "2.0.0" - resolved "https://registry.yarnpkg.com/uniqs/-/uniqs-2.0.0.tgz#ffede4b36b25290696e6e165d4a59edb998e6b02" - unique-filename@^1.1.0: version "1.1.0" resolved "https://registry.yarnpkg.com/unique-filename/-/unique-filename-1.1.0.tgz#d05f2fe4032560871f30e93cbe735eea201514f3" @@ -5673,6 +5612,13 @@ upper-case@^1.1.1: version "1.1.3" resolved "https://registry.yarnpkg.com/upper-case/-/upper-case-1.1.3.tgz#f6b4501c2ec4cdd26ba78be7222961de77621598" +uri-js@^4.2.2: + version "4.2.2" + resolved "https://registry.yarnpkg.com/uri-js/-/uri-js-4.2.2.tgz#94c540e1ff772956e2299507c010aea6c8838eb0" + integrity sha512-KY9Frmirql91X2Qgjry0Wd4Y+YTdrdZheS8TFwvkbLWf/G5KNJDCh6pKL5OZctEW4+0Baa5idK2ZQuELRwPznQ== + dependencies: + punycode "^2.1.0" + urix@^0.1.0: version "0.1.0" resolved "https://registry.yarnpkg.com/urix/-/urix-0.1.0.tgz#da937f7a62e21fec1fd18d49b35c2935067a6c72" @@ -5739,10 +5685,6 @@ utils-merge@1.0.1: version "1.0.1" resolved "https://registry.yarnpkg.com/utils-merge/-/utils-merge-1.0.1.tgz#9f95710f50a267947b2ccc124741c1028427e713" -uuid@3.0.0: - version "3.0.0" - resolved "https://registry.yarnpkg.com/uuid/-/uuid-3.0.0.tgz#6728fc0459c450d796a99c31837569bdf672d728" - uuid@3.1.0: version "3.1.0" resolved "https://registry.yarnpkg.com/uuid/-/uuid-3.1.0.tgz#3dd3d3e790abc24d7b0d3a034ffababe28ebbc04" @@ -5762,10 +5704,6 @@ vary@~1.1.2: version "1.1.2" resolved "https://registry.yarnpkg.com/vary/-/vary-1.1.2.tgz#2299f02c6ded30d4a5961b0b9f74524a18f634fc" -vendors@^1.0.0: - version "1.0.1" - resolved "https://registry.yarnpkg.com/vendors/-/vendors-1.0.1.tgz#37ad73c8ee417fb3d580e785312307d274847f22" - verror@1.10.0: version "1.10.0" resolved "https://registry.yarnpkg.com/verror/-/verror-1.10.0.tgz#3a105ca17053af55d6e270c1f8288682e18da400" @@ -5902,10 +5840,6 @@ websocket-extensions@>=0.1.1: version "0.1.3" resolved "https://registry.yarnpkg.com/websocket-extensions/-/websocket-extensions-0.1.3.tgz#5d2ff22977003ec687a4b87073dfbbac146ccf29" -whet.extend@~0.9.9: - version "0.9.9" - resolved "https://registry.yarnpkg.com/whet.extend/-/whet.extend-0.9.9.tgz#f877d5bf648c97e5aa542fadc16d6a259b9c11a1" - which-module@^1.0.0: version "1.0.0" resolved "https://registry.yarnpkg.com/which-module/-/which-module-1.0.0.tgz#bba63ca861948994ff307736089e3b96026c2a4f" @@ -5982,9 +5916,10 @@ wrappy@1: version "1.0.2" resolved "https://registry.yarnpkg.com/wrappy/-/wrappy-1.0.2.tgz#b5243d8f3ec1aa35f1364605bc0d1036e30ab69f" -write@^0.2.1: - version "0.2.1" - resolved "https://registry.yarnpkg.com/write/-/write-0.2.1.tgz#5fc03828e264cea3fe91455476f7a3c566cb0757" +write@1.0.3: + version "1.0.3" + resolved "https://registry.yarnpkg.com/write/-/write-1.0.3.tgz#0800e14523b923a387e415123c865616aae0f5c3" + integrity sha512-/lg70HAjtkUgWPVZhZcm+T4hkL8Zbtp1nFNOn3lRrxnlv50SRBv7cR7RqR+GMsd3hUXy9hWBo4CHTbFTcOYwig== dependencies: mkdirp "^0.5.1" @@ -6081,6 +6016,7 @@ yargs@~3.10.0: decamelize "^1.0.0" window-size "0.1.0" -yarn@^1.7.0: - version "1.7.0" - resolved "https://registry.yarnpkg.com/yarn/-/yarn-1.7.0.tgz#0076b9fde6010e01950526a609bc53bc175ef925" +yarn@^1.15.2: + version "1.15.2" + resolved "https://registry.yarnpkg.com/yarn/-/yarn-1.15.2.tgz#7a064ca81ca34235f16376ad2f796ed432f9e285" + integrity sha512-DhqaGe2FcYKduO42d2hByXk7y8k2k42H3uzYdWBMTvcNcgWKx7xCkJWsVAQikXvaEQN2GyJNrz8CboqUmaBRrw==