|  | CMSIS-CORE
    Version 3.20
    CMSIS-CORE support for Cortex-M processor-based devices | 
Structure type to access the Data Watchpoint and Trace Register (DWT).
| Data Fields | |
| __IO uint32_t | CTRL | 
| Offset: 0x000 (R/W) Control Register.  More... | |
| __IO uint32_t | CYCCNT | 
| Offset: 0x004 (R/W) Cycle Count Register.  More... | |
| __IO uint32_t | CPICNT | 
| Offset: 0x008 (R/W) CPI Count Register.  More... | |
| __IO uint32_t | EXCCNT | 
| Offset: 0x00C (R/W) Exception Overhead Count Register.  More... | |
| __IO uint32_t | SLEEPCNT | 
| Offset: 0x010 (R/W) Sleep Count Register.  More... | |
| __IO uint32_t | LSUCNT | 
| Offset: 0x014 (R/W) LSU Count Register.  More... | |
| __IO uint32_t | FOLDCNT | 
| Offset: 0x018 (R/W) Folded-instruction Count Register.  More... | |
| __I uint32_t | PCSR | 
| Offset: 0x01C (R/ ) Program Counter Sample Register.  More... | |
| __IO uint32_t | COMP0 | 
| Offset: 0x020 (R/W) Comparator Register 0.  More... | |
| __IO uint32_t | MASK0 | 
| Offset: 0x024 (R/W) Mask Register 0.  More... | |
| __IO uint32_t | FUNCTION0 | 
| Offset: 0x028 (R/W) Function Register 0.  More... | |
| uint32_t | RESERVED0 [1] | 
| Reserved.  More... | |
| __IO uint32_t | COMP1 | 
| Offset: 0x030 (R/W) Comparator Register 1.  More... | |
| __IO uint32_t | MASK1 | 
| Offset: 0x034 (R/W) Mask Register 1.  More... | |
| __IO uint32_t | FUNCTION1 | 
| Offset: 0x038 (R/W) Function Register 1.  More... | |
| uint32_t | RESERVED1 [1] | 
| Reserved.  More... | |
| __IO uint32_t | COMP2 | 
| Offset: 0x040 (R/W) Comparator Register 2.  More... | |
| __IO uint32_t | MASK2 | 
| Offset: 0x044 (R/W) Mask Register 2.  More... | |
| __IO uint32_t | FUNCTION2 | 
| Offset: 0x048 (R/W) Function Register 2.  More... | |
| uint32_t | RESERVED2 [1] | 
| Reserved.  More... | |
| __IO uint32_t | COMP3 | 
| Offset: 0x050 (R/W) Comparator Register 3.  More... | |
| __IO uint32_t | MASK3 | 
| Offset: 0x054 (R/W) Mask Register 3.  More... | |
| __IO uint32_t | FUNCTION3 | 
| Offset: 0x058 (R/W) Function Register 3.  More... | |
| __IO uint32_t DWT_Type::COMP0 | 
| __IO uint32_t DWT_Type::COMP1 | 
| __IO uint32_t DWT_Type::COMP2 | 
| __IO uint32_t DWT_Type::COMP3 | 
| __IO uint32_t DWT_Type::CPICNT | 
| __IO uint32_t DWT_Type::CTRL | 
| __IO uint32_t DWT_Type::CYCCNT | 
| __IO uint32_t DWT_Type::EXCCNT | 
| __IO uint32_t DWT_Type::FOLDCNT | 
| __IO uint32_t DWT_Type::FUNCTION0 | 
| __IO uint32_t DWT_Type::FUNCTION1 | 
| __IO uint32_t DWT_Type::FUNCTION2 | 
| __IO uint32_t DWT_Type::FUNCTION3 | 
| __IO uint32_t DWT_Type::LSUCNT | 
| __IO uint32_t DWT_Type::MASK0 | 
| __IO uint32_t DWT_Type::MASK1 | 
| __IO uint32_t DWT_Type::MASK2 | 
| __IO uint32_t DWT_Type::MASK3 | 
| __I uint32_t DWT_Type::PCSR | 
| uint32_t DWT_Type::RESERVED0[1] | 
| uint32_t DWT_Type::RESERVED1[1] | 
| uint32_t DWT_Type::RESERVED2[1] | 
| __IO uint32_t DWT_Type::SLEEPCNT |