|  | CMSIS-CORE
    Version 3.20
    CMSIS-CORE support for Cortex-M processor-based devices | 
Structure type to access the System Control and ID Register not in the SCB.
| Data Fields | |
| uint32_t | RESERVED0 [1] | 
| Reserved.  More... | |
| __I uint32_t | ICTR | 
| Offset: 0x004 (R/ ) Interrupt Controller Type Register.  More... | |
| __IO uint32_t | ACTLR | 
| Offset: 0x008 (R/W) Auxiliary Control Register.  More... | |
| __IO uint32_t SCnSCB_Type::ACTLR | 
| __I uint32_t SCnSCB_Type::ICTR | 
| uint32_t SCnSCB_Type::RESERVED0[1] |