From 442c8d2ce4f13dd9e273dfa7f4da36cd66ebeb68 Mon Sep 17 00:00:00 2001
From: Sasan Golchin <ahmad.golchin@mail.polimi.it>
Date: Tue, 11 Oct 2016 14:17:26 +0200
Subject: [PATCH] cstimer enabled for cortexM3_stm3/stm32vldiscovery

---
 debugpin.h                                    |  3 ++
 .../common/interfaces-impl/portability.cpp    | 38 ++-----------------
 .../core/stage_1_boot.cpp                     |  3 +-
 miosix/config/Makefile.inc                    |  1 +
 .../board_settings.h                          |  3 ++
 5 files changed, 13 insertions(+), 35 deletions(-)

diff --git a/debugpin.h b/debugpin.h
index f4cca499..47d19757 100644
--- a/debugpin.h
+++ b/debugpin.h
@@ -8,6 +8,9 @@
 #ifdef _BOARD_STM32F4DISCOVERY
 typedef miosix::Gpio<GPIOA_BASE, 1> debug1;
 typedef miosix::Gpio<GPIOA_BASE, 15> debug2;
+#elif _BOARD_STM32VLDISCOVERY
+typedef miosix::Gpio<GPIOB_BASE, 0> debug1;
+typedef miosix::Gpio<GPIOB_BASE, 1> debug2;
 #elif _BOARD_WANDSTEM
 typedef miosix::Gpio<GPIOC_BASE, 2> debug1; // on the board: gpio7
 typedef miosix::Gpio<GPIOC_BASE, 7> debug2; // on the board: gpio9
diff --git a/miosix/arch/cortexM3_stm32/common/interfaces-impl/portability.cpp b/miosix/arch/cortexM3_stm32/common/interfaces-impl/portability.cpp
index 7b5b2098..95a034c1 100644
--- a/miosix/arch/cortexM3_stm32/common/interfaces-impl/portability.cpp
+++ b/miosix/arch/cortexM3_stm32/common/interfaces-impl/portability.cpp
@@ -34,22 +34,6 @@
 #include "kernel/scheduler/timer_interrupt.h"
 #include <algorithm>
 
-/**
- * \internal
- * timer interrupt routine.
- * Since inside naked functions only assembler code is allowed, this function
- * only calls the ctxsave/ctxrestore macros (which are in assembler), and calls
- * the implementation code in ISR_preempt()
- */
-void SysTick_Handler()   __attribute__((naked));
-void SysTick_Handler()
-{
-    saveContext();
-    //Call ISR_preempt(). Name is a C++ mangled name.
-    asm volatile("bl _ZN14miosix_private11ISR_preemptEv");
-    restoreContext();
-}
-
 /**
  * \internal
  * software interrupt routine.
@@ -87,19 +71,6 @@ void TIM2_IRQHandler()
 
 namespace miosix_private {
 
-/**
- * \internal
- * Called by the timer interrupt, preempt to next thread
- * Declared noinline to avoid the compiler trying to inline it into the caller,
- * which would violate the requirement on naked functions. Function is not
- * static because otherwise the compiler optimizes it out...
- */
-void ISR_preempt() __attribute__((noinline));
-void ISR_preempt()
-{
-    miosix::IRQtimerInterrupt();
-}
-
 /**
  * \internal
  * Called by the software interrupt, yield to next thread
@@ -201,11 +172,6 @@ void IRQportableStartKernel()
     SCB->CCR |= SCB_CCR_DIV_0_TRP;
     NVIC_SetPriorityGrouping(7);//This should disable interrupt nesting
     NVIC_SetPriority(SVCall_IRQn,3);//High priority for SVC (Max=0, min=15)
-    NVIC_SetPriority(SysTick_IRQn,3);//High priority for SysTick (Max=0, min=15)
-    SysTick->LOAD=SystemCoreClock/miosix::TICK_FREQ;
-    //Start SysTick, set to generate interrupts
-    SysTick->CTRL=SysTick_CTRL_ENABLE | SysTick_CTRL_TICKINT |
-            SysTick_CTRL_CLKSOURCE;
 
     #ifdef SCHED_TYPE_CONTROL_BASED
     AuxiliaryTimer::IRQinit();
@@ -215,6 +181,10 @@ void IRQportableStartKernel()
     //since there's no way to stop the sheduler, but we need to save it anyway.
     unsigned int s_ctxsave[miosix::CTXSAVE_SIZE];
     ctxsave=s_ctxsave;//make global ctxsave point to it
+}
+
+void IRQportableFinishKernelStartup()
+{
     //Note, we can't use enableInterrupts() now since the call is not mathced
     //by a call to disableInterrupts()
     __enable_fault_irq();
diff --git a/miosix/arch/cortexM3_stm32/stm32f100rb_stm32vldiscovery/core/stage_1_boot.cpp b/miosix/arch/cortexM3_stm32/stm32f100rb_stm32vldiscovery/core/stage_1_boot.cpp
index 3515c15e..de04667b 100644
--- a/miosix/arch/cortexM3_stm32/stm32f100rb_stm32vldiscovery/core/stage_1_boot.cpp
+++ b/miosix/arch/cortexM3_stm32/stm32f100rb_stm32vldiscovery/core/stage_1_boot.cpp
@@ -99,7 +99,7 @@ void /*__attribute__((weak))*/ UsageFault_Handler();
 void /*__attribute__((weak))*/ SVC_Handler();
 void /*__attribute__((weak))*/ DebugMon_Handler();
 void /*__attribute__((weak))*/ PendSV_Handler();
-void /*__attribute__((weak))*/ SysTick_Handler();
+void __attribute__((weak)) SysTick_Handler();
 
 //Interrupt handlers
 void __attribute__((weak)) WWDG_IRQHandler();
@@ -278,3 +278,4 @@ void (* const __Vectors[])() __attribute__ ((section(".isr_vector"))) =
 #pragma weak CEC_IRQHandler = Default_Handler
 #pragma weak TIM6_DAC_IRQHandler = Default_Handler
 #pragma weak TIM7_IRQHandler = Default_Handler
+#pragma weak SysTick_Handler = Default_Handler
\ No newline at end of file
diff --git a/miosix/config/Makefile.inc b/miosix/config/Makefile.inc
index 7197f628..ce0bcf4c 100644
--- a/miosix/config/Makefile.inc
+++ b/miosix/config/Makefile.inc
@@ -1297,6 +1297,7 @@ else ifeq ($(ARCH),cortexM3_stm32)
     $(ARCH_INC)/interfaces-impl/portability.cpp  \
     $(ARCH_INC)/interfaces-impl/delays.cpp       \
     $(ARCH_INC)/interfaces-impl/gpio_impl.cpp    \
+    $(ARCH_INC)/interfaces-impl/cstimer.cpp      \
     arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
 
 ##-----------------------------------------------------------------------------
diff --git a/miosix/config/arch/cortexM3_stm32/stm32f100rb_stm32vldiscovery/board_settings.h b/miosix/config/arch/cortexM3_stm32/stm32f100rb_stm32vldiscovery/board_settings.h
index d2842d6a..e56af271 100644
--- a/miosix/config/arch/cortexM3_stm32/stm32f100rb_stm32vldiscovery/board_settings.h
+++ b/miosix/config/arch/cortexM3_stm32/stm32f100rb_stm32vldiscovery/board_settings.h
@@ -48,6 +48,9 @@ namespace miosix {
 /// STM32F100RB only has 8KB of RAM so the stack is only 1.5KB.
 const unsigned int MAIN_STACK_SIZE=1024+512;
 
+/// Context Switch Quantum Size (measured in nanoseconds)
+const unsigned int preemptionPeriodNs=1000000;
+
 /// Frequency of tick (in Hz). The frequency of the STM32F100RB timer in the
 /// stm32vldiscovery board can be divided by 1000. This allows to use a 1KHz
 /// tick and the minimun Thread::sleep value is 1ms
-- 
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