diff --git a/miosix/arch/cortexM0_stm32f0/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM0_stm32f0/common/interfaces-impl/delays.cpp
index c0d1247eb5613d57a7db822dab8fc8a5d76b3dd8..c02d8aacfcded1ec61f63bb0faabc83586a4de16 100644
--- a/miosix/arch/cortexM0_stm32f0/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM0_stm32f0/common/interfaces-impl/delays.cpp
@@ -32,7 +32,7 @@ namespace miosix {
void delayMs(unsigned int mseconds)
{
#ifdef SYSCLK_FREQ_32MHz
- register const unsigned int count=4000;
+ const unsigned int count=4000;
#else
#error "Delays are uncalibrated for this clock frequency"
#endif
diff --git a/miosix/arch/cortexM3_efm32g/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM3_efm32g/common/interfaces-impl/delays.cpp
index de6502216a59d4fdd53a0933b835fff2f66f61b0..17c0e0ac50568944444a248bad55fe33740c77e6 100644
--- a/miosix/arch/cortexM3_efm32g/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM3_efm32g/common/interfaces-impl/delays.cpp
@@ -32,7 +32,7 @@ namespace miosix {
void delayMs(unsigned int mseconds)
{
- register const unsigned int count=cpuFrequency/4000;
+ const unsigned int count=cpuFrequency/4000;
for(unsigned int i=0;i<mseconds;i++)
{
diff --git a/miosix/arch/cortexM3_efm32gg/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM3_efm32gg/common/interfaces-impl/delays.cpp
index c66d337917e03373d6761ec5723afba4a6678f97..9fbb022c791dde6881a843ab848c3a2de4c72be9 100644
--- a/miosix/arch/cortexM3_efm32gg/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM3_efm32gg/common/interfaces-impl/delays.cpp
@@ -32,7 +32,7 @@ namespace miosix {
void delayMs(unsigned int mseconds)
{
- register const unsigned int count=cpuFrequency/4000;
+ const unsigned int count=cpuFrequency/4000;
for(unsigned int i=0;i<mseconds;i++)
{
diff --git a/miosix/arch/cortexM3_stm32f1/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM3_stm32f1/common/interfaces-impl/delays.cpp
index a10392624f467a62cb6c415b1504d87a7151710a..2efea4e5effbe6411961e70873daeae10af84a60 100644
--- a/miosix/arch/cortexM3_stm32f1/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM3_stm32f1/common/interfaces-impl/delays.cpp
@@ -33,33 +33,33 @@ void delayMs(unsigned int mseconds)
{
#ifndef __CODE_IN_XRAM
#ifdef SYSCLK_FREQ_72MHz
- register const unsigned int count=12000; //Flash 2 wait state
+ const unsigned int count=12000; //Flash 2 wait state
#elif SYSCLK_FREQ_56MHz
- register const unsigned int count=9333; //Flash 2 wait state
+ const unsigned int count=9333; //Flash 2 wait state
#elif SYSCLK_FREQ_48MHz
- register const unsigned int count=12000; //Flash 1 wait state
+ const unsigned int count=12000; //Flash 1 wait state
#elif SYSCLK_FREQ_36MHz
- register const unsigned int count=9000; //Flash 1 wait state
+ const unsigned int count=9000; //Flash 1 wait state
#elif SYSCLK_FREQ_24MHz
- register const unsigned int count=8000; //Flash 0 wait state
+ const unsigned int count=8000; //Flash 0 wait state
#else
- register const unsigned int count=2678; //Flash 0 wait state
+ const unsigned int count=2678; //Flash 0 wait state
#endif
#else //__CODE_IN_XRAM
//These delays are calibrated on an stm3210e-eval, and are only correct when
//running from ram memories with similar access timings
#ifdef SYSCLK_FREQ_72MHz
- register const unsigned int count=1889; //Linear scaling, factor 26.236
+ const unsigned int count=1889; //Linear scaling, factor 26.236
#elif SYSCLK_FREQ_56MHz
- register const unsigned int count=1469;
+ const unsigned int count=1469;
#elif SYSCLK_FREQ_48MHz
- register const unsigned int count=1259;
+ const unsigned int count=1259;
#elif SYSCLK_FREQ_36MHz
- register const unsigned int count=945;
+ const unsigned int count=945;
#elif SYSCLK_FREQ_24MHz
- register const unsigned int count=630;
+ const unsigned int count=630;
#else
- register const unsigned int count=210;
+ const unsigned int count=210;
#endif
#endif //__CODE_IN_XRAM
for(unsigned int i=0;i<mseconds;i++)
diff --git a/miosix/arch/cortexM3_stm32f2/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM3_stm32f2/common/interfaces-impl/delays.cpp
index 9f82e318781819a2f1150cbc3005af72a95b8cd0..421795687add248b8fcebbae1e6d949d5921ef6b 100644
--- a/miosix/arch/cortexM3_stm32f2/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM3_stm32f2/common/interfaces-impl/delays.cpp
@@ -34,7 +34,7 @@ void delayMs(unsigned int mseconds)
#ifndef __CODE_IN_XRAM
#ifdef SYSCLK_FREQ_120MHz
- register const unsigned int count=40000; //Flash 3 wait state
+ const unsigned int count=40000; //Flash 3 wait state
#else //SYSCLK_FREQ_120MHz
#error "Delays are uncalibrated for this clock frequency"
#endif //SYSCLK_FREQ_120MHz
@@ -45,9 +45,9 @@ void delayMs(unsigned int mseconds)
//When running code from external RAM delays depend on the RAM timings
#if defined(_BOARD_STM3220G_EVAL)
- register const unsigned int count=5000;
+ const unsigned int count=5000;
#elif defined(_BOARD_ETHBOARDV2)
- register const unsigned int count=6000;
+ const unsigned int count=6000;
#else
#error "Delays are uncalibrated for this clock board"
#endif
diff --git a/miosix/arch/cortexM4_atsam4l/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM4_atsam4l/common/interfaces-impl/delays.cpp
index 846a19cba2cd920e011e0ec160f6beaeb383e61c..44eeeb70b5cbc5f6caedfacd987b588c93c9a330 100644
--- a/miosix/arch/cortexM4_atsam4l/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM4_atsam4l/common/interfaces-impl/delays.cpp
@@ -32,7 +32,7 @@ namespace miosix {
void delayMs(unsigned int mseconds)
{
- register const unsigned int count = bootClock / 4000;
+ const unsigned int count = bootClock / 4000;
for(unsigned int i=0;i<mseconds;i++)
{
diff --git a/miosix/arch/cortexM4_stm32f3/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM4_stm32f3/common/interfaces-impl/delays.cpp
index fc77be976d29461a01e26b4d20fd96a71f097de2..50f907b4f09da91b55ba4154ce6919b47890b1f1 100644
--- a/miosix/arch/cortexM4_stm32f3/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM4_stm32f3/common/interfaces-impl/delays.cpp
@@ -35,17 +35,17 @@ void delayMs(unsigned int mseconds)
{
#ifdef SYSCLK_FREQ_72MHz
#warning delayMs has not been calibrated yet with 72MHz clock
- register const unsigned int count=5350;
+ const unsigned int count=5350;
#elif SYSCLK_FREQ_56MHz
- register const unsigned int count=5350;
+ const unsigned int count=5350;
#elif SYSCLK_FREQ_48MHz
- register const unsigned int count=5350;
+ const unsigned int count=5350;
#elif SYSCLK_FREQ_36MHz
- register const unsigned int count=4010;
+ const unsigned int count=4010;
#elif SYSCLK_FREQ_24MHz
- register const unsigned int count=4010;
+ const unsigned int count=4010;
#else // 8MHz clock
- register const unsigned int count=2000;
+ const unsigned int count=2000;
#endif
for(unsigned int i=0;i<mseconds;i++)
diff --git a/miosix/arch/cortexM4_stm32f4/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM4_stm32f4/common/interfaces-impl/delays.cpp
index 8285dba2a744cd18757a7736b87d1759fbdebbe2..71d1741d147b7e0b3341cea800d60e16faa23b38 100644
--- a/miosix/arch/cortexM4_stm32f4/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM4_stm32f4/common/interfaces-impl/delays.cpp
@@ -32,13 +32,13 @@ namespace miosix {
void delayMs(unsigned int mseconds)
{
#ifdef SYSCLK_FREQ_180MHz
- register const unsigned int count=45000;
+ const unsigned int count=45000;
#elif defined(SYSCLK_FREQ_168MHz)
- register const unsigned int count=42000;
+ const unsigned int count=42000;
#elif defined(SYSCLK_FREQ_100MHz)
- register const unsigned int count=25000;
+ const unsigned int count=25000;
#elif SYSCLK_FREQ_84MHz
- register const unsigned int count=21000;
+ const unsigned int count=21000;
#else
#warning "Delays are uncalibrated for this clock frequency"
#endif
diff --git a/miosix/arch/cortexM4_stm32l4/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM4_stm32l4/common/interfaces-impl/delays.cpp
index 434513e3224425ee7bbeeb1c0fa071c40b82fcc6..02eb335a8f93fd89d42958a9159c3bbfff6e156f 100644
--- a/miosix/arch/cortexM4_stm32l4/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM4_stm32l4/common/interfaces-impl/delays.cpp
@@ -32,23 +32,23 @@ namespace miosix {
void delayMs(unsigned int mseconds)
{
#ifdef SYSCLK_FREQ_80MHz
- register const unsigned int count=20000;
+ const unsigned int count=20000;
#elif defined(SYSCLK_FREQ_56MHz)
- register const unsigned int count=14000;
+ const unsigned int count=14000;
#elif defined(SYSCLK_FREQ_48MHz)
- register const unsigned int count=12000;
+ const unsigned int count=12000;
#elif defined(SYSCLK_FREQ_36MHz)
- register const unsigned int count=9000;
+ const unsigned int count=9000;
#elif defined(SYSCLK_FREQ_24MHz)
- register const unsigned int count=6000;
+ const unsigned int count=6000;
#elif defined(HSE_VALUE) && HSE_VALUE==16000000
- register const unsigned int count=4000;
+ const unsigned int count=4000;
#elif defined(HSE_VALUE) && HSE_VALUE==8000000
- register const unsigned int count=2000;
+ const unsigned int count=2000;
#elif defined(RUN_WITH_HSI)
- register const unsigned int count=4000;
+ const unsigned int count=4000;
#elif defined(RUN_WITH_MSI)
- register const unsigned int count=1000;
+ const unsigned int count=1000;
#else
#error "Delays are uncalibrated for this clock frequency"
#endif
diff --git a/miosix/arch/cortexM7_stm32f7/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM7_stm32f7/common/interfaces-impl/delays.cpp
index 4c99619e9960d1247e1e7b5d37cbcf29e1de6534..8126d5600295dccc857dd7a1eedfe45580e81fdb 100644
--- a/miosix/arch/cortexM7_stm32f7/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM7_stm32f7/common/interfaces-impl/delays.cpp
@@ -33,7 +33,7 @@ void delayMs(unsigned int mseconds)
{
//Note: flash wait state don't matter because of icache
#ifdef SYSCLK_FREQ_216MHz
- register const unsigned int count=216000;
+ const unsigned int count=216000;
#else
#warning "Delays are uncalibrated for this clock frequency"
#endif
diff --git a/miosix/arch/cortexM7_stm32h7/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM7_stm32h7/common/interfaces-impl/delays.cpp
index 02d7694818f62f47cc205aa2d3f3ee1c3e651e52..8f39293157b1110b679e7ca1d22f3bf05213c80c 100644
--- a/miosix/arch/cortexM7_stm32h7/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM7_stm32h7/common/interfaces-impl/delays.cpp
@@ -33,9 +33,9 @@ void delayMs(unsigned int mseconds)
{
//Note: flash wait state don't matter because of icache
#ifdef SYSCLK_FREQ_550MHz
- register const unsigned int count=550000;
+ const unsigned int count=550000;
#elif defined(SYSCLK_FREQ_400MHz)
- register const unsigned int count=400000;
+ const unsigned int count=400000;
#else
#error "Delays are uncalibrated for this clock frequency"
#endif
diff --git a/miosix/arch/cpu/armv4/interfaces-impl/atomic_ops_impl.h b/miosix/arch/cpu/armv4/interfaces-impl/atomic_ops_impl.h
index 12768aabce34965ded2ad27c4e6a83008a938004..327d41c95c6fdf2080b1c3a9cd9dbb722e44159e 100644
--- a/miosix/arch/cpu/armv4/interfaces-impl/atomic_ops_impl.h
+++ b/miosix/arch/cpu/armv4/interfaces-impl/atomic_ops_impl.h
@@ -32,14 +32,14 @@ namespace miosix {
inline int atomicSwap(volatile int *p, int v)
{
//This is the only atomic operation in the ARM7 assembler
- register int result;
+ int result;
asm volatile("swp %0, %1, [%2]" : "=&r"(result) : "r"(v),"r"(p) : "memory");
return result;
}
inline void atomicAdd(volatile int *p, int incr)
{
- register int a,b; //Temporaries used by ASM code
+ int a,b; //Temporaries used by ASM code
asm volatile(" mrs %0, cpsr \n"
" tst %0, #0x80 \n"
" orreq %1, %0, #0x80 \n"
@@ -56,8 +56,8 @@ inline void atomicAdd(volatile int *p, int incr)
inline int atomicAddExchange(volatile int *p, int incr)
{
- register int a; //Temporaries used by ASM code
- register int result;
+ int a; //Temporaries used by ASM code
+ int result;
asm volatile(" mrs %0, cpsr \n"
" tst %0, #0x80 \n"
" orreq %1, %0, #0x80 \n"
@@ -75,8 +75,8 @@ inline int atomicAddExchange(volatile int *p, int incr)
inline int atomicCompareAndSwap(volatile int *p, int prev, int next)
{
- register int a; //Temporaries used by ASM code
- register int result;
+ int a; //Temporaries used by ASM code
+ int result;
asm volatile(" mrs %0, cpsr \n"
" tst %0, #0x80 \n"
" orreq %1, %0, #0x80 \n"
@@ -95,8 +95,8 @@ inline int atomicCompareAndSwap(volatile int *p, int prev, int next)
inline void *atomicFetchAndIncrement(void * const volatile * p, int offset,
int incr)
{
- register int a,b; //Temporaries used by ASM code
- register void *result;
+ int a,b; //Temporaries used by ASM code
+ void *result;
asm volatile(" mrs %0, cpsr \n"
" tst %0, #0x80 \n"
" orreq %1, %0, #0x80 \n"
diff --git a/miosix/arch/cpu/armv4/interfaces-impl/interrupts.cpp b/miosix/arch/cpu/armv4/interfaces-impl/interrupts.cpp
index 84c2c654c6839c199dae120773ef96172b5e2699..2416fab37877bd8ee25c27dcf274c8dbbb9c2891 100644
--- a/miosix/arch/cpu/armv4/interfaces-impl/interrupts.cpp
+++ b/miosix/arch/cpu/armv4/interfaces-impl/interrupts.cpp
@@ -95,7 +95,7 @@ extern "C" void UNDEF_Routine()
//These two instructions MUST be the first two instructions of the interrupt
//routine. They store in return_address the pc of the instruction that
//caused the interrupt.
- register int returnAddress;
+ int returnAddress;
asm volatile("mov %0, lr" : "=r"(returnAddress));
IRQerrorLog("\r\n***Unexpected UNDEF @ ");
@@ -119,7 +119,7 @@ extern "C" void DABT_Routine()
//These two instructions MUST be the first two instructions of the interrupt
//routine. They store in return_address the pc of the instruction that
//caused the interrupt. (lr has an offset of 8 during a data abort)
- register int returnAddress;
+ int returnAddress;
asm volatile("sub %0, lr, #8" : "=r"(returnAddress));
IRQerrorLog("\r\n***Unexpected data abort @ ");
@@ -143,7 +143,7 @@ extern "C" void PABT_Routine()
//These two instructions MUST be the first two instructions of the interrupt
//routine. They store in return_address the pc of the instruction that
//caused the interrupt. (lr has an offset of 4 during a data abort)
- register int returnAddress;
+ int returnAddress;
asm volatile("sub %0, lr, #4" : "=r"(returnAddress));
IRQerrorLog("\r\n***Unexpected prefetch abort @ ");
diff --git a/miosix/arch/cpu/armv6m/interfaces-impl/interrupts_impl.h b/miosix/arch/cpu/armv6m/interfaces-impl/interrupts_impl.h
index bc4c0863ebc273335306e339810a6897807192bd..ca55b2cbb1f6d901db0e4a9ce2b73f5a7852e9c3 100644
--- a/miosix/arch/cpu/armv6m/interfaces-impl/interrupts_impl.h
+++ b/miosix/arch/cpu/armv6m/interfaces-impl/interrupts_impl.h
@@ -57,7 +57,7 @@ inline void fastEnableInterrupts() noexcept
inline bool areInterruptsEnabled() noexcept
{
- register int i;
+ int i;
asm volatile("mrs %0, primask \n\t":"=r"(i));
if(i!=0) return false;
return true;
diff --git a/miosix/arch/cpu/armv7m/interfaces-impl/interrupts_impl.h b/miosix/arch/cpu/armv7m/interfaces-impl/interrupts_impl.h
index bc4c0863ebc273335306e339810a6897807192bd..ca55b2cbb1f6d901db0e4a9ce2b73f5a7852e9c3 100644
--- a/miosix/arch/cpu/armv7m/interfaces-impl/interrupts_impl.h
+++ b/miosix/arch/cpu/armv7m/interfaces-impl/interrupts_impl.h
@@ -57,7 +57,7 @@ inline void fastEnableInterrupts() noexcept
inline bool areInterruptsEnabled() noexcept
{
- register int i;
+ int i;
asm volatile("mrs %0, primask \n\t":"=r"(i));
if(i!=0) return false;
return true;
diff --git a/miosix/libsyscalls/memoryprofiling.cpp b/miosix/libsyscalls/memoryprofiling.cpp
index db85f55ee436ece150598241c9f6b79ad8efe0ea..7bf144ca9f12278681564501fce388f702ed324b 100644
--- a/miosix/libsyscalls/memoryprofiling.cpp
+++ b/miosix/libsyscalls/memoryprofiling.cpp
@@ -107,7 +107,7 @@ unsigned int MemoryProfiling::getAbsoluteFreeStack()
unsigned int MemoryProfiling::getCurrentFreeStack()
{
unsigned int stackOccupiedByCtxsave=sysconf(ctxsaveOnStack);
- register int *stack_ptr asm("sp");
+ int *stack_ptr asm("sp");
const unsigned int *walk=getStackBottom();
unsigned int freeStack=(reinterpret_cast<unsigned int>(stack_ptr)
- reinterpret_cast<unsigned int>(walk));
diff --git a/miosix/util/util.cpp b/miosix/util/util.cpp
index 721fbdc31c0bae4f586293282bc9808e627fb287..ac8b961747146814ae2c965706e026932874213a 100644
--- a/miosix/util/util.cpp
+++ b/miosix/util/util.cpp
@@ -94,7 +94,7 @@ unsigned int MemoryProfiling::getAbsoluteFreeStack()
unsigned int MemoryProfiling::getCurrentFreeStack()
{
- register int *stack_ptr asm("sp");
+ int *stack_ptr;
const unsigned int *walk=Thread::getStackBottom();
unsigned int freeStack=(reinterpret_cast<unsigned int>(stack_ptr)
- reinterpret_cast<unsigned int>(walk));