From 58844f02e101e2e21b1c14de21df885ec7d90906 Mon Sep 17 00:00:00 2001
From: AlviseDeFaveri <elvisilde@gmail.com>
Date: Sun, 11 Aug 2019 18:28:14 +0200
Subject: [PATCH] [Alderaan] Changed TIM2 timeout to 10.002 sec
---
.../interfaces-impl/bsp.cpp | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/miosix/arch/cortexM3_stm32/stm32f103cb_skyward_alderaan/interfaces-impl/bsp.cpp b/miosix/arch/cortexM3_stm32/stm32f103cb_skyward_alderaan/interfaces-impl/bsp.cpp
index d15cc7ba..d87a00b6 100644
--- a/miosix/arch/cortexM3_stm32/stm32f103cb_skyward_alderaan/interfaces-impl/bsp.cpp
+++ b/miosix/arch/cortexM3_stm32/stm32f103cb_skyward_alderaan/interfaces-impl/bsp.cpp
@@ -74,8 +74,9 @@ void initSPI1()
}
/**
- * \brief Initialize Canbus CAN1. See CANBus::setup() driver for timings and
- * other settings.
+ * \brief Activate the CAN1 peripheral.
+ * NOTE: no initialization is made here: timings and register settings
+ * should be taken care of by a dedicated CAN bus driver.
*/
void initCAN1()
{
@@ -93,8 +94,8 @@ void initCAN1()
* TIM frequency = CLOCK_FREQ / ((PSC +1) * (ARR+1))
* - CLOCK_FREQ = 24MHz (defined in miosix/config/Makefile.inc)
* - TIM2->PSC = 0xFFFF
- * - TIM2->ARR = 0x07FF
- * - hence, TIM2 period is ~10.72sec
+ * - TIM2->ARR = 0x0E4E
+ * - hence, TIM2 period is ~10.002sec
*/
void initTIM2()
{
@@ -108,7 +109,7 @@ void initTIM2()
TIM2->CNT = 0;
// Prescaler and Reload
TIM2->PSC = 0xFFFFU;
- TIM2->ARR = 0x07FFU;
+ TIM2->ARR = 0x0E4EU;
}
/**
--
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