diff --git a/miosix/arch/cortexM3_efm32gg/common/interfaces-impl/portability.cpp b/miosix/arch/cortexM3_efm32gg/common/interfaces-impl/portability.cpp index 6b542995ddd72fad16454742ad9c3daaf998cfcf..10e459b649d0557a8ececb963c808587bc1f3a29 100644 --- a/miosix/arch/cortexM3_efm32gg/common/interfaces-impl/portability.cpp +++ b/miosix/arch/cortexM3_efm32gg/common/interfaces-impl/portability.cpp @@ -42,22 +42,6 @@ extern volatile uint16_t ramBufferAdcData2[ADCSAMPLES]; DMA_DESCRIPTOR_TypeDef dmaControlBlock[DMACTRL_CH_CNT * 2] __attribute__ ((aligned(DMACTRL_ALIGNMENT))); -/** - * \internal - * timer interrupt routine. - * Since inside naked functions only assembler code is allowed, this function - * only calls the ctxsave/ctxrestore macros (which are in assembler), and calls - * the implementation code in ISR_preempt() - */ -void SysTick_Handler() __attribute__((naked)); -void SysTick_Handler() -{ - saveContext(); - //Call ISR_preempt(). Name is a C++ mangled name. - asm volatile("bl _ZN14miosix_private11ISR_preemptEv"); - restoreContext(); -} - /** * \internal * software interrupt routine. @@ -647,11 +631,6 @@ void IRQportableStartKernel() SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk; NVIC_SetPriorityGrouping(7);//This should disable interrupt nesting NVIC_SetPriority(SVCall_IRQn,3);//High priority for SVC (Max=0, min=15) - NVIC_SetPriority(SysTick_IRQn,3);//High priority for SysTick (Max=0, min=15) - SysTick->LOAD=SystemCoreClock/miosix::TICK_FREQ-1; - //Start SysTick, set to generate interrupts - SysTick->CTRL=SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_CLKSOURCE_Msk; #ifdef SCHED_TYPE_CONTROL_BASED AuxiliaryTimer::IRQinit(); diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/core/stage_1_boot.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/core/stage_1_boot.cpp index fea8a020b61fd046302a9e917c39fac85c40836a..e2ddebfa48486473d2bddf62125ce6b0820b3a36 100644 --- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/core/stage_1_boot.cpp +++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/core/stage_1_boot.cpp @@ -87,7 +87,7 @@ void /*__attribute__((weak))*/ UsageFault_Handler(); void /*__attribute__((weak))*/ SVC_Handler(); void /*__attribute__((weak))*/ DebugMon_Handler(); void /*__attribute__((weak))*/ PendSV_Handler(); -void /*__attribute__((weak))*/ SysTick_Handler(); +void __attribute__((weak)) SysTick_Handler(); //Interrupt handlers void __attribute__((weak)) DMA_IRQHandler(); @@ -236,3 +236,4 @@ void (* const __Vectors[])() __attribute__ ((section(".isr_vector"))) = #pragma weak AES_IRQHandler = Default_Handler #pragma weak EBI_IRQHandler = Default_Handler #pragma weak EMU_IRQHandler = Default_Handler +#pragma weak SysTick_Handler = Default_Handler \ No newline at end of file diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/cstimer.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/cstimer.cpp index f18ff179de6266695c48f3885c180444948edfc6..c89b72dd91e6a09037554abc5e4b040227ce1095 100644 --- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/cstimer.cpp +++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/cstimer.cpp @@ -43,7 +43,6 @@ namespace miosix { ContextSwitchTimer::ContextSwitchTimer(): b(HighResolutionTimerBase::instance()) { - static TimeConversion stc(b.getTimerFrequency()); - tc = &stc; + tc = new TimeConversion(b.getTimerFrequency()); } } \ No newline at end of file diff --git a/miosix/interfaces/cstimer.h b/miosix/interfaces/cstimer.h index e65b96e95cd9b96aaf3056089ffdd6a8eecb5092..92d324008808c97e8a293fb5f388898a431e3c8b 100644 --- a/miosix/interfaces/cstimer.h +++ b/miosix/interfaces/cstimer.h @@ -1,8 +1,6 @@ #ifndef CSTIMER_H #define CSTIMER_H -#include "../arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.h" - namespace miosix { /** @@ -67,7 +65,6 @@ private: * Constructor, private because it's a singleton */ ContextSwitchTimer(); - HighResolutionTimerBase& b; unsigned int timerFreq; };