diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp
index 5b200785d37827c9b3cdfef3e80239a2313491f4..03ead2d2923f7c9096130a97ad52635063a11be8 100644
--- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp
+++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp
@@ -87,19 +87,6 @@ inline void interruptGPIOTimerRoutine(){
* FIXME: The following codition could be always true, they aren't exclusive
*/
inline void interruptTransceiverTimerRoutine(){
- if(TIMER2->CC[1].CTRL & TIMER_CC_CTRL_MODE_OUTPUTCOMPARE){
- TIMER2->CC[1].CTRL = (TIMER2->CC[1].CTRL & ~_TIMER_CC_CTRL_CMOA_MASK) | TIMER_CC_CTRL_CMOA_CLEAR;
- TIMER2->CC[1].CCV = static_cast<unsigned short>(TIMER2->CNT+10);//static_cast<unsigned int>(tick & 0xFFFF);
- }else if(TIMER1->CC[0].CTRL & TIMER_CC_CTRL_MODE_INPUTCAPTURE){
- ms32chkp[0]=ms32time;
- //really in the past, the overflow of TIMER3 is occurred but the timer wasn't updated
- long long a=ms32chkp[0] | TIMER3->CC[0].CCV<<16 | TIMER1->CC[0].CCV;;
- long long c=IRQgetTick();
- if(a-c< -48000000){
- ms32chkp[0]+=overflowIncrement;
- }
- }
-
//Reactivating the thread that is waiting for the event.
if(TransceiverTimer::tWaiting){
TransceiverTimer::tWaiting->IRQwakeup();
@@ -190,17 +177,28 @@ void __attribute__((used)) cstirqhnd3(){
void __attribute__((used)) cstirqhnd2(){
- //CC0 listening for received packet
+ //CC0 listening for received packet --> input mode
if ((TIMER2->IEN & TIMER_IEN_CC0) && (TIMER2->IF & TIMER_IF_CC0) ){
- TIMER2->IEN &= ~ TIMER_IEN_CC0;
- TIMER2->IFC = TIMER_IFC_CC0;
- interruptTransceiverTimerRoutine();
+ TIMER2->IEN &= ~ TIMER_IEN_CC0;
+ TIMER2->IFC = TIMER_IFC_CC0;
+
+ ms32chkp[0]=ms32time;
+ //really in the past, the overflow of TIMER3 is occurred but the timer wasn't updated
+ long long a=ms32chkp[0] | TIMER3->CC[0].CCV<<16 | TIMER2->CC[0].CCV;;
+ long long c=IRQgetTick();
+ if(a-c< -48000000){
+ ms32chkp[0]+=overflowIncrement;
+ }
+ interruptTransceiverTimerRoutine();
}
//CC1 for output/trigger the sending packet event
if ((TIMER2->IEN & TIMER_IEN_CC1) && (TIMER2->IF & TIMER_IF_CC1) ){
- TIMER2->IEN &= ~ TIMER_IEN_CC1;
- TIMER2->IFC = TIMER_IFC_CC1;
- interruptTransceiverTimerRoutine();
+ TIMER2->IEN &= ~ TIMER_IEN_CC1;
+ TIMER2->IFC = TIMER_IFC_CC1;
+
+ TIMER2->CC[1].CTRL = (TIMER2->CC[1].CTRL & ~_TIMER_CC_CTRL_CMOA_MASK) | TIMER_CC_CTRL_CMOA_CLEAR;
+ TIMER2->CC[1].CCV = static_cast<unsigned short>(TIMER2->CNT+10);//static_cast<unsigned int>(tick & 0xFFFF);
+ interruptTransceiverTimerRoutine();
}
}
@@ -414,13 +412,13 @@ void HighResolutionTimerBase::cleanBufferGPIO(){
falseRead(&TIMER1->CC[2].CCV);
}
-void HighResolutionTimerBase::setModeTransceiverTimer(bool input){
- //Connect TIMER2->CC0/1 to pin PA8 and PA9
- TIMER2->ROUTE = TIMER_ROUTE_CC0PEN
- | TIMER_ROUTE_CC1PEN
- | TIMER_ROUTE_LOCATION_LOC0;
+void HighResolutionTimerBase::setModeTransceiverTimer(){
- if(input){
+
+ //For input capture feature:
+ //Connect TIMER2->CC0 to pin PA8
+ TIMER2->ROUTE |= TIMER_ROUTE_CC0PEN
+ | TIMER_ROUTE_LOCATION_LOC0;
//Gpio<GPIOA_BASE,8> excChB;
//Configuro la modalità input
TIMER2->CC[0].CTRL = TIMER_CC_CTRL_MODE_INPUTCAPTURE |
@@ -437,10 +435,13 @@ void HighResolutionTimerBase::setModeTransceiverTimer(bool input){
| TIMER_CC_CTRL_INSEL_PRS
| TIMER_CC_CTRL_ICEDGE_RISING
| TIMER_CC_CTRL_MODE_INPUTCAPTURE;
- }else{ // Gpio<GPIOA_BASE,9> stxon
+
+ //For output capture feature // Gpio<GPIOA_BASE,9> stxon
+ //Connect TIMER2->CC1 to pin PA9
+ TIMER2->ROUTE |= TIMER_ROUTE_CC1PEN
+ | TIMER_ROUTE_LOCATION_LOC0;
TIMER2->CC[1].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE;
TIMER3->CC[1].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE;
- }
}
HighResolutionTimerBase& HighResolutionTimerBase::instance(){
@@ -488,11 +489,14 @@ HighResolutionTimerBase::HighResolutionTimerBase() {
TIMER3->CC[1].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE;
NVIC_SetPriority(TIMER1_IRQn,3);
+ NVIC_SetPriority(TIMER2_IRQn,3);
NVIC_SetPriority(TIMER3_IRQn,3);
- NVIC_ClearPendingIRQ(TIMER3_IRQn);
NVIC_ClearPendingIRQ(TIMER1_IRQn);
- NVIC_EnableIRQ(TIMER3_IRQn);
+ NVIC_ClearPendingIRQ(TIMER2_IRQn);
+ NVIC_ClearPendingIRQ(TIMER3_IRQn);
NVIC_EnableIRQ(TIMER1_IRQn);
+ NVIC_EnableIRQ(TIMER2_IRQn);
+ NVIC_EnableIRQ(TIMER3_IRQn);
timerFreq=48000000;
tc=new TimeConversion(timerFreq);
diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.h b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.h
index eaf93babf7ecdafdd7b61bb37050275e441329c5..f63e54b877394c26b2b36a1cc82f492f4ddc304f 100644
--- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.h
+++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.h
@@ -79,7 +79,7 @@ public:
void enableCC0InterruptTim2(bool enable);
void enableCC1InterruptTim2(bool enable);
void setModeGPIOTimer(bool input);
- void setModeTransceiverTimer(bool input);
+ void setModeTransceiverTimer();
virtual ~HighResolutionTimerBase();
diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/transceiver.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/transceiver.cpp
index 5b4dbade76d4e9aba567f9e8c4729d59e95a5092..8bac61bc6fbb934de384426a4a16bb1bee214392 100644
--- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/transceiver.cpp
+++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/transceiver.cpp
@@ -401,7 +401,7 @@ CC2520StatusBitmask Transceiver::commandStrobe(CC2520Command cmd)
Transceiver::Transceiver()
: pm(PowerManager::instance()), spi(Spi::instance()),
- timer(Rtc::instance()), state(CC2520State::DEEPSLEEP),
+ timer(TransceiverTimer::instance()), state(CC2520State::DEEPSLEEP),
waiting(nullptr)
{
registerGpioIrq(internalSpi::miso::getPin(),GpioIrqEdge::RISING,
@@ -484,6 +484,7 @@ void Transceiver::handlePacketTransmissionEvents(int size)
idle();
throw runtime_error("Transceiver::handlePacketTransmissionEvents timeout 1");
}
+
unsigned int exc=getExceptions(0b111);
if(exc & CC2520Exception::SFD)
{
diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/transceiver_timer.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/transceiver_timer.cpp
index 40cb5bde92233bc7977898983bd307699bf39af8..d0c77f4b3e498442b0babc87db153a031d06cedb 100644
--- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/transceiver_timer.cpp
+++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/transceiver_timer.cpp
@@ -35,7 +35,6 @@ bool TransceiverTimer::absoluteWait(long long tick){
bool TransceiverTimer::absoluteWaitTrigger(long long tick){
FastInterruptDisableLock dLock;
- b.setModeTransceiverTimer(false); //output timer
if(b.IRQsetNextTransceiverInterrupt(tick)==WaitResult::WAKEUP_IN_THE_PAST){
return true;
}
@@ -56,7 +55,7 @@ bool TransceiverTimer::absoluteWaitTimeoutOrEvent(long long tick){
return true;
}
- b.setModeTransceiverTimer(true);
+
b.enableCC0Interrupt(false);
b.enableCC0InterruptTim2(true);
do {
@@ -96,7 +95,9 @@ long long TransceiverTimer::getExtEventTimestamp() const{
return b.IRQgetSetTimeCCV0();
}
-TransceiverTimer::TransceiverTimer():b(HighResolutionTimerBase::instance()),tc(b.getTimerFrequency()) {}
+TransceiverTimer::TransceiverTimer():b(HighResolutionTimerBase::instance()),tc(b.getTimerFrequency()) {
+ b.setModeTransceiverTimer();
+}
TransceiverTimer& TransceiverTimer::instance(){
static TransceiverTimer instance;