diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/cstimer.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/cstimer.cpp index eb2111ff9dff77fc8a5bcec5fdc8f82db277cdd2..0a86f0f90a1dded48d9e4179372a34544433a9b0 100644 --- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/cstimer.cpp +++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/cstimer.cpp @@ -10,11 +10,6 @@ using namespace miosix; static TimeConversion *tc; -// -// class ContextSwitchTimer -// -void __attribute__((used)) cstirqhnd2(){} - namespace miosix { ContextSwitchTimer& ContextSwitchTimer::instance() diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/gpio_timer.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/gpio_timer.cpp index 5a7f8b783073e0cb7bcc7ceff67b6d0da7dee9e5..2460463fede231d7532f406fa2429c4e453fa00a 100644 --- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/gpio_timer.cpp +++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/gpio_timer.cpp @@ -101,7 +101,7 @@ bool GPIOtimer::absoluteWaitTrigger(long long tick){ FastInterruptDisableLock dLock; b.setModeGPIOTimer(false); //output timer setPinMode(false); //output pin - if(b.IRQsetNextInterrupt2(tick)==WaitResult::WAKEUP_IN_THE_PAST){ + if(b.IRQsetNextGPIOInterrupt(tick)==WaitResult::WAKEUP_IN_THE_PAST){ return true; } return false; @@ -116,7 +116,7 @@ bool GPIOtimer::absoluteSyncWaitTrigger(long long tick){ FastInterruptDisableLock dLock; b.setModeGPIOTimer(false); //output timer setPinMode(false); //output pin - if(b.IRQsetNextInterrupt2(tick)==WaitResult::WAKEUP_IN_THE_PAST){ + if(b.IRQsetNextGPIOInterrupt(tick)==WaitResult::WAKEUP_IN_THE_PAST){ return true; } diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp index 6229f9451857afa0a9532eecd04f2ad5d22029f3..b6078679a98791c17ff4b22aa4c1e35f65bf4eda 100644 --- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp +++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp @@ -17,6 +17,7 @@ #include "high_resolution_timer_base.h" #include "kernel/timeconversion.h" #include "gpio_timer.h" +#include "radio_timer.h" #include "../../../../debugpin.h" using namespace miosix; @@ -30,6 +31,7 @@ static long long ms32time = 0; //most significant 32 bits of counter static long long ms32chkp[3] = {0,0,0}; //most significant 32 bits of check point static TimeConversion* tc; + static inline unsigned int IRQread32Timer(){ unsigned int high=TIMER3->CNT; unsigned int low=TIMER1->CNT; @@ -40,6 +42,9 @@ static inline unsigned int IRQread32Timer(){ return high2<<16|TIMER1->CNT; } +/* + This takes almost 50ticks=1us + */ static inline long long IRQgetTick(){ //PENDING BIT TRICK unsigned int counter=IRQread32Timer(); @@ -50,11 +55,9 @@ static inline long long IRQgetTick(){ inline void interruptGPIOTimerRoutine(){ if(TIMER1->CC[2].CTRL & TIMER_CC_CTRL_MODE_OUTPUTCOMPARE){ - //keep high for at least x Us - delayUs(1); TIMER1->CC[2].CTRL = (TIMER1->CC[2].CTRL & ~_TIMER_CC_CTRL_CMOA_MASK) | TIMER_CC_CTRL_CMOA_CLEAR; //I don't need to enable the interrupt because "output" is separated - //10 tick are enought to + //10 tick are enough to TIMER1->CC[2].CCV = static_cast<unsigned int>(TIMER1->CNT+10);//static_cast<unsigned int>(tick & 0xFFFF); } //Reactivating the thread that is waiting for the event. @@ -67,6 +70,22 @@ inline void interruptGPIOTimerRoutine(){ } +inline void interruptRadioTimerRoutine(){ + if(TIMER2->CC[1].CTRL & TIMER_CC_CTRL_MODE_OUTPUTCOMPARE){ + delayUs(1); + TIMER2->CC[1].CTRL = (TIMER2->CC[1].CTRL & ~_TIMER_CC_CTRL_CMOA_MASK) | TIMER_CC_CTRL_CMOA_CLEAR; + TIMER2->CC[1].CCV = static_cast<unsigned int>(TIMER2->CNT+10);//static_cast<unsigned int>(tick & 0xFFFF); + } + + //Reactivating the thread that is waiting for the event. + if(RadioTimer::tWaiting){ + RadioTimer::tWaiting->IRQwakeup(); + if(RadioTimer::tWaiting->IRQgetPriority() > Thread::IRQgetCurrentThread()->IRQgetPriority()) + Scheduler::IRQfindNextThread(); + RadioTimer::tWaiting=nullptr; + } +} + static __attribute__((noinline)) void callScheduler(){ TIMER1->IEN &= ~TIMER_IEN_CC1; TIMER3->IEN &= ~TIMER_IEN_CC1; @@ -109,7 +128,7 @@ static WaitResult setupTimers2(){ fase=0; // We assume that this function is called only when the checkpoint is in future if ((ms32chkp[2] == ms32time && static_cast<unsigned short>(TIMER3->CC[2].CCV+1)==TIMER3->CNT && TIMER1->CNT >= TIMER1->CC[2].CCV ) - || IRQgetTick()>=HighResolutionTimerBase::instance().IRQgetSetTimeCCV2()){ + || HighResolutionTimerBase::instance().IRQgetSetTimeCCV2()<=IRQgetTick()){ // Enable TIM1 since TIM3 has been already matched TIMER1->CC[2].CTRL = (TIMER1->CC[2].CTRL & ~_TIMER_CC_CTRL_CMOA_MASK) | TIMER_CC_CTRL_CMOA_SET; //This line introduce a delay of 10ticks... it should be revised @@ -132,6 +151,13 @@ void __attribute__((naked)) TIMER3_IRQHandler() restoreContext(); } +void __attribute__((naked)) TIMER2_IRQHandler() +{ + saveContext(); + asm volatile("bl _Z10cstirqhnd2v"); + restoreContext(); +} + void __attribute__((naked)) TIMER1_IRQHandler() { saveContext(); @@ -164,6 +190,15 @@ void __attribute__((used)) cstirqhnd3(){ } } } + +void __attribute__((used)) cstirqhnd2(){ + if ((TIMER2->IEN & TIMER_IEN_CC0) && (TIMER2->IF & TIMER_IF_CC0)){ + TIMER2->IEN &= ~ TIMER_IEN_CC0; + TIMER2->IFC = TIMER_IFC_CC0; + interruptRadioTimerRoutine(); + } +} + void __attribute__((used)) cstirqhnd1(){ if ((TIMER1->IEN & TIMER_IEN_CC1) && (TIMER1->IF & TIMER_IF_CC1)){ TIMER1->IFC = TIMER_IFC_CC1; @@ -193,11 +228,6 @@ void __attribute__((used)) cstirqhnd1(){ } } -HighResolutionTimerBase& HighResolutionTimerBase::instance(){ - static HighResolutionTimerBase hrtb; - return hrtb; -} - long long HighResolutionTimerBase::IRQgetSetTimeCCV0() const{ return ms32chkp[0] | TIMER3->CC[0].CCV<<16 | TIMER1->CC[0].CCV; } @@ -208,68 +238,6 @@ long long HighResolutionTimerBase::IRQgetSetTimeCCV2() const{ return ms32chkp[2] | TIMER3->CC[2].CCV<<16 | TIMER1->CC[2].CCV; } -HighResolutionTimerBase::HighResolutionTimerBase() { - //Power the timers up and PRS system - { - InterruptDisableLock l; - CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_TIMER1 | CMU_HFPERCLKEN0_TIMER2 - | CMU_HFPERCLKEN0_TIMER3 | CMU_HFPERCLKEN0_PRS; - } - //Configure Timers - TIMER1->CTRL = TIMER_CTRL_MODE_UP | TIMER_CTRL_CLKSEL_PRESCHFPERCLK - | TIMER_CTRL_PRESC_DIV1 | TIMER_CTRL_SYNC; - TIMER2->CTRL = TIMER_CTRL_MODE_UP | TIMER_CTRL_CLKSEL_PRESCHFPERCLK - | TIMER_CTRL_PRESC_DIV1 | TIMER_CTRL_SYNC; - TIMER3->CTRL = TIMER_CTRL_MODE_UP | TIMER_CTRL_CLKSEL_TIMEROUF - | TIMER_CTRL_SYNC; - - //Code to entirely reset TIMER1, needed if you want run after the flash - TIMER1->CMD=TIMER_CMD_STOP; - TIMER1->CTRL=0; - TIMER1->ROUTE=0; - TIMER1->IEN=0; - TIMER1->IFC=~0; - TIMER1->TOP=0xFFFF; - TIMER1->CNT=0; - TIMER1->CC[0].CTRL=0; - TIMER1->CC[0].CCV=0; - TIMER1->CC[1].CTRL=0; - TIMER1->CC[1].CCV=0; - TIMER1->CC[2].CTRL=0; - TIMER1->CC[2].CCV=0; - - - - //Enable necessary interrupt lines - TIMER1->IEN = 0; - TIMER3->IEN = TIMER_IEN_OF; //OF needed to increment the software counter (32-bit) - - TIMER1->CC[1].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE; - TIMER3->CC[1].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE; - - NVIC_SetPriority(TIMER1_IRQn,3); - NVIC_SetPriority(TIMER3_IRQn,3); - NVIC_ClearPendingIRQ(TIMER3_IRQn); - NVIC_ClearPendingIRQ(TIMER1_IRQn); - NVIC_EnableIRQ(TIMER3_IRQn); - NVIC_EnableIRQ(TIMER1_IRQn); - - timerFreq=48000000; - tc=new TimeConversion(timerFreq); - //Start timers - TIMER1->CMD = TIMER_CMD_START; - //Synchronization is required only when timers are to start. - //If the sync is not disabled after start, start/stop on another timer - //(e.g. TIMER0) will affect the behavior of context switch timer! - TIMER1->CTRL &= ~TIMER_CTRL_SYNC; - TIMER2->CTRL &= ~TIMER_CTRL_SYNC; - TIMER3->CTRL &= ~TIMER_CTRL_SYNC; -} - -HighResolutionTimerBase::~HighResolutionTimerBase() { - delete tc; -} - long long HighResolutionTimerBase::IRQgetCurrentTick(){ return IRQgetTick(); } @@ -301,6 +269,13 @@ void HighResolutionTimerBase::setCCInterrupt2Tim1(bool enable){ TIMER1->IEN&=~TIMER_IEN_CC2; } +void HighResolutionTimerBase::setCCInterrupt0Tim2(bool enable){ + if(enable) + TIMER2->IEN|=TIMER_IEN_CC0; + else + TIMER2->IEN&=~TIMER_IEN_CC0; +} + long long HighResolutionTimerBase::getCurrentTick(){ bool interrupts=areInterruptsEnabled(); //TODO: optimization opportunity, if we can guarantee that no call to this @@ -313,8 +288,32 @@ long long HighResolutionTimerBase::getCurrentTick(){ } -bool HighResolutionTimerBase::IRQsetNextInterrupt0(long long tick){ - return false; +WaitResult HighResolutionTimerBase::IRQsetNextRadioInterrupt(long long tick){ + TIMER2->IEN &= ~TIMER_IEN_CC1; + + long long curTick = IRQgetTick(); + if(curTick >= tick){ + // The interrupt is in the past => call timerInt immediately + interruptGPIOTimerRoutine(); + return WaitResult::WAKEUP_IN_THE_PAST; + }else{ + ms32chkp[0] = tick & upperMask; + TIMER3->CC[0].CCV = static_cast<unsigned int>((tick & 0xFFFF0000)>>16)-1; + TIMER2->IFC = TIMER_IFC_CC1; + TIMER2->CC[1].CCV = static_cast<unsigned int>(tick & 0xFFFF); + + fase=0; + TIMER2->IEN |= TIMER_IEN_CC1; + if(TIMER2->IF & TIMER_IF_CC1 && tick<=IRQgetTick()){ + TIMER2->IEN &= ~TIMER_IEN_CC1; + TIMER2->IFC = TIMER_IFC_CC1; + // If TIM1 matches by the time it is being enabled, call the routine right away + interruptRadioTimerRoutine(); + return WaitResult::EVENT; + } + return WaitResult::WAITING; + //return setupTimers2(); + } } void HighResolutionTimerBase::IRQsetNextInterrupt1(long long tick){ @@ -338,10 +337,11 @@ void HighResolutionTimerBase::IRQsetNextInterrupt1(long long tick){ /* Return true if the pin is going to raise, otherwise false, the pin remain low because the command arrived too late - */ -WaitResult HighResolutionTimerBase::IRQsetNextInterrupt2(long long tick){ + * FIXME: get in trouble if the interrupt is set less than 1.3ms after the current time. Problem due to the 2-phase stages + * FIXME2: there 2 check if the time has passed... + * */ +WaitResult HighResolutionTimerBase::IRQsetNextGPIOInterrupt(long long tick){ TIMER1->IEN &= ~TIMER_IEN_CC2; - TIMER3->IEN &= ~TIMER_IEN_CC2; long long curTick = IRQgetTick(); if(curTick >= tick){ @@ -351,8 +351,20 @@ WaitResult HighResolutionTimerBase::IRQsetNextInterrupt2(long long tick){ }else{ ms32chkp[2] = tick & upperMask; TIMER3->CC[2].CCV = static_cast<unsigned int>((tick & 0xFFFF0000)>>16)-1; + TIMER1->IFC = TIMER_IFC_CC2; TIMER1->CC[2].CCV = static_cast<unsigned int>(tick & 0xFFFF); - return setupTimers2(); + + fase=0; + TIMER1->IEN |= TIMER_IEN_CC2; + if(TIMER1->IF & TIMER_IF_CC2 && tick<=IRQgetTick()){ + TIMER1->IEN &= ~TIMER_IEN_CC2; + TIMER1->IFC = TIMER_IFC_CC2; + // If TIM1 matches by the time it is being enabled, call the routine right away + interruptGPIOTimerRoutine(); + return WaitResult::EVENT; + } + return WaitResult::WAITING; + //return setupTimers2(); } } @@ -375,7 +387,7 @@ void HighResolutionTimerBase::setModeGPIOTimer(bool input){ |PRS_CH_CTRL_SIGSEL_TIMER1CC2; //TIMER3->CC2 as consumer - TIMER3->CC[2].CTRL=TIMER_CC_CTRL_PRSSEL_PRSCH0 + TIMER3->CC[2].CTRL= TIMER_CC_CTRL_PRSSEL_PRSCH0 | TIMER_CC_CTRL_INSEL_PRS | TIMER_CC_CTRL_ICEDGE_BOTH | TIMER_CC_CTRL_MODE_INPUTCAPTURE; @@ -387,3 +399,98 @@ void HighResolutionTimerBase::setModeGPIOTimer(bool input){ } +void HighResolutionTimerBase::setModeRadioTimer(bool input){ + //Connect TIMER2->CC0/1 to pin PA8 and PA9 + TIMER2->ROUTE = TIMER_ROUTE_CC0PEN + | TIMER_ROUTE_CC1PEN + | TIMER_ROUTE_LOCATION_LOC0; + + if(input){ + //Gpio<GPIOA_BASE,8> excChB; + //Configuro la modalità input + TIMER2->CC[0].CTRL = TIMER_CC_CTRL_MODE_INPUTCAPTURE | + TIMER_CC_CTRL_ICEDGE_RISING | + TIMER_CC_CTRL_INSEL_PIN; + + //Config PRS: Timer3 has to be a consumer, Timer2 a producer, TIMER3 keeps the most significative part + //TIMER2->CC0 as producer, i have to specify the event i'm interest in + PRS->CH[1].CTRL|= PRS_CH_CTRL_SOURCESEL_TIMER2 + | PRS_CH_CTRL_SIGSEL_TIMER2CC0; + + //TIMER3->CC2 as consumer + TIMER3->CC[0].CTRL=TIMER_CC_CTRL_PRSSEL_PRSCH1 + | TIMER_CC_CTRL_INSEL_PRS + | TIMER_CC_CTRL_ICEDGE_BOTH + | TIMER_CC_CTRL_MODE_INPUTCAPTURE; + }else{ // Gpio<GPIOA_BASE,9> stxon + TIMER2->CC[1].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE; + TIMER3->CC[1].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE; + } +} + +HighResolutionTimerBase& HighResolutionTimerBase::instance(){ + static HighResolutionTimerBase hrtb; + return hrtb; +} + +HighResolutionTimerBase::HighResolutionTimerBase() { + //Power the timers up and PRS system + { + InterruptDisableLock l; + CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_TIMER1 | CMU_HFPERCLKEN0_TIMER2 + | CMU_HFPERCLKEN0_TIMER3 | CMU_HFPERCLKEN0_PRS; + } + //Configure Timers + TIMER1->CTRL = TIMER_CTRL_MODE_UP | TIMER_CTRL_CLKSEL_PRESCHFPERCLK + | TIMER_CTRL_PRESC_DIV1 | TIMER_CTRL_SYNC; + TIMER2->CTRL = TIMER_CTRL_MODE_UP | TIMER_CTRL_CLKSEL_PRESCHFPERCLK + | TIMER_CTRL_PRESC_DIV1 | TIMER_CTRL_SYNC; + TIMER3->CTRL = TIMER_CTRL_MODE_UP | TIMER_CTRL_CLKSEL_TIMEROUF + | TIMER_CTRL_SYNC; + + //Code to entirely reset TIMER1, needed if you want run after the flash + TIMER1->CMD=TIMER_CMD_STOP; + TIMER1->CTRL=0; + TIMER1->ROUTE=0; + TIMER1->IEN=0; + TIMER1->IFC=~0; + TIMER1->TOP=0xFFFF; + TIMER1->CNT=0; + TIMER1->CC[0].CTRL=0; + TIMER1->CC[0].CCV=0; + TIMER1->CC[1].CTRL=0; + TIMER1->CC[1].CCV=0; + TIMER1->CC[2].CTRL=0; + TIMER1->CC[2].CCV=0; + + + + //Enable necessary interrupt lines + TIMER1->IEN = 0; + TIMER3->IEN = TIMER_IEN_OF; //OF needed to increment the software counter (32-bit) + + TIMER1->CC[1].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE; + TIMER3->CC[1].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE; + + NVIC_SetPriority(TIMER1_IRQn,3); + NVIC_SetPriority(TIMER3_IRQn,3); + NVIC_ClearPendingIRQ(TIMER3_IRQn); + NVIC_ClearPendingIRQ(TIMER1_IRQn); + NVIC_EnableIRQ(TIMER3_IRQn); + NVIC_EnableIRQ(TIMER1_IRQn); + + timerFreq=48000000; + tc=new TimeConversion(timerFreq); + //Start timers + TIMER1->CMD = TIMER_CMD_START; + //Synchronization is required only when timers are to start. + //If the sync is not disabled after start, start/stop on another timer + //(e.g. TIMER0) will affect the behavior of context switch timer! + TIMER1->CTRL &= ~TIMER_CTRL_SYNC; + TIMER2->CTRL &= ~TIMER_CTRL_SYNC; + TIMER3->CTRL &= ~TIMER_CTRL_SYNC; +} + +HighResolutionTimerBase::~HighResolutionTimerBase() { + delete tc; +} \ No newline at end of file diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.h b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.h index ef084bbaa7732b76b954269ea9d4d1f5c46c9235..38453c7af3c5e03fc7842d29fea0889d50183383 100644 --- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.h +++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.h @@ -43,9 +43,9 @@ public: * Can be called with interrupts disabled or within an interrupt. * \param tick the time when the interrupt will be fired, in timer ticks */ - bool IRQsetNextInterrupt0(long long tick); + WaitResult IRQsetNextRadioInterrupt(long long tick); void IRQsetNextInterrupt1(long long tick); - WaitResult IRQsetNextInterrupt2(long long tick); + WaitResult IRQsetNextGPIOInterrupt(long long tick); /** * \return the time when the next interrupt will be fired. @@ -66,7 +66,9 @@ public: void setCCInterrupt1(bool enable); void setCCInterrupt2(bool enable); void setCCInterrupt2Tim1(bool enable); + void setCCInterrupt0Tim2(bool enable); void setModeGPIOTimer(bool input); + void setModeRadioTimer(bool input); /** * \return the current tick count of the timer. * Can only be called with interrupts disabled or within an IRQ diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/radio_timer.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/radio_timer.cpp index 5589214dc33fb43333e3ff85229a17c7e76f0dc8..38c6e7c5533d484542e5c2cb08378e33f49f3839 100644 --- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/radio_timer.cpp +++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/radio_timer.cpp @@ -15,7 +15,7 @@ using namespace miosix; -Thread* RadioTimer::tWaitingRadio=nullptr; +Thread* RadioTimer::tWaiting=nullptr; long long RadioTimer::getValue() const{ return b.getCurrentTick(); @@ -34,14 +34,32 @@ bool RadioTimer::absoluteWait(long long tick){ } bool RadioTimer::absoluteWaitTrigger(long long tick){ - return 0; + return false; } -bool RadioTimer::waitTimeoutOrEvent(long long tick){ - return 0; -} bool RadioTimer::absoluteWaitTimeoutOrEvent(long long tick){ - return 0; + FastInterruptDisableLock dLock; + if(tick<b.getCurrentTick()){ + return true; + } + + b.setModeRadioTimer(true); + b.setCCInterrupt0(false); + b.setCCInterrupt0Tim2(true); + do { + tWaiting=Thread::IRQgetCurrentThread(); + Thread::IRQwait(); + { + FastInterruptEnableLock eLock(dLock); + Thread::yield(); + } + } while(tWaiting && tick>b.getCurrentTick()); + + if(tWaiting==nullptr){ + return false; + }else{ + return true; + } } long long RadioTimer::tick2ns(long long tick){ diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/radio_timer.h b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/radio_timer.h index e23669b2fa83d8aa2076534ebccd33f532999890..61ee5c4bbc295de359a6faaecc95484ff6c3fda9 100644 --- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/radio_timer.h +++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/radio_timer.h @@ -22,7 +22,7 @@ namespace miosix{ public: //transceiver::excChB //usato per la ricezione INPUT_CAPTURE //transceiver::stxon //usato per attivare la trasmissione OUTPUTCOMPARE - static Thread *tWaitingRadio; + static Thread *tWaiting; static RadioTimer& instance(); virtual ~RadioTimer();