From bf1fbf6cdcfa69af0b3f7c45584d76738d8fa4d9 Mon Sep 17 00:00:00 2001
From: Terraneo Federico <fede.tft@miosix.org>
Date: Thu, 6 Feb 2025 00:17:05 +0100
Subject: [PATCH] Serial support for STM32H5 ported, DMA missing does not
compile
---
miosix/arch/common/drivers/serial.h | 5 ++---
miosix/arch/common/drivers/stm32f7_serial.cpp | 16 ++++++++++++++++
2 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/miosix/arch/common/drivers/serial.h b/miosix/arch/common/drivers/serial.h
index 57027645..a36b4df6 100644
--- a/miosix/arch/common/drivers/serial.h
+++ b/miosix/arch/common/drivers/serial.h
@@ -5,10 +5,9 @@
#include "stm32f1_f2_f4_serial.h"
#elif defined(_ARCH_CORTEXM7_STM32F7) || defined(_ARCH_CORTEXM0PLUS_STM32L0) \
|| defined(_ARCH_CORTEXM4_STM32L4) || defined(_ARCH_CORTEXM4_STM32F3) \
- || defined(_ARCH_CORTEXM0_STM32F0) || defined(_ARCH_CORTEXM7_STM32H7)
+ || defined(_ARCH_CORTEXM0_STM32F0) || defined(_ARCH_CORTEXM7_STM32H7) \
+ || defined(_ARCH_CORTEXM33_STM32H5)
#include "stm32f7_serial.h"
-#elif defined(_ARCH_CORTEXM33_STM32H5)
-#include "stm32f1_f2_f4_serial.h" // TODO
#elif defined(_ARCH_CORTEXM3_EFM32GG) || defined(_ARCH_CORTEXM3_EFM32G)
#include "efm32_serial.h"
#elif defined(_ARCH_CORTEXM4_ATSAM4L)
diff --git a/miosix/arch/common/drivers/stm32f7_serial.cpp b/miosix/arch/common/drivers/stm32f7_serial.cpp
index f417427e..8e3ac355 100644
--- a/miosix/arch/common/drivers/stm32f7_serial.cpp
+++ b/miosix/arch/common/drivers/stm32f7_serial.cpp
@@ -405,6 +405,22 @@ static const STM32SerialHW ports[maxPorts] = {
{ LPUART1, LPUART1_IRQn, {lpuart1AfSpans}, true, STM32Bus::APB4, RCC_APB4ENR_LPUART1EN,
{ 0 } },
};
+#elif defined(STM32H503xx)
+constexpr int maxPorts = 3;
+static const STM32SerialHW ports[maxPorts] = {
+ { USART1, USART1_IRQn, {7}, false, STM32Bus::APB2, RCC_APB2ENR_USART1EN,
+ /*{ DMA1, STM32Bus::AHB1, RCC_AHB1ENR_DMA1EN,
+ DMA1_Channel4, DMA1_Channel4_IRQn, STM32SerialDMAHW::Channel4, {4, 25},
+ DMA1_Channel5, DMA1_Channel5_IRQn, STM32SerialDMAHW::Channel5, {5, 24} }*/ },
+ { USART2, USART2_IRQn, {7}, false, STM32Bus::APB1, RCC_APB1ENR_USART2EN,
+ /*{ DMA1, STM32Bus::AHB1, RCC_AHB1ENR_DMA1EN,
+ DMA1_Channel7, DMA1_Channel7_IRQn, STM32SerialDMAHW::Channel7, {7, 27},
+ DMA1_Channel6, DMA1_Channel6_IRQn, STM32SerialDMAHW::Channel6, {6, 26} }*/ },
+ { USART3, USART3_IRQn, {7}, false, STM32Bus::APB1, RCC_APB1ENR_USART3EN,
+ /*{ DMA1, STM32Bus::AHB1, RCC_AHB1ENR_DMA1EN,
+ DMA1_Channel2, DMA1_Channel2_IRQn, STM32SerialDMAHW::Channel2, {2, 29},
+ DMA1_Channel3, DMA1_Channel3_IRQn, STM32SerialDMAHW::Channel3, {3, 28} }*/ },
+};
#else
#error Unsupported STM32 chip for this serial driver
#endif
--
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