diff --git a/.gitignore b/.gitignore
index 4632339bc3d2f11741370a23d7b05d76f52b776a..4ac7e56c53d22cefc9492e6b1dbb273105ebb7bb 100644
--- a/.gitignore
+++ b/.gitignore
@@ -13,3 +13,6 @@ main.map
# Exclude Mac OS X temporary
._*
.DS_Store
+
+# CMake build directory
+build
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
new file mode 100644
index 0000000000000000000000000000000000000000..a2e471ba328bde6e13fd29798088463716bbf0f9
--- /dev/null
+++ b/.gitlab-ci.yml
@@ -0,0 +1,37 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+variables:
+ GIT_SUBMODULE_STRATEGY: recursive
+
+stages:
+ - build
+
+build:
+ stage: build
+ tags:
+ - miosix
+ script:
+ - ./mbs
diff --git a/CMakeLists.txt b/CMakeLists.txt
new file mode 100644
index 0000000000000000000000000000000000000000..fd4a69f5a52988e3e87166badce8af5b33637ff6
--- /dev/null
+++ b/CMakeLists.txt
@@ -0,0 +1,172 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+cmake_minimum_required(VERSION 3.25)
+include(miosix/cmake/mbs.cmake)
+
+project(MiosixExamples)
+
+#-----------------------------------------------------------------------------#
+# Examples #
+#-----------------------------------------------------------------------------#
+
+add_executable(asm miosix/_examples/asm/main.s)
+mbs_target(asm stm32f407vg_stm32f4discovery)
+
+add_executable(atsam4l_lcd miosix/_examples/atsam4l_lcd/main.cpp)
+mbs_target(atsam4l_lcd atsam4lc2aa_generic)
+
+add_executable(blinking_led miosix/_examples/blinking_led/simple.cpp)
+mbs_target(blinking_led stm32f429zi_stm32f4discovery)
+
+add_executable(datalogger
+ ${KPATH}/_examples/datalogger/main.cpp
+ ${KPATH}/_examples/datalogger/Logger.cpp
+ ${KPATH}/_examples/datalogger/tscpp/buffer.cpp
+)
+target_include_directories(datalogger PUBLIC miosix/_examples/datalogger/)
+mbs_target(datalogger stm32f407vg_stm32f4discovery)
+
+add_executable(hd44780 miosix/_examples/hd44780/hd44780.cpp)
+mbs_target(hd44780 stm32f407vg_stm32f4discovery)
+
+add_executable(ir_decoder miosix/_examples/ir_decoder/ir_decoder.cpp)
+mbs_target(ir_decoder stm32f407vg_stm32f4discovery)
+
+add_executable(led_display miosix/_examples/led_display/main.cpp)
+mbs_target(led_display stm32f100rb_stm32vldiscovery)
+
+add_executable(sad_trombone
+ miosix/_examples/sad_trombone/main.cpp
+ miosix/_examples/sad_trombone/player.cpp
+ miosix/_examples/sad_trombone/adpcm.c
+)
+mbs_target(sad_trombone stm32f407vg_stm32f4discovery)
+
+add_executable(servo-prompt miosix/_examples/servo/prompt.cpp)
+mbs_target(servo-prompt stm32f407vg_stm32f4discovery)
+
+add_executable(servo-sweep miosix/_examples/servo/sweep.cpp)
+mbs_target(servo-sweep stm32f407vg_stm32f4discovery)
+
+add_executable(streamwriter miosix/_examples/streamwriter/streamwriter.cpp)
+mbs_target(streamwriter stm32f407vg_stm32f4discovery)
+
+add_executable(termios miosix/_examples/termios/main.cpp)
+mbs_target(termios stm32f407vg_stm32f4discovery)
+
+add_executable(thread_native miosix/_examples/thread_native/native_thread_example.cpp)
+mbs_target(thread_native stm32f407vg_stm32f4discovery)
+
+add_executable(thread_pthread miosix/_examples/thread_pthread/pthread_example.cpp)
+mbs_target(thread_pthread stm32f407vg_stm32f4discovery)
+
+#-----------------------------------------------------------------------------#
+# Others #
+#-----------------------------------------------------------------------------#
+
+add_executable(delay_test miosix/_tools/delay_test/delay_test.cpp)
+mbs_target(delay_test stm32f407vg_stm32f4discovery)
+
+add_executable(feedforward_profiling miosix/_tools/feedforward_profiling/test.cpp)
+mbs_target(feedforward_profiling stm32f407vg_stm32f4discovery)
+
+add_executable(fs_backend miosix/_tools/fs_backend/backend_benchmark.cpp)
+mbs_target(fs_backend stm32f407vg_stm32f4discovery)
+
+add_executable(fs_misc_testcode miosix/_tools/fs_misc_testcode/dirlist.cpp)
+mbs_target(fs_misc_testcode stm32f407vg_stm32f4discovery)
+
+# To build this entrypoint remember to define WITH_PROCESSES in miosix_settings.h
+# add_executable(processes miosix/_tools/processes/main_processes.cpp)
+# target_include_directories(processes PUBLIC miosix/_tools/processes/)
+# add_custom_command(
+# TARGET processes
+# COMMAND make
+# WORKING_DIRECTORY ${KPATH}/_tools/processes/process_template
+# )
+# mbs_target(processes stm32f407vg_stm32f4discovery)
+
+add_executable(ram_test
+ miosix/_tools/ram_test/main.cpp
+ miosix/_tools/ram_test/sha1.cpp
+)
+mbs_target(ram_test stm32f407vg_stm32f4discovery)
+
+# If you want to test the MPU remember to run build.sh in miosix/_tools/testsuite
+# add_executable(testsuite miosix/_tools/testsuite/testsuite.cpp)
+# mbs_target(testsuite stm32f407vg_stm32f4discovery)
+
+# Build the testsuite for all supported boards to test compilation
+set(TESTSUITE_BOARDS
+ lpc2138_miosix_board
+ # stm32f072rb_stm32f0discovery
+ efm32gg332f1024_wandstem
+ # stm32f100c8_microboard
+ # stm32f100c8_vaisala_rs41
+ # stm32f100cb_tempsensor
+ # stm32f100cx_generic
+ # stm32f100rb_stm32vldiscovery
+ stm32f100rc_solertegiard
+ # stm32f103c8_breakout
+ # stm32f103cb_als_mainboard_rev2
+ # stm32f103cx_generic
+ stm32f103ve_mp3v2
+ stm32f103ve_strive_mini
+ stm32f103ze_redbull_v2
+ stm32f103ze_stm3210e-eval
+ stm32f205_generic
+ stm32f205rc_skyward_stormtrooper
+ stm32f205rg_sony-newman
+ stm32f207ig_stm3220g-eval
+ stm32f207ze_als_camboard
+ stm32f207zg_EthBoardV2
+ stm32f207zg_nucleo
+ # stm32l151c8_als_mainboard
+ # atsam4lcc
+ stm32f303vc_stm32f3discovery
+ stm32f401re_nucleo
+ stm32f401vc_stm32f4discovery
+ stm32f407vg_bitsboard
+ stm32f407vg_stm32f4discovery
+ stm32f407vg_thermal_test_chip
+ stm32f411ce_blackpill
+ stm32f411re_nucleo
+ stm32f429zi_oledboard2
+ stm32f429zi_skyward_anakin
+ stm32f429zi_skyward_homeone
+ stm32f429zi_stm32f4discovery
+ stm32f469ni_stm32f469i-disco
+ stm32l4r9zi_sensortile
+ stm32l476rg_nucleo
+ stm32f746zg_nucleo
+ stm32f767zi_nucleo
+ # stm32f769ni_discovery
+ stm32h753xi_eval
+)
+foreach(OPT_BOARD ${TESTSUITE_BOARDS})
+ add_executable(testsuite-${OPT_BOARD} miosix/_tools/testsuite/testsuite.cpp)
+ mbs_target(testsuite-${OPT_BOARD} ${OPT_BOARD})
+endforeach()
diff --git a/mbs b/mbs
new file mode 100755
index 0000000000000000000000000000000000000000..1c0f113292df6d1c34ac248780711ace7a01d90e
--- /dev/null
+++ b/mbs
@@ -0,0 +1,303 @@
+#!/bin/bash
+
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+print_banner() {
+ cat <<EOF
++---------------------------------------------------------------+
+| __ __ _ _ |
+| | \\/ (_) ___ ___(_)_ __ |
+| | |\\/| | |/ _ \\/ __| \\ \\/ / |
+| | | | | | (_) \\__ \\ |> < |
+| |_| |_|_|\\___/|___/_/_/\\_\\ |
+| ____ _ _ _ ____ _ |
+| | __ ) _ _(_) | __| | / ___| _ _ ___| |_ ___ _ __ ___ |
+| | _ \\| | | | | |/ _\` | \\___ \\| | | / __| __/ _ \\ '_ \` _ \\ |
+| | |_) | |_| | | | (_| | ___) | |_| \\__ \\ || __/ | | | | | |
+| |____/ \\__,_|_|_|\\__,_| |____/ \\__, |___/\\__\\___|_| |_| |_| |
++----------------------------------|___/-------------------v1.0-+
+EOF
+}
+
+usage() {
+ echo
+ cat <<EOF
+Usage: $(basename "$0") [OPTIONS]
+
+OPTIONS:
+ General Options:
+ -h, --help Show this help message and exit
+ -j JOBS, --jobs JOBS Build or lint in parallel using a specific number of jobs
+ -l, --list_targets List all targets available
+ -r, --list_boards List all boards available
+
+ Build Options:
+ -b TARGET, --build TARGET
+ Build a specific target
+ -f TARGET, --flash TARGET
+ Build and flash a specific target
+ -c, --clean Clean the working tree
+ -u, --configure Force configure and do not build
+ -d, --debug Enable debug
+ -v, --verbose Print a verbose output
+EOF
+}
+
+ohai() {
+ printf "\n${TTY_BLUE}==>${TTY_RESET}${TTY_BOLD} %s${TTY_RESET}\n" "$@"
+}
+
+init_dirs() {
+ msb_base=$(cd -- $(dirname "$0") > /dev/null 2>&1 && pwd -P)
+ source_dir="$PWD"
+ build_dir="$source_dir/$BUILD_DEFAULT_DIRNAME"
+ toolchain_file="$msb_base/miosix/cmake/toolchain.cmake"
+}
+
+find_deps() {
+ ohai "Find dependencies"
+
+ command -v cmake > /dev/null 2>&1 && found_cmake=true
+ command -v arm-miosix-eabi-g++ > /dev/null 2>&1 && found_miosixgpp=true
+ command -v ccache > /dev/null 2>&1 && found_ccache=true
+ command -v ninja > /dev/null 2>&1 && found_ninja=true
+ command -v st-flash > /dev/null 2>&1 && found_stflash=true
+
+ printf "Found CMake: "; [ "$found_cmake" = true ] && echo "yes" || echo "no"
+ printf "Found arm-miosix-eabi-g++: "; [ "$found_miosixgpp" = true ] && echo "yes" || echo "no"
+ printf "Found Ccache: "; [ "$found_ccache" = true ] && echo "yes" || echo "no"
+ printf "Found Ninja: "; [ "$found_ninja" = true ] && echo "yes" || echo "no"
+ printf "Found st-flash: "; [ "$found_stflash" = true ] && echo "yes" || echo "no"
+
+ [ "$found_cmake" = true ] || { echo "Error: CMake must be installed"; return 1; }
+ [ "$found_miosixgpp" = true ] || { echo "Error: arm-miosix-eabi-g++ must be installed"; return 1; }
+
+ # TODO: Maybe prompt the user to download and intall miosix?
+}
+
+configure() {
+ declare build_dir="$1"
+
+ ohai "Configure"
+
+ [ -f "$toolchain_file" ] || { echo "Error: CMake Toolchain File for Miosix was not found"; return 1; }
+
+ # Always use colors when possible
+ defs+=(-DCMAKE_C_FLAGS=-fdiagnostics-color=always -DCMAKE_CXX_FLAGS=-fdiagnostics-color=always)
+
+ # Toolchain files
+ defs+=(-DCMAKE_TOOLCHAIN_FILE="$toolchain_file")
+
+ # Use ccache when available
+ [ "$found_ccache" = true ] && defs+=(-DCMAKE_C_COMPILER_LAUNCHER=ccache -DCMAKE_CXX_COMPILER_LAUNCHER=ccache)
+
+ # Debug or release build types
+ [ "$config_debug" = true ] && defs+=(-DCMAKE_BUILD_TYPE=Debug) || defs+=(-DCMAKE_BUILD_TYPE=Release)
+
+ # Verbose output
+ [ "$config_verbose" = true ] && defs+=(-DCMAKE_VERBOSE_MAKEFILE=ON)
+
+ # CMake generator
+ declare gen
+ [ "$found_ninja" = true ] && gen=-GNinja || gen=-G"Unix Makefiles"
+
+ # Configure build
+ cmake -B"$build_dir" "${defs[@]}" "$gen" "$source_dir" || return
+
+ # Save configuration to avoid reconfiguring each time
+ { [ "$config_debug" = true ] && touch "$build_dir/$DEBUG_FILENAME"; } || rm -f "$build_dir/$DEBUG_FILENAME"
+ { [ "$config_verbose" = true ] && touch "$build_dir/$VERBOSE_FILENAME"; } || rm -f "$build_dir/$VERBOSE_FILENAME"
+}
+
+check_configured() {
+ declare build_dir="$1"
+
+ declare to_reconfigure=false
+ if [ ! -d "$build_dir" ]; then
+ to_reconfigure=true
+ elif [ ! -f "$build_dir/$CMAKE_FILENAME" ]; then
+ rm -rf "$build_dir"
+ to_reconfigure=true
+ else
+ [ -f "$build_dir/$DEBUG_FILENAME" ] && found_debug=true || found_debug=false
+ [ -f "$build_dir/$VERBOSE_FILENAME" ] && found_verbose=true || found_verbose=false
+ if [ "$config_debug" != "$found_debug" ] \
+ || [ "$config_verbose" != "$found_verbose" ]; then
+ to_reconfigure=true
+ fi
+ fi
+
+ if [ "$to_reconfigure" = true ]; then
+ configure "$build_dir"
+ fi
+}
+
+build() {
+ declare build_dir="$1"
+ declare target="$2"
+
+ check_configured "$build_dir" || return
+
+ ohai "Build"
+
+ get_build_opts
+
+ cmake --build "$build_dir" "${opts[@]}" --target "$target"
+}
+
+build_all() {
+ build "$build_dir" all
+}
+
+clean() {
+ ohai "Cleaning build files"
+
+ if [ -f "$build_dir/$CMAKE_FILENAME" ]; then
+ get_build_opts
+
+ cmake --build "$build_dir" "${opts[@]}" --target clean
+ fi
+
+ echo "Removing build folder..."
+ rm -rf "$build_dir"
+}
+
+flash() {
+ declare target="$1"
+ build "$build_dir" "$target" || return
+
+ # This variable will be evaluated in the command
+ declare binary=$build_dir/$target.bin
+ declare hex=$build_dir/$target.hex
+
+ # Check if the target has a custom build command
+ declare custom_command_file=$build_dir/flash-$target.txt
+ if [[ -f "$custom_command_file" ]]; then
+ ohai "Flash via custom command"
+ eval $(cat $custom_command_file)
+ elif [ "$found_stflash" = true ]; then
+ ohai "Flash via st-flash"
+ st-flash --reset write "$build_dir/$target.bin" 0x8000000
+ else
+ echo "Error: No flashing software found!"
+ return 1
+ fi
+}
+
+list_targets() {
+ check_configured "$build_dir" || return
+
+ ohai "List targets"
+
+ echo "[1/1] All MBS targets available:"
+ cmake --build "$build_dir" --target help \
+ | grep -o '^[^/]*\.bin' | cut -f 1 -d '.'
+}
+
+list_boards() {
+ check_configured "$build_dir" || return
+
+ ohai "List boards"
+
+ cmake --build "$build_dir" --target help-boards
+}
+
+set_debug() {
+ config_debug=true
+}
+
+set_verbose() {
+ config_verbose=true
+}
+
+set_jobs() {
+ jobs="$1"
+}
+
+get_build_opts() {
+ declare -a opts
+ [ -n "$jobs" ] && opts=("-j $jobs")
+}
+
+CMAKE_FILENAME="CMakeCache.txt"
+DEBUG_FILENAME=".sbs_debug"
+VERBOSE_FILENAME=".sbs_verbose"
+BUILD_DEFAULT_DIRNAME="build"
+TTY_BLUE="\033[34m"
+TTY_BOLD="\033[1m"
+TTY_RESET="\033[0m"
+
+msb_base=
+source_dir=
+build_dir=
+toolchain_file=
+found_cmake=false
+found_miosixgpp=false
+found_ccache=false
+found_ninja=false
+found_stflash=false
+config_debug=false
+config_verbose=false
+jobs=
+
+print_banner
+init_dirs
+
+for arg in "$@"; do
+ shift
+ case "$arg" in
+ --help) set -- "$@" "-h";;
+ --jobs) set -- "$@" "-j";;
+ --list_targets) set -- "$@" "-l";;
+ --list_boards) set -- "$@" "-r";;
+ --build) set -- "$@" "-b";;
+ --flash) set -- "$@" "-f";;
+ --clean) set -- "$@" "-c";;
+ --configure) set -- "$@" "-u";;
+ --debug) set -- "$@" "-d";;
+ --verbose) set -- "$@" "-v";;
+ *) set -- "$@" "$arg"
+ esac
+done
+
+while getopts b:cdef:hj:lnrt:uv opt; do
+ case "$opt" in
+ h) usage; exit 0;;
+ j) set_jobs "$OPTARG";;
+ l) find_deps && list_targets; exit;;
+ r) find_deps && list_boards; exit;;
+ b) find_deps && build "$build_dir" "$OPTARG"; exit;;
+ f) find_deps && flash "$OPTARG"; exit;;
+ c) find_deps && clean; exit;;
+ u) find_deps && configure "$build_dir"; exit;;
+ d) set_debug;;
+ v) set_verbose;;
+ ?) usage; exit 2;;
+ esac
+done
+shift $((OPTIND - 1))
+
+find_deps && build_all
diff --git a/miosix/_examples/sad_trombone/player.cpp b/miosix/_examples/sad_trombone/player.cpp
index e696766c838728979e99447e1a9d8ba9b1bb4cff..42d020da1999db600fa89f0e9a9705f61479fa9e 100644
--- a/miosix/_examples/sad_trombone/player.cpp
+++ b/miosix/_examples/sad_trombone/player.cpp
@@ -28,7 +28,7 @@
#include <algorithm>
#include <stdexcept>
#include <cstring>
-#include "miosix/kernel/scheduler/scheduler.h"
+#include <kernel/scheduler/scheduler.h>
#include "util/software_i2c.h"
#include "adpcm.h"
#include "player.h"
diff --git a/miosix/_examples/thread_native/native_thread_example.cpp b/miosix/_examples/thread_native/native_thread_example.cpp
index fbf1a6615fb5ae6456bb5d6b02f3d4682d91dde2..fa95d6e82ab16fd43097d00c98d24ecd8d651c6a 100644
--- a/miosix/_examples/thread_native/native_thread_example.cpp
+++ b/miosix/_examples/thread_native/native_thread_example.cpp
@@ -33,11 +33,11 @@ int main()
thread=Thread::create(threadfunc,2048,1,(void*)strlen(str),Thread::JOINABLE);
{
Lock<Mutex> lock(mutex);
- for(int i=0;i<strlen(str);i++)
+ for(int i=0;i<(int)strlen(str);i++)
{
c=str[i];
cond.signal();
- if(i<strlen(str)-1) ack.wait(lock);
+ if(i<(int)strlen(str)-1) ack.wait(lock);
}
}
thread->join();
diff --git a/miosix/_examples/thread_pthread/pthread_example.cpp b/miosix/_examples/thread_pthread/pthread_example.cpp
index fc0c5694d763d3bc5df394882cdebe805fd26337..0eb7026526c3f0b608f38af2bb245530b18ea849 100644
--- a/miosix/_examples/thread_pthread/pthread_example.cpp
+++ b/miosix/_examples/thread_pthread/pthread_example.cpp
@@ -24,6 +24,7 @@ void *threadfunc(void *argv)
c=0;
}
pthread_mutex_unlock(&mutex);
+ return nullptr;
}
int main()
@@ -33,11 +34,11 @@ int main()
pthread_t thread;
pthread_create(&thread,NULL,threadfunc,(void*)strlen(str));
pthread_mutex_lock(&mutex);
- for(int i=0;i<strlen(str);i++)
+ for(int i=0;i<(int)strlen(str);i++)
{
c=str[i];
pthread_cond_signal(&cond);
- if(i<strlen(str)-1) pthread_cond_wait(&ack,&mutex);
+ if(i<(int)strlen(str)-1) pthread_cond_wait(&ack,&mutex);
}
pthread_mutex_unlock(&mutex);
pthread_join(thread,NULL);
diff --git a/miosix/_tools/fs_misc_testcode/dirlist.cpp b/miosix/_tools/fs_misc_testcode/dirlist.cpp
index 6042f509d0a89e62c30aace8b96fafe051c04e7c..2bb990148ada2c9367462bb4dbdecad5161172bc 100644
--- a/miosix/_tools/fs_misc_testcode/dirlist.cpp
+++ b/miosix/_tools/fs_misc_testcode/dirlist.cpp
@@ -22,7 +22,7 @@ void printStat(struct dirent *de, struct stat *st)
close(fd);
}
} else st2.st_ino=st->st_ino; //Can't fstat() an fd to a directory
- printf("%13s iD=%d iS=%d iF=%d dev=%d mode=%#o size=%d\n",
+ printf("%13s iD=%ld iS=%ld iF=%ld dev=%d mode=%#lo size=%lld\n",
de->d_name,de->d_ino,st->st_ino,st2.st_ino,st->st_dev,st->st_mode,st->st_size);
}
@@ -40,7 +40,7 @@ int main()
if(d==NULL) perror("opendir");
else {
struct dirent *de;
- while(de=readdir(d))
+ while((de=readdir(d)))
{
struct stat st;
if(stat(de->d_name,&st)<0) perror(de->d_name);
diff --git a/miosix/_tools/ram_test/main.cpp b/miosix/_tools/ram_test/main.cpp
index 24963c8f3524ed36557bb71bf72c59dfbf21b094..4c8166f6e14c076894b4379f0184fe27f63dd7e9 100644
--- a/miosix/_tools/ram_test/main.cpp
+++ b/miosix/_tools/ram_test/main.cpp
@@ -31,8 +31,10 @@ bool shaCmp(unsigned int a[5], unsigned int b[5])
{
if(memcmp(a,b,20)==0) return false;
iprintf("Mismatch\n");
- for(int i=0;i<5;i++) iprintf("%04x",a[i]); iprintf("\n");
- for(int i=0;i<5;i++) iprintf("%04x",b[i]); iprintf("\n");
+ for(int i=0;i<5;i++) iprintf("%04x",a[i]);
+ iprintf("\n");
+ for(int i=0;i<5;i++) iprintf("%04x",b[i]);
+ iprintf("\n");
return true;
}
diff --git a/miosix/cmake/boards.cmake b/miosix/cmake/boards.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..f3ac973f102c436ae23463765eaa6ed38438ec8f
--- /dev/null
+++ b/miosix/cmake/boards.cmake
@@ -0,0 +1,71 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(MIOSIX_BOARDS_OPTIONS_FILES
+ ${KPATH}/config/arch/arm7_lpc2000/lpc2138_miosix_board/board_options.cmake
+ ${KPATH}/config/arch/cortexM0_stm32f0/stm32f072rb_stm32f0discovery/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f100c8_microboard/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f100c8_vaisala_rs41/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f100cb_tempsensor/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f100cx_generic/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f100rb_stm32vldiscovery/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f100rc_solertegiard/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f103c8_breakout/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f103cb_als_mainboard_rev2/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f103cx_generic/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f103ve_mp3v2/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f103ve_strive_mini/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f103ze_redbull_v2/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f1/stm32f103ze_stm3210e-eval/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f2/stm32f205_generic/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f2/stm32f205rc_skyward_stormtrooper/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f2/stm32f205rg_sony-newman/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f2/stm32f207ig_stm3220g-eval/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f2/stm32f207ze_als_camboard/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f2/stm32f207zg_EthBoardV2/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32f2/stm32f207zg_nucleo/board_options.cmake
+ ${KPATH}/config/arch/cortexM3_stm32l1/stm32l151c8_als_mainboard/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_atsam4l/atsam4lc2aa_generic/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f3/stm32f303vc_stm32f3discovery/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f401re_nucleo/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f401vc_stm32f4discovery/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f407vg_bitsboard/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f407vg_thermal_test_chip/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f411ce_blackpill/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f411re_nucleo/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f429zi_oledboard2/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_homeone/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32f4/stm32f469ni_stm32f469i-disco/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32l4/stm32l4r9zi_sensortile/board_options.cmake
+ ${KPATH}/config/arch/cortexM4_stm32l4/stm32l476rg_nucleo/board_options.cmake
+ ${KPATH}/config/arch/cortexM7_stm32f7/stm32f746zg_nucleo/board_options.cmake
+ ${KPATH}/config/arch/cortexM7_stm32f7/stm32f767zi_nucleo/board_options.cmake
+ ${KPATH}/config/arch/cortexM7_stm32f7/stm32f769ni_discovery/board_options.cmake
+ ${KPATH}/config/arch/cortexM7_stm32h7/stm32h753xi_eval/board_options.cmake
+)
diff --git a/miosix/cmake/mbs.cmake b/miosix/cmake/mbs.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..b143c1310fcdeee0b38d12a5bca1115fca77070d
--- /dev/null
+++ b/miosix/cmake/mbs.cmake
@@ -0,0 +1,69 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+enable_language(C CXX ASM)
+
+# Include the Miosix libraries
+list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_LIST_DIR})
+include(miosix)
+
+# Create a custom target to list all the boards
+string(REPLACE ";" "\\n" BOARDS_STR "${MIOSIX_BOARDS}")
+add_custom_target(
+ help-boards
+ COMMAND printf ${BOARDS_STR}
+ COMMENT "All boards available:"
+ VERBATIM
+)
+
+# Function to link the Miosix libraries to the target
+function(mbs_target TARGET OPT_BOARD)
+ if(NOT OPT_BOARD)
+ message(FATAL_ERROR "No board selected")
+ endif()
+
+ # Link libraries
+ target_link_libraries(${TARGET} PRIVATE
+ $<TARGET_OBJECTS:Miosix::Boot::${OPT_BOARD}>
+ $<LINK_GROUP:RESCAN,Miosix::Kernel::${OPT_BOARD},stdc++,c,m,gcc,atomic>
+ )
+
+ # Linker script and linking options are eredited from the kernel library
+
+ # Add a post build command to create the hex file to flash on the board
+ add_custom_command(
+ TARGET ${TARGET} POST_BUILD
+ COMMAND ${CMAKE_OBJCOPY} -O ihex ${TARGET} ${TARGET}.hex
+ COMMAND ${CMAKE_OBJCOPY} -O binary ${TARGET} ${TARGET}.bin
+ BYPRODUCTS ${TARGET}.hex ${TARGET}.bin
+ VERBATIM
+ )
+
+ # Save custom flash command to file
+ get_target_property(PROGRAM_CMDLINE Miosix::Kernel::${OPT_BOARD} PROGRAM_CMDLINE)
+ if(NOT PROGRAM_CMDLINE STREQUAL "PROGRAM_CMDLINE-NOTFOUND")
+ file(WRITE "${CMAKE_CURRENT_BINARY_DIR}/flash-${TARGET}.txt" ${PROGRAM_CMDLINE})
+ endif()
+endfunction()
diff --git a/miosix/cmake/miosix.cmake b/miosix/cmake/miosix.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..6d6f9fc98326d6ad1944c0d4e89a3f6b8fd32007
--- /dev/null
+++ b/miosix/cmake/miosix.cmake
@@ -0,0 +1,139 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+# Load in KPATH the project path
+cmake_path(GET CMAKE_CURRENT_LIST_DIR PARENT_PATH KPATH)
+
+# Include board list
+include(${KPATH}/cmake/boards.cmake)
+
+# Miosix source files
+set(MIOSIX_SRC
+ ${KPATH}/kernel/kernel.cpp
+ ${KPATH}/kernel/sync.cpp
+ ${KPATH}/kernel/error.cpp
+ ${KPATH}/kernel/pthread.cpp
+ ${KPATH}/kernel/stage_2_boot.cpp
+ ${KPATH}/kernel/elf_program.cpp
+ ${KPATH}/kernel/process.cpp
+ ${KPATH}/kernel/process_pool.cpp
+ ${KPATH}/kernel/timeconversion.cpp
+ ${KPATH}/kernel/intrusive.cpp
+ ${KPATH}/kernel/SystemMap.cpp
+ ${KPATH}/kernel/cpu_time_counter.cpp
+ ${KPATH}/kernel/scheduler/priority/priority_scheduler.cpp
+ ${KPATH}/kernel/scheduler/control/control_scheduler.cpp
+ ${KPATH}/kernel/scheduler/edf/edf_scheduler.cpp
+ ${KPATH}/filesystem/file_access.cpp
+ ${KPATH}/filesystem/file.cpp
+ ${KPATH}/filesystem/stringpart.cpp
+ ${KPATH}/filesystem/console/console_device.cpp
+ ${KPATH}/filesystem/mountpointfs/mountpointfs.cpp
+ ${KPATH}/filesystem/devfs/devfs.cpp
+ ${KPATH}/filesystem/fat32/fat32.cpp
+ ${KPATH}/filesystem/fat32/ff.cpp
+ ${KPATH}/filesystem/fat32/diskio.cpp
+ ${KPATH}/filesystem/fat32/wtoupper.cpp
+ ${KPATH}/filesystem/fat32/ccsbcs.cpp
+ ${KPATH}/stdlib_integration/libc_integration.cpp
+ ${KPATH}/stdlib_integration/libstdcpp_integration.cpp
+ ${KPATH}/e20/e20.cpp
+ ${KPATH}/e20/unmember.cpp
+ ${KPATH}/util/util.cpp
+ ${KPATH}/util/unicode.cpp
+ ${KPATH}/util/version.cpp
+ ${KPATH}/util/crc16.cpp
+ ${KPATH}/util/lcd44780.cpp
+)
+
+# Function to configure a target to be built for the kernel
+function(configure_target_for_kernel TARGET)
+ # Include kernel directories
+ target_include_directories(${TARGET} PUBLIC
+ ${KPATH}
+ ${KPATH}/arch/common
+ ${ARCH_PATH}
+ ${BOARD_PATH}
+ ${BOARD_CONFIG_PATH}
+ )
+
+ # Set include path where to find config/miosix_settings.h
+ if(DEFINED BOARD_MIOSIX_SETTINGS_PATH)
+ target_include_directories(${TARGET} PUBLIC ${BOARD_MIOSIX_SETTINGS_PATH})
+ else()
+ target_include_directories(${TARGET} PUBLIC ${KPATH}/default)
+ endif()
+
+ # Define COMPILING_MIOSIX (only for C and C++)
+ target_compile_definitions(${TARGET} PRIVATE $<$<OR:$<COMPILE_LANGUAGE:C>,$<COMPILE_LANGUAGE:CXX>>:COMPILING_MIOSIX>)
+
+ # Require cpp14 target_compile_features (this will add the -std=c++14 flag)
+ target_compile_features(${TARGET} PUBLIC cxx_std_14)
+
+ # Configure compiler flags
+ target_compile_options(${TARGET} PUBLIC
+ $<$<COMPILE_LANGUAGE:ASM>:${AFLAGS_BASE}>
+ $<$<COMPILE_LANGUAGE:C>:${DFLAGS} ${CFLAGS_BASE}>
+ $<$<COMPILE_LANGUAGE:CXX>:${DFLAGS} ${CXXFLAGS_BASE}>
+ )
+endfunction()
+
+# Creates the Miosix::Boot::${BOARD_NAME} and Miosix::Kernel::${BOARD_NAME} libraries
+function(add_miosix_libraries BOARD_OPTIONS_FILE)
+ # Get board options
+ include(${BOARD_OPTIONS_FILE})
+
+ # Create a library for the boot file
+ set(BOOT_LIB boot-${BOARD_NAME})
+ add_library(${BOOT_LIB} OBJECT EXCLUDE_FROM_ALL ${BOOT_FILE})
+ configure_target_for_kernel(${BOOT_LIB})
+
+ # Create a library for the rest of the kernel
+ set(KERNEL_LIB kernel-${BOARD_NAME})
+ add_library(${KERNEL_LIB} STATIC EXCLUDE_FROM_ALL ${MIOSIX_SRC} ${ARCH_SRC})
+ configure_target_for_kernel(${KERNEL_LIB})
+ add_custom_command(
+ TARGET ${KERNEL_LIB} PRE_LINK
+ COMMAND perl ${KPATH}/_tools/kernel_global_objects.pl $<TARGET_OBJECTS:${KERNEL_LIB}>
+ VERBATIM
+ COMMAND_EXPAND_LISTS
+ )
+
+ # Configure linker file and options
+ set_property(TARGET ${KERNEL_LIB} PROPERTY INTERFACE_LINK_DEPENDS ${LINKER_SCRIPT})
+ target_link_options(${KERNEL_LIB} INTERFACE ${LFLAGS_BASE})
+
+ # Configure flash command
+ set_property(TARGET ${KERNEL_LIB} PROPERTY PROGRAM_CMDLINE ${PROGRAM_CMDLINE})
+
+ # Create nice aliases for the libraries
+ add_library(Miosix::Boot::${BOARD_NAME} ALIAS ${BOOT_LIB})
+ add_library(Miosix::Kernel::${BOARD_NAME} ALIAS ${KERNEL_LIB})
+endfunction()
+
+# Create Miosix libraries for each board
+foreach(BOARD_OPTIONS_FILE ${MIOSIX_BOARDS_OPTIONS_FILES})
+ add_miosix_libraries(${BOARD_OPTIONS_FILE})
+endforeach()
diff --git a/miosix/cmake/toolchain.cmake b/miosix/cmake/toolchain.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..d6a47e7fa47ad7f1b71b6efd040d1e792ba160e6
--- /dev/null
+++ b/miosix/cmake/toolchain.cmake
@@ -0,0 +1,48 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+# Tell CMake that we are building for an embedded ARM system
+set(CMAKE_SYSTEM_NAME Linux)
+set(CMAKE_SYSTEM_PROCESSOR arm)
+
+# Select compiler
+set(PREFIX arm-miosix-eabi-)
+
+# From compiler prefix form the name of the compiler and other tools
+set(CMAKE_ASM_COMPILER ${PREFIX}as)
+set(CMAKE_C_COMPILER ${PREFIX}gcc)
+set(CMAKE_CXX_COMPILER ${PREFIX}g++)
+set(CMAKE_AR ${PREFIX}ar)
+set(CMAKE_OBJCOPY ${PREFIX}objcopy)
+set(CMAKE_OBJDUMP ${PREFIX}objdump)
+set(CMAKE_SIZE ${PREFIX}size)
+
+# Reset default compiler flags
+set(CMAKE_ASM_FLAGS_DEBUG "" CACHE INTERNAL "asm debug compiler flags")
+set(CMAKE_ASM_FLAGS_RELEASE "" CACHE INTERNAL "asm release compiler flags")
+set(CMAKE_C_FLAGS_DEBUG "" CACHE INTERNAL "c debug compiler flags")
+set(CMAKE_C_FLAGS_RELEASE "" CACHE INTERNAL "c release compiler flags")
+set(CMAKE_CXX_FLAGS_DEBUG "" CACHE INTERNAL "cxx debug compiler flags")
+set(CMAKE_CXX_FLAGS_RELEASE "" CACHE INTERNAL "cxx release compiler flags")
diff --git a/miosix/config/arch/arm7_lpc2000/lpc2138_miosix_board/board_options.cmake b/miosix/config/arch/arm7_lpc2000/lpc2138_miosix_board/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..359e97c0400a3928cb88ae87b1547c24c5763853
--- /dev/null
+++ b/miosix/config/arch/arm7_lpc2000/lpc2138_miosix_board/board_options.cmake
@@ -0,0 +1,87 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME lpc2138_miosix_board)
+set(ARCH_NAME arm7_lpc2000)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.s)
+set(LINKER_SCRIPT ${BOARD_PATH}/miosix.ld)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "lpc21isp -verify $hex /dev/ttyUSB0 115200 14746")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=arm7tdmi)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE} -mapcs-32 -mfloat-abi=soft)
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_MIOSIX_BOARD "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_ARM7_LPC2000
+ ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${BOARD_PATH}/interfaces-impl/delays.cpp
+ ${BOARD_PATH}/interfaces-impl/os_timer.cpp
+ ${BOARD_PATH}/interfaces-impl/portability.cpp
+ ${KPATH}/arch/common/core/interrupts_arm7.cpp
+ ${KPATH}/arch/common/drivers/serial_lpc2000.cpp
+ ${KPATH}/arch/common/drivers/sd_lpc2000.cpp
+)
diff --git a/miosix/config/arch/cortexM0_stm32f0/stm32f072rb_stm32f0discovery/board_options.cmake b/miosix/config/arch/cortexM0_stm32f0/stm32f072rb_stm32f0discovery/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..23742afba3365c64eb0c965f3e41b02a001130e4
--- /dev/null
+++ b/miosix/config/arch/cortexM0_stm32f0/stm32f072rb_stm32f0discovery/board_options.cmake
@@ -0,0 +1,91 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f072rb_stm32f0discovery)
+set(ARCH_NAME cortexM0_stm32f0)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_128k+16k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DSYSCLK_FREQ_32MHz=32000000 -DRUN_WITH_HSI)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m0 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F072RB_DISCO "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM0_STM32F0 -DSTM32F072xB
+ ${CLOCK_FREQ} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f0_f3_os_timer.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/board_options.cmake b/miosix/config/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..55142fb6a5bd507088cfd620d613c20abae8bc61
--- /dev/null
+++ b/miosix/config/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/board_options.cmake
@@ -0,0 +1,103 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME efm32gg332f1024_wandstem)
+set(ARCH_NAME cortexM3_efm32gg)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/efm32_1M+128k_rom_usbbootloader.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DEFM32_HFXO_FREQ=48000000 -DEFM32_LFXO_FREQ=32768)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_WANDSTEM "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_EFM32GG -DEFM32GG332F1024
+ ${CLOCK_FREQ} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${BOARD_PATH}/interfaces-impl/flopsync_vht.cpp
+ ${BOARD_PATH}/interfaces-impl/gpio_timer.cpp
+ ${BOARD_PATH}/interfaces-impl/gpioirq.cpp
+ ${BOARD_PATH}/interfaces-impl/hrtb.cpp
+ ${BOARD_PATH}/interfaces-impl/os_timer.cpp
+ ${BOARD_PATH}/interfaces-impl/power_manager.cpp
+ ${BOARD_PATH}/interfaces-impl/rtc.cpp
+ ${BOARD_PATH}/interfaces-impl/spi.cpp
+ ${BOARD_PATH}/interfaces-impl/timer_interface.cpp
+ ${BOARD_PATH}/interfaces-impl/transceiver_timer.cpp
+ ${BOARD_PATH}/interfaces-impl/transceiver.cpp
+ ${BOARD_PATH}/interfaces-impl/vht.cpp
+ ${BOARD_PATH}/interfaces-impl/virtual_clock.cpp
+ ${KPATH}/arch/common/CMSIS/Device/SiliconLabs/EFM32GG/Source/system_efm32gg.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/drivers/serial_efm32.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f100c8_microboard/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f100c8_microboard/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..80537d0d8e355caa3a39eb695b7b1e13d7ebbcc3
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f100c8_microboard/board_options.cmake
@@ -0,0 +1,94 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f100c8_microboard)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_63k+8k_rom.ld)
+
+# Clock frequency
+# Not defining anything results in HSI being used
+set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB0")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_MICROBOARD "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_MD_VL
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_rtc.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f100c8_vaisala_rs41/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f100c8_vaisala_rs41/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..bc485aef56b25180542475c3b3c8cd7dc7f3fa29
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f100c8_vaisala_rs41/board_options.cmake
@@ -0,0 +1,95 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f100c8_vaisala_rs41)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_64k+8k_rom.ld)
+
+# Clock frequency
+# Not defining anything results in HSI being used
+# set(CLOCK_FREQ -DSYSCLK_FREQ_8MHz=8000000)
+set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000 -DHSE_VALUE=24000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB0")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_VAISALA_RS41 "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_MD_VL
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f100cb_tempsensor/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f100cb_tempsensor/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..de9917cf5b7cc79e6e972a8532da64454295b966
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f100cb_tempsensor/board_options.cmake
@@ -0,0 +1,93 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f100cb_tempsensor)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_127k+8k_rom.ld)
+
+# Clock frequency
+# Not defining anything results in HSI being used
+set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB1")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_TEMPSENSOR "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_MD_VL
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f100cx_generic/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f100cx_generic/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..cf1444fc14627e208cdc9a2d2887382fb853a004
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f100cx_generic/board_options.cmake
@@ -0,0 +1,95 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f100cx_generic)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+# set(LINKER_SCRIPT ${KPATH}/${BOARD_INC}/stm32_64k+8k_rom.ld)
+set(LINKER_SCRIPT ${KPATH}/${BOARD_INC}/stm32_128k+8k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB0")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F100CX_GENERIC "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_MD
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_rtc.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f100rb_stm32vldiscovery/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f100rb_stm32vldiscovery/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..c9f39ef7d4b5d7382da882ae2d2a316f3c23a03c
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f100rb_stm32vldiscovery/board_options.cmake
@@ -0,0 +1,94 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f100rb_stm32vldiscovery)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_128k+8k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB1")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32VLDISCOVERY "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_MD_VL
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/servo_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_rtc.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f100rc_solertegiard/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f100rc_solertegiard/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..5c4425065422214f4f4ca94826266e36596a3fbb
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f100rc_solertegiard/board_options.cmake
@@ -0,0 +1,94 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f100rc_solertegiard)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_256k+24k_rom.ld)
+
+# Clock frequency
+# Not defining anything results in HSI being used
+set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB1")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_SOLERTEGIARD "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_HD_VL
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/servo_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f103c8_breakout/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f103c8_breakout/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..17e0ad8b8df97c44206bbc3d7057e8797e29cd17
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f103c8_breakout/board_options.cmake
@@ -0,0 +1,97 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f103c8_breakout)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_64k+20k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_36MHz=36000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_48MHz=48000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_56MHz=56000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_72MHz=72000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F103C8_BREAKOUT "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_MD
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/servo_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f103cb_als_mainboard_rev2/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f103cb_als_mainboard_rev2/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..633394fbb87c018ebb57ca0223681e084fa976a2
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f103cb_als_mainboard_rev2/board_options.cmake
@@ -0,0 +1,92 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f103cb_als_mainboard_rev2)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_128k+20k_rom.ld)
+
+## Clock frequency
+# Not defining anything results in HSI being used
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $binary -v /dev/ttyUSB1")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_ALS_MAINBOARD_REV2 "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_MD
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f103cx_generic/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f103cx_generic/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..e4af5936ab7c6f2cd65aa7b20b84b3d5ab1fb48b
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f103cx_generic/board_options.cmake
@@ -0,0 +1,99 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f103cx_generic)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_64k+20k_rom.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_128k+20k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_36MHz=36000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_48MHz=48000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_56MHz=56000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_72MHz=72000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F103CX_GENERIC "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_MD
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_rtc.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f103ve_mp3v2/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f103ve_mp3v2/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..788eabd3de0b8d3ee6b5125db4d4a39dceedd716
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f103ve_mp3v2/board_options.cmake
@@ -0,0 +1,103 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f103ve_mp3v2)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are two options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# 2) Code + stack + heap in internal RAM (file *_ram.ld)
+# Note: this board relies on a bootloader for interrupt forwarding in ram
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+64k_rom.ld)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+64k_ram.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DSYSCLK_FREQ_72MHz=72000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+if(${LINKER_SCRIPT} STREQUAL ${KPATH}/${BOARD_INC}/stm32_512k+64k_ram.ld)
+ set(PROGRAM_CMDLINE "mp3v2_bootloader --ram $binary")
+else()
+ set(PROGRAM_CMDLINE "mp3v2_bootloader --code $binary")
+endif()
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_MP3V2 "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_HD
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f1.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f103ve_strive_mini/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f103ve_strive_mini/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..5385d77f1a50e3f8cc93923a690157494296d82e
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f103ve_strive_mini/board_options.cmake
@@ -0,0 +1,93 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f103ve_strive_mini)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+64k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DSYSCLK_FREQ_72MHz=72000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STRIVE_MINI "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_HD
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f1.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f103ze_redbull_v2/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f103ze_redbull_v2/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..9f6367aa8f698feecab363200627c335fa2e83b4
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f103ze_redbull_v2/board_options.cmake
@@ -0,0 +1,93 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f103ze_redbull_v2)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+64k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DSYSCLK_FREQ_72MHz=72000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_REDBULL_V2 "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_HD
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f1.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f1/stm32f103ze_stm3210e-eval/board_options.cmake b/miosix/config/arch/cortexM3_stm32f1/stm32f103ze_stm3210e-eval/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..eba53fae3bfe342f4daaac07ae94e8a1e92c93aa
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f1/stm32f103ze_stm3210e-eval/board_options.cmake
@@ -0,0 +1,129 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f103ze_stm3210e-eval)
+set(ARCH_NAME cortexM3_stm32f1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are three options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# the most common choice, available for all microcontrollers
+# 2) Code in FLASH stack in internal RAM heap in external RAM (file
+# *_xram.ld) useful for hardware like STM3210E-EVAL when big heap is
+# needed. The microcontroller must have an external memory interface.
+# 3) Code + stack + heap in external RAM, (file *_all_in_xram.ld)
+# useful for debugging code in hardware like STM3210E-EVAL. Code runs
+# *very* slow compared to FLASH. Works only with a booloader that
+# forwards interrrupts @ 0x68000000 (see miosix/_tools/bootloaders for
+# one).
+# The microcontroller must have an external memory interface.
+# Warning! enable external ram if you use a linker script that requires it
+# (see the XRAM flag below)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+64k_rom.ld)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+64k_xram.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+64k_all_in_xram.ld)
+
+# Enable/disable initialization of external RAM at boot. Three options:
+# __ENABLE_XRAM : If you want the heap in xram (with an appropriate linker
+# script selected above)
+# __ENABLE_XRAM and __CODE_IN_XRAM : Debug mode with code + stack + heap
+# in xram (with an appropriate linker script selected above)
+# none selected : don't use xram (with an appropriate linker script
+# selected above)
+# set(XRAM -D__ENABLE_XRAM)
+set(XRAM -D__ENABLE_XRAM -D__CODE_IN_XRAM)
+
+# Clock frequency
+# Not defining anything results in HSI being used
+# set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_36MHz=36000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_48MHz=48000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_56MHz=56000000)
+set(CLOCK_FREQ -DSYSCLK_FREQ_72MHz=72000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+if(${LINKER_SCRIPT} STREQUAL ${KPATH}/${BOARD_INC}/stm32_512k+64k_all_in_xram.ld)
+ set(PROGRAM_CMDLINE "${KPATH}/_tools/bootloaders/stm32/pc_loader/pc_loader /dev/ttyUSB0 $binary")
+else()
+ set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB0")
+endif()
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM3210E_EVAL "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F1 -DSTM32F10X_HD
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f1.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f2/stm32f205_generic/board_options.cmake b/miosix/config/arch/cortexM3_stm32f2/stm32f205_generic/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..28813c8e48e369c153990df856ab759743b2530e
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f2/stm32f205_generic/board_options.cmake
@@ -0,0 +1,96 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f205_generic)
+set(ARCH_NAME cortexM3_stm32f2)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_120MHz=120000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB0")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F205_GENERIC "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F2
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${BOARD_PATH}/interfaces-impl/delays.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/servo_stm32.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f2/stm32f205rc_skyward_stormtrooper/board_options.cmake b/miosix/config/arch/cortexM3_stm32f2/stm32f205rc_skyward_stormtrooper/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..567ed9eb5e2a79c9cd38422b60a1019f67c9514a
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f2/stm32f205rc_skyward_stormtrooper/board_options.cmake
@@ -0,0 +1,94 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f205rc_skyward_stormtrooper)
+set(ARCH_NAME cortexM3_stm32f2)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+128k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DHSE_VALUE=25000000 -DSYSCLK_FREQ_120MHz=120000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F205RC_SKYWARD_STORMTROOPER "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F2
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${BOARD_PATH}/interfaces-impl/delays.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f2/stm32f205rg_sony-newman/board_options.cmake b/miosix/config/arch/cortexM3_stm32f2/stm32f205rg_sony-newman/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..8b724bc7a3248e7e014fafc2927152c0618bb2b8
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f2/stm32f205rg_sony-newman/board_options.cmake
@@ -0,0 +1,99 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f205rg_sony-newman)
+set(ARCH_NAME cortexM3_stm32f2)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1M+128k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DHSE_VALUE=26000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE
+ "perl -e \"print \"\\xe7\\x91\\x11\\xc0\"\" > magic.bin;
+ dfu-util -d 0fce:f0fa -a 0 -i 0 -s 0x08040000 -D $binary;
+ dfu-util -d 0fce:f0fa -a 0 -i 0 -s 0x080ffffc -D $binary;
+ rm magic.bin"
+)
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_SONY_NEWMAN "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F2
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${BOARD_PATH}/interfaces-impl/delays.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f2/stm32f207ig_stm3220g-eval/board_options.cmake b/miosix/config/arch/cortexM3_stm32f2/stm32f207ig_stm3220g-eval/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..4a31fb19832021f1fbc7c0cababe57116277a3e7
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f2/stm32f207ig_stm3220g-eval/board_options.cmake
@@ -0,0 +1,128 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f207ig_stm3220g-eval)
+set(ARCH_NAME cortexM3_stm32f2)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are three options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# the most common choice, available for all microcontrollers
+# 2) Code in FLASH stack in internal RAM heap in external RAM (file
+# *_xram.ld) useful for hardware like STM3220G-EVAL when big heap is
+# needed. The microcontroller must have an external memory interface.
+# 3) Code + stack + heap in external RAM, (file *_all_in_xram.ld)
+# useful for debugging code in hardware like STM3220G-EVAL. Code runs
+# *very* slow compared to FLASH. Works only with a booloader that
+# forwards interrrupts @ 0x64000000 (see miosix/_tools/bootloaders for
+# one).
+# The microcontroller must have an external memory interface.
+# 4) Same as 3) but space has been reserved for a process pool, allowing
+# to configure the kernel with "#define WITH_PROCESSES"
+# Warning! enable external ram if you use a linker script that requires it
+# (see the XRAM flag below)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_rom.ld)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_xram.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_all_in_xram.ld)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_all_in_xram_processes.ld)
+
+# Enable/disable initialization of external RAM at boot. Three options:
+# __ENABLE_XRAM : If you want the heap in xram (with an appropriate linker
+# script selected above)
+# __ENABLE_XRAM and __CODE_IN_XRAM : Debug mode with code + stack + heap
+# in xram (with an appropriate linker script selected above)
+# none selected : don't use xram (with an appropriate linker script
+# selected above)
+# set(XRAM -D__ENABLE_XRAM)
+set(XRAM -D__ENABLE_XRAM -D__CODE_IN_XRAM)
+
+# Clock frequency
+set(CLOCK_FREQ -DHSE_VALUE=25000000 -DSYSCLK_FREQ_120MHz=120000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+if(${LINKER_SCRIPT} STREQUAL ${BOARD_PATH}/stm32_1m+128k_all_in_xram.ld)
+ set(PROGRAM_CMDLINE "${KPATH}/_tools/bootloaders/stm32/pc_loader/pc_loader /dev/ttyUSB0 $binary")
+else()
+ set(PROGRAM_CMDLINE "qstlink2 -cqewV $binary")
+endif()
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM3220G_EVAL "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F2
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${BOARD_PATH}/interfaces-impl/delays.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f2/stm32f207ze_als_camboard/board_options.cmake b/miosix/config/arch/cortexM3_stm32f2/stm32f207ze_als_camboard/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..95c41c7310169f764ac7435aa72e3833dce7bd35
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f2/stm32f207ze_als_camboard/board_options.cmake
@@ -0,0 +1,97 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f207ze_als_camboard)
+set(ARCH_NAME cortexM3_stm32f2)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_rom.ld)
+
+## XRAM is always enabled in this board
+set(XRAM -D__ENABLE_XRAM)
+
+# Clock frequency
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_120MHz=120000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB1")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_ALS_CAMBOARD "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F2
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${BOARD_PATH}/interfaces-impl/delays.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f2/stm32f207zg_EthBoardV2/board_options.cmake b/miosix/config/arch/cortexM3_stm32f2/stm32f207zg_EthBoardV2/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..7085e77db6aa0f914e83038ce7372d1237c69fec
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f2/stm32f207zg_EthBoardV2/board_options.cmake
@@ -0,0 +1,115 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f207zg_EthBoardV2)
+set(ARCH_NAME cortexM3_stm32f2)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are two options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# the most common choice, available for all microcontrollers
+# 2) Code in external RAM, stack + heap in internal RAM
+# (file *_code_in_xram.ld) useful for debugging. Code runs
+# *very* slow compared to FLASH. Works only with a booloader that
+# forwards interrrupts @ 0x60000000 (see miosix/_tools/bootloaders for
+# one). You must -D__CODE_IN_XRAM below.
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_rom.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_code_in_xram.ld)
+
+# XRAM is always enabled on this board, even if the _rom linker script
+# does not make explicit use of it.
+# Uncommenting __CODE_IN_XRAM (with an appropriate linker script selected
+# above) allows to run code from external RAM, useful for debugging
+# set(XRAM -D__ENABLE_XRAM)
+set(XRAM -D__ENABLE_XRAM -D__CODE_IN_XRAM)
+
+# Clock frequency
+set(CLOCK_FREQ -DHSE_VALUE=25000000 -DSYSCLK_FREQ_120MHz=120000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+if(${LINKER_SCRIPT} STREQUAL ${BOARD_PATH}/stm32_1m+128k_code_in_xram.ld)
+ set(PROGRAM_CMDLINE "${KPATH}/_tools/bootloaders/stm32/pc_loader/pc_loader /dev/ttyUSB1 $binary")
+else()
+ set(PROGRAM_CMDLINE "stm32flash -w $hex -v /dev/ttyUSB1")
+endif()
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_ETHBOARDV2 "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F2
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${BOARD_PATH}/interfaces-impl/delays.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32f2/stm32f207zg_nucleo/board_options.cmake b/miosix/config/arch/cortexM3_stm32f2/stm32f207zg_nucleo/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..9b3488816b8acf46c44bbcc2401eaac39bcd3fbb
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32f2/stm32f207zg_nucleo/board_options.cmake
@@ -0,0 +1,94 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f207zg_nucleo)
+set(ARCH_NAME cortexM3_stm32f2)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_120MHz=120000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F207ZG_NUCLEO "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32F2
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${BOARD_PATH}/interfaces-impl/delays.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+)
diff --git a/miosix/config/arch/cortexM3_stm32l1/stm32l151c8_als_mainboard/board_options.cmake b/miosix/config/arch/cortexM3_stm32l1/stm32l151c8_als_mainboard/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..966dfb0d6d7f602a1eb4af66414801043895dab1
--- /dev/null
+++ b/miosix/config/arch/cortexM3_stm32l1/stm32l151c8_als_mainboard/board_options.cmake
@@ -0,0 +1,91 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32l151c8_als_mainboard)
+set(ARCH_NAME cortexM3_stm32l1)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_64k+10k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DSYSCLK_FREQ_16MHz=16000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $binary -v /dev/ttyUSB1")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_ALS_MAINBOARD "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM3_STM32L1
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f1_l1_os_timer.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM4_atsam4l/atsam4lc2aa_generic/board_options.cmake b/miosix/config/arch/cortexM4_atsam4l/atsam4lc2aa_generic/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..999cad02a446cc8c9e457a0d5e94ea5aee992c85
--- /dev/null
+++ b/miosix/config/arch/cortexM4_atsam4l/atsam4lc2aa_generic/board_options.cmake
@@ -0,0 +1,92 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME atsam4lc2aa_generic)
+set(ARCH_NAME cortexM4_atsam4l)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/atsam_112k+32k_rom.ld)
+
+# Clock frequency
+set(CLOCK_FREQ -DCLOCK_FREQ=12000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m3 -mthumb)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_ATSAM4LC2AA_GENERIC "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_ATSAM4L
+ ${CLOCK_FREQ} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/drivers/clock.cpp
+ ${ARCH_PATH}/drivers/lcd.cpp
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/os_timer.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/drivers/serial_atsam4l.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f3/stm32f303vc_stm32f3discovery/board_options.cmake b/miosix/config/arch/cortexM4_stm32f3/stm32f303vc_stm32f3discovery/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..9e8143e82ebb596fe43b2979c45a315e83f68d8c
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f3/stm32f303vc_stm32f3discovery/board_options.cmake
@@ -0,0 +1,95 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f303vc_stm32f3discovery)
+set(ARCH_NAME cortexM4_stm32f3)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_256k+48k_rom.ld)
+
+# Select clock frequency
+# Not defining any of these results in the internal 8MHz clock to be used
+# set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_36MHz=36000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_48MHz=48000000 -DRUN_WITH_HSI)
+set(CLOCK_FREQ -DSYSCLK_FREQ_56MHz=56000000 -DRUN_WITH_HSI)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "qstlink2 -cqewV $binary")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F3DISCOVERY "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F3
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f0_f3_os_timer.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f401re_nucleo/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f401re_nucleo/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..b0672b84172b32823eb5116564d533552eb10a30
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f401re_nucleo/board_options.cmake
@@ -0,0 +1,93 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f401re_nucleo)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+96k_rom.ld)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_84MHz=84000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F401RE_NUCLEO "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f401vc_stm32f4discovery/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f401vc_stm32f4discovery/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..7ce52a9a57aaf2ec66816400ea3fd433d94053d5
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f401vc_stm32f4discovery/board_options.cmake
@@ -0,0 +1,94 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f401vc_stm32f4discovery)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_256k+64k_rom.ld)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_84MHz=84000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F401VC_STM32F4DISCOVERY "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f407vg_bitsboard/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f407vg_bitsboard/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..01365ad3d4421b28896cbf8dbdd9f0cfe618ae23
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f407vg_bitsboard/board_options.cmake
@@ -0,0 +1,94 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f407vg_bitsboard)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+192k_rom.ld)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $binary -v /dev/ttyUSB1")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_BITSBOARD "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..92f4038c1db35584c3561c434a17968ea4865f31
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_options.cmake
@@ -0,0 +1,110 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f407vg_stm32f4discovery)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script options:
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# 2) Code + stack + heap in internal RAM (file *_ram.ld)
+# 3) Same as 1) but space has been reserved for a process pool, allowing
+# to configure the kernel with "#define WITH_PROCESSES"
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+192k_rom.ld)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+192k_ram.ld)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+192k_rom_processes.ld)
+
+# set(SRAM_BOOT -DVECT_TAB_SRAM)
+# This causes the interrupt vector table to be relocated in SRAM, must be
+# uncommented when using the ram linker script
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000)
+# set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_100MHz=100000000)
+# set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_84MHz=84000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F4DISCOVERY "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/servo_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f407vg_thermal_test_chip/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f407vg_thermal_test_chip/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..2484f3bcbba1fb871ea4ee50e68926e4082f3911
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f407vg_thermal_test_chip/board_options.cmake
@@ -0,0 +1,93 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f407vg_thermal_test_chip)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+192k_rom.ld)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_THERMALTESTCHIP "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f411ce_blackpill/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f411ce_blackpill/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..a7f81e76ca702b2831943b62b0dfab98a1d58a71
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f411ce_blackpill/board_options.cmake
@@ -0,0 +1,93 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f411ce_blackpill)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+128k_rom.ld)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=25000000 -DSYSCLK_FREQ_100MHz=100000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_THERMALTESTCHIP "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f411re_nucleo/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f411re_nucleo/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..2ed3803164fb007df6e0be68dad4b6f1f03a9ecb
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f411re_nucleo/board_options.cmake
@@ -0,0 +1,94 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f411re_nucleo)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_512k+128k_rom.ld)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_100MHz=100000000)
+#set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_84MHz=84000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F411RE_NUCLEO "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_oledboard2/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_oledboard2/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..816869c22e456aa305c4147e5740552457f4a96f
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_oledboard2/board_options.cmake
@@ -0,0 +1,113 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f429zi_oledboard2)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are three options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# the most common choice, available for all microcontrollers
+# 2) Code in FLASH, stack + heap in external RAM (file *8m_xram.ld)
+# You must uncomment -D__ENABLE_XRAM below in this case.
+# 3) Code in FLASH, stack + heap in external RAM (file *6m_xram.ld)
+# Same as above, but leaves the upper 2MB of RAM for the LCD.
+#set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+256k_rom.ld)
+#set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+8m_xram.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+6m_xram.ld)
+
+# Uncommenting __ENABLE_XRAM enables the initialization of the external
+# 8MB SDRAM memory. Do not uncomment this even if you don't use a linker
+# script that requires it, as it is used for the LCD framebuffer.
+# set(XRAM -D__ENABLE_XRAM)
+
+# Select clock frequency.
+# Warning: due to a limitation in the PLL, it is not possible to generate
+# a precise 48MHz output when running the core at 180MHz. If 180MHz is
+# chosen the SDIO and RNG will run ~6% slower (45MHz insteand of 48)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000)
+# set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_180MHz=180000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+set(PROGRAM_CMDLINE "stm32flash -w $binary -v /dev/ttyUSB1")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F429ZI_OLEDBOARD2 "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..20f319cddcfdb8e6b6dd11e5ec951a3ca9bbef6b
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin/board_options.cmake
@@ -0,0 +1,113 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f429zi_skyward_anakin)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are three options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# the most common choice, available for all microcontrollers
+# 2) Code in FLASH, stack + heap in external RAM (file *8m_xram.ld)
+# You must uncomment -D__ENABLE_XRAM below in this case.
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+256k_rom.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+8m_xram.ld)
+
+# Uncommenting __ENABLE_XRAM enables the initialization of the external
+# 8MB SDRAM memory. Do not uncomment this even if you don't use a linker
+# script that requires it, as it is used for the LCD framebuffer.
+set(XRAM -D__ENABLE_XRAM)
+
+# Select clock frequency.
+# Warning: due to a limitation in the PLL, it is not possible to generate
+# a precise 48MHz output when running the core at 180MHz. If 180MHz is
+# chosen the SDIO and RNG will run ~6% slower (45MHz insteand of 48)
+set(CLOCK_FREQ -DHSE_VALUE=25000000 -DSYSCLK_FREQ_180MHz=180000000)
+# set(CLOCK_FREQ -DHSE_VALUE=25000000 -DSYSCLK_FREQ_168MHz=168000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F429ZI_SKYWARD_ANAKIN "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+ ${KPATH}/arch/common/drivers/stm32_sgm.cpp
+ ${KPATH}/arch/common/drivers/stm32_wd.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_homeone/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_homeone/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..5a3e22af2083ac9dc52211619ee1173a6d18db9c
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_homeone/board_options.cmake
@@ -0,0 +1,112 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f429zi_skyward_homeone)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are three options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# the most common choice, available for all microcontrollers
+# 2) Code in FLASH, stack + heap in external RAM (file *8m_xram.ld)
+# You must uncomment -D__ENABLE_XRAM below in this case.
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+256k_rom.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+8m_xram.ld)
+
+# Uncommenting __ENABLE_XRAM enables the initialization of the external
+# 8MB SDRAM memory.
+set(XRAM -D__ENABLE_XRAM)
+
+# Select clock frequency.
+# Warning: due to a limitation in the PLL, it is not possible to generate
+# a precise 48MHz output when running the core at 180MHz. If 180MHz is
+# chosen the SDIO and RNG will run ~6% slower (45MHz insteand of 48)
+# set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_180MHz=180000000)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000)
+# set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_100MHz=100000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F429ZI_SKYWARD_HOMEONE "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+ ${KPATH}/arch/common/drivers/stm32_wd.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..43a4c1cb6550b50a0b3dede658cbde6745aea010
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/board_options.cmake
@@ -0,0 +1,115 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f429zi_stm32f4discovery)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are three options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# the most common choice, available for all microcontrollers
+# 2) Code in FLASH, stack + heap in external RAM (file *8m_xram.ld)
+# You must uncomment -D__ENABLE_XRAM below in this case.
+# 3) Code in FLASH, stack + heap in external RAM (file *6m_xram.ld)
+# Same as above, but leaves the upper 2MB of RAM for the LCD.
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+256k_rom.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+8m_xram.ld)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+6m_xram.ld)
+
+# Uncommenting __ENABLE_XRAM enables the initialization of the external
+# 16MB SDRAM memory. Do not uncomment this even if you don't use a linker
+# script that requires it, as it is used for the LCD framebuffer.
+set(XRAM -D__ENABLE_XRAM)
+
+# Select clock frequency.
+# Warning: due to a limitation in the PLL, it is not possible to generate
+# a precise 48MHz output when running the core at 180MHz. If 180MHz is
+# chosen the SDIO and RNG will run ~6% slower (45MHz insteand of 48)
+# set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_180MHz=180000000)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000)
+# set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_100MHz=100000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F429ZI_STM32F4DISCOVERY "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32f4/stm32f469ni_stm32f469i-disco/board_options.cmake b/miosix/config/arch/cortexM4_stm32f4/stm32f469ni_stm32f469i-disco/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..c5a496b8ce613a773f731da82427d4634a1aa3bc
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32f4/stm32f469ni_stm32f469i-disco/board_options.cmake
@@ -0,0 +1,115 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f469ni_stm32f469i-disco)
+set(ARCH_NAME cortexM4_stm32f4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are three options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# the most common choice, available for all microcontrollers
+# 2) Code in FLASH, stack + heap in external RAM (file *16m_xram.ld)
+# You must uncomment -D__ENABLE_XRAM below in this case.
+# 3) Code in FLASH, stack + heap in external RAM (file *12m_xram.ld)
+# Same as above, but leaves the upper 4MB of RAM for the LCD.
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+384k_rom.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+16m_xram.ld)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+12m_xram.ld)
+
+# Uncommenting __ENABLE_XRAM enables the initialization of the external
+# 8MB SDRAM memory. Do not uncomment this even if you don't use a linker
+# script that requires it, as it is used for the LCD framebuffer.
+set(XRAM -D__ENABLE_XRAM)
+
+# Select clock frequency.
+# Warning: due to a limitation in the PLL, it is not possible to generate
+# a precise 48MHz output when running the core at 180MHz. If 180MHz is
+# chosen the SDIO and RNG will run ~6% slower (45MHz insteand of 48)
+# set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_180MHz=180000000)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000)
+# set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_100MHz=100000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F469NI_STM32F469I_DISCO "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32F4
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+ ${KPATH}/arch/common/drivers/stm32f2_f4_i2c.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32l4/stm32l476rg_nucleo/board_options.cmake b/miosix/config/arch/cortexM4_stm32l4/stm32l476rg_nucleo/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..0e2663895cd41f239191a17b18f4e4aab016c76d
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32l4/stm32l476rg_nucleo/board_options.cmake
@@ -0,0 +1,103 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32l476rg_nucleo)
+set(ARCH_NAME cortexM4_stm32l4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+128k_rom.ld)
+
+# Select clock frequency
+# Not defining any of these results in the internal 4MHz clock (MSI) to be used
+# set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_36MHz=36000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_48MHz=48000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_56MHz=56000000)
+set(CLOCK_FREQ -DSYSCLK_FREQ_80MHz=80000000)
+
+# Same as above, but using 16MHz HSI as clock source
+# set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_36MHz=36000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_48MHz=48000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_56MHz=56000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_80MHz=80000000 -DRUN_WITH_HSI)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32L476RG_NUCLEO "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32L4
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM4_stm32l4/stm32l4r9zi_sensortile/board_options.cmake b/miosix/config/arch/cortexM4_stm32l4/stm32l4r9zi_sensortile/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..c9e50da2007320dc4163a3616c65ada38f5520ee
--- /dev/null
+++ b/miosix/config/arch/cortexM4_stm32l4/stm32l4r9zi_sensortile/board_options.cmake
@@ -0,0 +1,104 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32l4r9zi_sensortile)
+set(ARCH_NAME cortexM4_stm32l4)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+640k_rom.ld)
+
+# Select clock frequency
+# Not defining any of these results in the internal 4MHz clock (MSI) to be used
+# set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_36MHz=36000000)
+set(CLOCK_FREQ -DSYSCLK_FREQ_48MHz=48000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_56MHz=56000000)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_80MHz=80000000 -DRUN_WITH_HSE)
+
+# Same as above, but using 16MHz HSI as clock source
+# set(CLOCK_FREQ -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_36MHz=36000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_48MHz=48000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_56MHz=56000000 -DRUN_WITH_HSI)
+# set(CLOCK_FREQ -DSYSCLK_FREQ_80MHz=80000000 -DRUN_WITH_HSI)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32L4R9ZI_SENSORTILE "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM4_STM32L4
+ ${CLOCK_FREQ} ${XRAM} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32l4.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+)
diff --git a/miosix/config/arch/cortexM7_stm32f7/stm32f746zg_nucleo/board_options.cmake b/miosix/config/arch/cortexM7_stm32f7/stm32f746zg_nucleo/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..4d24d381711e14858b9f2ac7c8466c9cf6c7f3c2
--- /dev/null
+++ b/miosix/config/arch/cortexM7_stm32f7/stm32f746zg_nucleo/board_options.cmake
@@ -0,0 +1,96 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f746zg_nucleo)
+set(ARCH_NAME cortexM7_stm32f7)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_1m+256k_rom.ld)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_216MHz=216000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F746ZG_NUCLEO "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM7_STM32F7
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${SD} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c
+ ${KPATH}/arch/common/core/cache_cortexMx.cpp
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+)
diff --git a/miosix/config/arch/cortexM7_stm32f7/stm32f767zi_nucleo/board_options.cmake b/miosix/config/arch/cortexM7_stm32f7/stm32f767zi_nucleo/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..8ff02441a21fc34c25a02be5645b99016a95a369
--- /dev/null
+++ b/miosix/config/arch/cortexM7_stm32f7/stm32f767zi_nucleo/board_options.cmake
@@ -0,0 +1,99 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f767zi_nucleo)
+set(ARCH_NAME cortexM7_stm32f7)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+384k_ram.ld)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=8000000 -DSYSCLK_FREQ_216MHz=216000000)
+
+# Select the SDMMC peripheral to use for the filesystem
+# set(SD -D__SDMMC1)
+set(SD -D__SDMMC2)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F767ZI_NUCLEO "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM7_STM32F7
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${SD} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c
+ ${KPATH}/arch/common/core/cache_cortexMx.cpp
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+)
diff --git a/miosix/config/arch/cortexM7_stm32f7/stm32f769ni_discovery/board_options.cmake b/miosix/config/arch/cortexM7_stm32f7/stm32f769ni_discovery/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..324836ee9954e0e88eedfdac4ab5a31081be457c
--- /dev/null
+++ b/miosix/config/arch/cortexM7_stm32f7/stm32f769ni_discovery/board_options.cmake
@@ -0,0 +1,106 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32f769ni_discovery)
+set(ARCH_NAME cortexM7_stm32f7)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Select linker script and boot file
+# Their path must be relative to the miosix directory.
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+384k_ram.ld)
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+16m_xram.ld)
+
+# Enables the initialization of the external 16MB SDRAM memory
+set(XRAM -D__ENABLE_XRAM)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=25000000 -DSYSCLK_FREQ_216MHz=216000000)
+
+# Select the SDMMC peripheral to use for the filesystem
+# set(SD -D__SDMMC1)
+set(SD -D__SDMMC2)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32F769NI_DISCO "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM7_STM32F7
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${SD} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c
+ ${KPATH}/arch/common/core/cache_cortexMx.cpp
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/sd_stm32f2_f4_f7.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+)
diff --git a/miosix/config/arch/cortexM7_stm32h7/stm32h753xi_eval/board_options.cmake b/miosix/config/arch/cortexM7_stm32h7/stm32h753xi_eval/board_options.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..3dce3162b73e78f7b3fa43a31f3b3efc8cba9cf3
--- /dev/null
+++ b/miosix/config/arch/cortexM7_stm32h7/stm32h753xi_eval/board_options.cmake
@@ -0,0 +1,103 @@
+# Copyright (C) 2023 by Skyward
+#
+# This program is free software; you can redistribute it and/or
+# it under the terms of the GNU General Public License as published
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# As a special exception, if other files instantiate templates or use
+# macros or inline functions from this file, or you compile this file
+# and link it with other works to produce a work based on this file,
+# this file does not by itself cause the resulting work to be covered
+# by the GNU General Public License. However the source code for this
+# file must still be made available in accordance with the GNU
+# Public License. This exception does not invalidate any other
+# why a work based on this file might be covered by the GNU General
+# Public License.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, see <http://www.gnu.org/licenses/>
+
+set(BOARD_NAME stm32h753xi_eval)
+set(ARCH_NAME cortexM7_stm32h7)
+
+# Base directories with header files for this board
+set(ARCH_PATH ${KPATH}/arch/${ARCH_NAME}/common)
+set(BOARD_PATH ${KPATH}/arch/${ARCH_NAME}/${BOARD_NAME})
+set(BOARD_CONFIG_PATH ${KPATH}/config/arch/${ARCH_NAME}/${BOARD_NAME})
+
+# Optimization flags:
+# -O0 do no optimization, the default if no optimization level is specified
+# -O or -O1 optimize minimally
+# -O2 optimize more
+# -O3 optimize even more
+# -Ofast optimize very aggressively to the point of breaking the standard
+# -Og Optimize debugging experience, enables optimizations that do not
+# interfere with debugging
+# -Os Optimize for size with -O2 optimizations that do not increase code size
+set(OPT_OPTIMIZATION -O2)
+
+# Boot file and linker script
+set(BOOT_FILE ${BOARD_PATH}/core/stage_1_boot.cpp)
+
+# Linker script type, there are three options
+# 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+# the most common choice, available for all microcontrollers
+# 2) Code in FLASH, stack + heap in external RAM (file *m_xram.ld)
+# You must uncomment -D__ENABLE_XRAM below in this case.
+set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+512k_rom.ld)
+# set(LINKER_SCRIPT ${BOARD_PATH}/stm32_2m+32m_xram.ld)
+
+# Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+set(CLOCK_FREQ -DHSE_VALUE=25000000 -DSYSCLK_FREQ_400MHz=400000000)
+
+# C++ Exception/rtti support disable flags.
+# To save code size if not using C++ exceptions (nor some STL code which
+# implicitly uses it) uncomment this option.
+# -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+# set(OPT_EXCEPT -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS)
+
+# Specify a custom flash command
+# This is the program that is invoked when the flash flag (-f or --flash) is
+# used with the Miosix Build System. Use $binary or $hex as placeolders, they
+# will be replaced by the build systems with the binary or hex file repectively.
+# If a command is not specified, the build system will use st-flash if found
+# set(PROGRAM_CMDLINE "here your custom flash command")
+
+# Basic flags
+set(FLAGS_BASE -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16)
+
+# Flags for ASM and linker
+set(AFLAGS_BASE ${FLAGS_BASE})
+set(LFLAGS_BASE ${FLAGS_BASE} -Wl,--gc-sections,-Map,main.map -Wl,-T${LINKER_SCRIPT} ${OPT_EXCEPT} ${OPT_OPTIMIZATION} -nostdlib)
+
+# Flags for C/C++
+set(CFLAGS_BASE
+ -D_BOARD_STM32H753XI_EVAL "-D_MIOSIX_BOARDNAME=\"${BOARD_NAME}\""
+ -D_DEFAULT_SOURCE=1 -ffunction-sections -Wall -Werror=return-type -g
+ -D_ARCH_CORTEXM7_STM32H7
+ ${CLOCK_FREQ} ${XRAM} ${SRAM_BOOT} ${FLAGS_BASE} ${OPT_OPTIMIZATION} -c
+)
+set(CXXFLAGS_BASE ${CFLAGS_BASE} ${OPT_EXCEPT})
+
+# Select architecture specific files
+set(ARCH_SRC
+ ${ARCH_PATH}/drivers/pll.cpp
+ ${ARCH_PATH}/interfaces-impl/delays.cpp
+ ${ARCH_PATH}/interfaces-impl/gpio_impl.cpp
+ ${ARCH_PATH}/interfaces-impl/portability.cpp
+ ${BOARD_PATH}/interfaces-impl/bsp.cpp
+ ${KPATH}/arch/common/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c
+ ${KPATH}/arch/common/core/cache_cortexMx.cpp
+ ${KPATH}/arch/common/core/interrupts_cortexMx.cpp
+ ${KPATH}/arch/common/core/mpu_cortexMx.cpp
+ ${KPATH}/arch/common/core/stm32f2_f4_l4_f7_h7_os_timer.cpp
+ ${KPATH}/arch/common/drivers/dcc.cpp
+ ${KPATH}/arch/common/drivers/serial_stm32.cpp
+ ${KPATH}/arch/common/drivers/stm32_hardware_rng.cpp
+)
diff --git a/miosix/config/miosix_settings.h b/miosix/default/config/miosix_settings.h
similarity index 99%
rename from miosix/config/miosix_settings.h
rename to miosix/default/config/miosix_settings.h
index 57cdc3f733f14f982b332c65295ca53f72681036..5a4a634718015bd5a59c10e93b0addd984481e11 100644
--- a/miosix/config/miosix_settings.h
+++ b/miosix/default/config/miosix_settings.h
@@ -32,7 +32,7 @@
// The PARSING_FROM_IDE is because Netbeans gets confused by this, it is never
// defined when compiling the code.
#ifndef PARSING_FROM_IDE
-#error This error is a reminder that you have not edited miosix_settings.h yet.
+//#error This error is a reminder that you have not edited miosix_settings.h yet.
#endif //PARSING_FROM_IDE
/**