diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp
index 5e7026328633c092735ec64f973edc0435553f67..3021c01cbe3a1f0aff63b447aafe6cc11f22249e 100644
--- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp
+++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/high_resolution_timer_base.cpp
@@ -50,6 +50,12 @@ static TimeConversion* tc;
 static int faseGPIO=0;
 static int faseTransceiver=0;
 
+static volatile unsigned long long vhtBaseVht=0;        ///< Vht time corresponding to rtc time: theoretical
+static unsigned long long vhtSyncPointRtc=0;     ///< Rtc time corresponding to vht time : known with sum
+static volatile unsigned long long vhtSyncPointVht=0;     ///< Vht time corresponding to rtc time :timestanped
+static unsigned long long syncVhtRtcPeriod=100000;
+static long long error=0;
+
 static inline unsigned int IRQread32Timer(){
     unsigned int high=TIMER3->CNT;
     unsigned int low=TIMER1->CNT;
@@ -194,6 +200,10 @@ void __attribute__((used)) cstirqhnd3(){
     } 
 }
 
+template<typename C>
+C divisionRounded(C a, C b){
+    return (a+b/2)/b;
+}
 
 void __attribute__((used)) cstirqhnd2(){
     //CC0 listening for received packet --> input mode
@@ -251,6 +261,27 @@ void __attribute__((used)) cstirqhnd2(){
 	    }
 	}
     }
+    
+    if ((TIMER2->IEN & TIMER_IEN_CC2) && (TIMER2->IF & TIMER_IF_CC2) ){
+        TIMER2->IFC = TIMER_IFC_CC2;
+        unsigned long long old_vhtBase = vhtBaseVht;
+        unsigned long long old_vhtSyncPointVht=vhtSyncPointVht;
+        
+        //FIXME
+        //actual times
+        vhtSyncPointVht = ms32time | (TIMER3->CNT << 16) | TIMER2->CC[2].CCV;
+        vhtBaseVht=divisionRounded(static_cast<unsigned long long>(vhtSyncPointRtc*48000000),static_cast<unsigned long long>(32768));
+        
+        //Future time
+        vhtSyncPointRtc+=syncVhtRtcPeriod;
+        
+        long long temp=divisionRounded(static_cast<unsigned long long>(vhtSyncPointRtc*48000000),static_cast<unsigned long long>(32768));
+        error=vhtSyncPointVht-temp;
+        redLed::toggle();
+        bool hppw;
+	HighResolutionTimerBase::queue.IRQpost([&](){printf("%lld %lld %lld\n",vhtSyncPointVht,error,temp);},hppw);
+	if(hppw) Scheduler::IRQfindNextThread();
+    }
 }
 
 /*
diff --git a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/rtc.cpp b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/rtc.cpp
index 605c8044357aabf3bb4eb57e10db0af007a2a86d..ad1ed701ba1c6390a1d2198287e1ea4a212c1ee4 100644
--- a/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/rtc.cpp
+++ b/miosix/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/interfaces-impl/rtc.cpp
@@ -185,8 +185,11 @@ void __attribute__((used)) RTChandlerImpl()
         }
     }
     
-    if(RTC->IF & RTC_IF_COMP1)
+    if(RTC->IF & RTC_IF_COMP1){
         RTC->IFC=RTC_IFC_COMP1;
+        greenLed::toggle();
+        RTC->COMP1=RTC->CNT+100000;
+    }
 }
 
 /**