From f02cb013ab7cc8310919e1815d9ac1dbb53654b9 Mon Sep 17 00:00:00 2001 From: Daniele Cattaneo <daniele3.cattaneo@mail.polimi.it> Date: Thu, 19 Dec 2024 00:17:33 +0100 Subject: [PATCH] stm32f1_f2_f4_serial: Fix compilation for F1 after AF handling refactoring Signed-off-by: Terraneo Federico <fede.tft@miosix.org> --- miosix/arch/common/drivers/stm32f1_f2_f4_serial.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/miosix/arch/common/drivers/stm32f1_f2_f4_serial.cpp b/miosix/arch/common/drivers/stm32f1_f2_f4_serial.cpp index 7d2a21f0..13d352c8 100644 --- a/miosix/arch/common/drivers/stm32f1_f2_f4_serial.cpp +++ b/miosix/arch/common/drivers/stm32f1_f2_f4_serial.cpp @@ -52,7 +52,9 @@ class STM32SerialHW public: inline USART_TypeDef *get() const { return port; } inline IRQn_Type getIRQn() const { return irq; } - inline STM32SerialAltFunc const & getAltFunc() const { return altFunc; } + #if !defined(ALTFUNC_STM32F1) + inline STM32SerialAltFunc const & getAltFunc() const { return altFunc; } + #endif inline unsigned int IRQgetClock() const { return STM32Bus::getClock(bus); } inline void IRQenable() const { STM32Bus::IRQen(bus, clkEnMask); } inline void IRQdisable() const { STM32Bus::IRQdis(bus, clkEnMask); } @@ -60,7 +62,9 @@ public: USART_TypeDef *port; ///< USART port IRQn_Type irq; ///< USART IRQ number - STM32SerialAltFunc altFunc; ///< Alternate function to set for GPIOs + #if !defined(ALTFUNC_STM32F1) + STM32SerialAltFunc altFunc; ///< Alternate function to set for GPIOs + #endif STM32Bus::ID bus; ///< Bus where the port is (APB1 or 2) unsigned long clkEnMask; ///< USART clock enable -- GitLab