diff --git a/miosix/arch/common/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c b/miosix/arch/common/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c
index 5a61c6422801db2bb8b2745f6482696e6bc659e3..55303a829b828f25cf660b3ba3b2a40125173bfe 100644
--- a/miosix/arch/common/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c
+++ b/miosix/arch/common/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c
@@ -132,6 +132,9 @@ const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
 void SystemInit(void)
 {
     //TODO: support more clocking options
+    #ifndef RUN_WITH_HSI
+    #error "Implement HSE support"
+    #endif
     #ifdef SYSCLK_FREQ_32MHz
     RCC->CR |= RCC_CR_HSION;
     while((RCC->CR & RCC_CR_HSIRDY)==0) ;
@@ -145,6 +148,8 @@ void SystemInit(void)
     FLASH->ACR &= ~FLASH_ACR_LATENCY;
     FLASH->ACR |= 1; //1 wait state for freq > 24MHz
     RCC->CFGR |= RCC_CFGR_SW_PLL;
+    #else
+    //Run @ 8MHz
     #endif
 
   /* NOTE :SystemInit(): This function is called at startup just after reset and 
diff --git a/miosix/arch/cortexM0_stm32f0/common/interfaces-impl/delays.cpp b/miosix/arch/cortexM0_stm32f0/common/interfaces-impl/delays.cpp
index fb224836178e6867ce5b6055cdfe93ed837696d3..be523b629dfb70de2b3ee1650c63d975642dc75c 100644
--- a/miosix/arch/cortexM0_stm32f0/common/interfaces-impl/delays.cpp
+++ b/miosix/arch/cortexM0_stm32f0/common/interfaces-impl/delays.cpp
@@ -1,5 +1,5 @@
 /***************************************************************************
- *   Copyright (C) 2010 by Terraneo Federico                               *
+ *   Copyright (C) 2023 by Terraneo Federico                               *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
@@ -27,26 +27,24 @@
 
 #include "interfaces/delays.h"
 
-#warning "TODO Delays only coarsely calibrated"
-
 namespace miosix {
 
 void delayMs(unsigned int mseconds)
 {    
     #ifdef SYSCLK_FREQ_32MHz
-    register const unsigned int count=6400;
+    register const unsigned int count=3205;
     #endif
     
     for(unsigned int i=0;i<mseconds;i++)
     {
         // This delay has been calibrated to take 1 millisecond
         // It is written in assembler to be independent on compiler optimizations
-        asm volatile("              mov   r1, #0       \n"
-                     "___loop_m:    cmp   r1, %0       \n"
-                     "              bge   __loop_m_exit\n"
-                     "              add   r1, r1, #1   \n"
-                     "              b     ___loop_m    \n"
-                     "__loop_m_exit:                   \n"::"r"(count):"r1");
+        asm volatile("   mov   r1, #0     \n"
+                     "1: cmp   r1, %0     \n"
+                     "   bge   2f         \n"
+                     "   add   r1, r1, #1 \n"
+                     "   b     1b         \n"
+                     "2:                  \n"::"r"(count):"r1");
     }
 }
 
@@ -55,14 +53,13 @@ void delayUs(unsigned int useconds)
     // This delay has been calibrated to take x microseconds
     // It is written in assembler to be independent on compiler optimizations    
     #ifdef SYSCLK_FREQ_32MHz
-    asm volatile("              mov   r1, #3       \n"
-                 "              mul   r1, %0, r1   \n"
-                 "              mov   r2, #0       \n"
-                 "___loop_u:    cmp   r2, r1       \n"
-                 "              bge   __loop_u_exit\n"
-                 "              add   r2, r2, #1   \n"
-                 "              b     ___loop_u    \n"
-                 "__loop_u_exit:                   \n"::"r"(useconds):"r1","r2");
+    asm volatile("   mov   r1, #4     \n"
+                 "   mul   r1, %0, r1 \n"
+                 "   sub   r1, r1, #1 \n"
+                 "   .align 2         \n" // <- important!
+                 "1: sub   r1, r1, #1 \n"
+                 "   cmp   r1, #0     \n" //No subs instruction in cortex m0
+                 "   bpl   1b         \n"::"r"(useconds):"r1");
     #else
     #error "delayUs not implemented"
     #endif    
diff --git a/miosix/config/Makefile.inc b/miosix/config/Makefile.inc
index 3e9a51ed7aeda11ad9579744dc23ee4cab14dcd6..2a7fc54ffb73255c2c3be37d182941199bf71554 100644
--- a/miosix/config/Makefile.inc
+++ b/miosix/config/Makefile.inc
@@ -2530,7 +2530,7 @@ else ifeq ($(ARCH),cortexM0_stm32f0)
         CXXFLAGS_BASE += -D_BOARD_STM32F072RB_DISCO -DSTM32F072xB
 
         ## Select clock frequency
-        CLOCK_FREQ := -DSYSCLK_FREQ_32MHz=32000000
+        CLOCK_FREQ := -DSYSCLK_FREQ_32MHz=32000000 -DRUN_WITH_HSI
 
         ## Select programmer command line
         ## This is the program that is invoked when the user types