[BSRAM] Check for errata for STM32F4 boards

In the errata sheet for STM32F4 boards it's reported a

Possible delay in backup domain protection disabling/enabling after programming the DBP bit.

Description: Depending on the AHB/APB1 prescaler, a delay between DBP bit programming and the effective disabling/enabling of the backup domain protection can be observed and must be taken into account. The higher the APB1 prescaler value, the higher the delay

Test the driver on STM32F4 boards and account for this errata.