diff --git a/src/shared/drivers/qspi-flash/qspi-flash.h b/src/shared/drivers/qspi-flash/qspi-flash.h
index 91a1dbd695910cb0ff47af32ef485673ad75f457..6c7c45cdac937a356be4e4dc5f1b1225b4cf9d67 100644
--- a/src/shared/drivers/qspi-flash/qspi-flash.h
+++ b/src/shared/drivers/qspi-flash/qspi-flash.h
@@ -24,9 +24,6 @@
 
 #pragma once
 
-using namespace miosix;
-using namespace Boardcore;
-
 /*  driver of MX25R3235FM1IL0 flash memory chip
  *  model of flash memory on compute unit: MX25R3235FM1IL0 4MB, device ID:
  * 0xC22816 FLASH memory space organisation:
diff --git a/src/tests/boards/test-qspi-flash.cpp b/src/tests/boards/test-qspi-flash.cpp
index ca2255a98e60929141f016a2aac4d43c7a7e69e6..65ef2d2376cdb40b0b6b7cb8c70881e9561b8251 100644
--- a/src/tests/boards/test-qspi-flash.cpp
+++ b/src/tests/boards/test-qspi-flash.cpp
@@ -27,13 +27,13 @@
 
 /**
  * A tiny look at the protocol
- * QUADSPI is a protocol to manage the communication between MCU and a flash memory. 
- * The peripheral takes care of all the pins involved, so you don't even need to toggle
- * the slave-select pin. In indirect mode every communication is handled by the firmware  
- * and registers, also every communication is triggered as soon as the peripheral has  
- * enough information to perform a command. 
- * Other two modes are available: polling mode and mapped mode.   
-*/
+ * QUADSPI is a protocol to manage the communication between MCU and a flash
+ * memory. The peripheral takes care of all the pins involved, so you don't even
+ * need to toggle the slave-select pin. In indirect mode every communication is
+ * handled by the firmware and registers, also every communication is triggered
+ * as soon as the peripheral has enough information to perform a command. Other
+ * two modes are available: polling mode and mapped mode.
+ */
 
 #include <miosix.h>
 #include <utils/ClockUtils.h>
@@ -118,7 +118,8 @@ int main()
         // Enable the peripheral (IT HAS TO BE DONE AFTER SETTING CCR REGISTER)
         QUADSPI->CR |= QUADSPI_CR_EN;
 
-        QUADSPI->DLR = 2;  // Expect to receive 3 bytes regarding ID of the flash 
+        // Expect to receive 3 bytes regarding ID of the flash
+        QUADSPI->DLR = 2;
 
         // Trigger communication start by writing the instruction
         QUADSPI->CCR |= 0x9F << QUADSPI_CCR_INSTRUCTION_Pos;
@@ -128,9 +129,10 @@ int main()
             ;
 
         // reset transfer complete flag (TCF)
-        QUADSPI->FCR &= ~(1 << QUADSPI_FCR_CTCF_Pos); 
+        QUADSPI->FCR &= ~(1 << QUADSPI_FCR_CTCF_Pos);
 
-        // until there are some bytes in the quadspi buffer (FIFO) keep reading them
+        // until there are some bytes in the quadspi buffer (FIFO) keep reading
+        // them
         while (QUADSPI->SR & (63 << QUADSPI_SR_FLEVEL_Pos))
         {
             printf("Data: 0x%lx\n", QUADSPI->DR);
@@ -140,7 +142,7 @@ int main()
         QUADSPI->CR &= ~QUADSPI_CR_EN;
 
         printf("QUADSPI disabled.\n");
-        printf("end!\n"); 
+        printf("end!\n");
     }
 
     while (true)
diff --git a/src/tests/drivers/QuadSpi-Flash/test-Qflash.cpp b/src/tests/drivers/QuadSpi-Flash/test-Qflash.cpp
index 1dd656656e9641cdf77993cceff68b7ca9f96d63..0ed63105c7ea6972387fb031327ac7db9f14e3a7 100644
--- a/src/tests/drivers/QuadSpi-Flash/test-Qflash.cpp
+++ b/src/tests/drivers/QuadSpi-Flash/test-Qflash.cpp
@@ -101,30 +101,30 @@ void initBoard()
      * FLASH_IO3 - PF6  - AF9  - QUADSPI_BK1_IO3
      */
 
-    GpioPin flash_ncs(GPIOB_BASE, 10);
-    GpioPin flash_sck(GPIOF_BASE, 10);
-    GpioPin flash_io0(GPIOF_BASE, 8);
-    GpioPin flash_io1(GPIOF_BASE, 9);
-    GpioPin flash_io2(GPIOF_BASE, 7);
-    GpioPin flash_io3(GPIOF_BASE, 6);
+    miosix::GpioPin flash_ncs(GPIOB_BASE, 10);
+    miosix::GpioPin flash_sck(GPIOF_BASE, 10);
+    miosix::GpioPin flash_io0(GPIOF_BASE, 8);
+    miosix::GpioPin flash_io1(GPIOF_BASE, 9);
+    miosix::GpioPin flash_io2(GPIOF_BASE, 7);
+    miosix::GpioPin flash_io3(GPIOF_BASE, 6);
 
     // init GPIO peripheral pins
-    flash_ncs.mode(Mode::ALTERNATE);
+    flash_ncs.mode(miosix::Mode::ALTERNATE);
     flash_ncs.alternateFunction(9);
-    flash_ncs.speed(Speed::_100MHz);
-    flash_sck.mode(Mode::ALTERNATE);
+    flash_ncs.speed(miosix::Speed::_100MHz);
+    flash_sck.mode(miosix::Mode::ALTERNATE);
     flash_sck.alternateFunction(9);
-    flash_sck.speed(Speed::_100MHz);
-    flash_io0.mode(Mode::ALTERNATE);
+    flash_sck.speed(miosix::Speed::_100MHz);
+    flash_io0.mode(miosix::Mode::ALTERNATE);
     flash_io0.alternateFunction(10);
-    flash_io0.speed(Speed::_100MHz);
-    flash_io1.mode(Mode::ALTERNATE);
+    flash_io0.speed(miosix::Speed::_100MHz);
+    flash_io1.mode(miosix::Mode::ALTERNATE);
     flash_io1.alternateFunction(10);
-    flash_io1.speed(Speed::_100MHz);
-    flash_io2.mode(Mode::ALTERNATE);
+    flash_io1.speed(miosix::Speed::_100MHz);
+    flash_io2.mode(miosix::Mode::ALTERNATE);
     flash_io2.alternateFunction(9);
-    flash_io2.speed(Speed::_100MHz);
-    flash_io3.mode(Mode::ALTERNATE);
+    flash_io2.speed(miosix::Speed::_100MHz);
+    flash_io3.mode(miosix::Mode::ALTERNATE);
     flash_io3.alternateFunction(9);
-    flash_io3.speed(Speed::_100MHz);
+    flash_io3.speed(miosix::Speed::_100MHz);
 }
\ No newline at end of file