diff --git a/src/shared/drivers/spi/SPIBus.h b/src/shared/drivers/spi/SPIBus.h
index ae55504f0b13f0472d64502288bbe4c515c2eda3..e7c4d4923de360de4b66300b23b02908b0d73586 100644
--- a/src/shared/drivers/spi/SPIBus.h
+++ b/src/shared/drivers/spi/SPIBus.h
@@ -50,11 +50,11 @@ namespace Boardcore
  *
  * Supported SPI main features:
  * - Full-duplex synchronous transfers on three lines
- * - 8- or 16-bit transfer frame format selection
+ * - 8 or 16-bit transfer frame formats
  * - Master operation
- * - 8 master mode baud rate prescaler (f_PCLK/2 max.)
+ * - 8 master mode baud rate prescaler values (f_PCLK/2 max.)
  * - Programmable clock polarity and phase
- * - Programmable data order with MSB-first or LSB-first shifting
+ * - Programmable data order (MSBit-first or LSBit-first)
  */
 class SPIBus : public SPIBusInterface
 {
@@ -544,7 +544,7 @@ inline uint16_t SPIBus::transfer16(uint16_t data)
 
 inline uint32_t SPIBus::transfer24(uint32_t data)
 {
-    uint32_t res = transfer16(data >> 8) << 8;
+    uint32_t res = static_cast<uint32_t>(transfer16(data >> 8)) << 8;
     res |= transfer(data);
 
     return res;
@@ -552,7 +552,7 @@ inline uint32_t SPIBus::transfer24(uint32_t data)
 
 inline uint32_t SPIBus::transfer32(uint32_t data)
 {
-    uint32_t res = transfer16(data >> 16) << 16;
+    uint32_t res = static_cast<uint32_t>(transfer16(data >> 16)) << 16;
     res |= transfer16(data);
 
     return res;
diff --git a/src/shared/drivers/spi/SPIBusInterface.h b/src/shared/drivers/spi/SPIBusInterface.h
index 438df30a7dec015972e5ca69dbc113a1fdf7187c..ff501c21903e5f27f5e54598c6f10366c667f608 100644
--- a/src/shared/drivers/spi/SPIBusInterface.h
+++ b/src/shared/drivers/spi/SPIBusInterface.h
@@ -50,10 +50,30 @@ struct SPIBusConfig
     ///< Clock polarity and phase configuration
     SPI::Mode mode;
 
-    ///< MSB or LSB first
+    ///< MSBit or LSBit first
     SPI::Order bitOrder;
 
-    ///< MSB or LSB first
+    /**
+     * @brief MSByte or LSByte first
+     *
+     * This parameter is used when reading and writing registers 16 bit wide or
+     * more.
+     *
+     * A device features MSByte first ordering if the most significant byte is
+     * at the lowest address. Example of a 24bit register:
+     *   Address:  0x06  0x07  0x08
+     *     value:  MSB   MID   LSB
+     *
+     * Conversely, an LSByte first ordering starts with the lowest significant
+     * byte first.
+     *
+     * Also, in every device used since now, in multiple registers accesses, the
+     * device always increments the address. So the user has always to provide
+     * the lowest address.
+     *
+     * @warning This driver does not support devices which decrements registers
+     * address during multiple registers accesses.
+     */
     SPI::Order byteOrder;
 
     ///< Write bit behaviour, default high when reading
diff --git a/src/shared/drivers/spi/SPIDriver.h b/src/shared/drivers/spi/SPIDriver.h
index 7bdb64ef33a805b2d30628d81103aae1bc1ed63f..7712958a0487af8d775fba2c3907a09e0142e443 100644
--- a/src/shared/drivers/spi/SPIDriver.h
+++ b/src/shared/drivers/spi/SPIDriver.h
@@ -22,6 +22,19 @@
 
 #pragma once
 
+/**
+ * This header file is inteded to provide all the necessary files needed to use
+ * the SPI driver.
+ *
+ * The driver is divided into 3 levels:
+ * - Low: SPIBus is the actual driver that talks directly to the STM32
+ * pheripheral
+ * - Middle: SPIBusInterface is a common interface that defines which operations
+ * the implementation has to privde
+ * - High: SPITransaction is a RAII abstraction that manages slave selection
+ * through the chip select signal
+ */
+
 #include "SPIBus.h"
 #include "SPIBusInterface.h"
 #include "SPITransaction.h"
diff --git a/src/tests/drivers/spi/test-spi.cpp b/src/tests/drivers/spi/test-spi.cpp
index cf4c00ca87264c954e53ead45669b21abd361bb4..39b068863896d89cc8e696c24116c317333bad01 100644
--- a/src/tests/drivers/spi/test-spi.cpp
+++ b/src/tests/drivers/spi/test-spi.cpp
@@ -66,9 +66,9 @@ int main()
         delayMs(1);
         transaction.read32();
         delayMs(1);
-        transaction.read(buffer8, 6);
+        transaction.read(buffer8, sizeof(buffer8));
         delayMs(1);
-        transaction.read16(buffer16, 6);
+        transaction.read16(buffer16, sizeof(buffer16));
         delayMs(1);
     }
 
@@ -88,7 +88,7 @@ int main()
         buffer8[3] = 0x67;
         buffer8[4] = 0x89;
         buffer8[5] = 0xAB;
-        transaction.write(buffer8, 6);
+        transaction.write(buffer8, sizeof(buffer8));
         delayMs(1);
         buffer16[0] = 0x0101;
         buffer16[1] = 0x2323;
@@ -96,7 +96,7 @@ int main()
         buffer16[3] = 0x6767;
         buffer16[4] = 0x8989;
         buffer16[5] = 0xABAB;
-        transaction.write16(buffer16, 6);
+        transaction.write16(buffer16, sizeof(buffer16));
         delayMs(1);
     }
 
@@ -110,9 +110,10 @@ int main()
         delayMs(1);
         transaction.transfer32((uint32_t)0xABCDEF01);
         delayMs(1);
-        transaction.transfer(buffer8, 6);
+        transaction.transfer(buffer8, sizeof(buffer8));
+        delayMs(1);
+        transaction.transfer16(buffer16, sizeof(buffer16));
         delayMs(1);
-        transaction.transfer16(buffer16, 6);
     }
 
     // Registers
@@ -131,6 +132,10 @@ int main()
         delayMs(1);
     }
 
+    transaction.writeRegister(0x62, 4);
+    auto whoAmIVaule = transaction.readRegister(0x4f);
+    printf("Who am I value: %x\n", whoAmIVaule);
+
     while (true)
         delayMs(1000);
 }