From bc043d99c343e6c874e788e64de7c335d444a40b Mon Sep 17 00:00:00 2001 From: Valerio Flamminii <valerio.flamminii@skywarder.eu> Date: Sat, 18 May 2024 09:01:59 +0200 Subject: [PATCH] minor style improvements --- src/shared/drivers/qspi-flash/qspi-flash.cpp | 272 +++++++++--------- src/shared/drivers/qspi-flash/qspi-flash.h | 67 ++--- .../drivers/QuadSpi-Flash/test-Qflash.cpp | 8 +- 3 files changed, 175 insertions(+), 172 deletions(-) diff --git a/src/shared/drivers/qspi-flash/qspi-flash.cpp b/src/shared/drivers/qspi-flash/qspi-flash.cpp index efdd0c4c8..040abbd72 100644 --- a/src/shared/drivers/qspi-flash/qspi-flash.cpp +++ b/src/shared/drivers/qspi-flash/qspi-flash.cpp @@ -25,11 +25,11 @@ using namespace miosix; using namespace Boardcore; using namespace FlashMemory; -void qspi_flash::enable() { Qspi->CR |= QUADSPI_CR_EN; } +void qspiFlash::enable() { Qspi->CR |= QUADSPI_CR_EN; } -void qspi_flash::disable() { Qspi->CR &= ~QUADSPI_CR_EN; } +void qspiFlash::disable() { Qspi->CR &= ~QUADSPI_CR_EN; } -void qspi_flash::abort_reset() +void qspiFlash::abortReset() { // abort possible ongoing command @@ -56,7 +56,7 @@ void qspi_flash::abort_reset() // if a transaction has been aborted. } -void qspi_flash::waitBusy() +void qspiFlash::waitBusy() { // wait till QUADSPI has completed the current communication with the flash uint32_t dt = 0; // timeout @@ -70,7 +70,7 @@ void qspi_flash::waitBusy() } } -void qspi_flash::waitTransfer() +void qspiFlash::waitTransfer() { // by setting data lenght register (DLR) you set how many bytes are expected // from memory. wait till all expected bytes have been tranferred. @@ -88,7 +88,7 @@ void qspi_flash::waitTransfer() Qspi->FCR &= ~(1 << QUADSPI_FCR_CTCF_Pos); } -qspi_flash::qspi_flash(QUADSPI_TypeDef* qspi) +qspiFlash::qspiFlash(QUADSPI_TypeDef* qspi) { Qspi = qspi; @@ -132,10 +132,10 @@ qspi_flash::qspi_flash(QUADSPI_TypeDef* qspi) flash_io3.speed(Speed::_100MHz); } -bool qspi_flash::test() +bool qspiFlash::test() { // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } @@ -143,20 +143,20 @@ bool qspi_flash::test() return readID() == DEVICE_ID; } -uint8_t qspi_flash::read_status_reg() +uint8_t qspiFlash::readStatusReg() { // status register can be read at any time and during every kind of // operation. // check if memory has been initialised - if (initialised == false) + if (!initialised) { return 0; } // reset peripheral - abort_reset(); + abortReset(); Qspi->CCR |= 1 << QUADSPI_CCR_FMODE_Pos | // Indirect read mode 1 << QUADSPI_CCR_DMODE_Pos | // Data on 1-wire @@ -185,7 +185,7 @@ uint8_t qspi_flash::read_status_reg() return value; } -void qspi_flash::write_enable() +void qspiFlash::writeEnable() { // 1 send wren command @@ -193,13 +193,13 @@ void qspi_flash::write_enable() // 3 wait for bit WEL = 1 // check if memory has been initialised - if (initialised == false) + if (!initialised) { return; } // reset peripheral - abort_reset(); + abortReset(); // indirect write mode, istruction on 1 wire, no data, no address, no // alternate bytes @@ -219,7 +219,7 @@ void qspi_flash::write_enable() disable(); // check status register until bit WEL = 1 - uint8_t status = read_status_reg(); + uint8_t status = readStatusReg(); uint8_t dt = 0; // timeout while (!(status & (1 << 1))) { @@ -229,22 +229,20 @@ void qspi_flash::write_enable() { return; } - status = read_status_reg(); + status = readStatusReg(); } } -void qspi_flash::init() +void qspiFlash::init() { // init peripheral clock ClockUtils::enablePeripheralClock((QUADSPI_TypeDef*)QSPI_BASE); - RCC_SYNC(); - Thread::sleep(1); // abort any operation - abort_reset(); + abortReset(); // reset configuration registers Qspi->CR = 0; @@ -256,30 +254,28 @@ void qspi_flash::init() Qspi->FCR &= ~(1 << QUADSPI_FCR_CTCF_Pos); // peripheral default initialization - Qspi->CR |= - QUADSPI_CR_SSHIFT | // Wait a full cycle to read - 3 << QUADSPI_CR_PRESCALER_Pos; // QSPI clock = 216MHz / 4 = 54MHz + // QSPI clock = 216MHz / 4 = 54MHz, wait a full cycle to read + Qspi->CR |= QUADSPI_CR_SSHIFT | 3 << QUADSPI_CR_PRESCALER_Pos; - // set the memory chip size - it must be always setted before any read - // operation. - Qspi->DCR |= - 21 << QUADSPI_DCR_FSIZE_Pos; // Flash size 32Mb = 4MB = 2^(21+1) bytes + // set the memory chip size - it must be setted before any read operation + // Flash size 32Mb = 4MB = 2^(21+1) bytes + Qspi->DCR |= 21 << QUADSPI_DCR_FSIZE_Pos; // set flag intialised device initialised = true; } -uint32_t qspi_flash::readID() +uint32_t qspiFlash::readID() { // check if memory has been initialised - if (initialised == false) + if (!initialised) { return 0; } // reset peripheral - abort_reset(); + abortReset(); Qspi->CCR |= 1 << QUADSPI_CCR_FMODE_Pos | // Indirect read mode 1 << QUADSPI_CCR_DMODE_Pos | // Data on 1-wire @@ -311,9 +307,9 @@ uint32_t qspi_flash::readID() disable(); // the ID bytes order must be inverted - uint8_t lb = myID; // lowest byte - uint8_t mb = (myID >> 8) & (255U); // middle byte - uint8_t hb = (myID >> 16) & (255U); // highest byte + uint8_t lb = myID; // lowest byte + uint8_t mb = (myID >> 8); // middle byte + uint8_t hb = (myID >> 16); // highest byte myID = (lb << 16) | (mb << 8) | (hb); @@ -326,7 +322,7 @@ uint32_t qspi_flash::readID() } } -void qspi_flash::write_disable() +void qspiFlash::writeDisable() { // 1 send wrid command @@ -334,13 +330,13 @@ void qspi_flash::write_disable() // 3 wait for bit WEL = 0 // check if memory has been initialised - if (initialised == false) + if (!initialised) { return; } // reset peripheral - abort_reset(); + abortReset(); // indirect write mode, istruction on 1 wire, no data, no address, no // alternate bytes @@ -349,7 +345,7 @@ void qspi_flash::write_disable() // enable peripheral enable(); - // start communication writing write_disable command to CCR register + // start communication writing writeDisable command to CCR register Qspi->CCR |= Commands::WRITE_DISABLE; // wait till the communication has ended @@ -359,7 +355,7 @@ void qspi_flash::write_disable() disable(); // check status register till bit WEL = 0 - uint8_t status = read_status_reg(); + uint8_t status = readStatusReg(); uint8_t dt = 0; // timeout while (status & (1 << 1)) { @@ -369,11 +365,11 @@ void qspi_flash::write_disable() { return; } - status = read_status_reg(); + status = readStatusReg(); } } -bool qspi_flash::isInProgress() +bool qspiFlash::isInProgress() { // check if memory is currently executing some operation. @@ -384,16 +380,16 @@ bool qspi_flash::isInProgress() // progress. // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } - uint8_t status_reg = read_status_reg(); - return (status_reg & 1) ? true : false; + uint8_t statusReg = readStatusReg(); + return (statusReg & 1); } -uint8_t qspi_flash::read_byte(uint32_t address) +uint8_t qspiFlash::readByte(uint32_t address) { // 1 send READ command @@ -403,7 +399,7 @@ uint8_t qspi_flash::read_byte(uint32_t address) // the adress register (Qspi->DR) is updated. // check if memory has been initialised - if (initialised == false) + if (!initialised) { return 0; } @@ -413,7 +409,7 @@ uint8_t qspi_flash::read_byte(uint32_t address) return 0; // reset peripheral - abort_reset(); + abortReset(); Qspi->CCR |= 1 << QUADSPI_CCR_FMODE_Pos | // Indirect read mode QUADSPI_CCR_DMODE_0 | // data on a single line @@ -445,31 +441,31 @@ uint8_t qspi_flash::read_byte(uint32_t address) return value; } -bool qspi_flash::chip_erase() +bool qspiFlash::chipErase() { // erase the entire flash memory chip // erase chip operation typical time: 30-60 s // 1 wait until the memory has finished any operation in progress - // 2 write_enable command + // 2 writeEnable command // 3 erase chip command // 4 wait till flash has completed the erase operation - // if chip_erase operation will not be completed properly resulting in a + // if chipErase operation will not be completed properly resulting in a // timeout event and a forced reset (after some seconds by the command), // some post-operations may fail! // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } // enable data writing - write_enable(); + writeEnable(); // reset peripheral - abort_reset(); + abortReset(); // indirect write mode, no address, no data. all on one wire. Qspi->CCR |= QUADSPI_CCR_IMODE_0; // istruction on one wire @@ -494,29 +490,29 @@ bool qspi_flash::chip_erase() dt = dt + 1; if (dt >= 130000) // (2 min and 10sec) max chip erase time = 2 min { - software_reset(); // device forced reset to default status + softwareReset(); // device forced reset to default status Thread::sleep(20); // recovery time = 12 ms return false; } } // disable data writing - write_disable(); + writeDisable(); // return the result of chip erase operation - return check_erase(); + return checkErase(); } -bool qspi_flash::sector_erase(uint32_t address) +bool qspiFlash::sectorErase(uint32_t address) { // 1 wait until the memory has finished any operation in progress - // 2 write_enable command + // 2 writeEnable command // 3 erase sector command // 4 wait till flash has completed the operation // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } @@ -526,10 +522,10 @@ bool qspi_flash::sector_erase(uint32_t address) return false; // enable data writing - write_enable(); + writeEnable(); // reset peripheral - abort_reset(); + abortReset(); // indirect write mode, 3-byte address , no data. all on one wire. Qspi->CCR |= QUADSPI_CCR_IMODE_0 | // istruction on one wire @@ -559,42 +555,44 @@ bool qspi_flash::sector_erase(uint32_t address) dt = dt + 1; if (dt >= 1000) // max sector erase cycle time = 240 ms { - software_reset(); // device forced reset to default status + softwareReset(); // device forced reset to default status return false; } } // disable data writing - write_disable(); + writeDisable(); // check on result of the last operation - return check_erase(); + return checkErase(); } -bool qspi_flash::block32_erase(uint32_t address) +bool qspiFlash::block32Erase(uint32_t address) { // erase a 32K block of data, any address of the block is valid // 1 wait until the memory has finished any operation in progress - // 2 write_enable command + // 2 writeEnable command // 3 erase block_32 command // 4 wait till flash has completed the operation // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } // check on correct address range if ((address < 0) || (address > FlashMemory::MEMORY_SIZE)) + { return false; + } // enable data writing - write_enable(); + writeEnable(); // reset peripheral - abort_reset(); + abortReset(); // indirect write mode, 3-byte address, no data. all on one wire. Qspi->CCR |= QUADSPI_CCR_IMODE_0 | // istruction on one wire @@ -624,29 +622,29 @@ bool qspi_flash::block32_erase(uint32_t address) dt = dt + 1; if (dt >= 3000) // block_32 erase cycle max time = 1.8s { - software_reset(); // device forced reset to default status + softwareReset(); // device forced reset to default status return false; } } // disable data writing - write_disable(); + writeDisable(); // check on the result - return check_erase(); + return checkErase(); } -bool qspi_flash::block64_erase(uint32_t address) +bool qspiFlash::block64Erase(uint32_t address) { // erase a 64K block of data, any address of the block is valid // 1 wait until the memory has finished any operation in progress - // 2 write_enable command + // 2 writeEnable command // 3 erase block_64 command // 4 wait till flash has completed the operation // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } @@ -656,10 +654,10 @@ bool qspi_flash::block64_erase(uint32_t address) return false; // enable data writing - write_enable(); + writeEnable(); // reset peripheral - abort_reset(); + abortReset(); // indirect write mode, 3-byte address, no data. all on one wire. Qspi->CCR |= QUADSPI_CCR_IMODE_0 | // istruction on one wire @@ -689,19 +687,19 @@ bool qspi_flash::block64_erase(uint32_t address) dt = dt + 1; if (dt >= 4500) // erase block_64K cycle max time = 3.5s { - software_reset(); // device forced reset to default status + softwareReset(); // device forced reset to default status return false; } } // disable data writing - write_disable(); + writeDisable(); // check on result - return check_erase(); + return checkErase(); } -bool qspi_flash::byte_program(uint8_t data, uint32_t address, bool verify) +bool qspiFlash::byteProgram(uint8_t data, uint32_t address, bool verify) { // double-check data may take some extra time ! @@ -713,7 +711,7 @@ bool qspi_flash::byte_program(uint8_t data, uint32_t address, bool verify) // 4 wait till the operation is ended // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } @@ -725,10 +723,10 @@ bool qspi_flash::byte_program(uint8_t data, uint32_t address, bool verify) } // enable data writing - write_enable(); + writeEnable(); // reset peripheral - abort_reset(); + abortReset(); // idirect write mode Qspi->CCR |= QUADSPI_CCR_DMODE_0 | // data on a single line @@ -758,26 +756,28 @@ bool qspi_flash::byte_program(uint8_t data, uint32_t address, bool verify) dt = dt + 1; if (dt >= 5000) // max program byte cycle time = 100us { - software_reset(); // device forced reset to default status + softwareReset(); // device forced reset to default status return false; } } // disable data writing - write_disable(); + writeDisable(); // if verify = true, double check on data saved if (verify == true) { - if (read_byte(address) != data) + if (readByte(address) != data) + { return false; + } } // check on result - return check_program(); + return checkProgram(); } -uint8_t qspi_flash::read_security_reg() +uint8_t qspiFlash::readSecurityReg() { // security register can be read at any time and during every kind of @@ -786,13 +786,13 @@ uint8_t qspi_flash::read_security_reg() // 2 - receive one byte of data containing the value of the register // check if memory has been initialised - if (initialised == false) + if (!initialised) { return 0; } // reset peripheral - abort_reset(); + abortReset(); Qspi->CCR |= QUADSPI_CCR_FMODE_0 | // Indirect read mode QUADSPI_CCR_DMODE_0 | // data on one wire @@ -822,7 +822,7 @@ uint8_t qspi_flash::read_security_reg() return value; } -void qspi_flash::software_reset() +void qspiFlash::softwareReset() { // if software reset is performed at the same time of another program/erase @@ -839,7 +839,7 @@ void qspi_flash::software_reset() // commands sequence: RSTEN >> wait 1ms >> RST >> wait 1ms // check if memory has been initialised - if (initialised == false) + if (!initialised) { return; } @@ -847,7 +847,7 @@ void qspi_flash::software_reset() // -------------------- send RSTEN command ------------------------- // reset peripheral - abort_reset(); + abortReset(); // indirect write mode, no data, no address, instruction on a single line Qspi->CCR |= QUADSPI_CCR_IMODE_0; @@ -868,7 +868,7 @@ void qspi_flash::software_reset() Thread::sleep(1); // ------------------- send RST command -------------------------- - abort_reset(); + abortReset(); Qspi->CCR |= QUADSPI_CCR_IMODE_0; @@ -884,7 +884,7 @@ void qspi_flash::software_reset() Thread::sleep(1); } -bool qspi_flash::check_erase() +bool qspiFlash::checkErase() { // ATTTENTION! - this function check only if the last erase operation has @@ -894,16 +894,16 @@ bool qspi_flash::check_erase() // false - erase operation has failed // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } - uint8_t reg = read_security_reg(); + uint8_t reg = readSecurityReg(); return reg & (1 << 6) ? false : true; } -bool qspi_flash::check_program() +bool qspiFlash::checkProgram() { // ATTTENTION! - this function check only if the last operation has been @@ -913,30 +913,30 @@ bool qspi_flash::check_program() // false - erase operation has failed // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } - uint8_t reg = read_security_reg(); + uint8_t reg = readSecurityReg(); return reg & (1 << 5) ? false : true; } -bool qspi_flash::read_sector(uint8_t* vector, const size_t size, - uint32_t sector_num) +bool qspiFlash::readSector(uint8_t* vector, const size_t size, + uint32_t sectorNum) { // read an entire sector of the flash and then copy it into a vector whose // size is equal or greater than the size of a sector. // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } - // check on correct sector_num range - if (sector_num < 0 || sector_num > SECTORS_NUM) + // check on correct sectorNum range + if (sectorNum < 0 || sectorNum > SECTORS_NUM) { return false; } @@ -948,21 +948,21 @@ bool qspi_flash::read_sector(uint8_t* vector, const size_t size, } // computing correct address of the sector - uint32_t addr = SECTOR_SIZE * sector_num; + uint32_t addr = SECTOR_SIZE * sectorNum; // read the sector and copy its data to vector uint32_t index = 0; for (index = 0; index < SECTOR_SIZE; index++) { - vector[index] = read_byte(addr); + vector[index] = readByte(addr); addr++; } return true; } -bool qspi_flash::page_program(const uint8_t* vector, const size_t size, - uint32_t start_address, bool verify) +bool qspiFlash::pageProgram(const uint8_t* vector, const size_t size, + uint32_t startAddress, bool verify) { // program a vector (max size = 256 bytes) on flash memory starting by a @@ -972,17 +972,17 @@ bool qspi_flash::page_program(const uint8_t* vector, const size_t size, // address of a page !!!! // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } // not a starting address of a page - if ((start_address % PAGE_SIZE) != 0) + if ((startAddress % PAGE_SIZE) != 0) return false; - // start_address out of address space of the memory - if (start_address >= MEMORY_SIZE) + // startAddress out of address space of the memory + if (startAddress >= MEMORY_SIZE) return false; // empty vector or null pointer @@ -994,10 +994,10 @@ bool qspi_flash::page_program(const uint8_t* vector, const size_t size, return false; // enable data writing - write_enable(); + writeEnable(); // reset peripheral - abort_reset(); + abortReset(); // idirect write mode Qspi->CCR |= QUADSPI_CCR_DMODE_0 | // data on a single line @@ -1015,7 +1015,7 @@ bool qspi_flash::page_program(const uint8_t* vector, const size_t size, Qspi->DLR = size - 1; // adding starting address - Qspi->AR = start_address; + Qspi->AR = startAddress; // load data vector into the QUADSPI FIFO (buffer) uint16_t i = 0; @@ -1048,7 +1048,7 @@ bool qspi_flash::page_program(const uint8_t* vector, const size_t size, dt = dt + 1; if (dt >= 50) // max page program cycle time = 10ms { - software_reset(); // device forced reset to default status + softwareReset(); // device forced reset to default status return false; } } @@ -1058,27 +1058,27 @@ bool qspi_flash::page_program(const uint8_t* vector, const size_t size, { for (i = 0; i < size; i++) { - if (read_byte(start_address + i) != vector[i]) + if (readByte(startAddress + i) != vector[i]) return false; } } // check on last program operation result - return check_program(); + return checkProgram(); } -bool qspi_flash::write(const uint8_t* vector, const size_t size, - uint32_t sector_num, bool verify_write) +bool qspiFlash::write(const uint8_t* vector, const size_t size, + uint32_t sectorNum, bool verify) { // check if memory has been initialised - if (initialised == false) + if (!initialised) { return false; } - // wrong sector_num specified - if (sector_num >= SECTORS_NUM) + // wrong sectorNum specified + if (sectorNum >= SECTORS_NUM) { return false; } @@ -1096,14 +1096,14 @@ bool qspi_flash::write(const uint8_t* vector, const size_t size, } // if the whole vector is bigger than the rest of sectors starting by - // sector_num - if (size > (SECTOR_SIZE * (SECTORS_NUM - sector_num))) + // sectorNum + if (size > (SECTOR_SIZE * (SECTORS_NUM - sectorNum))) { return false; } // compute starting address - uint32_t const start_address = SECTOR_SIZE * sector_num; + uint32_t const start_address = SECTOR_SIZE * sectorNum; // compute number of sectors needed to store the vector, then add one more // to store the last part of vector @@ -1117,7 +1117,7 @@ bool qspi_flash::write(const uint8_t* vector, const size_t size, uint32_t sector_index = 0; for (sector_index = 0; sector_index < sectors_needed; sector_index++) { - if (sector_erase(SECTOR_SIZE * (sector_num + sector_index)) == false) + if (sectorErase(SECTOR_SIZE * (sectorNum + sector_index)) == false) { return false; } @@ -1135,8 +1135,8 @@ bool qspi_flash::write(const uint8_t* vector, const size_t size, uint32_t page = 0; for (page = 0; page < pages_needed - 1; page++) { - if (page_program(vector + (page * PAGE_SIZE), PAGE_SIZE, - start_address + (page * PAGE_SIZE), false) == false) + if (pageProgram(vector + (page * PAGE_SIZE), PAGE_SIZE, + start_address + (page * PAGE_SIZE), false) == false) return false; } @@ -1148,23 +1148,23 @@ bool qspi_flash::write(const uint8_t* vector, const size_t size, * 2 - is the size of last page which store the vector final part. * 3 - calculate the start address of last page. */ - if (page_program( - vector + ((pages_needed - 1) * PAGE_SIZE), size % PAGE_SIZE, - start_address + ((pages_needed - 1) * PAGE_SIZE), false) == false) + if (pageProgram(vector + ((pages_needed - 1) * PAGE_SIZE), size % PAGE_SIZE, + start_address + ((pages_needed - 1) * PAGE_SIZE), + false) == false) { return false; } - // if verify_write is true: + // if verify is true: // check that the bytes written into the flash match with the ones in the // vector. - if (verify_write) + if (verify) { uint32_t index = 0; uint32_t addr = start_address; for (index = 0; index < size; index++) { - if (read_byte(addr) != vector[index]) + if (readByte(addr) != vector[index]) { return false; } diff --git a/src/shared/drivers/qspi-flash/qspi-flash.h b/src/shared/drivers/qspi-flash/qspi-flash.h index e38badbe0..793972089 100644 --- a/src/shared/drivers/qspi-flash/qspi-flash.h +++ b/src/shared/drivers/qspi-flash/qspi-flash.h @@ -79,14 +79,14 @@ static const uint32_t MEMORY_SIZE = BLOCK64_SIZE * BLOCK64_NUM; // about 4 MB }; // namespace FlashMemory -class qspi_flash +class qspiFlash { public: /** * @brief QUADSPI_FLASH class constructor */ - qspi_flash(QUADSPI_TypeDef* qspi); + qspiFlash(QUADSPI_TypeDef* qspi); /** * @brief Initialise QUADSPI peripheral in order to communicate with the @@ -114,11 +114,12 @@ public: * @brief write an entire vector on flash, starting by a specific * sector. if vector size exceed the size of a single sector, the vector * will be memorized on consecutive sectors of the memory, starting by - * sector_num + * sectorNum * * @param vector array to be saved in memory - * @param sector_num number of the starting sector [0 - 1024] - * @param verify_write double check on saved data flag, + * @param size size of array + * @param sectorNum number of the starting sector [0 - 1024] + * @param verify double check on saved data, * true = double check enabled, * false = double ckeck disabled, * It may slow down the execution still it's a recommended option. @@ -129,40 +130,42 @@ public: * * @return true/false - if the whole operation has been successful. */ - bool write(const uint8_t* vector, const size_t size, uint32_t sector_num, - bool verify_write); + bool write(const uint8_t* vector, const size_t size, uint32_t sectorNum, + bool verify); /** * @brief copy a whole sector (4KB) from flash into a vector whose size is * greater or equal to the size of a sector in memory. * @param vector array which will store the sector. - * @param sector_num number of the sector which has to be copied into the + * @param size size of array + * @param sectorNum number of the sector which has to be copied into the * vector [0 - 1024] * @return true/false - if the operation has been successful. - * @warning the vector size must be enough to contain a whole sector! + * @warning vector's size must be enough to contain a whole sector! * @warning This function modify the vector passed! */ - bool read_sector(uint8_t* vector, const size_t size, uint32_t sector_num); + bool readSector(uint8_t* vector, const size_t size, uint32_t sectorNum); /** - * @brief program a page (256 bytes) on memory at the starting address + * @brief program a page (256 bytes) on memory at its starting address * specified. if vector size is smaller than a whole page size there will be * no effects on other bytes of the page. * @param vector vector of data bytes to be programmed - its size must not * be bigger than a page size (256 byte). - * @param start_address starting address of the page to be programmed. must + * @param size size of array + * @param startAddress starting address of the page to be programmed. must * be a starting address! * @param verify double check on programmed data. true = enabled, false = - * disabled. + * disabled. It may slow down the execution still it's a recommended option. * @return true/false - if the operation has been successful. - * @warning start_address must be a starting address of a page! - * This function is only intended to program some bytes on flash by + * @warning startAddress must be a starting address of a page! + * This function is only intended to program some bytes on flash by properly * resetting some bits to "0". If you want to store a page of data you'll * need to erase the sector associated with this page and then reprogram the * page. */ - bool page_program(const uint8_t* vector, const size_t size, - uint32_t start_address, bool verify); + bool pageProgram(const uint8_t* vector, const size_t size, + uint32_t startAddress, bool verify); /** * @brief erase the entire memory chip. since this operation is not so @@ -171,22 +174,22 @@ public: * @return true/false - if the operation has been successful * @warning THIS OPERATION WILL TAKE A WHILE !! (at least 1 min) */ - bool chip_erase(); + bool chipErase(); /** * @brief erase a specific sector (4KB) * @param address generic address (24 bit) of the sector address space. * @return true/false - if the operation has been successful */ - bool sector_erase(uint32_t address); + bool sectorErase(uint32_t address); /** * @brief erase a specific block (32KB) * @param address generic address (24 bit) of the block address space. - * @warning THIS OPERATION COULD TAKE A WHILE + * @warning THIS OPERATION COULD TAKE A WHILE ! * @return true/false - if the operation has been successful */ - bool block32_erase(uint32_t address); + bool block32Erase(uint32_t address); /** * @brief erase a specific block (64KB) @@ -194,14 +197,14 @@ public: * @warning THIS OPERATION COULD TAKE A WHILE! * @return true/false - if the operation has been successful */ - bool block64_erase(uint32_t address); + bool block64Erase(uint32_t address); /** * @brief read a single byte at a specific address * @param address byte address (24 bit), it can be any address * @return byte value */ - uint8_t read_byte(uint32_t address); + uint8_t readByte(uint32_t address); /** * @brief program a single byte at a specific address @@ -214,7 +217,7 @@ public: * resetting some bits to "0". If you want to store a byte of data, you'll * need to perform an erase operation and then program the byte. */ - bool byte_program(uint8_t data, uint32_t address, bool verify); + bool byteProgram(uint8_t data, uint32_t address, bool verify); /** * @brief make the flash go back to power-on default state. if the device @@ -222,7 +225,7 @@ public: * and some data could be lost! * @warning THIS FUNCTION MAY TAKE A WHILE ! */ - void software_reset(); + void softwareReset(); /** * @brief check if the memory is currently executing any operation like @@ -239,13 +242,13 @@ private: * @brief check result of last erase operation * @return true = success / false = fail */ - bool check_erase(); + bool checkErase(); /** * @brief check result of last program operation * @return true = success / false = fail */ - bool check_program(); + bool checkProgram(); /** * @brief enable modifying (program/erase) data on memory @@ -254,7 +257,7 @@ private: * command, also you should always issue a "write disable" command, when you * have done modifying data. */ - void write_enable(); + void writeEnable(); /** * @brief disable modifying (program/erase) data on memory @@ -263,19 +266,19 @@ private: * command, also you should always issue a "write disable" command, when you * have done modifying data. */ - void write_disable(); + void writeDisable(); /** * @brief read memory's status register * @return status register value (8 bit) */ - uint8_t read_status_reg(); + uint8_t readStatusReg(); /** * @brief read memory's security register * @return security register value (8 bit) */ - uint8_t read_security_reg(); + uint8_t readSecurityReg(); /* QuadSpi peripheral utility methods */ // enable QUADSPI peripheral @@ -286,7 +289,7 @@ private: /* abort any ongoing operation and reset current configuration of QUADSPI peripheral */ - void abort_reset(); + void abortReset(); // wait till the current operation on QUADSPI peripheral is ended void waitBusy(); diff --git a/src/tests/drivers/QuadSpi-Flash/test-Qflash.cpp b/src/tests/drivers/QuadSpi-Flash/test-Qflash.cpp index a7b6eb504..06e3b4eb0 100644 --- a/src/tests/drivers/QuadSpi-Flash/test-Qflash.cpp +++ b/src/tests/drivers/QuadSpi-Flash/test-Qflash.cpp @@ -27,13 +27,11 @@ * operations. */ -qspi_flash mymemory(QUADSPI); +qspiFlash mymemory(QUADSPI); int main() { - // cambiare a camel case - // init qspi-flash communication mymemory.init(); @@ -63,7 +61,9 @@ int main() printf("write operaton succeded!\n"); uint8_t b[6000] = {0}; - printf("read_sector: %d\n", mymemory.read_sector(b, 6000, 884)); + printf("read_sector: %d\n", mymemory.readSector(b, 6000, 884)); + + return 0; printf("array (b): \n"); for (i = 0; i < 6000; i++) -- GitLab