diff --git a/src/shared/drivers/adc/InternalADC.cpp b/src/shared/drivers/adc/InternalADC.cpp index c66aad6121452ce9a50698f7eefe27089f53051a..6312b2d9aa93587f41cf6fa000bdb759fd8dc8e4 100644 --- a/src/shared/drivers/adc/InternalADC.cpp +++ b/src/shared/drivers/adc/InternalADC.cpp @@ -227,6 +227,8 @@ inline void InternalADC::setChannelSampleTime(Channel channel, float InternalADC::readChannel(Channel channel) { + // Assuming that ADC_SQR1_L remains 0 (1 conversion) + // Select channel adc->SQR3 = channel; diff --git a/src/shared/utils/ClockUtils.h b/src/shared/utils/ClockUtils.h index 7d6a021f08a59213fc342b920c22dd5c8253aef1..996a1c712e5541af05411b19f0307f07f1fce534 100644 --- a/src/shared/utils/ClockUtils.h +++ b/src/shared/utils/ClockUtils.h @@ -233,8 +233,11 @@ inline bool ClockUtils::enablePeripheralClock(void* peripheral) RCC->AHB1ENR |= RCC_AHB1ENR_BKPSRAMEN; break; #endif -// On some microcontrollers like the stm32f205, CCMDATARAM_BASE is defined -// incorrectly. So we check for the macro bit +// In the CMSIS version used in the kernel, the CCMDATARAM_BASE macro is defined +// for some microcontrollers that do not have the Core Coupled Memory while +// the RCC_AHB1ENR_CCMDATARAMEN is correctly not defined in such cases. To fix +// the error, instead of checking for CCMDATARAM_BASE with #ifdef like for the +// other case statements, I check directly for RCC_AHB1ENR_CCMDATARAMEN. #ifdef RCC_AHB1ENR_CCMDATARAMEN case CCMDATARAM_BASE: RCC->AHB1ENR |= RCC_AHB1ENR_CCMDATARAMEN; @@ -591,8 +594,11 @@ inline bool ClockUtils::disablePeripheralClock(void* peripheral) RCC->AHB1ENR &= ~RCC_AHB1ENR_BKPSRAMEN; break; #endif -// On some micrcontrollers like the stm32f205, CCMDATARAM_BASE is defined -// incorrectly. So we check for the macro bit +// In the CMSIS version used in the kernel, the CCMDATARAM_BASE macro is defined +// for some microcontrollers that do not have the Core Coupled Memory while +// the RCC_AHB1ENR_CCMDATARAMEN is correctly not defined in such cases. To fix +// the error, instead of checking for CCMDATARAM_BASE with #ifdef like for the +// other case statements, I check directly for RCC_AHB1ENR_CCMDATARAMEN. #ifdef RCC_AHB1ENR_CCMDATARAMEN case CCMDATARAM_BASE: RCC->AHB1ENR &= ~RCC_AHB1ENR_CCMDATARAMEN; diff --git a/src/tests/boards/test-qspi-flash.cpp b/src/tests/boards/test-qspi-flash.cpp index ce9cb787eae203ac4c19248226514027ff4d9606..700bf2fcea98948a1f429ffaee5e7769fc567483 100644 --- a/src/tests/boards/test-qspi-flash.cpp +++ b/src/tests/boards/test-qspi-flash.cpp @@ -1,5 +1,5 @@ -/* Copyright (c) 2015-2017 Skyward Experimental Rocketry - * Author: Luca Erbetta +/* Copyright (c) 2023 Skyward Experimental Rocketry + * Author: Alberto Nidasio * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -20,7 +20,13 @@ * THE SOFTWARE. */ +/** + * This is a quick and dirty test of the QSPI flash on board the compute unit. A + * proper driver for the flash will need to be developed! + */ + #include <miosix.h> +#include <utils/ClockUtils.h> using namespace miosix; @@ -69,6 +75,7 @@ int main() RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOFEN; RCC->AHB3ENR |= RCC_AHB3ENR_QSPIEN; + RCC_SYNC(); delayMs(2 * 1000); diff --git a/src/tests/test-rtc.cpp b/src/tests/test-rtc.cpp index 7fc4242ae19797514767b6071fcd0c8d523140ee..c1df7512dcf0a82615bf56cd16891b4a8ab515ba 100644 --- a/src/tests/test-rtc.cpp +++ b/src/tests/test-rtc.cpp @@ -20,6 +20,12 @@ * THE SOFTWARE. */ +/** + * This is a quick and dirty test of the RTC time keeping functionality with + * the 32.768KHz crystal on board the compute unit. A proper driver will need to + * be developed! + */ + // PA14 -> OSC32_IN // PA15 -> OSC32_OUT