From b7f43614f980b34901da2b60709d2fc42d22625d Mon Sep 17 00:00:00 2001
From: Alberto Nidasio <alberto.nidasio@skywarder.eu>
Date: Thu, 20 Apr 2023 01:10:04 +0200
Subject: [PATCH] [Miosix] Renamed macros _ARCH_CORTEXM3_STM32 to
_ARCH_CORTEXM3_STM32F1
---
.../shared/drivers/ISB_protocol/IsbProtocol_serial2.cpp | 4 ++--
.../shared/drivers/ISB_protocol/IsbProtocol_serial3.cpp | 4 ++--
src/shared/utils/ClockUtils.h | 8 ++++----
src/tests/drivers/canbus/CanDriver/test-can-2way.cpp | 4 ++--
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/old_examples/shared/drivers/ISB_protocol/IsbProtocol_serial2.cpp b/old_examples/shared/drivers/ISB_protocol/IsbProtocol_serial2.cpp
index c1c685d00..1554a2c73 100644
--- a/old_examples/shared/drivers/ISB_protocol/IsbProtocol_serial2.cpp
+++ b/old_examples/shared/drivers/ISB_protocol/IsbProtocol_serial2.cpp
@@ -52,7 +52,7 @@ IsbProtocol_serial2::IsbProtocol_serial2()
u2tx::mode(Mode::ALTERNATE);
u2tx::alternateFunction(7);
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
u2rx::mode(Mode::INPUT);
#else
u2rx::mode(Mode::ALTERNATE);
@@ -206,7 +206,7 @@ void IsbProtocol_serial2::setBaud(uint32_t baud)
{
uint32_t busFreq = SystemCoreClock;
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
if (RCC->CFGR & RCC_CFGR_PPRE1_2)
{
busFreq /= 1 << (((RCC->CFGR >> 8) & 0x3) + 1);
diff --git a/old_examples/shared/drivers/ISB_protocol/IsbProtocol_serial3.cpp b/old_examples/shared/drivers/ISB_protocol/IsbProtocol_serial3.cpp
index 9bd1719af..68bb3f790 100644
--- a/old_examples/shared/drivers/ISB_protocol/IsbProtocol_serial3.cpp
+++ b/old_examples/shared/drivers/ISB_protocol/IsbProtocol_serial3.cpp
@@ -74,7 +74,7 @@ IsbProtocol_serial3::IsbProtocol_serial3()
u3tx::mode(Mode::ALTERNATE);
u3tx::alternateFunction(7);
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
u3rx::mode(Mode::INPUT);
#else
u3rx::mode(Mode::ALTERNATE);
@@ -228,7 +228,7 @@ void IsbProtocol_serial3::setBaud(uint32_t baud)
{
uint32_t busFreq = SystemCoreClock;
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
if (RCC->CFGR & RCC_CFGR_PPRE1_2)
{
busFreq /= 1 << (((RCC->CFGR >> 8) & 0x3) + 1);
diff --git a/src/shared/utils/ClockUtils.h b/src/shared/utils/ClockUtils.h
index e7fca74c5..11f827d79 100644
--- a/src/shared/utils/ClockUtils.h
+++ b/src/shared/utils/ClockUtils.h
@@ -82,7 +82,7 @@ inline uint32_t ClockUtils::getAPBPeripheralsClock(APB bus)
if (bus == APB::APB1)
{
// The position of the PPRE1 bit in RCC->CFGR is different in some stm32
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
const uint32_t ppre1 = 8;
#elif _ARCH_CORTEXM4_STM32F4 | _ARCH_CORTEXM3_STM32F2
const uint32_t ppre1 = 10;
@@ -98,7 +98,7 @@ inline uint32_t ClockUtils::getAPBPeripheralsClock(APB bus)
else
{
// The position of the PPRE2 bit in RCC->CFGR is different in some stm32
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
const uint32_t ppre2 = 11;
#elif _ARCH_CORTEXM4_STM32F4 | _ARCH_CORTEXM3_STM32F2
const uint32_t ppre2 = 13;
@@ -127,7 +127,7 @@ inline uint32_t ClockUtils::getAPBTimersClock(APB bus)
if (bus == APB::APB1)
{
// The position of the PPRE1 bit in RCC->CFGR is different in some stm32
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
const uint32_t ppre1 = 8;
#elif _ARCH_CORTEXM4_STM32F4 | _ARCH_CORTEXM3_STM32F2
const uint32_t ppre1 = 10;
@@ -143,7 +143,7 @@ inline uint32_t ClockUtils::getAPBTimersClock(APB bus)
else
{
// The position of the PPRE2 bit in RCC->CFGR is different in some stm32
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
const uint32_t ppre2 = 11;
#elif _ARCH_CORTEXM4_STM32F4 | _ARCH_CORTEXM3_STM32F2
const uint32_t ppre2 = 13;
diff --git a/src/tests/drivers/canbus/CanDriver/test-can-2way.cpp b/src/tests/drivers/canbus/CanDriver/test-can-2way.cpp
index 1a22bdfc8..3fd1440dd 100644
--- a/src/tests/drivers/canbus/CanDriver/test-can-2way.cpp
+++ b/src/tests/drivers/canbus/CanDriver/test-can-2way.cpp
@@ -47,7 +47,7 @@ using namespace Boardcore;
using namespace Boardcore::Canbus;
using namespace miosix;
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
using CanRX = Gpio<GPIOA_BASE, 11>;
using CanTX = Gpio<GPIOA_BASE, 12>;
#else
@@ -205,7 +205,7 @@ int main()
{
miosix::FastInterruptDisableLock dLock;
-#ifdef _ARCH_CORTEXM3_STM32
+#ifdef _ARCH_CORTEXM3_STM32F1
CanRX::mode(Mode::ALTERNATE);
CanTX::mode(Mode::ALTERNATE);
#else
--
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