From 382f7258c7631cd7496e425d3db6d7b0f02fac4c Mon Sep 17 00:00:00 2001
From: Matteo Piazzolla <matteo.piazzolla@skywarder.eu>
Date: Wed, 17 May 2017 19:18:42 +0200
Subject: [PATCH] Merged miosix config
---
config/Makefile.inc | 259 ++-
.../efm32gg332f1024_wandstem/board_settings.h | 4 +-
.../stm32f100rc_solertegiard/board_settings.h | 85 +
.../stm32f103c8_breakout/board_settings.h | 86 +
.../board_settings.h | 80 +
.../stm32f205rg_sony-newman/board_settings.h | 2 +
.../board_settings.h | 85 +
.../board_settings.h | 4 +-
.../board_settings.h | 4 +-
.../board_settings.h | 4 +-
config/oldmake | 1384 +++++++++++++++++
11 files changed, 1982 insertions(+), 15 deletions(-)
create mode 100644 config/arch/cortexM3_stm32/stm32f100rc_solertegiard/board_settings.h
create mode 100644 config/arch/cortexM3_stm32/stm32f103c8_breakout/board_settings.h
create mode 100644 config/arch/cortexM3_stm32f2/stm32f205rc_skyward_stormtrooper/board_settings.h
create mode 100644 config/arch/cortexM4_stm32f4/stm32f401vc_stm32f4discovery/board_settings.h
create mode 100644 config/oldmake
diff --git a/config/Makefile.inc b/config/Makefile.inc
index 0d2084420..88bbed895 100644
--- a/config/Makefile.inc
+++ b/config/Makefile.inc
@@ -7,6 +7,36 @@
## All architecture specific build code is grouped at the end of this file.
##
+##
+## Target board, choose one. This also implicitly select the target
+## architecture
+##
+#OPT_BOARD := lpc2138_miosix_board
+#OPT_BOARD := stm32f103ze_stm3210e-eval
+#OPT_BOARD := stm32f103ve_mp3v2
+#OPT_BOARD := stm32f100rb_stm32vldiscovery
+#OPT_BOARD := stm32f103ve_strive_mini
+#OPT_BOARD := stm32f103ze_redbull_v2
+#OPT_BOARD := stm32f407vg_stm32f4discovery
+#OPT_BOARD := stm32f207ig_stm3220g-eval
+#OPT_BOARD := stm32f207zg_ethboard_v2
+#OPT_BOARD := stm32f207ze_als_camboard
+#OPT_BOARD := stm32l151_als_mainboard
+#OPT_BOARD := stm32f407vg_bitsboard
+#OPT_BOARD := stm32f205rg_sony-newman
+#OPT_BOARD := stm32f429zi_stm32f4discovery
+#OPT_BOARD := stm32f103cb_als_mainboard_rev2
+#OPT_BOARD := stm32f100cb_tempsensor
+#OPT_BOARD := stm32f429zi_oledboard2
+#OPT_BOARD := efm32gg332f1024_wandstem
+#OPT_BOARD := stm32f411re_nucleo
+#OPT_BOARD := stm32f429zi_skyward_anakin
+#OPT_BOARD := stm32f100rc_solertegiard
+#OPT_BOARD := stm32f205rc_skyward_stormtrooper
+#OPT_BOARD := stm32f401vc_stm32f4discovery
+#OPT_BOARD := stm32f103c8_breakout
+#OPT_BOARD := stm32f100c8_microboard
+
##
## Optimization flags, choose one.
## -O0 produces large and slow code, but is useful for in circuit debugging.
@@ -312,9 +342,9 @@ ifeq ($(OPT_BOARD),stm32f429zi_skyward_anakin)
## Linker script type, there are three options
## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
## the most common choice, available for all microcontrollers
- ## 2) Code in FLASH, stack + heap in external RAM (file *16m_xram.ld)
+ ## 2) Code in FLASH, stack + heap in external RAM (file *8m_xram.ld)
## You must uncomment -D__ENABLE_XRAM below in this case.
- LINKER_SCRIPT_PATH := arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/
+ LINKER_SCRIPT_PATH := arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin/
#LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+256k_rom.ld
LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+8m_xram.ld
@@ -332,6 +362,38 @@ ifeq ($(OPT_BOARD),stm32f429zi_skyward_anakin)
endif
+##---------------------------------------------------------------------------
+## stm32f401vc_stm32f4discovery
+##
+
+# No options
+
+##---------------------------------------------------------------------------
+## stm32f103c8_breakout
+##
+ifeq ($(OPT_BOARD),stm32f103c8_breakout)
+
+ ## Linker script type, there are two options
+ ## 1) Code in FLASH, stack + heap in RAM
+ ## 2) Code in FLASH, stack + heap in RAM flashing with bootloader
+
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_64k+20k_bootloader.ld
+
+ ## Select clock frequency
+ CLOCK_FREQ := -DSYSCLK_FREQ_24MHz=24000000
+ #CLOCK_FREQ := -DSYSCLK_FREQ_36MHz=36000000
+ #CLOCK_FREQ := -DSYSCLK_FREQ_48MHz=48000000
+ #CLOCK_FREQ := -DSYSCLK_FREQ_56MHz=56000000
+ #CLOCK_FREQ := -DSYSCLK_FREQ_72MHz=72000000
+
+endif
+
+##---------------------------------------------------------------------------
+## stm32f100c8_microboard
+##
+
+# No options
+
############################################################################
## From the options selected above, now fill all the variables needed to ##
## build Miosix. You should modify something here only if you are adding ##
@@ -387,6 +449,16 @@ else ifeq ($(OPT_BOARD),stm32f411re_nucleo)
ARCH := cortexM4_stm32f4
else ifeq ($(OPT_BOARD),stm32f429zi_skyward_anakin)
ARCH := cortexM4_stm32f4
+else ifeq ($(OPT_BOARD),stm32f100rc_solertegiard)
+ ARCH := cortexM3_stm32
+else ifeq ($(OPT_BOARD),stm32f205rc_skyward_stormtrooper)
+ ARCH := cortexM3_stm32f2
+else ifeq ($(OPT_BOARD),stm32f401vc_stm32f4discovery)
+ ARCH := cortexM4_stm32f4
+else ifeq ($(OPT_BOARD),stm32f103c8_breakout)
+ ARCH := cortexM3_stm32
+else ifeq ($(OPT_BOARD),stm32f100c8_microboard)
+ ARCH := cortexM3_stm32
else
$(info Error: no board specified in miosix/config/Makefile.inc)
$(error Error)
@@ -464,7 +536,7 @@ ifeq ($(ARCH),arm7_lpc2000)
-ffunction-sections -Wall -g -c
CXXFLAGS_BASE += -D_ARCH_ARM7_LPC2000 -mcpu=arm7tdmi $(OPT_OPTIMIZATION) \
-ffunction-sections $(OPT_EXCEPT) -Wall -g -c
- LFLAGS_BASE := -mcpu=arm7tdmi -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ LFLAGS_BASE := -mcpu=arm7tdmi -Wl,--gc-sections,-Map,main.map \
-Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
$(OPT_OPTIMIZATION) -nostdlib
@@ -595,6 +667,42 @@ else ifeq ($(ARCH),cortexM3_stm32)
## board.
#PROGRAM_CMDLINE := sudo vsprog -cstm32_vl -ms -I main.hex -oe -owf -ovf
PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f100rc_solertegiard
+ ##
+ else ifeq ($(OPT_BOARD),stm32f100rc_solertegiard)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f100rc_solertegiard
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_256k+24k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp \
+ arch/common/drivers/servo_stm32.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_SOLERTEGIARD -DSTM32F10X_HD_VL
+ CXXFLAGS_BASE += -D_BOARD_SOLERTEGIARD -DSTM32F10X_HD_VL
+
+ ## Clock frequency
+ CLOCK_FREQ := -DSYSCLK_FREQ_24MHz=24000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ #PROGRAM_CMDLINE := sudo vsprog -cstm32_vl -ms -I main.hex -oe -owf -ovf
+ PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB1
+
##-------------------------------------------------------------------------
## BOARD: stm32f103ve_strive_mini
@@ -733,6 +841,72 @@ else ifeq ($(ARCH),cortexM3_stm32)
## error message saying that 'make program' is not supported for that
## board.
PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f103c8_breakout
+ ##
+ else ifeq ($(OPT_BOARD),stm32f103c8_breakout)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f103c8_breakout
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_64k+20k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp \
+ arch/common/drivers/servo_stm32.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM32F103C8_BREAKOUT -DSTM32F10X_MD
+ CXXFLAGS_BASE += -D_BOARD_STM32F103C8_BREAKOUT -DSTM32F10X_MD
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ #PROGRAM_CMDLINE := sudo vsprog -cstm32_vl -ms -I main.hex -oe -owf -ovf
+ PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f100c8_microboard
+ ##
+ else ifeq ($(OPT_BOARD),stm32f100c8_microboard)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f100c8_microboard
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_63k+8k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_MICROBOARD -DSTM32F10X_MD_VL
+ CXXFLAGS_BASE += -D_BOARD_MICROBOARD -DSTM32F10X_MD_VL
+
+ ## Clock frequency
+ # Not defining anything results in HSI being used
+ CLOCK_FREQ := -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB0
##-------------------------------------------------------------------------
## End of board list
@@ -760,7 +934,7 @@ else ifeq ($(ARCH),cortexM3_stm32)
CXXFLAGS_BASE += -D_ARCH_CORTEXM3_STM32 $(CLOCK_FREQ) $(XRAM) \
$(OPT_EXCEPT) -mcpu=cortex-m3 -mthumb \
$(OPT_OPTIMIZATION) -ffunction-sections -Wall -g -c
- LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,main.map \
-Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
$(OPT_OPTIMIZATION) -nostdlib
@@ -973,6 +1147,40 @@ else ifeq ($(ARCH),cortexM4_stm32f4)
## board.
PROGRAM_CMDLINE := stm32flash -w main.bin -v /dev/ttyUSB0
+ ##-------------------------------------------------------------------------
+ ## stm32f401vc_stm32f4discovery
+ ##
+ else ifeq ($(OPT_BOARD),stm32f401vc_stm32f4discovery)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM4_stm32f4/stm32f401vc_stm32f4discovery
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_256k+64k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/stm32f2_f4_i2c.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM32F401VC_STM32F4DISCOVERY
+ CXXFLAGS_BASE += -D_BOARD_STM32F401VC_STM32F4DISCOVERY
+
+ ## Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+ CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_84MHz=84000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := qstlink2 -cqewV ./main.bin
+
##-------------------------------------------------------------------------
## End of board list
##
@@ -1001,7 +1209,7 @@ else ifeq ($(ARCH),cortexM4_stm32f4)
$(OPT_EXCEPT) $(OPT_OPTIMIZATION) -ffunction-sections \
-Wall -g -c
LFLAGS_BASE := -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 \
- -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ -Wl,--gc-sections,-Map,main.map \
-Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
$(OPT_OPTIMIZATION) -nostdlib
@@ -1178,6 +1386,32 @@ else ifeq ($(ARCH),cortexM3_stm32f2)
dfu-util -d 0fce:f0fa -a 0 -i 0 -s 0x08040000 -D main.bin; \
dfu-util -d 0fce:f0fa -a 0 -i 0 -s 0x080ffffc -D magic.bin; \
rm magic.bin
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f205rc_skyward_stormtrooper
+ ##
+ else ifeq ($(OPT_BOARD),stm32f205rc_skyward_stormtrooper)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32f2/stm32f205rc_skyward_stormtrooper
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_512k+128k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/stm32f2_f4_i2c.cpp \
+ $(BOARD_INC)/interfaces-impl/delays.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM32F205RC_SKYWARD_STORMTROOPER
+ CXXFLAGS_BASE += -D_BOARD_STM32F205RC_SKYWARD_STORMTROOPER
+
+ ## Clock frequency
+ CLOCK_FREQ := -DHSE_VALUE=25000000 -DSYSCLK_FREQ_120MHz=120000000
##-------------------------------------------------------------------------
## End of board list
@@ -1205,7 +1439,7 @@ else ifeq ($(ARCH),cortexM3_stm32f2)
CXXFLAGS_BASE += -D_ARCH_CORTEXM3_STM32F2 $(CLOCK_FREQ) $(XRAM) \
$(OPT_EXCEPT) -mcpu=cortex-m3 -mthumb \
$(OPT_OPTIMIZATION) -ffunction-sections -Wall -g -c
- LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,main.map \
-Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
$(OPT_OPTIMIZATION) -nostdlib
@@ -1285,7 +1519,7 @@ else ifeq ($(ARCH),cortexM3_stm32l1)
CXXFLAGS_BASE += -D_ARCH_CORTEXM3_STM32L1 $(CLOCK_FREQ) $(XRAM) \
$(OPT_EXCEPT) -mcpu=cortex-m3 -mthumb \
$(OPT_OPTIMIZATION) -ffunction-sections -Wall -g -c
- LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,main.map \
-Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
$(OPT_OPTIMIZATION) -nostdlib
@@ -1320,8 +1554,13 @@ else ifeq ($(ARCH),cortexM3_efm32gg)
## Select architecture specific files
## These are the files in arch/<arch name>/<board name>
- ARCH_SRC := \
- $(BOARD_INC)/interfaces-impl/bsp.cpp
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp \
+ $(BOARD_INC)/interfaces-impl/spi.cpp \
+ $(BOARD_INC)/interfaces-impl/power_manager.cpp \
+ $(BOARD_INC)/interfaces-impl/gpioirq.cpp \
+ $(BOARD_INC)/interfaces-impl/hardware_timer.cpp \
+ $(BOARD_INC)/interfaces-impl/transceiver.cpp
## Add a #define to allow querying board name
CFLAGS_BASE += -DEFM32GG332F1024 -D_BOARD_WANDSTEM
@@ -1364,7 +1603,7 @@ else ifeq ($(ARCH),cortexM3_efm32gg)
CXXFLAGS_BASE += -D_ARCH_CORTEXM3_EFM32GG $(CLOCK_FREQ) \
$(OPT_EXCEPT) -mcpu=cortex-m3 -mthumb \
$(OPT_OPTIMIZATION) -ffunction-sections -Wall -g -c
- LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,main.map \
-Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
$(OPT_OPTIMIZATION) -nostdlib
diff --git a/config/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/board_settings.h b/config/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/board_settings.h
index ad66fbede..20cb611b1 100644
--- a/config/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/board_settings.h
+++ b/config/arch/cortexM3_efm32gg/efm32gg332f1024_wandstem/board_settings.h
@@ -39,9 +39,9 @@
/**
* Select hardware revision (10=1.0, 11=1.1, ...).
* Different versions of the board were built, with minor differences in GPIO
- * usage. Default is currently the latest one, which is v1.3
+ * usage. Default is currently the latest one, which is v1.4
*/
-#define WANDSTEM_HW_REV 13
+#define WANDSTEM_HW_REV 14
namespace miosix {
diff --git a/config/arch/cortexM3_stm32/stm32f100rc_solertegiard/board_settings.h b/config/arch/cortexM3_stm32/stm32f100rc_solertegiard/board_settings.h
new file mode 100644
index 000000000..4e4c68e65
--- /dev/null
+++ b/config/arch/cortexM3_stm32/stm32f100rc_solertegiard/board_settings.h
@@ -0,0 +1,85 @@
+/***************************************************************************
+ * Copyright (C) 2016 by Silvano Seva *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * As a special exception, if other files instantiate templates or use *
+ * macros or inline functions from this file, or you compile this file *
+ * and link it with other works to produce a work based on this file, *
+ * this file does not by itself cause the resulting work to be covered *
+ * by the GNU General Public License. However the source code for this *
+ * file must still be made available in accordance with the GNU General *
+ * Public License. This exception does not invalidate any other reasons *
+ * why a work based on this file might be covered by the GNU General *
+ * Public License. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, see <http://www.gnu.org/licenses/> *
+ ***************************************************************************/
+
+#ifndef BOARD_SETTINGS_H
+#define BOARD_SETTINGS_H
+
+#include "util/version.h"
+
+/**
+ * \internal
+ * Versioning for board_settings.h for out of git tree projects
+ */
+#define BOARD_SETTINGS_VERSION 100
+
+namespace miosix {
+
+/**
+ * \addtogroup Settings
+ * \{
+ */
+
+/// Size of stack for main().
+/// The C standard library is stack-heavy (iprintf requires 1KB) but the
+/// STM32F100RB only has 8KB of RAM so the stack is only 1.5KB.
+const unsigned int MAIN_STACK_SIZE=1024+512;
+
+/// Frequency of tick (in Hz). The frequency of the STM32F100RB timer in the
+/// stm32vldiscovery board can be divided by 1000. This allows to use a 1KHz
+/// tick and the minimun Thread::sleep value is 1ms
+/// For the priority scheduler this is also the context switch frequency
+const unsigned int TICK_FREQ=1000;
+
+///\internal Aux timer run @ 100KHz
+///Note that since the timer is only 16 bits this imposes a limit on the
+///burst measurement of 655ms. If due to a pause_kernel() or
+///disable_interrupts() section a thread runs for more than that time, a wrong
+///burst value will be measured
+const unsigned int AUX_TIMER_CLOCK=100000;
+const unsigned int AUX_TIMER_MAX=0xffff; ///<\internal Aux timer is 16 bits
+
+/// Serial port
+const unsigned int defaultSerial=1;
+const unsigned int defaultSerialSpeed=19200;
+const bool defaultSerialFlowctrl=false;
+#define SERIAL_1_DMA
+//#define SERIAL_2_DMA //Serial 1 is not used, so not enabling DMA
+//#define SERIAL_3_DMA //Serial 1 is not used, so not enabling DMA
+
+///\def STDOUT_REDIRECTED_TO_DCC
+///If defined, stdout is redirected to the debug communication channel, and
+///will be printed if OpenOCD is connected. If not defined, stdout will be
+///redirected throug USART1, as usual.
+//#define STDOUT_REDIRECTED_TO_DCC
+
+/**
+ * \}
+ */
+
+} //namespace miosix
+
+#endif /* BOARD_SETTINGS_H */
diff --git a/config/arch/cortexM3_stm32/stm32f103c8_breakout/board_settings.h b/config/arch/cortexM3_stm32/stm32f103c8_breakout/board_settings.h
new file mode 100644
index 000000000..4f97600b6
--- /dev/null
+++ b/config/arch/cortexM3_stm32/stm32f103c8_breakout/board_settings.h
@@ -0,0 +1,86 @@
+/***************************************************************************
+ * Copyright (C) 2011, 2012, 2013, 2014 by Terraneo Federico *
+ * Copyright (C) 2016 by Silvano Seva *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * As a special exception, if other files instantiate templates or use *
+ * macros or inline functions from this file, or you compile this file *
+ * and link it with other works to produce a work based on this file, *
+ * this file does not by itself cause the resulting work to be covered *
+ * by the GNU General Public License. However the source code for this *
+ * file must still be made available in accordance with the GNU General *
+ * Public License. This exception does not invalidate any other reasons *
+ * why a work based on this file might be covered by the GNU General *
+ * Public License. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, see <http://www.gnu.org/licenses/> *
+ ***************************************************************************/
+
+#ifndef BOARD_SETTINGS_H
+#define BOARD_SETTINGS_H
+
+#include "util/version.h"
+
+/**
+ * \internal
+ * Versioning for board_settings.h for out of git tree projects
+ */
+#define BOARD_SETTINGS_VERSION 100
+
+namespace miosix {
+
+/**
+ * \addtogroup Settings
+ * \{
+ */
+
+/// Size of stack for main().
+/// The C standard library is stack-heavy (iprintf requires 1.5KB) and the
+/// STM32F103C8 has 20KB of RAM so there is room for a big 4K stack.
+const unsigned int MAIN_STACK_SIZE=4*1024;
+
+/// Frequency of tick (in Hz). The frequency of the STM32F100RB timer in the
+/// stm32vldiscovery board can be divided by 1000. This allows to use a 1KHz
+/// tick and the minimun Thread::sleep value is 1ms
+/// For the priority scheduler this is also the context switch frequency
+const unsigned int TICK_FREQ=1000;
+
+///\internal Aux timer run @ 100KHz
+///Note that since the timer is only 16 bits this imposes a limit on the
+///burst measurement of 655ms. If due to a pause_kernel() or
+///disable_interrupts() section a thread runs for more than that time, a wrong
+///burst value will be measured
+const unsigned int AUX_TIMER_CLOCK=100000;
+const unsigned int AUX_TIMER_MAX=0xffff; ///<\internal Aux timer is 16 bits
+
+/// Serial port
+const unsigned int defaultSerial=1;
+const unsigned int defaultSerialSpeed=19200;
+const bool defaultSerialFlowctrl=false;
+#define SERIAL_1_DMA
+//#define SERIAL_2_DMA //Serial 1 is not used, so not enabling DMA
+//#define SERIAL_3_DMA //Serial 1 is not used, so not enabling DMA
+
+///\def STDOUT_REDIRECTED_TO_DCC
+///If defined, stdout is redirected to the debug communication channel, and
+///will be printed if OpenOCD is connected. If not defined, stdout will be
+///redirected throug USART1, as usual.
+//#define STDOUT_REDIRECTED_TO_DCC
+
+/**
+ * \}
+ */
+
+} //namespace miosix
+
+#endif /* BOARD_SETTINGS_H */
diff --git a/config/arch/cortexM3_stm32f2/stm32f205rc_skyward_stormtrooper/board_settings.h b/config/arch/cortexM3_stm32f2/stm32f205rc_skyward_stormtrooper/board_settings.h
new file mode 100644
index 000000000..d24f95903
--- /dev/null
+++ b/config/arch/cortexM3_stm32f2/stm32f205rc_skyward_stormtrooper/board_settings.h
@@ -0,0 +1,80 @@
+/***************************************************************************
+ * Copyright (C) 2016 by Terraneo Federico and Silvano Seva *
+ * for Skyward Experimental Rocketry *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * As a special exception, if other files instantiate templates or use *
+ * macros or inline functions from this file, or you compile this file *
+ * and link it with other works to produce a work based on this file, *
+ * this file does not by itself cause the resulting work to be covered *
+ * by the GNU General Public License. However the source code for this *
+ * file must still be made available in accordance with the GNU General *
+ * Public License. This exception does not invalidate any other reasons *
+ * why a work based on this file might be covered by the GNU General *
+ * Public License. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, see <http://www.gnu.org/licenses/> *
+ ***************************************************************************/
+
+#ifndef BOARD_SETTINGS_H
+#define BOARD_SETTINGS_H
+
+#include "util/version.h"
+
+/**
+ * \internal
+ * Versioning for board_settings.h for out of git tree projects
+ */
+#define BOARD_SETTINGS_VERSION 100
+
+namespace miosix {
+
+/**
+ * \addtogroup Settings
+ * \{
+ */
+
+/// Size of stack for main().
+/// The C standard library is stack-heavy (iprintf requires 1.5KB) and the
+/// STM32F205RC has 128KB of RAM so there is room for a big 4K stack.
+const unsigned int MAIN_STACK_SIZE=4*1024;
+
+/// Frequency of tick (in Hz). The frequency of the STM32F205RC timer in the
+/// Miosix board can be divided by 1000. This allows to use a 1KHz tick and
+/// the minimun Thread::sleep value is 1ms
+/// For the priority scheduler this is also the context switch frequency
+const unsigned int TICK_FREQ=1000;
+
+///\internal Aux timer run @ 100KHz
+///Note that since the timer is only 16 bits this imposes a limit on the
+///burst measurement of 655ms. If due to a pause_kernel() or
+///disable_interrupts() section a thread runs for more than that time, a wrong
+///burst value will be measured
+const unsigned int AUX_TIMER_CLOCK=100000;
+const unsigned int AUX_TIMER_MAX=0xffff; ///<\internal Aux timer is 16 bits
+
+/// Serial port
+const unsigned int defaultSerial=1;
+const unsigned int defaultSerialSpeed=19200;
+const bool defaultSerialFlowctrl=false;
+//#define SERIAL_1_DMA //Serial 1 has no DMA as it would conflict with SPI6
+// #define SERIAL_2_DMA //Serial 2 is used by the piksi GPS, enable DMA
+//#define SERIAL_3_DMA //Serial 3 is not used
+
+/**
+ * \}
+ */
+
+} //namespace miosix
+
+#endif /* BOARD_SETTINGS_H */
diff --git a/config/arch/cortexM3_stm32f2/stm32f205rg_sony-newman/board_settings.h b/config/arch/cortexM3_stm32f2/stm32f205rg_sony-newman/board_settings.h
index 1890a9448..4716c0ac2 100644
--- a/config/arch/cortexM3_stm32f2/stm32f205rg_sony-newman/board_settings.h
+++ b/config/arch/cortexM3_stm32f2/stm32f205rg_sony-newman/board_settings.h
@@ -62,6 +62,8 @@ const unsigned int TICK_FREQ=1000;
const unsigned int AUX_TIMER_CLOCK=100000;
const unsigned int AUX_TIMER_MAX=0xffff; ///<\internal Aux timer is 16 bits
+#define I2C_WITH_DMA
+
/**
* \}
*/
diff --git a/config/arch/cortexM4_stm32f4/stm32f401vc_stm32f4discovery/board_settings.h b/config/arch/cortexM4_stm32f4/stm32f401vc_stm32f4discovery/board_settings.h
new file mode 100644
index 000000000..efccfafaf
--- /dev/null
+++ b/config/arch/cortexM4_stm32f4/stm32f401vc_stm32f4discovery/board_settings.h
@@ -0,0 +1,85 @@
+/***************************************************************************
+ * Copyright (C) 2012, 2013, 2014 by Terraneo Federico *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * As a special exception, if other files instantiate templates or use *
+ * macros or inline functions from this file, or you compile this file *
+ * and link it with other works to produce a work based on this file, *
+ * this file does not by itself cause the resulting work to be covered *
+ * by the GNU General Public License. However the source code for this *
+ * file must still be made available in accordance with the GNU General *
+ * Public License. This exception does not invalidate any other reasons *
+ * why a work based on this file might be covered by the GNU General *
+ * Public License. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, see <http://www.gnu.org/licenses/> *
+ ***************************************************************************/
+
+#ifndef BOARD_SETTINGS_H
+#define BOARD_SETTINGS_H
+
+#include "util/version.h"
+
+/**
+ * \internal
+ * Versioning for board_settings.h for out of git tree projects
+ */
+#define BOARD_SETTINGS_VERSION 100
+
+namespace miosix {
+
+/**
+ * \addtogroup Settings
+ * \{
+ */
+
+/// Size of stack for main().
+/// The C standard library is stack-heavy (iprintf requires 1KB) but the
+/// STM32F401VC only has 192KB of RAM so there is room for a big 4K stack.
+const unsigned int MAIN_STACK_SIZE=4*1024;
+
+/// Frequency of tick (in Hz). The frequency of the STM32F401VC timer in the
+/// stm32vldiscovery board can be divided by 1000. This allows to use a 1KHz
+/// tick and the minimun Thread::sleep value is 1ms
+/// For the priority scheduler this is also the context switch frequency
+const unsigned int TICK_FREQ=1000;
+
+///\internal Aux timer run @ 100KHz
+///Note that since the timer is only 16 bits this imposes a limit on the
+///burst measurement of 655ms. If due to a pause_kernel() or
+///disable_interrupts() section a thread runs for more than that time, a wrong
+///burst value will be measured
+const unsigned int AUX_TIMER_CLOCK=100000;
+const unsigned int AUX_TIMER_MAX=0xffff; ///<\internal Aux timer is 16 bits
+
+/// Serial port
+const unsigned int defaultSerial=2;
+const unsigned int defaultSerialSpeed=19200;
+const bool defaultSerialFlowctrl=false;
+//#define SERIAL_1_DMA //Serial 1 is not used, so not enabling DMA
+//#define SERIAL_2_DMA //Serial 2 DMA conflicts with I2S driver in the examples
+//#define SERIAL_3_DMA //Serial 3 is not used, so not enabling DMA
+
+//#define I2C_WITH_DMA
+
+//SD card driver
+static const unsigned char sdVoltage=30; //Board powered @ 3.0V
+#define SD_ONE_BIT_DATABUS //Can't use 4 bit databus due to pin conflicts
+
+/**
+ * \}
+ */
+
+} //namespace miosix
+
+#endif /* BOARD_SETTINGS_H */
diff --git a/config/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_settings.h b/config/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_settings.h
index 0985b18b1..6f8a1da27 100644
--- a/config/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_settings.h
+++ b/config/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_settings.h
@@ -68,7 +68,9 @@ const unsigned int defaultSerialSpeed=19200;
const bool defaultSerialFlowctrl=false;
//#define SERIAL_1_DMA //Serial 1 is not used, so not enabling DMA
//#define SERIAL_2_DMA //Serial 2 DMA conflicts with I2S driver in the examples
-//#define SERIAL_3_DMA
+#define SERIAL_3_DMA
+
+//#define I2C_WITH_DMA
//SD card driver
static const unsigned char sdVoltage=30; //Board powered @ 3.0V
diff --git a/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin/board_settings.h b/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin/board_settings.h
index 78fd694f6..a802d93bf 100644
--- a/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin/board_settings.h
+++ b/config/arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin/board_settings.h
@@ -64,12 +64,14 @@ const unsigned int AUX_TIMER_MAX=0xffff; ///<\internal Aux timer is 16 bits
/// Serial port
const unsigned int defaultSerial=1;
-const unsigned int defaultSerialSpeed=115200;
+const unsigned int defaultSerialSpeed=19200;
const bool defaultSerialFlowctrl=false;
//#define SERIAL_1_DMA //Serial 1 has no DMA as it would conflict with SPI6
#define SERIAL_2_DMA //Serial 2 is used by the piksi GPS, enable DMA
//#define SERIAL_3_DMA //Serial 3 is not used
+#define I2C_WITH_DMA
+
//SD card driver
static const unsigned char sdVoltage=33; //Board powered @ 3.3V
//#define SD_ONE_BIT_DATABUS //Use full 4 bit data bus to SD card
diff --git a/config/arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/board_settings.h b/config/arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/board_settings.h
index c8739bee8..e92c9e20a 100644
--- a/config/arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/board_settings.h
+++ b/config/arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/board_settings.h
@@ -66,10 +66,12 @@ const unsigned int AUX_TIMER_MAX=0xffff; ///<\internal Aux timer is 16 bits
const unsigned int defaultSerial=1;
const unsigned int defaultSerialSpeed=19200;
const bool defaultSerialFlowctrl=false;
-//#define SERIAL_1_DMA
+#define SERIAL_1_DMA
//#define SERIAL_2_DMA //Serial 2 can't be used (GPIO conflict), so no DMA
//#define SERIAL_3_DMA //Serial 3 can't be used (GPIO conflict), so no DMA
+//#define I2C_WITH_DMA
+
//SD card driver
static const unsigned char sdVoltage=30; //Board powered @ 3.0V
#define SD_ONE_BIT_DATABUS //Can't use 4 bit databus due to pin conflicts
diff --git a/config/oldmake b/config/oldmake
new file mode 100644
index 000000000..0d2084420
--- /dev/null
+++ b/config/oldmake
@@ -0,0 +1,1384 @@
+##
+## Makefile for Miosix embedded OS
+##
+## This file contains the options required by the build system to build
+## Miosix on various target architectures. All options start with OPT_
+## to be easily recognizable.
+## All architecture specific build code is grouped at the end of this file.
+##
+
+##
+## Optimization flags, choose one.
+## -O0 produces large and slow code, but is useful for in circuit debugging.
+## -O2 is recomended otherwise, as it provides a good balance between code
+## size and speed
+##
+#OPT_OPTIMIZATION := -O0
+OPT_OPTIMIZATION := -O2
+#OPT_OPTIMIZATION := -O3
+#OPT_OPTIMIZATION := -Os
+
+##
+## C++ Exception/rtti support disable flags.
+## To save code size if not using C++ exceptions (nor some STL code which
+## implicitly uses it) uncomment this option.
+## the -D__NO_EXCEPTIONS is used by Miosix to know if exceptions are used.
+##
+#OPT_EXCEPT := -fno-exceptions -fno-rtti -D__NO_EXCEPTIONS
+
+#############################################################################
+## Board specific options
+#############################################################################
+
+##---------------------------------------------------------------------------
+## lpc2138_miosix_board
+##
+
+# No options
+
+##---------------------------------------------------------------------------
+## stm32f103ze_stm3210e-eval
+##
+ifeq ($(OPT_BOARD),stm32f103ze_stm3210e-eval)
+
+ ## Linker script type, there are three options
+ ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+ ## the most common choice, available for all microcontrollers
+ ## 2) Code in FLASH stack in internal RAM heap in external RAM (file
+ ## *_xram.ld) useful for hardware like STM3210E-EVAL when big heap is
+ ## needed. The microcontroller must have an external memory interface.
+ ## 3) Code + stack + heap in external RAM, (file *_all_in_xram.ld)
+ ## useful for debugging code in hardware like STM3210E-EVAL. Code runs
+ ## *very* slow compared to FLASH. Works only with a booloader that
+ ## forwards interrrupts @ 0x68000000 (see miosix/_tools/bootloaders for
+ ## one).
+ ## The microcontroller must have an external memory interface.
+ ## Warning! enable external ram if you use a linker script that requires it
+ ## (see the XRAM flag below)
+ LINKER_SCRIPT_PATH := arch/cortexM3_stm32/stm32f103ze_stm3210e-eval/
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_512k+64k_rom.ld
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_512k+64k_xram.ld
+ LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_512k+64k_all_in_xram.ld
+
+ ## Enable/disable initialization of external RAM at boot. Three options:
+ ## __ENABLE_XRAM : If you want the heap in xram (with an appropriate linker
+ ## script selected above)
+ ## __ENABLE_XRAM and __CODE_IN_XRAM : Debug mode with code + stack + heap
+ ## in xram (with an appropriate linker script selected above)
+ ## none selected : don't use xram (with an appropriate linker script
+ ## selected above)
+ #XRAM := -D__ENABLE_XRAM
+ XRAM := -D__ENABLE_XRAM -D__CODE_IN_XRAM
+
+ ## Select clock frequency
+ ## Not defining any of these results in the internal 8MHz clock to be used
+ #CLOCK_FREQ := -DSYSCLK_FREQ_24MHz=24000000
+ #CLOCK_FREQ := -DSYSCLK_FREQ_36MHz=36000000
+ #CLOCK_FREQ := -DSYSCLK_FREQ_48MHz=48000000
+ #CLOCK_FREQ := -DSYSCLK_FREQ_56MHz=56000000
+ CLOCK_FREQ := -DSYSCLK_FREQ_72MHz=72000000
+
+endif
+
+##---------------------------------------------------------------------------
+## stm32f103ve_mp3v2
+##
+ifeq ($(OPT_BOARD),stm32f103ve_mp3v2)
+
+ ## Linker script type, there are two options
+ ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+ ## 2) Code + stack + heap in internal RAM (file *_ram.ld)
+ ## Note: this board relies on a bootloader for interrupt forwarding in ram
+ LINKER_SCRIPT_PATH := arch/cortexM3_stm32/stm32f103ve_mp3v2/
+ LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_512k+64k_rom.ld
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_512k+64k_ram.ld
+
+endif
+
+##---------------------------------------------------------------------------
+## stm32f103ve_strive_mini
+##
+
+# No options
+
+##---------------------------------------------------------------------------
+## stm32f103ze_redbull_v2
+##
+
+# No options
+
+##---------------------------------------------------------------------------
+## stm32f407vg_stm32f4discovery
+##
+ifeq ($(OPT_BOARD),stm32f407vg_stm32f4discovery)
+
+ ## Linker script type, there are two options
+ ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+ ## 2) Code + stack + heap in internal RAM (file *_ram.ld)
+ ## 3) Same as 1) but space has been reserved for a process pool, allowing
+ ## to configure the kernel with "#define WITH_PROCESSES"
+ LINKER_SCRIPT_PATH := arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/
+ LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+192k_rom.ld
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+192k_ram.ld
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+192k_rom_processes.ld
+
+ ## This causes the interrupt vector table to be relocated in SRAM, must be
+ ## uncommented when using the ram linker script
+ #SRAM_BOOT := -DVECT_TAB_SRAM
+
+ ## Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+ CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000
+ #CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_100MHz=100000000
+ #CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_84MHz=84000000
+
+endif
+
+##---------------------------------------------------------------------------
+## stm32f207ig_stm3220g-eval
+##
+ifeq ($(OPT_BOARD),stm32f207ig_stm3220g-eval)
+
+ ## Linker script type, there are three options
+ ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+ ## the most common choice, available for all microcontrollers
+ ## 2) Code in FLASH stack in internal RAM heap in external RAM (file
+ ## *_xram.ld) useful for hardware like STM3220G-EVAL when big heap is
+ ## needed. The microcontroller must have an external memory interface.
+ ## 3) Code + stack + heap in external RAM, (file *_all_in_xram.ld)
+ ## useful for debugging code in hardware like STM3220G-EVAL. Code runs
+ ## *very* slow compared to FLASH. Works only with a booloader that
+ ## forwards interrrupts @ 0x64000000 (see miosix/_tools/bootloaders for
+ ## one).
+ ## The microcontroller must have an external memory interface.
+ ## 4) Same as 3) but space has been reserved for a process pool, allowing
+ ## to configure the kernel with "#define WITH_PROCESSES"
+ ## Warning! enable external ram if you use a linker script that requires it
+ ## (see the XRAM flag below)
+ LINKER_SCRIPT_PATH := arch/cortexM3_stm32f2/stm32f207ig_stm3220g-eval/
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+128k_rom.ld
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+128k_xram.ld
+ LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+128k_all_in_xram.ld
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+128k_all_in_xram_processes.ld
+
+ ## Enable/disable initialization of external RAM at boot. Three options:
+ ## __ENABLE_XRAM : If you want the heap in xram (with an appropriate linker
+ ## script selected above)
+ ## __ENABLE_XRAM and __CODE_IN_XRAM : Debug mode with code + stack + heap
+ ## in xram (with an appropriate linker script selected above)
+ ## none selected : don't use xram (with an appropriate linker script
+ ## selected above)
+ #XRAM := -D__ENABLE_XRAM
+ XRAM := -D__ENABLE_XRAM -D__CODE_IN_XRAM
+
+endif
+
+##---------------------------------------------------------------------------
+## stm32f207zg_ethboard_v2
+##
+ifeq ($(OPT_BOARD),stm32f207zg_ethboard_v2)
+
+ ## Linker script type, there are two options
+ ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+ ## the most common choice, available for all microcontrollers
+ ## 2) Code in external RAM, stack + heap in internal RAM
+ ## (file *_code_in_xram.ld) useful for debugging. Code runs
+ ## *very* slow compared to FLASH. Works only with a booloader that
+ ## forwards interrrupts @ 0x60000000 (see miosix/_tools/bootloaders for
+ ## one).
+ ## You must -D__CODE_IN_XRAM below.
+ LINKER_SCRIPT_PATH := arch/cortexM3_stm32f2/stm32f207zg_EthBoardV2/
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+128k_rom.ld
+ LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+128k_code_in_xram.ld
+
+ ## XRAM is always enabled on this board, even if the _rom linker script
+ ## does not make explicit use of it.
+ ## Uncommenting __CODE_IN_XRAM (with an appropriate linker script selected
+ ## above) allows to run code from external RAM, useful for debugging
+ XRAM := -D__CODE_IN_XRAM
+
+endif
+
+##---------------------------------------------------------------------------
+## stm32f205rg_sony-newman
+##
+
+# No options
+
+##---------------------------------------------------------------------------
+## stm32f407vg_bitsboard
+##
+
+# No options
+
+##---------------------------------------------------------------------------
+## stm32f429zi_stm32f4discovery
+##
+ifeq ($(OPT_BOARD),stm32f429zi_stm32f4discovery)
+
+ ## Linker script type, there are three options
+ ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+ ## the most common choice, available for all microcontrollers
+ ## 2) Code in FLASH, stack + heap in external RAM (file *8m_xram.ld)
+ ## You must uncomment -D__ENABLE_XRAM below in this case.
+ ## 3) Code in FLASH, stack + heap in external RAM (file *6m_xram.ld)
+ ## Same as above, but leaves the upper 2MB of RAM for the LCD.
+ LINKER_SCRIPT_PATH := arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+256k_rom.ld
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+8m_xram.ld
+ LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+6m_xram.ld
+
+ ## Uncommenting __ENABLE_XRAM enables the initialization of the external
+ ## 8MB SDRAM memory. Do not uncomment this even if you don't use a linker
+ ## script that requires it, as it is used for the LCD framebuffer.
+ XRAM := -D__ENABLE_XRAM
+
+ ## Select clock frequency. Warning: the default clock frequency for
+ ## this board is 168MHz and not 180MHz because, due to a limitation in
+ ## the PLL, it is not possible to generate a precise 48MHz output when
+ ## running the core at 180MHz. If 180MHz is chosen the USB peripheral will
+ ## NOT WORK and the SDIO and RNG will run ~6% slower (45MHz insteand of 48)
+ #CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_180MHz=180000000
+ CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000
+ #CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_100MHz=100000000
+
+endif
+
+##---------------------------------------------------------------------------
+## stm32f103cb_als_mainboard_rev2
+##
+
+# No options
+
+##---------------------------------------------------------------------------
+## stm32f100cb_tempsensor
+##
+
+# No options
+
+##---------------------------------------------------------------------------
+## stm32f429zi_oledboard2
+##
+ifeq ($(OPT_BOARD),stm32f429zi_oledboard2)
+
+ ## Linker script type, there are three options
+ ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+ ## the most common choice, available for all microcontrollers
+ ## 2) Code in FLASH, stack + heap in external RAM (file *8m_xram.ld)
+ ## You must uncomment -D__ENABLE_XRAM below in this case.
+ ## 3) Code in FLASH, stack + heap in external RAM (file *6m_xram.ld)
+ ## Same as above, but leaves the upper 2MB of RAM for the LCD.
+ LINKER_SCRIPT_PATH := arch/cortexM4_stm32f4/stm32f429zi_oledboard2/
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+256k_rom.ld
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+8m_xram.ld
+ LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+6m_xram.ld
+
+ ## Uncommenting __ENABLE_XRAM enables the initialization of the external
+ ## 8MB SDRAM memory. Do not uncomment this even if you don't use a linker
+ ## script that requires it, as it is used for the LCD framebuffer.
+ XRAM := -D__ENABLE_XRAM
+
+ ## Select clock frequency. Warning: the default clock frequency for
+ ## this board is 168MHz and not 180MHz because, due to a limitation in
+ ## the PLL, it is not possible to generate a precise 48MHz output when
+ ## running the core at 180MHz. If 180MHz is chosen the USB peripheral will
+ ## NOT WORK and the SDIO and RNG will run ~6% slower (45MHz insteand of 48)
+ CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000
+ #CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_180MHz=180000000
+
+endif
+
+##---------------------------------------------------------------------------
+## efm32gg332f1024_wandstem
+##
+
+# No options
+
+##---------------------------------------------------------------------------
+## stm32f411re_nucleo
+##
+ifeq ($(OPT_BOARD),stm32f411re_nucleo)
+
+ # Select clock frequency
+ CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_100MHz=100000000
+ #CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_84MHz=84000000
+
+endif
+
+##---------------------------------------------------------------------------
+## stm32f429zi_skyward_anakin
+##
+ifeq ($(OPT_BOARD),stm32f429zi_skyward_anakin)
+
+ ## Linker script type, there are three options
+ ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
+ ## the most common choice, available for all microcontrollers
+ ## 2) Code in FLASH, stack + heap in external RAM (file *16m_xram.ld)
+ ## You must uncomment -D__ENABLE_XRAM below in this case.
+ LINKER_SCRIPT_PATH := arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery/
+ #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+256k_rom.ld
+ LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_2m+8m_xram.ld
+
+ ## Uncommenting __ENABLE_XRAM enables the initialization of the external
+ ## 8MB SDRAM memory. Do not uncomment this even if you don't use a linker
+ ## script that requires it, as it is used for the LCD framebuffer.
+ XRAM := -D__ENABLE_XRAM
+
+ ## Select clock frequency.
+ ## Warning: due to a limitation in the PLL, it is not possible to generate
+ ## a precise 48MHz output when running the core at 180MHz. If 180MHz is
+ ## chosen the SDIO and RNG will run ~6% slower (45MHz insteand of 48)
+ CLOCK_FREQ := -DHSE_VALUE=25000000 -DSYSCLK_FREQ_180MHz=180000000
+ #CLOCK_FREQ := -DHSE_VALUE=25000000 -DSYSCLK_FREQ_168MHz=168000000
+
+endif
+
+############################################################################
+## From the options selected above, now fill all the variables needed to ##
+## build Miosix. You should modify something here only if you are adding ##
+## a new board or porting Miosix to a new architecture ##
+############################################################################
+
+ifneq ($(MAKEFILE_VERSION),1.08)
+ $(info You are using an incompatible makefile. Make sure it matches \
+ the one distributed with the current version of the kernel)
+ $(error Error)
+endif
+
+##
+## First, auto guess architecture name from board name
+##
+ifeq ($(OPT_BOARD),lpc2138_miosix_board)
+ ARCH := arm7_lpc2000
+else ifeq ($(OPT_BOARD),stm32f103ze_stm3210e-eval)
+ ARCH := cortexM3_stm32
+else ifeq ($(OPT_BOARD),stm32f103ve_mp3v2)
+ ARCH := cortexM3_stm32
+else ifeq ($(OPT_BOARD),stm32f100rb_stm32vldiscovery)
+ ARCH := cortexM3_stm32
+else ifeq ($(OPT_BOARD),stm32f103ve_strive_mini)
+ ARCH := cortexM3_stm32
+else ifeq ($(OPT_BOARD),stm32f103ze_redbull_v2)
+ ARCH := cortexM3_stm32
+else ifeq ($(OPT_BOARD),stm32f407vg_stm32f4discovery)
+ ARCH := cortexM4_stm32f4
+else ifeq ($(OPT_BOARD),stm32f207ig_stm3220g-eval)
+ ARCH := cortexM3_stm32f2
+else ifeq ($(OPT_BOARD),stm32f207zg_ethboard_v2)
+ ARCH := cortexM3_stm32f2
+else ifeq ($(OPT_BOARD),stm32f207ze_als_camboard)
+ ARCH := cortexM3_stm32f2
+else ifeq ($(OPT_BOARD),stm32f205rg_sony-newman)
+ ARCH := cortexM3_stm32f2
+else ifeq ($(OPT_BOARD),stm32l151_als_mainboard)
+ ARCH := cortexM3_stm32l1
+else ifeq ($(OPT_BOARD),stm32f407vg_bitsboard)
+ ARCH := cortexM4_stm32f4
+else ifeq ($(OPT_BOARD),stm32f429zi_stm32f4discovery)
+ ARCH := cortexM4_stm32f4
+else ifeq ($(OPT_BOARD),stm32f103cb_als_mainboard_rev2)
+ ARCH := cortexM3_stm32
+else ifeq ($(OPT_BOARD),stm32f100cb_tempsensor)
+ ARCH := cortexM3_stm32
+else ifeq ($(OPT_BOARD),stm32f429zi_oledboard2)
+ ARCH := cortexM4_stm32f4
+else ifeq ($(OPT_BOARD),efm32gg332f1024_wandstem)
+ ARCH := cortexM3_efm32gg
+else ifeq ($(OPT_BOARD),stm32f411re_nucleo)
+ ARCH := cortexM4_stm32f4
+else ifeq ($(OPT_BOARD),stm32f429zi_skyward_anakin)
+ ARCH := cortexM4_stm32f4
+else
+ $(info Error: no board specified in miosix/config/Makefile.inc)
+ $(error Error)
+endif
+
+
+##
+## Then, initialize C/C++ flags
+##
+CFLAGS_BASE := -D_MIOSIX_BOARDNAME=\"$(OPT_BOARD)\" \
+ -Wno-unused-but-set-variable
+CXXFLAGS_BASE := -std=gnu++11 -D_MIOSIX_BOARDNAME=\"$(OPT_BOARD)\" \
+ -Wno-unused-but-set-variable
+
+##
+## Now two big switch-like constructs nested. The first lists all possible
+## architectures, setting common things for all boards in the architecture.
+## Then for each architecture there is a switch for evry board, where all
+## board specific options are set.
+##
+
+##-----------------------------------------------------------------------------
+## ARCHITECTURE: arm7_lpc2000
+##
+ifeq ($(ARCH),arm7_lpc2000)
+ ## Base directory with header files for this board
+ ARCH_INC := arch/arm7_lpc2000/common
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: lpc2138_miosix_board
+ ##
+ ifeq ($(OPT_BOARD),lpc2138_miosix_board)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/arm7_lpc2000/lpc2138_miosix_board
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := arch/arm7_lpc2000/lpc2138_miosix_board/miosix.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/portability.cpp \
+ arch/common/drivers/sd_lpc2000.cpp \
+ $(BOARD_INC)/interfaces-impl/delays.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_MIOSIX_BOARD
+ CXXFLAGS_BASE += -D_BOARD_MIOSIX_BOARD
+
+ ##-------------------------------------------------------------------------
+ ## End of board list
+ ##
+ endif
+
+ ## Select compiler
+ PREFIX=arm-miosix-eabi-
+
+ ## From compiler prefix form the name of the compiler and other tools
+ CC := $(PREFIX)gcc
+ CXX := $(PREFIX)g++
+ LD := $(PREFIX)ld
+ AR := $(PREFIX)ar
+ AS := $(PREFIX)as
+ CP := $(PREFIX)objcopy
+ OD := $(PREFIX)objdump
+ SZ := $(PREFIX)size
+
+ ## Select appropriate compiler flags for both ASM/C/C++/linker
+ AFLAGS_BASE := -mcpu=arm7tdmi -mapcs-32 -mfloat-abi=soft
+ CFLAGS_BASE += -D_ARCH_ARM7_LPC2000 -mcpu=arm7tdmi $(OPT_OPTIMIZATION) \
+ -ffunction-sections -Wall -g -c
+ CXXFLAGS_BASE += -D_ARCH_ARM7_LPC2000 -mcpu=arm7tdmi $(OPT_OPTIMIZATION) \
+ -ffunction-sections $(OPT_EXCEPT) -Wall -g -c
+ LFLAGS_BASE := -mcpu=arm7tdmi -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ -Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
+ $(OPT_OPTIMIZATION) -nostdlib
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/common
+ ARCH_SRC += \
+ arch/common/core/interrupts_arm7.cpp \
+ arch/common/drivers/serial_lpc2000.cpp
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types 'make program'
+ ## The command must provide a way to program the board, or print an error
+ ## message saying that 'make program' is not supported for that board.
+ PROGRAM_CMDLINE := lpc21isp -verify main.hex /dev/ttyUSB0 115200 14746
+
+##-----------------------------------------------------------------------------
+## ARCHITECTURE: cortexM3_stm32
+##
+else ifeq ($(ARCH),cortexM3_stm32)
+ ## Base directory with header files for this board
+ ARCH_INC := arch/cortexM3_stm32/common
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f103ze_stm3210e-eval
+ ##
+ ifeq ($(OPT_BOARD),stm32f103ze_stm3210e-eval)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f103ze_stm3210e-eval
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ #LINKER_SCRIPT := already selected in board options
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/sd_stm32f1.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM3210E_EVAL -DSTM32F10X_HD
+ CXXFLAGS_BASE += -D_BOARD_STM3210E_EVAL -DSTM32F10X_HD
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ ifeq ($(LINKER_SCRIPT),$(LINKER_SCRIPT_PATH)stm32_512k+64k_all_in_xram.ld)
+ PROGRAM_CMDLINE := $(KPATH)/_tools/bootloaders/stm32/pc_loader/pc_loader \
+ /dev/ttyUSB0 main.bin
+ else
+ PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB0
+ endif
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f103ve_mp3v2
+ ##
+ else ifeq ($(OPT_BOARD),stm32f103ve_mp3v2)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f103ve_mp3v2
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ #LINKER_SCRIPT := already selected in board options
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/sd_stm32f1.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_MP3V2 -DSTM32F10X_HD
+ CXXFLAGS_BASE += -D_BOARD_MP3V2 -DSTM32F10X_HD
+
+ ## Clock frequency
+ CLOCK_FREQ := -DSYSCLK_FREQ_72MHz=72000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ ifeq ($(LINKER_SCRIPT),$(LINKER_SCRIPT_PATH)stm32_512k+64k_ram.ld)
+ PROGRAM_CMDLINE := mp3v2_bootloader --ram main.bin
+ else
+ PROGRAM_CMDLINE := mp3v2_bootloader --code main.bin
+ endif
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f100rb_stm32vldiscovery
+ ##
+ else ifeq ($(OPT_BOARD),stm32f100rb_stm32vldiscovery)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f100rb_stm32vldiscovery
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_128k+8k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp \
+ arch/common/drivers/servo_stm32.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM32VLDISCOVERY -DSTM32F10X_MD_VL
+ CXXFLAGS_BASE += -D_BOARD_STM32VLDISCOVERY -DSTM32F10X_MD_VL
+
+ ## Clock frequency
+ CLOCK_FREQ := -DSYSCLK_FREQ_24MHz=24000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ #PROGRAM_CMDLINE := sudo vsprog -cstm32_vl -ms -I main.hex -oe -owf -ovf
+ PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f103ve_strive_mini
+ ##
+ else ifeq ($(OPT_BOARD),stm32f103ve_strive_mini)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f103ve_strive_mini
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_512k+64k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/sd_stm32f1.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STRIVE_MINI -DSTM32F10X_HD
+ CXXFLAGS_BASE += -D_BOARD_STRIVE_MINI -DSTM32F10X_HD
+
+ ## Clock frequency
+ CLOCK_FREQ := -DSYSCLK_FREQ_72MHz=72000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := "c:/Program Files/STMicroelectronics/STM32 ST-LINK Utility/ST-LINK Utility/ST-LINK_CLI.exe" \
+ -c JTAG -Rst -P main.hex 0x08000000 -Run
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: HY RedBull V2 (or V1)
+ ##
+ else ifeq ($(OPT_BOARD),stm32f103ze_redbull_v2)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f103ze_redbull_v2
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_512k+64k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/sd_stm32f1.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_REDBULL_V2 -DSTM32F10X_HD
+ CXXFLAGS_BASE += -D_BOARD_REDBULL_V2 -DSTM32F10X_HD
+
+ ## Clock frequency
+ CLOCK_FREQ := -DSYSCLK_FREQ_72MHz=72000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := "C:/Program Files/SEGGER/JLinkARM_V434d/JFlashARM.exe" \
+ -openprjSTM32F10xxE.jflash -openmain.hex -auto -exit
+ #PROGRAM_CMDLINE := "c:/Program Files/STMicroelectronics/STM32 ST-LINK Utility/ST-LINK Utility/ST-LINK_CLI.exe" \
+ #-c JTAG -Rst -P main.hex 0x08000000 -Run
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f103cb_als_mainboard_rev2
+ ##
+ else ifeq ($(OPT_BOARD),stm32f103cb_als_mainboard_rev2)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f103cb_als_mainboard_rev2
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_128k+20k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_ALS_MAINBOARD_REV2 -DSTM32F10X_MD
+ CXXFLAGS_BASE += -D_BOARD_ALS_MAINBOARD_REV2 -DSTM32F10X_MD
+
+ ## Clock frequency
+ # Not defining anything results in HSI being used
+ CLOCK_FREQ :=
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := stm32flash -w main.bin -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f100cb_tempsensor
+ ##
+ else ifeq ($(OPT_BOARD),stm32f100cb_tempsensor)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32/stm32f100cb_tempsensor
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_127k+8k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_TEMPSENSOR -DSTM32F10X_MD_VL
+ CXXFLAGS_BASE += -D_BOARD_TEMPSENSOR -DSTM32F10X_MD_VL
+
+ ## Clock frequency
+ # Not defining anything results in HSI being used
+ CLOCK_FREQ := -DSYSCLK_FREQ_24MHz=24000000 -DRUN_WITH_HSI
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## End of board list
+ ##
+ endif
+
+ ## Select compiler
+ PREFIX := arm-miosix-eabi-
+
+ ## From compiler prefix form the name of the compiler and other tools
+ CC := $(PREFIX)gcc
+ CXX := $(PREFIX)g++
+ LD := $(PREFIX)ld
+ AR := $(PREFIX)ar
+ AS := $(PREFIX)as
+ CP := $(PREFIX)objcopy
+ OD := $(PREFIX)objdump
+ SZ := $(PREFIX)size
+
+ ## Select appropriate compiler flags for both ASM/C/C++/linker
+ AFLAGS_BASE := -mcpu=cortex-m3 -mthumb
+ CFLAGS_BASE += -D_ARCH_CORTEXM3_STM32 $(CLOCK_FREQ) $(XRAM) \
+ -mcpu=cortex-m3 -mthumb $(OPT_OPTIMIZATION) \
+ -ffunction-sections -Wall -g -c
+ CXXFLAGS_BASE += -D_ARCH_CORTEXM3_STM32 $(CLOCK_FREQ) $(XRAM) \
+ $(OPT_EXCEPT) -mcpu=cortex-m3 -mthumb \
+ $(OPT_OPTIMIZATION) -ffunction-sections -Wall -g -c
+ LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ -Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
+ $(OPT_OPTIMIZATION) -nostdlib
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/common
+ ARCH_SRC += \
+ arch/common/core/interrupts_cortexMx.cpp \
+ arch/common/drivers/serial_stm32.cpp \
+ arch/common/drivers/dcc.cpp \
+ $(ARCH_INC)/interfaces-impl/portability.cpp \
+ $(ARCH_INC)/interfaces-impl/delays.cpp \
+ $(ARCH_INC)/interfaces-impl/gpio_impl.cpp \
+ arch/common/CMSIS/Device/ST/STM32F10x/Source/Templates/system_stm32f10x.c
+
+##-----------------------------------------------------------------------------
+## ARCHITECTURE: cortexM4_stm32f4
+##
+else ifeq ($(ARCH),cortexM4_stm32f4)
+ ## Base directory with else header files for this board
+ ARCH_INC := arch/cortexM4_stm32f4/common
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f407vg_stm32f4discovery
+ ##
+ ifeq ($(OPT_BOARD),stm32f407vg_stm32f4discovery)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ #LINKER_SCRIPT := already selected in board options
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/stm32f2_f4_i2c.cpp \
+ arch/common/drivers/stm32_hardware_rng.cpp \
+ arch/common/drivers/servo_stm32.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM32F4DISCOVERY
+ CXXFLAGS_BASE += -D_BOARD_STM32F4DISCOVERY
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := qstlink2 -cqewV ./main.bin
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f4bitsboard
+ ##
+ else ifeq ($(OPT_BOARD),stm32f407vg_bitsboard)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM4_stm32f4/stm32f407vg_bitsboard
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_1m+192k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/stm32_hardware_rng.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_BITSBOARD
+ CXXFLAGS_BASE += -D_BOARD_BITSBOARD
+
+ ## Select clock frequency (HSE_VALUE is the xtal on board, fixed)
+ CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_168MHz=168000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := stm32flash -w ./main.bin -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f429zi_stm32f4discovery
+ ##
+ else ifeq ($(OPT_BOARD),stm32f429zi_stm32f4discovery)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM4_stm32f4/stm32f429zi_stm32f4discovery
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ #LINKER_SCRIPT := already selected in board options
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/stm32f2_f4_i2c.cpp \
+ arch/common/drivers/stm32_hardware_rng.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM32F429ZI_STM32F4DISCOVERY
+ CXXFLAGS_BASE += -D_BOARD_STM32F429ZI_STM32F4DISCOVERY
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := qstlink2 -cqewV ./main.bin
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f429zi_oledboard2
+ ##
+ else ifeq ($(OPT_BOARD),stm32f429zi_oledboard2)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM4_stm32f4/stm32f429zi_oledboard2
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ #LINKER_SCRIPT := already selected in board options
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/stm32_hardware_rng.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM32F429ZI_OLEDBOARD2
+ CXXFLAGS_BASE += -D_BOARD_STM32F429ZI_OLEDBOARD2
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := stm32flash -w main.bin -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f411re_nucleo
+ ##
+ else ifeq ($(OPT_BOARD),stm32f411re_nucleo)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM4_stm32f4/stm32f411re_nucleo
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_512k+128k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM32F411RE_NUCLEO
+ CXXFLAGS_BASE += -D_BOARD_STM32F411RE_NUCLEO
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := qstlink2 -cqewV ./main.bin
+
+ ##-------------------------------------------------------------------------
+ ## stm32f429zi_skyward_anakin
+ ##
+ else ifeq ($(OPT_BOARD),stm32f429zi_skyward_anakin)
+
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM4_stm32f4/stm32f429zi_skyward_anakin
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ #LINKER_SCRIPT := already selected in board options
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/stm32f2_f4_i2c.cpp \
+ arch/common/drivers/stm32_hardware_rng.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM32F429ZI_SKYWARD_ANAKIN
+ CXXFLAGS_BASE += -D_BOARD_STM32F429ZI_SKYWARD_ANAKIN
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := stm32flash -w main.bin -v /dev/ttyUSB0
+
+ ##-------------------------------------------------------------------------
+ ## End of board list
+ ##
+ endif
+
+ ## Select compiler
+ PREFIX := arm-miosix-eabi-
+
+ ## From compiler prefix form the name of the compiler and other tools
+ CC := $(PREFIX)gcc
+ CXX := $(PREFIX)g++
+ LD := $(PREFIX)ld
+ AR := $(PREFIX)ar
+ AS := $(PREFIX)as
+ CP := $(PREFIX)objcopy
+ OD := $(PREFIX)objdump
+ SZ := $(PREFIX)size
+
+ ## Select appropriate compiler flags for both ASM/C/C++/linker
+ AFLAGS_BASE := -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16
+ CFLAGS_BASE += -D_ARCH_CORTEXM4_STM32F4 $(CLOCK_FREQ) $(XRAM) $(SRAM_BOOT)\
+ -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 \
+ $(OPT_OPTIMIZATION) -ffunction-sections -Wall -g -c
+ CXXFLAGS_BASE += -D_ARCH_CORTEXM4_STM32F4 $(CLOCK_FREQ) $(XRAM) $(SRAM_BOOT)\
+ -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 \
+ $(OPT_EXCEPT) $(OPT_OPTIMIZATION) -ffunction-sections \
+ -Wall -g -c
+ LFLAGS_BASE := -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 \
+ -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ -Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
+ $(OPT_OPTIMIZATION) -nostdlib
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/common
+ ARCH_SRC += \
+ arch/common/core/interrupts_cortexMx.cpp \
+ arch/common/drivers/serial_stm32.cpp \
+ arch/common/drivers/dcc.cpp \
+ $(ARCH_INC)/interfaces-impl/portability.cpp \
+ $(ARCH_INC)/interfaces-impl/delays.cpp \
+ $(ARCH_INC)/interfaces-impl/gpio_impl.cpp \
+ arch/common/drivers/sd_stm32f2_f4.cpp \
+ arch/common/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+
+##-----------------------------------------------------------------------------
+## ARCHITECTURE: cortexM3_stm32f2
+##
+else ifeq ($(ARCH),cortexM3_stm32f2)
+ ## Base directory with else header files for this board
+ ARCH_INC := arch/cortexM3_stm32f2/common
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f207ig_stm3220g-eval
+ ##
+ ifeq ($(OPT_BOARD),stm32f207ig_stm3220g-eval)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32f2/stm32f207ig_stm3220g-eval
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ #LINKER_SCRIPT := already selected in board options
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/sd_stm32f2_f4.cpp \
+ $(BOARD_INC)/interfaces-impl/delays.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_STM3220G_EVAL
+ CXXFLAGS_BASE += -D_BOARD_STM3220G_EVAL
+
+ ## Clock frequency
+ CLOCK_FREQ := -DHSE_VALUE=25000000 -DSYSCLK_FREQ_120MHz=120000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ ifeq ($(LINKER_SCRIPT),$(LINKER_SCRIPT_PATH)stm32_1m+128k_all_in_xram.ld)
+ PROGRAM_CMDLINE := $(KPATH)/_tools/bootloaders/stm32/pc_loader/pc_loader \
+ /dev/ttyUSB0 main.bin
+ else
+ PROGRAM_CMDLINE := qstlink2 -cqewV ./main.bin
+ endif
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f207zg_ethboard_v2
+ ##
+ else ifeq ($(OPT_BOARD),stm32f207zg_ethboard_v2)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32f2/stm32f207zg_EthBoardV2
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ #LINKER_SCRIPT := already selected in board options
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/sd_stm32f2_f4.cpp \
+ $(BOARD_INC)/interfaces-impl/delays.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_ETHBOARDV2
+ CXXFLAGS_BASE += -D_BOARD_ETHBOARDV2
+
+ ## Clock frequency
+ CLOCK_FREQ := -DHSE_VALUE=25000000 -DSYSCLK_FREQ_120MHz=120000000
+
+ ## XRAM is always enabled in this board
+ XRAM += -D__ENABLE_XRAM
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ ifeq ($(LINKER_SCRIPT),$(LINKER_SCRIPT_PATH)stm32_1m+128k_code_in_xram.ld)
+ PROGRAM_CMDLINE := $(KPATH)/_tools/bootloaders/stm32/pc_loader/pc_loader \
+ /dev/ttyUSB1 main.bin
+ else
+ PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB1
+ endif
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f207ze_als_camboard
+ ##
+ else ifeq ($(OPT_BOARD),stm32f207ze_als_camboard)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32f2/stm32f207ze_als_camboard
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_1m+128k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/delays.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_ALS_CAMBOARD
+ CXXFLAGS_BASE += -D_BOARD_ALS_CAMBOARD
+
+ ## Clock frequency
+ CLOCK_FREQ := -DHSE_VALUE=8000000 -DSYSCLK_FREQ_120MHz=120000000
+
+ ## XRAM is always enabled in this board
+ XRAM += -D__ENABLE_XRAM
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := stm32flash -w main.hex -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32f205rg_sony-newman
+ ##
+ else ifeq ($(OPT_BOARD),stm32f205rg_sony-newman)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32f2/stm32f205rg_sony-newman
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_1M+128k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ arch/common/drivers/stm32f2_f4_i2c.cpp \
+ $(BOARD_INC)/interfaces-impl/delays.cpp \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_SONY_NEWMAN
+ CXXFLAGS_BASE += -D_BOARD_SONY_NEWMAN
+
+ ## Clock frequency
+ CLOCK_FREQ := -DHSE_VALUE=26000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ ## The magic.bin is somewhat used by the bootloader to detect a good fw
+ PROGRAM_CMDLINE := perl -e 'print "\xe7\x91\x11\xc0"' > magic.bin; \
+ dfu-util -d 0fce:f0fa -a 0 -i 0 -s 0x08040000 -D main.bin; \
+ dfu-util -d 0fce:f0fa -a 0 -i 0 -s 0x080ffffc -D magic.bin; \
+ rm magic.bin
+
+ ##-------------------------------------------------------------------------
+ ## End of board list
+ ##
+ endif
+
+ ## Select compiler
+ PREFIX=arm-miosix-eabi-
+
+ ## From compiler prefix form the name of the compiler and other tools
+ CC := $(PREFIX)gcc
+ CXX := $(PREFIX)g++
+ LD := $(PREFIX)ld
+ AR := $(PREFIX)ar
+ AS := $(PREFIX)as
+ CP := $(PREFIX)objcopy
+ OD := $(PREFIX)objdump
+ SZ := $(PREFIX)size
+
+ ## Select appropriate compiler flags for both ASM/C/C++/linker
+ AFLAGS_BASE := -mcpu=cortex-m3 -mthumb
+ CFLAGS_BASE += -D_ARCH_CORTEXM3_STM32F2 $(CLOCK_FREQ) $(XRAM) \
+ -mcpu=cortex-m3 -mthumb $(OPT_OPTIMIZATION) \
+ -ffunction-sections -Wall -g -c
+ CXXFLAGS_BASE += -D_ARCH_CORTEXM3_STM32F2 $(CLOCK_FREQ) $(XRAM) \
+ $(OPT_EXCEPT) -mcpu=cortex-m3 -mthumb \
+ $(OPT_OPTIMIZATION) -ffunction-sections -Wall -g -c
+ LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ -Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
+ $(OPT_OPTIMIZATION) -nostdlib
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/common
+ ARCH_SRC += \
+ arch/common/core/interrupts_cortexMx.cpp \
+ arch/common/drivers/serial_stm32.cpp \
+ arch/common/drivers/dcc.cpp \
+ arch/common/drivers/stm32_hardware_rng.cpp \
+ $(ARCH_INC)/interfaces-impl/portability.cpp \
+ $(ARCH_INC)/interfaces-impl/gpio_impl.cpp \
+ arch/common/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
+
+##-----------------------------------------------------------------------------
+## ARCHITECTURE: cortexM3_stm32l1
+##
+else ifeq ($(ARCH),cortexM3_stm32l1)
+ ## Base directory with else header files for this board
+ ARCH_INC := arch/cortexM3_stm32l1/common
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: stm32l151c8_als_mainboard
+ ##
+ ifeq ($(OPT_BOARD),stm32l151_als_mainboard)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_stm32l1/stm32l151c8_als_mainboard
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/stm32_64k+10k_rom.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -D_BOARD_ALS_MAINBOARD
+ CXXFLAGS_BASE += -D_BOARD_ALS_MAINBOARD
+
+ ## Clock frequency
+ CLOCK_FREQ := -DSYSCLK_FREQ_16MHz=16000000
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := stm32flash -w main.bin -v /dev/ttyUSB1
+
+ ##-------------------------------------------------------------------------
+ ## End of board list
+ ##
+ endif
+
+ ## Select compiler
+ PREFIX=arm-miosix-eabi-
+
+ ## From compiler prefix form the name of the compiler and other tools
+ CC := $(PREFIX)gcc
+ CXX := $(PREFIX)g++
+ LD := $(PREFIX)ld
+ AR := $(PREFIX)ar
+ AS := $(PREFIX)as
+ CP := $(PREFIX)objcopy
+ OD := $(PREFIX)objdump
+ SZ := $(PREFIX)size
+
+ ## Select appropriate compiler flags for both ASM/C/C++/linker
+ AFLAGS_BASE := -mcpu=cortex-m3 -mthumb
+ CFLAGS_BASE += -D_ARCH_CORTEXM3_STM32L1 $(CLOCK_FREQ) $(XRAM) \
+ -mcpu=cortex-m3 -mthumb $(OPT_OPTIMIZATION) \
+ -ffunction-sections -Wall -g -c
+ CXXFLAGS_BASE += -D_ARCH_CORTEXM3_STM32L1 $(CLOCK_FREQ) $(XRAM) \
+ $(OPT_EXCEPT) -mcpu=cortex-m3 -mthumb \
+ $(OPT_OPTIMIZATION) -ffunction-sections -Wall -g -c
+ LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ -Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
+ $(OPT_OPTIMIZATION) -nostdlib
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/common
+ ARCH_SRC += \
+ arch/common/core/interrupts_cortexMx.cpp \
+ arch/common/drivers/serial_stm32.cpp \
+ $(ARCH_INC)/interfaces-impl/portability.cpp \
+ $(ARCH_INC)/interfaces-impl/gpio_impl.cpp \
+ $(ARCH_INC)/interfaces-impl/delays.cpp \
+ arch/common/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c
+
+##-----------------------------------------------------------------------------
+## ARCHITECTURE: cortexM3_efm32gg
+##
+else ifeq ($(ARCH),cortexM3_efm32gg)
+ ## Base directory with else header files for this board
+ ARCH_INC := arch/cortexM3_efm32gg/common
+
+ ##-------------------------------------------------------------------------
+ ## BOARD: efm32gg332f1024_wandstem
+ ##
+ ifeq ($(OPT_BOARD),efm32gg332f1024_wandstem)
+ ## Base directory with header files for this board
+ BOARD_INC := arch/cortexM3_efm32gg/efm32gg332f1024_wandstem
+
+ ## Select linker script and boot file
+ ## Their path must be relative to the miosix directory.
+ BOOT_FILE := $(BOARD_INC)/core/stage_1_boot.o
+ LINKER_SCRIPT := $(BOARD_INC)/efm32_1M+128k_rom_usbbootloader.ld
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/<board name>
+ ARCH_SRC := \
+ $(BOARD_INC)/interfaces-impl/bsp.cpp
+
+ ## Add a #define to allow querying board name
+ CFLAGS_BASE += -DEFM32GG332F1024 -D_BOARD_WANDSTEM
+ CXXFLAGS_BASE += $(CFLAGS_BASE)
+
+ ## Clock frequency
+ CLOCK_FREQ := -DEFM32_HFXO_FREQ=48000000 -DEFM32_LFXO_FREQ=32768
+
+ ## Select programmer command line
+ ## This is the program that is invoked when the user types
+ ## 'make program'
+ ## The command must provide a way to program the board, or print an
+ ## error message saying that 'make program' is not supported for that
+ ## board.
+ PROGRAM_CMDLINE := echo 'make program not supported.'
+
+ ##-------------------------------------------------------------------------
+ ## End of board list
+ ##
+ endif
+
+ ## Select compiler
+ PREFIX=arm-miosix-eabi-
+
+ ## From compiler prefix form the name of the compiler and other tools
+ CC := $(PREFIX)gcc
+ CXX := $(PREFIX)g++
+ LD := $(PREFIX)ld
+ AR := $(PREFIX)ar
+ AS := $(PREFIX)as
+ CP := $(PREFIX)objcopy
+ OD := $(PREFIX)objdump
+ SZ := $(PREFIX)size
+
+ ## Select appropriate compiler flags for both ASM/C/C++/linker
+ AFLAGS_BASE := -mcpu=cortex-m3 -mthumb
+ CFLAGS_BASE += -D_ARCH_CORTEXM3_EFM32GG $(CLOCK_FREQ) \
+ -mcpu=cortex-m3 -mthumb $(OPT_OPTIMIZATION) \
+ -ffunction-sections -Wall -g -c
+ CXXFLAGS_BASE += -D_ARCH_CORTEXM3_EFM32GG $(CLOCK_FREQ) \
+ $(OPT_EXCEPT) -mcpu=cortex-m3 -mthumb \
+ $(OPT_OPTIMIZATION) -ffunction-sections -Wall -g -c
+ LFLAGS_BASE := -mcpu=cortex-m3 -mthumb -Wl,--gc-sections,-Map,$(MAIN_MAP_FILE) \
+ -Wl,-T$(KPATH)/$(LINKER_SCRIPT) $(OPT_EXCEPT) \
+ $(OPT_OPTIMIZATION) -nostdlib
+
+ ## Select architecture specific files
+ ## These are the files in arch/<arch name>/common
+ ARCH_SRC += \
+ arch/common/core/interrupts_cortexMx.cpp \
+ arch/common/drivers/serial_efm32.cpp \
+ $(ARCH_INC)/interfaces-impl/portability.cpp \
+ $(ARCH_INC)/interfaces-impl/gpio_impl.cpp \
+ $(ARCH_INC)/interfaces-impl/delays.cpp \
+ arch/common/CMSIS/Device/SiliconLabs/EFM32GG/Source/system_efm32gg.c
+
+##-----------------------------------------------------------------------------
+## end of architecture list
+##
+endif
--
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