From d17ed079a074cb30243489414d7448e9d1ebde80 Mon Sep 17 00:00:00 2001
From: Federico Terraneo <fede.tft@miosix.org>
Date: Sat, 13 May 2017 16:03:22 +0200
Subject: [PATCH] Enabled fifo by setting DMDIS and configured MBURST to read 4
bytes at once to optimize bus requests
---
src/shared/DMA/DMA.cpp | 28 ++++++++++++++++------------
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/src/shared/DMA/DMA.cpp b/src/shared/DMA/DMA.cpp
index c87dfdd08..14a8df202 100644
--- a/src/shared/DMA/DMA.cpp
+++ b/src/shared/DMA/DMA.cpp
@@ -188,16 +188,18 @@ void SPIRequest::IRQbeginTransaction()
DMA2_Stream0->NDTR = fromPeripheral.size();
DMA2_Stream0->FCR = DMA_SxFCR_FEIE //Enable interrupt on FIFO error
+ | DMA_SxFCR_DMDIS //Enable FIFO
| DMA_SxFCR_FTH_0 //FTH = 11 -> Full FIFO
| DMA_SxFCR_FTH_1;
DMA2_Stream0->CR = DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0 // Channel 3
- | DMA_SxCR_PL_1 //High priority because fifo disabled
- | DMA_SxCR_MINC //Increment memory pointer
- | DMA_SxCR_TCIE //Interrupt on transfer complete
- | DMA_SxCR_TEIE //Interrupt on transfer error
- | DMA_SxCR_DMEIE //Interrupt on direct mode error
- | DMA_SxCR_EN; //Start DMA
+ | DMA_SxCR_MBURST_0 //Read 4 byte at a time from RAM
+ | DMA_SxCR_PL_1 //High priority because fifo disabled
+ | DMA_SxCR_MINC //Increment memory pointer
+ | DMA_SxCR_TCIE //Interrupt on transfer complete
+ | DMA_SxCR_TEIE //Interrupt on transfer error
+ | DMA_SxCR_DMEIE //Interrupt on direct mode error
+ | DMA_SxCR_EN; //Start DMA
// Tx
@@ -207,16 +209,18 @@ void SPIRequest::IRQbeginTransaction()
DMA2_Stream5->NDTR = toPeripheral.size();
DMA2_Stream5->FCR = DMA_SxFCR_FEIE //Enable interrupt on FIFO error
+ | DMA_SxFCR_DMDIS //Enable FIFO
| DMA_SxFCR_FTH_0 //FTH = 11 -> Full FIFO
| DMA_SxFCR_FTH_1;
DMA2_Stream5->CR = DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0 // Channel 3
- | DMA_SxCR_PL_1 //High priority because fifo disabled
- | DMA_SxCR_MINC //Increment memory pointer
- | DMA_SxCR_DIR_0 //Memory to peripheral
- | DMA_SxCR_TEIE //Interrupt on transfer error
- | DMA_SxCR_DMEIE //Interrupt on direct mode error
- | DMA_SxCR_EN; //Start DMA
+ | DMA_SxCR_MBURST_0 //Read 4 byte at a time from RAM
+ | DMA_SxCR_PL_1 //High priority because fifo disabled
+ | DMA_SxCR_MINC //Increment memory pointer
+ | DMA_SxCR_DIR_0 //Memory to peripheral
+ | DMA_SxCR_TEIE //Interrupt on transfer error
+ | DMA_SxCR_DMEIE //Interrupt on direct mode error
+ | DMA_SxCR_EN; //Start DMA
}
void SPIRequest::IRQendTransaction()
--
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