diff --git a/src/shared/DMA/DMA.cpp b/src/shared/DMA/DMA.cpp
index 43581c8261cf1dcf42ec7b7575d38d21b7e3632a..bd2ae0e51d541a18f1ef5a994a1df51a34d3c8af 100644
--- a/src/shared/DMA/DMA.cpp
+++ b/src/shared/DMA/DMA.cpp
@@ -57,6 +57,9 @@ void __attribute__((used)) SPI1rxDmaHandlerImpl()
         error = true;
         fifoFaultCtr++;
     }
+
+    // FEIF5 is not checked because is ALWAYS 1 both if FIFO is enabled
+    // or disabled. Tests show that all data are transferred correctly!
     if(DMA2->HISR & (DMA_HISR_TEIF5 | DMA_HISR_DMEIF5)) 
     {
         error = true;