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  • avn/swd/miosix-kernel
  • emilio.corigliano/miosix-kernel
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miosix/arch/cortexM3_stm32f1/stm32f103c8_skyward_alderaan/core/stage_1_boot.cpp 0 → 100644
View file @ 9268dbc2
#include "interfaces/arch_registers.h"
#include "core/interrupts.h" //For the unexpected interrupt call
#include <string.h>
/*
* startup.cpp
* STM32 C++ startup.
* NOTE: for stm32 medium density value line devices ONLY (64 and 128KB devices).
* Supports interrupt handlers in C++ without extern "C"
* Developed by Terraneo Federico, based on ST startup code.
* Additionally modified to boot Miosix.
*/
//Will be called at the end of stage 1 of boot, function is implemented in
//stage_2_boot.cpp
extern "C" void _init();
/**
* Called by Reset_Handler, performs initialization and calls main.
* Never returns.
*/
void program_startup() __attribute__((noreturn));
void program_startup()
{
//Cortex M3 core appears to get out of reset with interrupts already enabled
__disable_irq();
//SystemInit() is called *before* initializing .data and zeroing .bss
//Despite all startup files provided by ST do the opposite, there are three
//good reasons to do so:
//First, the CMSIS specifications say that SystemInit() must not access
//global variables, so it is actually possible to call it before
//Second, when running Miosix with the xram linker scripts .data and .bss
//are placed in the external RAM, so we *must* call SystemInit(), which
//enables xram, before touching .data and .bss
//Third, this is a performance improvement since the loops that initialize
//.data and zeros .bss now run with the CPU at full speed instead of 8MHz
SystemInit();
//These are defined in the linker script
extern unsigned char _etext asm("_etext");
extern unsigned char _data asm("_data");
extern unsigned char _edata asm("_edata");
extern unsigned char _bss_start asm("_bss_start");
extern unsigned char _bss_end asm("_bss_end");
//Initialize .data section, clear .bss section
unsigned char *etext=&_etext;
unsigned char *data=&_data;
unsigned char *edata=&_edata;
unsigned char *bss_start=&_bss_start;
unsigned char *bss_end=&_bss_end;
memcpy(data, etext, edata-data);
memset(bss_start, 0, bss_end-bss_start);
//Move on to stage 2
_init();
//If main returns, reboot
NVIC_SystemReset();
for(;;) ;
}
/**
* Reset handler, called by hardware immediately after reset
*/
void Reset_Handler() __attribute__((__interrupt__, noreturn));
void Reset_Handler()
{
/*
* Initialize process stack and switch to it.
* This is required for booting Miosix, a small portion of the top of the
* heap area will be used as stack until the first thread starts. After,
* this stack will be abandoned and the process stack will point to the
* current thread's stack.
*/
asm volatile("ldr r0, =_heap_end \n\t"
"msr psp, r0 \n\t"
"movw r0, #2 \n\n" //Privileged, process stack
"msr control, r0 \n\t"
"isb \n\t":::"r0");
program_startup();
}
/**
* All unused interrupts call this function.
*/
extern "C" void Default_Handler()
{
unexpectedInterrupt();
}
//System handlers
void /*__attribute__((weak))*/ Reset_Handler(); //These interrupts are not
void /*__attribute__((weak))*/ NMI_Handler(); //weak because they are
void /*__attribute__((weak))*/ HardFault_Handler(); //surely defined by Miosix
void /*__attribute__((weak))*/ MemManage_Handler();
void /*__attribute__((weak))*/ BusFault_Handler();
void /*__attribute__((weak))*/ UsageFault_Handler();
void /*__attribute__((weak))*/ SVC_Handler();
void /*__attribute__((weak))*/ DebugMon_Handler();
void /*__attribute__((weak))*/ PendSV_Handler();
void /*__attribute__((weak))*/ SysTick_Handler();
//Interrupt handlers
void __attribute__((weak)) WWDG_IRQHandler();
void __attribute__((weak)) PVD_IRQHandler();
void __attribute__((weak)) TAMPER_IRQHandler();
void __attribute__((weak)) RTC_IRQHandler();
void __attribute__((weak)) FLASH_IRQHandler();
void __attribute__((weak)) RCC_IRQHandler();
void __attribute__((weak)) EXTI0_IRQHandler();
void __attribute__((weak)) EXTI1_IRQHandler();
void __attribute__((weak)) EXTI2_IRQHandler();
void __attribute__((weak)) EXTI3_IRQHandler();
void __attribute__((weak)) EXTI4_IRQHandler();
void __attribute__((weak)) DMA1_Channel1_IRQHandler();
void __attribute__((weak)) DMA1_Channel2_IRQHandler();
void __attribute__((weak)) DMA1_Channel3_IRQHandler();
void __attribute__((weak)) DMA1_Channel4_IRQHandler();
void __attribute__((weak)) DMA1_Channel5_IRQHandler();
void __attribute__((weak)) DMA1_Channel6_IRQHandler();
void __attribute__((weak)) DMA1_Channel7_IRQHandler();
void __attribute__((weak)) ADC1_2_IRQHandler();
void __attribute__((weak)) USB_HP_CAN1_TX_IRQHandler();
void __attribute__((weak)) USB_LP_CAN1_RX0_IRQHandler();
void __attribute__((weak)) CAN1_RX1_IRQHandler();
void __attribute__((weak)) CAN1_SCE_IRQHandler();
void __attribute__((weak)) EXTI9_5_IRQHandler();
void __attribute__((weak)) TIM1_BRK_IRQHandler();
void __attribute__((weak)) TIM1_UP_IRQHandler();
void __attribute__((weak)) TIM1_TRG_COM_IRQHandler();
void __attribute__((weak)) TIM1_CC_IRQHandler();
void __attribute__((weak)) TIM2_IRQHandler();
void __attribute__((weak)) TIM3_IRQHandler();
void __attribute__((weak)) TIM4_IRQHandler();
void __attribute__((weak)) I2C1_EV_IRQHandler();
void __attribute__((weak)) I2C1_ER_IRQHandler();
void __attribute__((weak)) I2C2_EV_IRQHandler();
void __attribute__((weak)) I2C2_ER_IRQHandler();
void __attribute__((weak)) SPI1_IRQHandler();
void __attribute__((weak)) SPI2_IRQHandler();
void __attribute__((weak)) USART1_IRQHandler();
void __attribute__((weak)) USART2_IRQHandler();
void __attribute__((weak)) USART3_IRQHandler();
void __attribute__((weak)) EXTI15_10_IRQHandler();
void __attribute__((weak)) RTC_Alarm_IRQHandler();
void __attribute__((weak)) USBWakeUp_IRQHandler();
//Stack top, defined in the linker script
extern char _main_stack_top asm("_main_stack_top");
//Interrupt vectors, must be placed @ address 0x00000000
//The extern declaration is required otherwise g++ optimizes it out
extern void (* const __Vectors[])();
void (* const __Vectors[])() __attribute__ ((section(".isr_vector"))) =
{
reinterpret_cast<void (*)()>(&_main_stack_top),/* Stack pointer*/
Reset_Handler, /* Reset Handler */
NMI_Handler, /* NMI Handler */
HardFault_Handler, /* Hard Fault Handler */
MemManage_Handler, /* MPU Fault Handler */
BusFault_Handler, /* Bus Fault Handler */
UsageFault_Handler, /* Usage Fault Handler */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
SVC_Handler, /* SVCall Handler */
DebugMon_Handler, /* Debug Monitor Handler */
0, /* Reserved */
PendSV_Handler, /* PendSV Handler */
SysTick_Handler, /* SysTick Handler */
/* External Interrupts */
WWDG_IRQHandler,
PVD_IRQHandler,
TAMPER_IRQHandler,
RTC_IRQHandler,
FLASH_IRQHandler,
RCC_IRQHandler,
EXTI0_IRQHandler,
EXTI1_IRQHandler,
EXTI2_IRQHandler,
EXTI3_IRQHandler,
EXTI4_IRQHandler,
DMA1_Channel1_IRQHandler,
DMA1_Channel2_IRQHandler,
DMA1_Channel3_IRQHandler,
DMA1_Channel4_IRQHandler,
DMA1_Channel5_IRQHandler,
DMA1_Channel6_IRQHandler,
DMA1_Channel7_IRQHandler,
ADC1_2_IRQHandler,
USB_HP_CAN1_TX_IRQHandler,
USB_LP_CAN1_RX0_IRQHandler,
CAN1_RX1_IRQHandler,
CAN1_SCE_IRQHandler,
EXTI9_5_IRQHandler,
TIM1_BRK_IRQHandler,
TIM1_UP_IRQHandler,
TIM1_TRG_COM_IRQHandler,
TIM1_CC_IRQHandler,
TIM2_IRQHandler,
TIM3_IRQHandler,
TIM4_IRQHandler,
I2C1_EV_IRQHandler,
I2C1_ER_IRQHandler,
I2C2_EV_IRQHandler,
I2C2_ER_IRQHandler,
SPI1_IRQHandler,
SPI2_IRQHandler,
USART1_IRQHandler,
USART2_IRQHandler,
USART3_IRQHandler,
EXTI15_10_IRQHandler,
RTC_Alarm_IRQHandler,
USBWakeUp_IRQHandler,
0,0,0,0,0,0,0,
reinterpret_cast<void (*)()>(0xF108F85F) /* @0x1E0. This is for boot in RAM mode for
STM32F10x Medium Value Line Density devices.*/
};
#pragma weak WWDG_IRQHandler = Default_Handler
#pragma weak PVD_IRQHandler = Default_Handler
#pragma weak TAMPER_IRQHandler = Default_Handler
#pragma weak RTC_IRQHandler = Default_Handler
#pragma weak FLASH_IRQHandler = Default_Handler
#pragma weak RCC_IRQHandler = Default_Handler
#pragma weak EXTI0_IRQHandler = Default_Handler
#pragma weak EXTI1_IRQHandler = Default_Handler
#pragma weak EXTI2_IRQHandler = Default_Handler
#pragma weak EXTI3_IRQHandler = Default_Handler
#pragma weak EXTI4_IRQHandler = Default_Handler
#pragma weak DMA1_Channel1_IRQHandler = Default_Handler
#pragma weak DMA1_Channel2_IRQHandler = Default_Handler
#pragma weak DMA1_Channel3_IRQHandler = Default_Handler
#pragma weak DMA1_Channel4_IRQHandler = Default_Handler
#pragma weak DMA1_Channel5_IRQHandler = Default_Handler
#pragma weak DMA1_Channel6_IRQHandler = Default_Handler
#pragma weak DMA1_Channel7_IRQHandler = Default_Handler
#pragma weak ADC1_2_IRQHandler = Default_Handler
#pragma weak USB_HP_CAN1_TX_IRQHandler = Default_Handler
#pragma weak USB_LP_CAN1_RX0_IRQHandler = Default_Handler
#pragma weak CAN1_RX1_IRQHandler = Default_Handler
#pragma weak CAN1_SCE_IRQHandler = Default_Handler
#pragma weak EXTI9_5_IRQHandler = Default_Handler
#pragma weak TIM1_BRK_IRQHandler = Default_Handler
#pragma weak TIM1_UP_IRQHandler = Default_Handler
#pragma weak TIM1_TRG_COM_IRQHandler = Default_Handler
#pragma weak TIM1_CC_IRQHandler = Default_Handler
#pragma weak TIM2_IRQHandler = Default_Handler
#pragma weak TIM3_IRQHandler = Default_Handler
#pragma weak TIM4_IRQHandler = Default_Handler
#pragma weak I2C1_EV_IRQHandler = Default_Handler
#pragma weak I2C1_ER_IRQHandler = Default_Handler
#pragma weak I2C2_EV_IRQHandler = Default_Handler
#pragma weak I2C2_ER_IRQHandler = Default_Handler
#pragma weak SPI1_IRQHandler = Default_Handler
#pragma weak SPI2_IRQHandler = Default_Handler
// #pragma weak USART1_IRQHandler = Default_Handler
// #pragma weak USART2_IRQHandler = Default_Handler
// #pragma weak USART3_IRQHandler = Default_Handler
#pragma weak EXTI15_10_IRQHandler = Default_Handler
#pragma weak RTC_Alarm_IRQHandler = Default_Handler
#pragma weak USBWakeUp_IRQHandler = Default_Handler
miosix/arch/cortexM3_stm32f1/stm32f103c8_skyward_alderaan/interfaces-impl/bsp.cpp 0 → 100644
View file @ 9268dbc2
/***************************************************************************
* Copyright (C) 2011, 2012, 2013, 2014 by Terraneo Federico *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* As a special exception, if other files instantiate templates or use *
* macros or inline functions from this file, or you compile this file *
* and link it with other works to produce a work based on this file, *
* this file does not by itself cause the resulting work to be covered *
* by the GNU General Public License. However the source code for this *
* file must still be made available in accordance with the GNU General *
* Public License. This exception does not invalidate any other reasons *
* why a work based on this file might be covered by the GNU General *
* Public License. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, see <http://www.gnu.org/licenses/> *
***************************************************************************/
/***********************************************************************
* bsp.cpp Part of the Miosix Embedded OS.
* Board support package, this file initializes hardware.
************************************************************************/
#include <cstdlib>
#include <inttypes.h>
#include <sys/ioctl.h>
#include "interfaces/bsp.h"
#include "kernel/kernel.h"
#include "kernel/sync.h"
#include "interfaces/delays.h"
#include "interfaces/portability.h"
#include "interfaces/arch_registers.h"
#include "config/miosix_settings.h"
#include "kernel/logging.h"
#include "filesystem/file_access.h"
#include "filesystem/console/console_device.h"
#include "drivers/serial.h"
#include "drivers/dcc.h"
#include "board_settings.h"
#include "hwmapping.h"
namespace miosix {
//
// Initialization
//
void IRQbspInit()
{
//Enable all gpios
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN |
RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN |
RCC_APB2ENR_AFIOEN;
RCC_SYNC();
//PORT INITIALIZATION
using namespace interfaces;
spi1::sck::mode(Mode::OUTPUT);
spi1::miso::mode(Mode::INPUT);
spi1::mosi::mode(Mode::OUTPUT);
uart1::tx::mode(Mode::OUTPUT);
uart1::rx::mode(Mode::INPUT);
using namespace actuators;
abortPin::mode(Mode::OUTPUT);
ignitionPin::mode(Mode::OUTPUT);
umbilicalPin::mode(Mode::OUTPUT);
abortPin::high();
umbilicalPin::high();
ignitionPin::low();
#ifdef DEBUG
_led::mode(Mode::OUTPUT_2MHz);
ledOn();
delayMs(100);
ledOff();
#endif
DefaultConsole::instance().IRQset(intrusive_ref_ptr<Device>(
#ifndef STDOUT_REDIRECTED_TO_DCC
new STM32Serial(defaultSerial,defaultSerialSpeed,
defaultSerialFlowctrl ? STM32Serial::RTSCTS : STM32Serial::NOFLOWCTRL)));
#else //STDOUT_REDIRECTED_TO_DCC
new ARMDCC();
#endif //STDOUT_REDIRECTED_TO_DCC
}
void bspInit2()
{
// #ifdef WITH_FILESYSTEM
// basicFilesystemSetup();
// #endif //WITH_FILESYSTEM
}
//
// Shutdown and reboot
//
/**
This function disables filesystem (if enabled), serial port (if enabled) and
puts the processor in deep sleep mode.<br>
Wakeup occurs when PA.0 goes high, but instead of sleep(), a new boot happens.
<br>This function does not return.<br>
WARNING: close all files before using this function, since it unmounts the
filesystem.<br>
When in shutdown mode, power consumption of the miosix board is reduced to ~
5uA??, however, true power consumption depends on what is connected to the GPIO
pins. The user is responsible to put the devices connected to the GPIO pin in the
minimal power consumption mode before calling shutdown(). Please note that to
minimize power consumption all unused GPIO must not be left floating.
*/
void shutdown()
{
ioctl(STDOUT_FILENO,IOCTL_SYNC,0);
#ifdef WITH_FILESYSTEM
FilesystemManager::instance().umountAll();
#endif //WITH_FILESYSTEM
disableInterrupts();
/*
Removed because low power mode causes issues with SWD programming
RCC->APB1ENR |= RCC_APB1ENR_PWREN; //Fuckin' clock gating...
RCC_SYNC();
PWR->CR |= PWR_CR_PDDS; //Select standby mode
PWR->CR |= PWR_CR_CWUF;
PWR->CSR |= PWR_CSR_EWUP; //Enable PA.0 as wakeup source
SCB->SCR |= SCB_SCR_SLEEPDEEP;
__WFE();
NVIC_SystemReset();
*/
for(;;) ;
}
void reboot()
{
ioctl(STDOUT_FILENO,IOCTL_SYNC,0);
#ifdef WITH_FILESYSTEM
FilesystemManager::instance().umountAll();
#endif //WITH_FILESYSTEM
disableInterrupts();
miosix_private::IRQsystemReboot();
}
} //namespace miosix
miosix/arch/cortexM3_stm32f1/stm32f103c8_skyward_alderaan/interfaces-impl/bsp_impl.h 0 → 100644
View file @ 9268dbc2
/***************************************************************************
* Copyright (C) 2011 by Terraneo Federico *
* Copyright (C) 2016 by Silvano Seva *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* As a special exception, if other files instantiate templates or use *
* macros or inline functions from this file, or you compile this file *
* and link it with other works to produce a work based on this file, *
* this file does not by itself cause the resulting work to be covered *
* by the GNU General Public License. However the source code for this *
* file must still be made available in accordance with the GNU General *
* Public License. This exception does not invalidate any other reasons *
* why a work based on this file might be covered by the GNU General *
* Public License. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, see <http://www.gnu.org/licenses/> *
***************************************************************************/
/***********************************************************************
* bsp_impl.h Part of the Miosix Embedded OS.
* Board support package, this file initializes hardware.
************************************************************************/
#ifndef BSP_IMPL_H
#define BSP_IMPL_H
#include "config/miosix_settings.h"
#include "interfaces/gpio.h"
namespace miosix {
/**
\addtogroup Hardware
\{
*/
/**
* \internal
* used by the ledOn() and ledOff() implementation
*/
typedef Gpio<GPIOA_BASE,1> _led;
inline void ledOn()
{
_led::high();
}
inline void ledOff()
{
_led::low();
}
///\internal Pin connected to SD card detect
//TODO: no filesystem typedef Gpio<GPIOA_BASE,8> sdCardDetect;
/**
* Polls the SD card sense GPIO
* \return true if there is an uSD card in the socket.
*/
/*TODO: no filesystem
inline bool sdCardSense()
{
return sdCardDetect::value()==0;
}*/
/**
\}
*/
} //namespace miosix
#endif //BSP_IMPL_H
miosix/arch/cortexM3_stm32f1/stm32f103c8_skyward_alderaan/interfaces-impl/hwmapping.h 0 → 100644
View file @ 9268dbc2
/***************************************************************************
* Copyright (C) 2018 by Terraneo Federico *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* As a special exception, if other files instantiate templates or use *
* macros or inline functions from this file, or you compile this file *
* and link it with other works to produce a work based on this file, *
* this file does not by itself cause the resulting work to be covered *
* by the GNU General Public License. However the source code for this *
* file must still be made available in accordance with the GNU General *
* Public License. This exception does not invalidate any other reasons *
* why a work based on this file might be covered by the GNU General *
* Public License. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, see <http://www.gnu.org/licenses/> *
***************************************************************************/
#ifndef HWMAPPING_H
#define HWMAPPING_H
#include "interfaces/gpio.h"
namespace miosix {
namespace interfaces
{
namespace spi1 {
using sck = Gpio<GPIOA_BASE, 5>;
using miso = Gpio<GPIOA_BASE, 6>;
using mosi = Gpio<GPIOA_BASE, 7>;
} //namespace spi1
namespace uart1 {
using tx = Gpio<GPIOA_BASE, 9>;
using rx = Gpio<GPIOA_BASE, 10>;
} //namespace uart1
} //namespace interfaces
namespace actuators
{
using abortPin = Gpio<GPIOA_BASE, 1>;
using ignitionPin = Gpio<GPIOA_BASE, 2>;
using umbilicalPin = Gpio<GPIOA_BASE, 3>;
} //namespace actuators
} //namespace miosix
#endif //HWMAPPING_H
miosix/arch/cortexM7_stm32f7/stm32f746zg_nucleo/stm32_1024k+256k_rom.ld → miosix/arch/cortexM3_stm32f1/stm32f103c8_skyward_alderaan/stm32_64k+20k_rom.ld
View file @ 9268dbc2
/* /*
* C++ enabled linker script for stm32 (1M FLASH, 256K RAM) * C++ enabled linker script for stm32 (64K FLASH, 20K RAM)
* Developed by TFT: Terraneo Federico Technologies * Developed by TFT: Terraneo Federico Technologies
* Optimized for use with the Miosix kernel * Optimized for use with the Miosix kernel
*/ */
...@@ -40,8 +40,8 @@ _main_stack_size = 0x00000200; /* main stack = 512Bytes */ ...@@ -40,8 +40,8 @@ _main_stack_size = 0x00000200; /* main stack = 512Bytes */
_main_stack_top = 0x20000000 + _main_stack_size; _main_stack_top = 0x20000000 + _main_stack_size;
ASSERT(_main_stack_size % 8 == 0, "MAIN stack size error"); ASSERT(_main_stack_size % 8 == 0, "MAIN stack size error");
/* end of the heap on 320KB microcontrollers */ /* end of the heap on 20KB microcontrollers */
_heap_end = 0x20050000; /* end of available ram */ _heap_end = 0x20005000; /* end of available ram */
/* identify the Entry Point */ /* identify the Entry Point */
ENTRY(_Z13Reset_Handlerv) ENTRY(_Z13Reset_Handlerv)
...@@ -49,17 +49,13 @@ ENTRY(_Z13Reset_Handlerv) ...@@ -49,17 +49,13 @@ ENTRY(_Z13Reset_Handlerv)
/* specify the memory areas */ /* specify the memory areas */
MEMORY MEMORY
{ {
flash(rx) : ORIGIN = 0x08000000, LENGTH = 1M flash(rx) : ORIGIN = 0x08000000, LENGTH = 64K
/* /*
* NOTE: starting at 0x20000000 there's 64KB of DTCM. Technically, we could * Note, the ram starts at 0x20000000 but it is necessary to add the size
* use this as normal RAM as there's a way the DMA can access it, but the * of the main stack, so it is 0x20000200.
* datasheet is unclear about performance penalties for doing so.
* To avoid nonuniform DMA memory access latencies, we leve this 64KB DTCM
* unused except for the first 512Bytes which are for the interrupt stack.
* This leaves us with 256KB of RAM
*/ */
ram(wx) : ORIGIN = 0x20010000, LENGTH = 256K ram(wx) : ORIGIN = 0x20000200, LENGTH = 20K-0x200
} }
/* now define the output sections */ /* now define the output sections */
......
miosix/arch/cortexM3_stm32f1/stm32f103c8_skyward_alderaan/stm32vldiscovery.cfg 0 → 100644
View file @ 9268dbc2
#
# OpenOCD configuration file for in-circuit debugging the stm32vldiscovery
# loaded with the versaloon firmware.
# To start debugging issue those commands:
# arm-miosix-eabi-gdb main.elf
# target remote :3333
# monitor reset halt
# monitor target_request debugmsgs enable
# monitor trace point 1
# The last two commands are required to redirect printf inside the MCU
# through SWD, and make the output appear inside gdb
#
# Daemon configuration
telnet_port 4444
gdb_port 3333
# Interface (using versaloon)
interface vsllink
transport select swd
swd_mode 2
swd_delay 2
# This is a board with an STM32F100RBT6
# Use 2 kB instead of the default 16 kB
set WORKAREASIZE 0x800
source [find target/stm32.cfg]
miosix/arch/cortexM3_stm32/stm32f103cb_als_mainboard_rev2/core/stage_1_boot.cpp → miosix/arch/cortexM3_stm32f1/stm32f103cb_als_mainboard_rev2/core/stage_1_boot.cpp
View file @ 9268dbc2
...@@ -261,9 +261,9 @@ void (* const __Vectors[])() __attribute__ ((section(".isr_vector"))) = ...@@ -261,9 +261,9 @@ void (* const __Vectors[])() __attribute__ ((section(".isr_vector"))) =
#pragma weak I2C2_ER_IRQHandler = Default_Handler #pragma weak I2C2_ER_IRQHandler = Default_Handler
#pragma weak SPI1_IRQHandler = Default_Handler #pragma weak SPI1_IRQHandler = Default_Handler
#pragma weak SPI2_IRQHandler = Default_Handler #pragma weak SPI2_IRQHandler = Default_Handler
#pragma weak USART1_IRQHandler = Default_Handler // #pragma weak USART1_IRQHandler = Default_Handler
#pragma weak USART2_IRQHandler = Default_Handler // #pragma weak USART2_IRQHandler = Default_Handler
#pragma weak USART3_IRQHandler = Default_Handler // #pragma weak USART3_IRQHandler = Default_Handler
#pragma weak EXTI15_10_IRQHandler = Default_Handler #pragma weak EXTI15_10_IRQHandler = Default_Handler
#pragma weak RTCAlarm_IRQHandler = Default_Handler #pragma weak RTCAlarm_IRQHandler = Default_Handler
#pragma weak USBWakeUp_IRQHandler = Default_Handler #pragma weak USBWakeUp_IRQHandler = Default_Handler
miosix/arch/cortexM3_stm32/stm32f103cx_generic/core/stage_1_boot.cpp → miosix/arch/cortexM3_stm32f1/stm32f103cb_skyward_strain_board/core/stage_1_boot.cpp
View file @ 9268dbc2
...@@ -261,9 +261,9 @@ void (* const __Vectors[])() __attribute__ ((section(".isr_vector"))) = ...@@ -261,9 +261,9 @@ void (* const __Vectors[])() __attribute__ ((section(".isr_vector"))) =
#pragma weak I2C2_ER_IRQHandler = Default_Handler #pragma weak I2C2_ER_IRQHandler = Default_Handler
#pragma weak SPI1_IRQHandler = Default_Handler #pragma weak SPI1_IRQHandler = Default_Handler
#pragma weak SPI2_IRQHandler = Default_Handler #pragma weak SPI2_IRQHandler = Default_Handler
#pragma weak USART1_IRQHandler = Default_Handler // #pragma weak USART1_IRQHandler = Default_Handler
#pragma weak USART2_IRQHandler = Default_Handler // #pragma weak USART2_IRQHandler = Default_Handler
#pragma weak USART3_IRQHandler = Default_Handler // #pragma weak USART3_IRQHandler = Default_Handler
#pragma weak EXTI15_10_IRQHandler = Default_Handler #pragma weak EXTI15_10_IRQHandler = Default_Handler
#pragma weak RTCAlarm_IRQHandler = Default_Handler #pragma weak RTCAlarm_IRQHandler = Default_Handler
#pragma weak USBWakeUp_IRQHandler = Default_Handler #pragma weak USBWakeUp_IRQHandler = Default_Handler
miosix/arch/cortexM3_stm32f1/stm32f103cb_skyward_strain_board/interfaces-impl/bsp.cpp 0 → 100644
View file @ 9268dbc2
/***************************************************************************
* Copyright (C) 2015, 2016, 2017, 2018 by Terraneo Federico *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* As a special exception, if other files instantiate templates or use *
* macros or inline functions from this file, or you compile this file *
* and link it with other works to produce a work based on this file, *
* this file does not by itself cause the resulting work to be covered *
* by the GNU General Public License. However the source code for this *
* file must still be made available in accordance with the GNU General *
* Public License. This exception does not invalidate any other reasons *
* why a work based on this file might be covered by the GNU General *
* Public License. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, see <http://www.gnu.org/licenses/> *
***************************************************************************/
/***********************************************************************
* bsp.cpp Part of the Miosix Embedded OS.
* Board support package, this file initializes hardware.
************************************************************************/
#include <utility>
#include <sys/ioctl.h>
#include "interfaces/bsp.h"
#include "interfaces/delays.h"
#include "interfaces/arch_registers.h"
#include "config/miosix_settings.h"
#include "filesystem/file_access.h"
#include "filesystem/console/console_device.h"
#include "drivers/serial.h"
#include "board_settings.h"
#include "hwmapping.h"
using namespace std;
namespace miosix {
//
// Initialization
//
void IRQbspInit()
{
//Enable all gpios, as well as AFIO
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN |
RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN |
RCC_APB2ENR_AFIOEN;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
//Enable SPI1 + CAN
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
RCC->APB1ENR |= RCC_APB1ENR_CAN1EN;
RCC_SYNC();
using namespace interfaces;
spi1::sck::mode(Mode::ALTERNATE);
spi1::miso::mode(Mode::INPUT);
spi1::mosi::mode(Mode::ALTERNATE);
can::tx::mode(Mode::ALTERNATE);
can::rx::mode(Mode::INPUT);
using namespace sensors;
ads1118::cs::mode(Mode::OUTPUT);
ads1118::cs::high();
using namespace leds;
led1::mode(Mode::OUTPUT);
led1::low();
led2::mode(Mode::OUTPUT);
led2::low();
led3::mode(Mode::OUTPUT);
led3::low();
for (uint8_t i = 0; i < 5; i++)
{
ledOn();
delayMs(100);
ledOff();
delayMs(100);
}
DefaultConsole::instance().IRQset(intrusive_ref_ptr<Device>(
new STM32Serial(defaultSerial,defaultSerialSpeed,
defaultSerialFlowctrl ? STM32Serial::RTSCTS : STM32Serial::NOFLOWCTRL)));
}
void bspInit2()
{
}
//
// Shutdown and reboot
//
void shutdown()
{
reboot(); //This board has no shutdown support, so we reboot on shutdown
}
void reboot()
{
ioctl(STDOUT_FILENO,IOCTL_SYNC,0);
disableInterrupts();
miosix_private::IRQsystemReboot();
}
} //namespace miosix
miosix/arch/cortexM3_stm32f1/stm32f103cb_skyward_strain_board/interfaces-impl/bsp_impl.h 0 → 100644
View file @ 9268dbc2
/***************************************************************************
* Copyright (C) 2018 by Terraneo Federico *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* As a special exception, if other files instantiate templates or use *
* macros or inline functions from this file, or you compile this file *
* and link it with other works to produce a work based on this file, *
* this file does not by itself cause the resulting work to be covered *
* by the GNU General Public License. However the suorce code for this *
* file must still be made available in accordance with the GNU General *
* Public License. This exception does not invalidate any other reasons *
* why a work based on this file might be covered by the GNU General *
* Public License. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, see <http://www.gnu.org/licenses/> *
***************************************************************************/
/***********************************************************************
* bsp_impl.h Part of the Miosix Embedded OS.
* Board support package, this file initializes hardware.
************************************************************************/
#ifndef BSP_IMPL_H
#define BSP_IMPL_H
#include "hwmapping.h"
namespace miosix {
/**
\addtogroup Hardware
\{
*/
inline void ledOn() {
leds::led1::high();
}
inline void ledOff() {
leds::led1::low();
}
/**
* Polls the SD card sense GPIO
* \return true if there is an uSD card in the socket.
*/
inline bool sdCardSense()
{
return true;
}
/**
\}
*/
} //namespace miosix
#endif //BSP_IMPL_H
miosix/arch/cortexM3_stm32f1/stm32f103cb_skyward_strain_board/interfaces-impl/hwmapping.h 0 → 100644
View file @ 9268dbc2
#ifndef HWMAPPING_H
#define HWMAPPING_H
#include "interfaces/arch_registers.h"
#include "interfaces/gpio.h"
namespace miosix {
namespace interfaces {
namespace spi1 {
using sck = Gpio<GPIOA_BASE, 5>;
using miso = Gpio<GPIOA_BASE, 6>;
using mosi = Gpio<GPIOA_BASE, 7>;
}
namespace usart3 {
using tx = Gpio<GPIOB_BASE, 10>;
using rx = Gpio<GPIOB_BASE, 11>;
}
namespace can {
using tx = Gpio<GPIOA_BASE, 12>;
using rx = Gpio<GPIOA_BASE, 11>;
}
}
namespace leds
{
using led1 = Gpio<GPIOB_BASE, 12>;
using led2 = Gpio<GPIOB_BASE, 13>;
using led3 = Gpio<GPIOB_BASE, 14>;
}
namespace sensors {
namespace ads1118 {
using cs = Gpio<GPIOA_BASE, 4>;
}
}
}
#endif
\ No newline at end of file
miosix/arch/cortexM3_stm32f1/stm32f103cx_generic/core/stage_1_boot.cpp 0 → 100644
View file @ 9268dbc2
#include "interfaces/arch_registers.h"
#include "core/interrupts.h" //For the unexpected interrupt call
#include "kernel/stage_2_boot.h"
#include <string.h>
/*
* startup.cpp
* STM32 C++ startup.
* Supports interrupt handlers in C++ without extern "C"
* Developed by Terraneo Federico, based on ST startup code.
* Additionally modified to boot Miosix.
*/
/**
* Called by Reset_Handler, performs initialization and calls main.
* Never returns.
*/
void program_startup() __attribute__((noreturn));
void program_startup()
{
//Cortex M3 core appears to get out of reset with interrupts already enabled
__disable_irq();
//These are defined in the linker script
extern unsigned char _etext asm("_etext");
extern unsigned char _data asm("_data");
extern unsigned char _edata asm("_edata");
extern unsigned char _bss_start asm("_bss_start");
extern unsigned char _bss_end asm("_bss_end");
//Initialize .data section, clear .bss section
unsigned char *etext=&_etext;
unsigned char *data=&_data;
unsigned char *edata=&_edata;
unsigned char *bss_start=&_bss_start;
unsigned char *bss_end=&_bss_end;
memcpy(data, etext, edata-data);
memset(bss_start, 0, bss_end-bss_start);
//Move on to stage 2
_init();
//If main returns, reboot
NVIC_SystemReset();
for(;;) ;
}
/**
* Reset handler, called by hardware immediately after reset
*/
void Reset_Handler() __attribute__((__interrupt__, noreturn));
void Reset_Handler()
{
/*
* SystemInit() is called *before* initializing .data and zeroing .bss
* Despite all startup files provided by ST do the opposite, there are three
* good reasons to do so:
* First, the CMSIS specifications say that SystemInit() must not access
* global variables, so it is actually possible to call it before
* Second, when running Miosix with the xram linker scripts .data and .bss
* are placed in the external RAM, so we *must* call SystemInit(), which
* enables xram, before touching .data and .bss
* Third, this is a performance improvement since the loops that initialize
* .data and zeros .bss now run with the CPU at full speed instead of 16MHz
* Note that it is called before switching stacks because the memory
* at _heap_end can be unavailable until the external RAM is initialized.
*/
SystemInit();
/*
* Initialize process stack and switch to it.
* This is required for booting Miosix, a small portion of the top of the
* heap area will be used as stack until the first thread starts. After,
* this stack will be abandoned and the process stack will point to the
* current thread's stack.
*/
asm volatile("ldr r0, =_heap_end \n\t"
"msr psp, r0 \n\t"
"movw r0, #2 \n\n" //Privileged, process stack
"msr control, r0 \n\t"
"isb \n\t":::"r0");
program_startup();
}
/**
* All unused interrupts call this function.
*/
extern "C" void Default_Handler()
{
unexpectedInterrupt();
}
//System handlers
void /*__attribute__((weak))*/ Reset_Handler(); //These interrupts are not
void /*__attribute__((weak))*/ NMI_Handler(); //weak because they are
void /*__attribute__((weak))*/ HardFault_Handler(); //surely defined by Miosix
void /*__attribute__((weak))*/ MemManage_Handler();
void /*__attribute__((weak))*/ BusFault_Handler();
void /*__attribute__((weak))*/ UsageFault_Handler();
void /*__attribute__((weak))*/ SVC_Handler();
void /*__attribute__((weak))*/ DebugMon_Handler();
void /*__attribute__((weak))*/ PendSV_Handler();
void /*__attribute__((weak))*/ SysTick_Handler();
//Interrupt handlers
void __attribute__((weak)) WWDG_IRQHandler();
void __attribute__((weak)) PVD_IRQHandler();
void __attribute__((weak)) TAMPER_IRQHandler();
void __attribute__((weak)) RTC_IRQHandler();
void __attribute__((weak)) FLASH_IRQHandler();
void __attribute__((weak)) RCC_IRQHandler();
void __attribute__((weak)) EXTI0_IRQHandler();
void __attribute__((weak)) EXTI1_IRQHandler();
void __attribute__((weak)) EXTI2_IRQHandler();
void __attribute__((weak)) EXTI3_IRQHandler();
void __attribute__((weak)) EXTI4_IRQHandler();
void __attribute__((weak)) DMA1_Channel1_IRQHandler();
void __attribute__((weak)) DMA1_Channel2_IRQHandler();
void __attribute__((weak)) DMA1_Channel3_IRQHandler();
void __attribute__((weak)) DMA1_Channel4_IRQHandler();
void __attribute__((weak)) DMA1_Channel5_IRQHandler();
void __attribute__((weak)) DMA1_Channel6_IRQHandler();
void __attribute__((weak)) DMA1_Channel7_IRQHandler();
void __attribute__((weak)) ADC1_2_IRQHandler();
void __attribute__((weak)) USB_HP_CAN1_TX_IRQHandler();
void __attribute__((weak)) USB_LP_CAN1_RX0_IRQHandler();
void __attribute__((weak)) CAN1_RX1_IRQHandler();
void __attribute__((weak)) CAN1_SCE_IRQHandler();
void __attribute__((weak)) EXTI9_5_IRQHandler();
void __attribute__((weak)) TIM1_BRK_IRQHandler();
void __attribute__((weak)) TIM1_UP_IRQHandler();
void __attribute__((weak)) TIM1_TRG_COM_IRQHandler();
void __attribute__((weak)) TIM1_CC_IRQHandler();
void __attribute__((weak)) TIM2_IRQHandler();
void __attribute__((weak)) TIM3_IRQHandler();
void __attribute__((weak)) TIM4_IRQHandler();
void __attribute__((weak)) I2C1_EV_IRQHandler();
void __attribute__((weak)) I2C1_ER_IRQHandler();
void __attribute__((weak)) I2C2_EV_IRQHandler();
void __attribute__((weak)) I2C2_ER_IRQHandler();
void __attribute__((weak)) SPI1_IRQHandler();
void __attribute__((weak)) SPI2_IRQHandler();
void __attribute__((weak)) USART1_IRQHandler();
void __attribute__((weak)) USART2_IRQHandler();
void __attribute__((weak)) USART3_IRQHandler();
void __attribute__((weak)) EXTI15_10_IRQHandler();
void __attribute__((weak)) RTCAlarm_IRQHandler();
void __attribute__((weak)) USBWakeUp_IRQHandler();
//Stack top, defined in the linker script
extern char _main_stack_top asm("_main_stack_top");
//Interrupt vectors, must be placed @ address 0x00000000
//The extern declaration is required otherwise g++ optimizes it out
extern void (* const __Vectors[])();
void (* const __Vectors[])() __attribute__ ((section(".isr_vector"))) =
{
reinterpret_cast<void (*)()>(&_main_stack_top),/* Stack pointer*/
Reset_Handler, /* Reset Handler */
NMI_Handler, /* NMI Handler */
HardFault_Handler, /* Hard Fault Handler */
MemManage_Handler, /* MPU Fault Handler */
BusFault_Handler, /* Bus Fault Handler */
UsageFault_Handler, /* Usage Fault Handler */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
SVC_Handler, /* SVCall Handler */
DebugMon_Handler, /* Debug Monitor Handler */
0, /* Reserved */
PendSV_Handler, /* PendSV Handler */
SysTick_Handler, /* SysTick Handler */
/* External Interrupts */
WWDG_IRQHandler,
PVD_IRQHandler,
TAMPER_IRQHandler,
RTC_IRQHandler,
FLASH_IRQHandler,
RCC_IRQHandler,
EXTI0_IRQHandler,
EXTI1_IRQHandler,
EXTI2_IRQHandler,
EXTI3_IRQHandler,
EXTI4_IRQHandler,
DMA1_Channel1_IRQHandler,
DMA1_Channel2_IRQHandler,
DMA1_Channel3_IRQHandler,
DMA1_Channel4_IRQHandler,
DMA1_Channel5_IRQHandler,
DMA1_Channel6_IRQHandler,
DMA1_Channel7_IRQHandler,
ADC1_2_IRQHandler,
USB_HP_CAN1_TX_IRQHandler,
USB_LP_CAN1_RX0_IRQHandler,
CAN1_RX1_IRQHandler,
CAN1_SCE_IRQHandler,
EXTI9_5_IRQHandler,
TIM1_BRK_IRQHandler,
TIM1_UP_IRQHandler,
TIM1_TRG_COM_IRQHandler,
TIM1_CC_IRQHandler,
TIM2_IRQHandler,
TIM3_IRQHandler,
TIM4_IRQHandler,
I2C1_EV_IRQHandler,
I2C1_ER_IRQHandler,
I2C2_EV_IRQHandler,
I2C2_ER_IRQHandler,
SPI1_IRQHandler,
SPI2_IRQHandler,
USART1_IRQHandler,
USART2_IRQHandler,
USART3_IRQHandler,
EXTI15_10_IRQHandler,
RTCAlarm_IRQHandler,
USBWakeUp_IRQHandler,
0,0,0,0,0,0,0,
reinterpret_cast<void (*)()>(0xF108F85F)
/* @0x108. This is for boot in RAM mode for
STM32F10x Medium Density devices. */
};
#pragma weak WWDG_IRQHandler = Default_Handler
#pragma weak PVD_IRQHandler = Default_Handler
#pragma weak TAMPER_IRQHandler = Default_Handler
#pragma weak RTC_IRQHandler = Default_Handler
#pragma weak FLASH_IRQHandler = Default_Handler
#pragma weak RCC_IRQHandler = Default_Handler
#pragma weak EXTI0_IRQHandler = Default_Handler
#pragma weak EXTI1_IRQHandler = Default_Handler
#pragma weak EXTI2_IRQHandler = Default_Handler
#pragma weak EXTI3_IRQHandler = Default_Handler
#pragma weak EXTI4_IRQHandler = Default_Handler
#pragma weak DMA1_Channel1_IRQHandler = Default_Handler
#pragma weak DMA1_Channel2_IRQHandler = Default_Handler
#pragma weak DMA1_Channel3_IRQHandler = Default_Handler
#pragma weak DMA1_Channel4_IRQHandler = Default_Handler
#pragma weak DMA1_Channel5_IRQHandler = Default_Handler
#pragma weak DMA1_Channel6_IRQHandler = Default_Handler
#pragma weak DMA1_Channel7_IRQHandler = Default_Handler
#pragma weak ADC1_2_IRQHandler = Default_Handler
#pragma weak USB_HP_CAN1_TX_IRQHandler = Default_Handler
#pragma weak USB_LP_CAN1_RX0_IRQHandler = Default_Handler
#pragma weak CAN1_RX1_IRQHandler = Default_Handler
#pragma weak CAN1_SCE_IRQHandler = Default_Handler
#pragma weak EXTI9_5_IRQHandler = Default_Handler
#pragma weak TIM1_BRK_IRQHandler = Default_Handler
#pragma weak TIM1_UP_IRQHandler = Default_Handler
#pragma weak TIM1_TRG_COM_IRQHandler = Default_Handler
#pragma weak TIM1_CC_IRQHandler = Default_Handler
#pragma weak TIM2_IRQHandler = Default_Handler
#pragma weak TIM3_IRQHandler = Default_Handler
#pragma weak TIM4_IRQHandler = Default_Handler
#pragma weak I2C1_EV_IRQHandler = Default_Handler
#pragma weak I2C1_ER_IRQHandler = Default_Handler
#pragma weak I2C2_EV_IRQHandler = Default_Handler
#pragma weak I2C2_ER_IRQHandler = Default_Handler
#pragma weak SPI1_IRQHandler = Default_Handler
#pragma weak SPI2_IRQHandler = Default_Handler
// #pragma weak USART1_IRQHandler = Default_Handler
// #pragma weak USART2_IRQHandler = Default_Handler
// #pragma weak USART3_IRQHandler = Default_Handler
#pragma weak EXTI15_10_IRQHandler = Default_Handler
#pragma weak RTCAlarm_IRQHandler = Default_Handler
#pragma weak USBWakeUp_IRQHandler = Default_Handler