Remove XRAM delays from f207_nucleo BSP code.

This board does not have external RAM so they are pointless.

Signed-off-by: Terraneo Federico <fede.tft@miosix.org>

miosix/arch/cortexM3_stm32f2/stm32f207zg_nucleo/interfaces-impl/delays.cpp

@@ -51,24 +51,7 @@ void delayMs(unsigned int mseconds)
     }
 
     #else //__CODE_IN_XRAM
-
-    #ifdef SYSCLK_FREQ_120MHz
-    register const unsigned int count=2662;
-    #else
-    #warning "Delays are uncalibrated for this clock frequency"    
-    #endif
-    
-    for(unsigned int i=0;i<mseconds;i++)
-    {
-        // This delay has been calibrated to take 1 millisecond
-        // It is written in assembler to be independent on compiler optimization
-        asm volatile("           mov   r1, #0     \n"
-                     "___loop_m: cmp   r1, %0     \n"
-                     "           itt   lo         \n"
-                     "           addlo r1, r1, #1 \n"
-                     "           blo   ___loop_m  \n"::"r"(count):"r1");
-    }
-    
+    #error "No delays"    
     #endif //__CODE_IN_XRAM
 }
 
@@ -87,18 +70,7 @@ void delayUs(unsigned int useconds)
                  "           blo   ___loop_u  \n"::"r"(useconds):"r1","r2");
 
     #else //__CODE_IN_XRAM
-
-    // This delay has been calibrated to take x microseconds
-    // It is written in assembler to be independent on compiler optimization
-    asm volatile("           mov   r1, #2     \n"
-                 "           mul   r2, %0, r1 \n"
-                 "           mov   r1, #0     \n"
-                 "___loop_u: cmp   r1, r2     \n"
-                 "           nop              \n"
-                 "           itt   lo         \n"
-                 "           addlo r1, r1, #1 \n"
-                 "           blo   ___loop_u  \n"::"r"(useconds):"r1","r2");
-    
+    #error "No delays"
     #endif //__CODE_IN_XRAM
 }