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Avionics
Software Development
Miosix Kernel
Commits
7c9bd45e
Commit
7c9bd45e
authored
5 years ago
by
Alvise de'Faveri
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[Aldeeran] Remove IRQ enable from BSP (done in main for enhanced readability)
parent
0e682103
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miosix/arch/cortexM3_stm32/stm32f103cb_skyward_alderaan/interfaces-impl/bsp.cpp
+21
-35
21 additions, 35 deletions
...tm32/stm32f103cb_skyward_alderaan/interfaces-impl/bsp.cpp
with
21 additions
and
35 deletions
miosix/arch/cortexM3_stm32/stm32f103cb_skyward_alderaan/interfaces-impl/bsp.cpp
+
21
−
35
View file @
7c9bd45e
...
...
@@ -51,19 +51,19 @@
namespace
miosix
{
/**
* Initilize SPI
*
\brief
Initi
a
lize SPI
1
*/
void
initSPI1
()
{
using
namespace
interfaces
;
// SPI1 intialization
spi1
::
cs
::
mode
(
Mode
::
OUTPUT
);
spi1
::
cs
::
high
();
spi1
::
sck
::
mode
(
Mode
::
ALTERNATE
);
spi1
::
miso
::
mode
(
Mode
::
ALTERNATE
);
spi1
::
mosi
::
mode
(
Mode
::
ALTERNATE
);
//
C
lock
//
APB2 c
lock
RCC
->
APB2ENR
|=
RCC_APB2ENR_SPI1EN
;
SPI1
->
CR1
=
SPI_CR1_SSM
//No HW cs
...
...
@@ -74,7 +74,7 @@ void initSPI1()
}
/**
* Initialize Canbus
*
\brief
Initialize Canbus
CAN1
*/
void
initCAN1
()
{
...
...
@@ -82,37 +82,26 @@ void initCAN1()
can1
::
rx
::
mode
(
Mode
::
ALTERNATE
);
can1
::
tx
::
mode
(
Mode
::
ALTERNATE
);
// clock
//
APB1
clock
RCC
->
APB1ENR
|=
RCC_APB1ENR_CAN1EN
;
NVIC_SetPriority
(
CAN1_RX1_IRQn
,
1
);
NVIC_EnableIRQ
(
CAN1_RX1_IRQn
);
}
/**
* Initialize hardware timer
*
\brief
Initialize hardware timer
TIM2
*/
void
initTIM2
()
{
using
namespace
interfaces
;
//
TIM2 initialization
//
APB1 clock
RCC
->
APB1ENR
|=
RCC_APB1ENR_TIM2EN
;
/
*
Clear the update event flag
*/
/
/
Clear the update event flag
TIM2
->
SR
=
0
;
/
*
Clear the counter value
*/
/
/
Clear the counter value
TIM2
->
CNT
=
0
;
/
*
Prescaler and Reload set to maximum = overflow every 59.6523235555 sec
*/
/
/
Prescaler and Reload set to maximum = overflow every 59.6523235555 sec
TIM2
->
PSC
=
0xFFFF
;
TIM2
->
ARR
=
0xFFFF
;
/* Configure Interupt */
TIM2
->
DIER
|=
TIM_DIER_UIE
;
NVIC_SetPriority
(
TIM2_IRQn
,
0
);
NVIC_EnableIRQ
(
TIM2_IRQn
);
/* Enable Counter */
TIM2
->
CR1
|=
TIM_CR1_CEN
;
}
...
...
@@ -149,8 +138,6 @@ void IRQbspInit()
initCAN1
();
initTIM2
();
// Uart works only in debug mode
//#ifdef DEBUG
// UART1 initialization
uart1
::
tx
::
mode
(
Mode
::
OUTPUT
);
uart1
::
rx
::
mode
(
Mode
::
INPUT
);
...
...
@@ -162,7 +149,6 @@ void IRQbspInit()
#else //STDOUT_REDIRECTED_TO_DCC
new
ARMDCC
();
#endif //STDOUT_REDIRECTED_TO_DCC
//#endif
}
void
bspInit2
()
...
...
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