Interrupts.md

@@ -82,7 +82,7 @@ To do this you will have to write the following code, which contains some magic
 
 > :warning: **RESET THE INTERRUPT PENDING BIT REGISTER in your IRQHandler, otherwise you will enter an infinite loop. This is because otherwise the interrupt would remain in ```pending``` state and triggered again and again and again....and again...**
 
-> :warning: **DON'T USE BLOCKING OR "HEAVY" FUNCTIONS (e.g. *printf()*) inside your interrupt. Remember that the CPU will stall for the whole time it will execute your IRQHandler. Most of the times, the only thing you will need in your IRQHandler is to set a global variable or to operate with registers.**
+> :warning: **DON'T USE BLOCKING OR "HEAVY" FUNCTIONS (e.g. *printf()*) inside your interrupt. Remember that the CPU will stall for the whole time it will execute your IRQHandler. Most of the times, the only thing you will need in your IRQHandler is to set a global variable or to operate with registers. You can check the Miosix Wiki page about synchronization primitives to know which operations are allowed inside and interrupt handler (see references below).**
 
 ```cpp
 // You need to define the IRQHandler you want to override as "naked".
@@ -104,7 +104,7 @@ void __attribute__((used)) EXTI4_IRQHandlerImpl()
 }
 ```
 
-> :warning: **RESET THE INTERRUPT PENDING BIT REGISTER in your IRQHandler, otherwise you will enter an infinite loop. Consider that pending bits are ```rc_w1``` bits, which means that in order to reset them you have to write 1, not 0. In this case an OR operation cannot be used : if the current pending register (PR) value is ```0101``` and we want to reset the least significant bit we would do ```0101 OR 0001```. The result of the operation is still ```0101```, but writing ```0101``` to the PR register would reset both the bits that where set to 1, not only the bit we were interested into!!! Resetting pending bits just requires and assignment operation using the provided macros.**
+> :warning: **RESETTING THE INTERRUPT PENDING BIT REGISTER: consider that pending bits are ```rc_w1``` bits, which means that in order to reset them you have to write 1, not 0. In this case an OR operation cannot be used : if the current pending register (PR) value is ```0101``` and we want to reset the least significant bit we would do ```0101 OR 0001```. The result of the operation is still ```0101```, but writing ```0101``` to the PR register would reset both the bits that where set to 1, not only the bit we were interested into!!! Resetting pending bits just requires and assignment operation using the provided macros.**
 
 ## References
 
@@ -112,4 +112,6 @@ void __attribute__((used)) EXTI4_IRQHandlerImpl()
 
 * [STM32F4 External Interrupts Tutorial](https://stm32f4-discovery.net/2014/08/stm32f4-external-interrupts-tutorial/)
 
-* [Intro to Hardware Interrupts](https://vivonomicon.com/2018/04/28/bare-metal-stm32-programming-part-4-intro-to-hardware-interrupts/)
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+* [Intro to Hardware Interrupts](https://vivonomicon.com/2018/04/28/bare-metal-stm32-programming-part-4-intro-to-hardware-interrupts/)
+
+* [Miosix Synchronization Primitives Wiki Page](https://miosix.org/wiki/index.php?title=Synchronization_primitives)
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