Safe-Guard-Memory.md

 ## Overview
-The STM32F2/F4 microcontrollers provide a backup domain that includes 4 Kbytes of backup SRAM. This region can be considered as an internal EEPROM when VBAT is present: its content is preserved upon reset if VBAT is connected. This means that it can be used as a safe-guard memory (SGM).  
+The STM32F2/F4 microcontrollers provide a backup domain that includes 4 Kbytes of backup SRAM. This region can be considered as an internal EEPROM when VBAT is present: its content is preserved upon reset if VBAT is connected. This means that it can be used as a safe-guard memory (SGM).
 
-> :information_source: **INFO: Of course you can connect VBAT to the board's power supply, but it would not provide the same reliability level as having a backup battery or a different power supply.**
+> :warning: **Of course you can connect VBAT to the board's power supply, but it would not provide the same reliability level as having a backup battery or a different power supply.**
+
+> :information_source: **If you are using a Discovery board, check its schematic to know if VBAT is connected. For example the STM32F407VG Discovery VBAT pin is directly connected to the board's main power supply, which can simplify testing the backup SRAM usage.**
+
+The backup region also includes twenty 32-bit registers that can be used store a total of 80 bytes (word-aligned). Backup registers are not reset by a system, a power reset, or when the device wakes up from the standby mode.
 
-The backup region also includes twenty 32-bit registers that can be used store a total of 80 bytes (word-aligned). Backup registers are not reset by a system, a power reset, or when the device wakes up from the standby mode.  
-  
 The Miosix safe-guard memory driver provides an interface to enable the backup SRAM, to enable/disable write protection and to retrieve the last reset reason of the board.  
 You can find the driver in `miosix-kernel/miosix/arch/common/drivers`.
 
 ## Usage
 First of all you have to enable the backup SRAM: the backup domain is not readable until the backup SRAM clock is enabled.  
-Moreover, after a reset, the backup domain is protected against possible unwanted write accesses, so you have to disable write protection before being able to write again to the backup region.  
-  
+Moreover, after a reset, the backup domain is protected against possible unwanted write accesses, so you have to disable write protection before being able to write again to the backup region.
+
 The Miosix SGM driver constructor prepares the backup domain for you: it enables the backup clock and disables the write protection. It also retrieves the last board reset reason.  
 Please remember that the backup domain content is wiped by the driver if, after the reset, the `RCC_CSR_SFTRSTF` (i.e. software reset) flag is not set in the `RCC_CSR` register.  
   
 > :warning: **WARNING: Notice that more than one flag could be set at the same time in the `RCC_CSR` register!**  
 > **(e.g. software reset and reset pin flags)**
   
-After enabling it, in order to read/write from/to the backup domain, you can simply use pointers or standard C/C++ functions, such as `memcpy` (better performance), starting from the backup region base address, which is `BKPSRAM_BASE`.  
-  
+After enabling it, in order to read/write from/to the backup domain, you can simply use pointers or standard C/C++ functions, such as `memcpy` (better performance), starting from the backup region base address, which is `BKPSRAM_BASE`.
+
 Otherwise, by specifing a dedicated section in the linker script (see below), you can use the `__attribute__(section(<section-name>))` in order to automatically store a global variable in the backup region. Then, in case of reboot, the variable's content is preserved.  
 The Miosix SGM driver defines the following macro:
 ```cpp
@@ -34,6 +36,10 @@ uint8_t myvar PRESERVE;
 // same as
 uint8_t myvar __attribute__((section(".preserve")));
 ```
+It is also possible to specify the exact address at which we want the variable to be allocated:
+```cpp
+uint8_t myvar __attribute__((section(".preserve__at_0x40024055")));
+```
 
 ## Example
 These basic examples show how you can write to the backup SRAM using the Miosix SGM driver.  
@@ -100,8 +106,8 @@ MEMORY
     backupram(rw) : ORIGIN = 0x40024000, LENGTH = 4K
 }
 ```
-Where in this case `0x40024000` is the backup SRAM base address and `4K` (4 Kbytes) is its size.  
-  
+Where in this case `0x40024000` is the backup SRAM base address and `4K` (4 Kbytes) is its size.
+
 A section in which `_preserve_start` and `_preserve_end` are defined is also needed, since these two addresses are used by the Miosix SGM driver.
 ```
 .preserve(NOLOAD) : ALIGN(4)