Matteo Pignataro authored 2 years ago and Niccolò Betto committed 2 years ago

 - Replaced task map with std::array
 - Rework on how tasks are removed

[I2C] Added high level methods, modified pin modes, deleted copy/move constructors and operators and bugfix in SyncI2C

- Added high level methods to read multiple bytes and write a single register
- Deleted copy/move constructors and operators
- Fixed SyncedI2C::readRegister method
- Changed pin modes from ALTERNATE_OD to ALTERNATE_OD_PULL_UP
- Modified tests in order to try also the new methods
- Uniformed passing of const reference in low-level and high-level drivers

Giulia Ghirardini authored 2 years ago and Alberto Nidasio committed 2 years ago

[LIS2MDL] Fixed selfTest issue register within idle mode, modified writeRegister readability, modified some comments

Also moved the writeBit config from SPITransaction to SPIConfig and added a byteOrder option used in registers reads and write.

- The driver logic has been moved directly into the Interrupt Service Routine for events so that the delay for a read or a write is drastically reduced. Now the thread, after setting up peripheral, start condition generation and address sending, is waken up only if the operation completed or an error occurred. Avoiding to wake up at every event the thread executing I2C operations reduces context switches and delay in the completion of the operation.
- Now errors are better handled. A user can request the last error(s) occurred.
- The support for 10-bit addressing is removed to simplify the driver and to avoid having something not tested in the main branch.

Low-level driver features (specific for the stm32f4 family):
- 7-bit (tested) and 10-bit (not tested yet) addressing;
- Speed modes: Standard (100kHz clock) and Fast (400kHz clock);
- Compatibility with all I2C peripherals till I2C4 (easy to extend to additional ones);
- Internal configuration of the pins in order to avoid forgetting to set them to ALTERNATE_OD mode (so, avoiding possibility of short-circuits between master and slave);
- The configurations of the slave (slave address, addressing mode and speed mode) we want to communicate with are setted before each read/write on the bus;
- Support for the reStart condition when wanting to write and then read from the same slave;
- Usage of interrupts when possible; In two cases we need polling anyway (limited to a parameter to avoid infinite polling): 
    . I2C_SR2_BUSY doesn't generate an interrupt and we can't communicate with the bus in BUSY state. 
    . I2C_SR1_SB do generate an interrupt, but its handling is a bit tricky since other interrupts are generated in the case of a reStart condition; also, using the interrupt for this, there would be the risk of a deadlock.
- Resilience to bus deadlocks;

High-level driver features:
- Resilience to bus deadlocks embedded before any operation on the bus;
- Implementation of higher level methods for using the bus;
- Possibility to have a synchronized version of the driver;

- Created two methods getAPBTimersClock() and getAPBPeripheralsClock() 
- Fixed wrong computation of APB2 frequency
- Previous usages of getAPBFrequency() now use getAPBTimersClock() for usage compatibility